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author | mdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-08-18 20:42:47 +0000 |
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committer | mdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-08-18 20:42:47 +0000 |
commit | 4e094cba20ae1b376232dabd7f6e1b42e38b9a5a (patch) | |
tree | 31a9670b8317027786b80e967c158499e744fcfb /MdePkg/Include/Arm/ProcessorBind.h | |
parent | 631226795b1efa9cdf0f43f344068c23b25aa258 (diff) | |
download | edk2-4e094cba20ae1b376232dabd7f6e1b42e38b9a5a.tar.gz edk2-4e094cba20ae1b376232dabd7f6e1b42e38b9a5a.tar.bz2 edk2-4e094cba20ae1b376232dabd7f6e1b42e38b9a5a.zip |
Add ARM specific version of ProcessorBind.h
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9095 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include/Arm/ProcessorBind.h')
-rw-r--r-- | MdePkg/Include/Arm/ProcessorBind.h | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/MdePkg/Include/Arm/ProcessorBind.h b/MdePkg/Include/Arm/ProcessorBind.h new file mode 100644 index 0000000000..6e2697d3e8 --- /dev/null +++ b/MdePkg/Include/Arm/ProcessorBind.h @@ -0,0 +1,128 @@ + +/** @file + Processor or Compiler specific defines and types for ARM. + + Copyright (c) 2006 - 2009, Intel Corporation + Portions copyright (c) 2008-2009 Apple Inc. All rights reserved. + All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __PROCESSOR_BIND_H__ +#define __PROCESSOR_BIND_H__ + +/// +/// Define the processor type so other code can make processor based choices +/// +#define MDE_CPU_ARM + +// +// Make sure we are useing the correct packing rules per EFI specification +// +#ifndef __GNUC__ +#pragma pack() +#endif + +#if _MSC_EXTENSIONS + // + // use Microsoft* C complier dependent interger width types + // + typedef unsigned __int64 UINT64; + typedef __int64 INT64; + typedef unsigned __int32 UINT32; + typedef __int32 INT32; + typedef unsigned short UINT16; + typedef unsigned short CHAR16; + typedef short INT16; + typedef unsigned char BOOLEAN; + typedef unsigned char UINT8; + typedef char CHAR8; + typedef char INT8; +#else + // + // Assume standard ARM alignment. + // Need to check portability of long long + // + typedef unsigned long long UINT64; + typedef long long INT64; + typedef unsigned int UINT32; + typedef int INT32; + typedef unsigned short UINT16; + typedef unsigned short CHAR16; + typedef short INT16; + typedef unsigned char BOOLEAN; + typedef unsigned char UINT8; + typedef char CHAR8; + typedef char INT8; +#endif + +///
+/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef UINT32 UINTN; + +///
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
+/// 8 bytes on supported 64-bit processor instructions)
+///
+typedef INT32 INTN; + +// +// Processor specific defines +// +
+///
+/// A value of native width with the highest bit set.
+///
+#define MAX_BIT 0x80000000 + +///
+/// A value of native width with the two highest bits set.
+///
+#define MAX_2_BITS 0xC0000000 + +/// +/// Maximum legal ARM address +/// +#define MAX_ADDRESS 0xFFFFFFFF + +/// +/// The stack alignment required for ARM +/// +#define CPU_STACK_ALIGNMENT sizeof(UINT64) + +// +// Modifier to ensure that all protocol member functions and EFI intrinsics +// use the correct C calling convention. All protocol member functions and +// EFI intrinsics are required to modify thier member functions with EFIAPI. +// +#define EFIAPI + +#if defined(__GNUC__) + /// + /// For GNU assembly code, .global or .globl can declare global symbols. + /// Define this macro to unify the usage. + /// + #define ASM_GLOBAL .globl +#endif + +/**
+ Return the pointer to the first instruction of a function given a function pointer.
+ On ARM CPU architectures, these two pointer values are the same,
+ so the implementation of this macro is very simple.
+
+ @param FunctionPointer A pointer to a function.
+
+ @return The pointer to the first instruction of a function given a function pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (FunctionPointer) + +#endif |