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| author | Chao Li <lichao@loongson.cn> | 2022-09-06 15:53:36 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-10-14 02:16:33 +0000 |
| commit | f0a704f9b506bdd7bd6396504c299058a26055ab (patch) | |
| tree | fceeb34ca5b47adee766f5ac3b186135b7fc7960 /MdePkg/Include/Protocol | |
| parent | 76bf716a7ac588bf9e187f4411f55ce8d56f204c (diff) | |
| download | edk2-f0a704f9b506bdd7bd6396504c299058a26055ab.tar.gz edk2-f0a704f9b506bdd7bd6396504c299058a26055ab.tar.bz2 edk2-f0a704f9b506bdd7bd6396504c299058a26055ab.zip | |
MdePkg/Include: LoongArch definitions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
Add LoongArch processor related definitions.
For the Http boot and PXE boot types seeing this URL section "Processor
Architecture Type" for the LOONGARCH values:
https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml
For definitions of PE/COFF and LOONGARCH relocation types, see the
"Machine Types" and "Basic Relocation Types" sections of this URL for
LOONGARCH values:
https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
For the register definitions of exceptions context, see the UEFI V2.10
18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH
definitions:
https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdePkg/Include/Protocol')
| -rw-r--r-- | MdePkg/Include/Protocol/DebugSupport.h | 107 | ||||
| -rw-r--r-- | MdePkg/Include/Protocol/PxeBaseCode.h | 3 |
2 files changed, 103 insertions, 7 deletions
diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protocol/DebugSupport.h index ec5b92a5c5..2b0ae2d157 100644 --- a/MdePkg/Include/Protocol/DebugSupport.h +++ b/MdePkg/Include/Protocol/DebugSupport.h @@ -654,17 +654,110 @@ typedef struct { UINT64 X31;
} EFI_SYSTEM_CONTEXT_RISCV64;
+//
+// LoongArch processor exception types.
+//
+#define EXCEPT_LOONGARCH_INT 0
+#define EXCEPT_LOONGARCH_PIL 1
+#define EXCEPT_LOONGARCH_PIS 2
+#define EXCEPT_LOONGARCH_PIF 3
+#define EXCEPT_LOONGARCH_PME 4
+#define EXCEPT_LOONGARCH_PNR 5
+#define EXCEPT_LOONGARCH_PNX 6
+#define EXCEPT_LOONGARCH_PPI 7
+#define EXCEPT_LOONGARCH_ADE 8
+#define EXCEPT_LOONGARCH_ALE 9
+#define EXCEPT_LOONGARCH_BCE 10
+#define EXCEPT_LOONGARCH_SYS 11
+#define EXCEPT_LOONGARCH_BRK 12
+#define EXCEPT_LOONGARCH_INE 13
+#define EXCEPT_LOONGARCH_IPE 14
+#define EXCEPT_LOONGARCH_FPD 15
+#define EXCEPT_LOONGARCH_SXD 16
+#define EXCEPT_LOONGARCH_ASXD 17
+#define EXCEPT_LOONGARCH_FPE 18
+#define EXCEPT_LOONGARCH_TBR 64 // For code only, there is no such type in the ISA spec, the TLB refill is defined for an independent exception.
+
+//
+// LoongArch processor Interrupt types.
+//
+#define EXCEPT_LOONGARCH_INT_SIP0 0
+#define EXCEPT_LOONGARCH_INT_SIP1 1
+#define EXCEPT_LOONGARCH_INT_IP0 2
+#define EXCEPT_LOONGARCH_INT_IP1 3
+#define EXCEPT_LOONGARCH_INT_IP2 4
+#define EXCEPT_LOONGARCH_INT_IP3 5
+#define EXCEPT_LOONGARCH_INT_IP4 6
+#define EXCEPT_LOONGARCH_INT_IP5 7
+#define EXCEPT_LOONGARCH_INT_IP6 8
+#define EXCEPT_LOONGARCH_INT_IP7 9
+#define EXCEPT_LOONGARCH_INT_PMC 10
+#define EXCEPT_LOONGARCH_INT_TIMER 11
+#define EXCEPT_LOONGARCH_INT_IPI 12
+
+//
+// For coding convenience, define the maximum valid
+// LoongArch interrupt.
+//
+#define MAX_LOONGARCH_INTERRUPT 14
+
+typedef struct {
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 R16;
+ UINT64 R17;
+ UINT64 R18;
+ UINT64 R19;
+ UINT64 R20;
+ UINT64 R21;
+ UINT64 R22;
+ UINT64 R23;
+ UINT64 R24;
+ UINT64 R25;
+ UINT64 R26;
+ UINT64 R27;
+ UINT64 R28;
+ UINT64 R29;
+ UINT64 R30;
+ UINT64 R31;
+
+ UINT64 CRMD; // CuRrent MoDe information
+ UINT64 PRMD; // PRe-exception MoDe information
+ UINT64 EUEN; // Extended component Unit ENable
+ UINT64 MISC; // MISCellaneous controller
+ UINT64 ECFG; // Exception ConFiGuration
+ UINT64 ESTAT; // Exception STATus
+ UINT64 ERA; // Exception Return Address
+ UINT64 BADV; // BAD Virtual address
+ UINT64 BADI; // BAD Instruction
+} EFI_SYSTEM_CONTEXT_LOONGARCH64;
+
///
/// Universal EFI_SYSTEM_CONTEXT definition.
///
typedef union {
- EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
- EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
- EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
- EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
- EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
- EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
- EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
+ EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
+ EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
+ EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
+ EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
+ EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
+ EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
+ EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
+ EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64;
} EFI_SYSTEM_CONTEXT;
//
diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Protocol/PxeBaseCode.h index 11872d602d..6787941a5d 100644 --- a/MdePkg/Include/Protocol/PxeBaseCode.h +++ b/MdePkg/Include/Protocol/PxeBaseCode.h @@ -4,6 +4,7 @@ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -158,6 +159,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B
#elif defined (MDE_CPU_RISCV64)
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B
+#elif defined (MDE_CPU_LOONGARCH64)
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027
#endif
///
|