1. refine the comments

2. use BITx

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6695 6f19259b-4bc3-4df7-8a09-765794883524

8 files changed, 148 insertions, 147 deletions

diff --git a/MdePkg/Include/IndustryStandard/Acpi10.h b/MdePkg/Include/IndustryStandard/Acpi10.h
index 159a01cc41..7afb678a99 100644
--- a/MdePkg/Include/IndustryStandard/Acpi10.h
+++ b/MdePkg/Include/IndustryStandard/Acpi10.h
@@ -23,11 +23,10 @@ typedef struct {
   UINT32  Length;

 } EFI_ACPI_COMMON_HEADER;

 

-//

-// Common ACPI description table header.  This structure prefaces most ACPI tables.

-//

 #pragma pack(1)

-

+///

+/// Common ACPI description table header.  This structure prefaces most ACPI tables.

+///

 typedef struct {

   UINT32  Signature;

   UINT32  Length;

@@ -39,8 +38,8 @@ typedef struct {
   UINT32  CreatorId;

   UINT32  CreatorRevision;

 } EFI_ACPI_DESCRIPTION_HEADER;

-

 #pragma pack()

+

 //

 // Define for Desriptor

 //

@@ -63,10 +62,11 @@ typedef struct {
 // Ensure proper structure formats

 //

 #pragma pack(1)

-//

-// The commond definition of QWORD, DWORD, and WORD

-// Address Space Descriptors

-//

+

+///

+/// The commond definition of QWORD, DWORD, and WORD

+/// Address Space Descriptors

+///

 typedef struct {

   UINT8   Desc;

   UINT16  Len;

@@ -208,16 +208,16 @@ typedef struct {
 // Fixed ACPI Description Table Fixed Feature Flags

 // All other bits are reserved and must be set to 0.

 //

-#define EFI_ACPI_1_0_WBINVD       (1 << 0)

-#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)

-#define EFI_ACPI_1_0_PROC_C1      (1 << 2)

-#define EFI_ACPI_1_0_P_LVL2_UP    (1 << 3)

-#define EFI_ACPI_1_0_PWR_BUTTON   (1 << 4)

-#define EFI_ACPI_1_0_SLP_BUTTON   (1 << 5)

-#define EFI_ACPI_1_0_FIX_RTC      (1 << 6)

-#define EFI_ACPI_1_0_RTC_S4       (1 << 7)

-#define EFI_ACPI_1_0_TMR_VAL_EXT  (1 << 8)

-#define EFI_ACPI_1_0_DCK_CAP      (1 << 9)

+#define EFI_ACPI_1_0_WBINVD               BIT0

+#define EFI_ACPI_1_0_WBINVD_FLUSH         BIT1

+#define EFI_ACPI_1_0_PROC_C1              BIT2

+#define EFI_ACPI_1_0_P_LVL2_UP            BIT3

+#define EFI_ACPI_1_0_PWR_BUTTON           BIT4

+#define EFI_ACPI_1_0_SLP_BUTTON           BIT5

+#define EFI_ACPI_1_0_FIX_RTC              BIT6

+#define EFI_ACPI_1_0_RTC_S4               BIT7

+#define EFI_ACPI_1_0_TMR_VAL_EXT          BIT8

+#define EFI_ACPI_1_0_DCK_CAP              BIT9

 

 ///

 /// Firmware ACPI Control Structure

@@ -236,7 +236,7 @@ typedef struct {
 /// Firmware Control Structure Feature Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)

+#define EFI_ACPI_1_0_S4BIOS_F             BIT0

 

 ///

 /// Multiple APIC Description Table header definition.  The rest of the table

@@ -257,7 +257,7 @@ typedef struct {
 /// Multiple APIC Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_1_0_PCAT_COMPAT  (1 << 0)

+#define EFI_ACPI_1_0_PCAT_COMPAT           BIT0

 

 //

 // Multiple APIC Description Table APIC structure types

@@ -288,7 +288,7 @@ typedef struct {
 ///

 /// Local APIC Flags.  All other bits are reserved and must be 0.

 ///

-#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)

+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED      BIT0

 

 ///

 /// IO APIC Structure

diff --git a/MdePkg/Include/IndustryStandard/Acpi20.h b/MdePkg/Include/IndustryStandard/Acpi20.h
index 8ac8076f7d..bf529e499d 100644
--- a/MdePkg/Include/IndustryStandard/Acpi20.h
+++ b/MdePkg/Include/IndustryStandard/Acpi20.h
@@ -160,31 +160,31 @@ typedef struct {
 ///

 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03

 

-///

-/// Fixed ACPI Description Table Boot Architecture Flags

-/// All other bits are reserved and must be set to 0.

-///

-#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)

-#define EFI_ACPI_2_0_8042           (1 << 1)

+//

+// Fixed ACPI Description Table Boot Architecture Flags

+// All other bits are reserved and must be set to 0.

+//

+#define EFI_ACPI_2_0_LEGACY_DEVICES          BIT0

+#define EFI_ACPI_2_0_8042                    BIT1

 

 //

 // Fixed ACPI Description Table Fixed Feature Flags

 // All other bits are reserved and must be set to 0.

 //

-#define EFI_ACPI_2_0_WBINVD         (1 << 0)

-#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)

-#define EFI_ACPI_2_0_PROC_C1        (1 << 2)

-#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)

-#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)

-#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)

-#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)

-#define EFI_ACPI_2_0_RTC_S4         (1 << 7)

-#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)

-#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)

-#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)

-#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)

-#define EFI_ACPI_2_0_HEADLESS       (1 << 12)

-#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)

+#define EFI_ACPI_2_0_WBINVD                  BIT0

+#define EFI_ACPI_2_0_WBINVD_FLUSH            BIT1

+#define EFI_ACPI_2_0_PROC_C1                 BIT2

+#define EFI_ACPI_2_0_P_LVL2_UP               BIT3

+#define EFI_ACPI_2_0_PWR_BUTTON              BIT4

+#define EFI_ACPI_2_0_SLP_BUTTON              BIT5

+#define EFI_ACPI_2_0_FIX_RTC                 BIT6

+#define EFI_ACPI_2_0_RTC_S4                  BIT7

+#define EFI_ACPI_2_0_TMR_VAL_EXT             BIT8

+#define EFI_ACPI_2_0_DCK_CAP                 BIT9

+#define EFI_ACPI_2_0_RESET_REG_SUP           BIT10

+#define EFI_ACPI_2_0_SEALED_CASE             BIT11

+#define EFI_ACPI_2_0_HEADLESS                BIT12

+#define EFI_ACPI_2_0_CPU_SW_SLP              BIT13

 

 ///

 /// Firmware ACPI Control Structure

@@ -210,7 +210,7 @@ typedef struct {
 /// Firmware Control Structure Feature Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)

+#define EFI_ACPI_2_0_S4BIOS_F        BIT0

 

 ///

 /// Multiple APIC Description Table header definition.  The rest of the table

@@ -231,7 +231,7 @@ typedef struct {
 /// Multiple APIC Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)

+#define EFI_ACPI_2_0_PCAT_COMPAT          BIT0

 

 //

 // Multiple APIC Description Table APIC structure types

@@ -266,7 +266,7 @@ typedef struct {
 ///

 /// Local APIC Flags.  All other bits are reserved and must be 0.

 ///

-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)

+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED         BIT0

 

 ///

 /// IO APIC Structure

diff --git a/MdePkg/Include/IndustryStandard/Acpi30.h b/MdePkg/Include/IndustryStandard/Acpi30.h
index 75b5f8eba8..69a5e70ca9 100644
--- a/MdePkg/Include/IndustryStandard/Acpi30.h
+++ b/MdePkg/Include/IndustryStandard/Acpi30.h
@@ -185,36 +185,36 @@ typedef struct {
 // Fixed ACPI Description Table Boot Architecture Flags

 // All other bits are reserved and must be set to 0.

 //

-#define EFI_ACPI_3_0_LEGACY_DEVICES     (1 << 0)

-#define EFI_ACPI_3_0_8042               (1 << 1)

-#define EFI_ACPI_3_0_VGA_NOT_PRESENT    (1 << 2)

-#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED  (1 << 3)

-#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS (1 << 4)

+#define EFI_ACPI_3_0_LEGACY_DEVICES              BIT0

+#define EFI_ACPI_3_0_8042                        BIT1

+#define EFI_ACPI_3_0_VGA_NOT_PRESENT             BIT2

+#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED           BIT3

+#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS          BIT4

 

 //

 // Fixed ACPI Description Table Fixed Feature Flags

 // All other bits are reserved and must be set to 0.

 //

-#define EFI_ACPI_3_0_WBINVD                   (1 << 0)

-#define EFI_ACPI_3_0_WBINVD_FLUSH             (1 << 1)

-#define EFI_ACPI_3_0_PROC_C1                  (1 << 2)

-#define EFI_ACPI_3_0_P_LVL2_UP                (1 << 3)

-#define EFI_ACPI_3_0_PWR_BUTTON               (1 << 4)

-#define EFI_ACPI_3_0_SLP_BUTTON               (1 << 5)

-#define EFI_ACPI_3_0_FIX_RTC                  (1 << 6)

-#define EFI_ACPI_3_0_RTC_S4                   (1 << 7)

-#define EFI_ACPI_3_0_TMR_VAL_EXT              (1 << 8)

-#define EFI_ACPI_3_0_DCK_CAP                  (1 << 9)

-#define EFI_ACPI_3_0_RESET_REG_SUP            (1 << 10)

-#define EFI_ACPI_3_0_SEALED_CASE              (1 << 11)

-#define EFI_ACPI_3_0_HEADLESS                 (1 << 12)

-#define EFI_ACPI_3_0_CPU_SW_SLP               (1 << 13)

-#define EFI_ACPI_3_0_PCI_EXP_WAK              (1 << 14)

-#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK       (1 << 15)

-#define EFI_ACPI_3_0_S4_RTC_STS_VALID         (1 << 16)

-#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE  (1 << 17)

-#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL (1 << 18)

-#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)

+#define EFI_ACPI_3_0_WBINVD                                 BIT0

+#define EFI_ACPI_3_0_WBINVD_FLUSH                           BIT1

+#define EFI_ACPI_3_0_PROC_C1                                BIT2

+#define EFI_ACPI_3_0_P_LVL2_UP                              BIT3

+#define EFI_ACPI_3_0_PWR_BUTTON                             BIT4

+#define EFI_ACPI_3_0_SLP_BUTTON                             BIT5

+#define EFI_ACPI_3_0_FIX_RTC                                BIT6

+#define EFI_ACPI_3_0_RTC_S4                                 BIT7

+#define EFI_ACPI_3_0_TMR_VAL_EXT                            BIT8

+#define EFI_ACPI_3_0_DCK_CAP                                BIT9

+#define EFI_ACPI_3_0_RESET_REG_SUP                          BIT10

+#define EFI_ACPI_3_0_SEALED_CASE                            BIT11

+#define EFI_ACPI_3_0_HEADLESS                               BIT12

+#define EFI_ACPI_3_0_CPU_SW_SLP                             BIT13

+#define EFI_ACPI_3_0_PCI_EXP_WAK                            BIT14

+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK                     BIT15

+#define EFI_ACPI_3_0_S4_RTC_STS_VALID                       BIT16

+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE                BIT17

+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL               BIT18

+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE   BIT19

 

 ///

 /// Firmware ACPI Control Structure

@@ -240,7 +240,7 @@ typedef struct {
 /// Firmware Control Structure Feature Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)

+#define EFI_ACPI_3_0_S4BIOS_F       BIT0

 

 //

 // Differentiated System Description Table,

@@ -271,7 +271,7 @@ typedef struct {
 /// Multiple APIC Flags

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_3_0_PCAT_COMPAT  (1 << 0)

+#define EFI_ACPI_3_0_PCAT_COMPAT         BIT0

 

 //

 // Multiple APIC Description Table APIC structure types

@@ -306,7 +306,7 @@ typedef struct {
 ///

 /// Local APIC Flags.  All other bits are reserved and must be 0.

 ///

-#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)

+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED        BIT0

 

 ///

 /// IO APIC Structure

@@ -433,7 +433,7 @@ typedef struct {
 /// Platform Interrupt Source Flags.

 /// All other bits are reserved and must be set to 0.

 ///

-#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE     (1 << 0)

+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE          BIT0

 

 ///

 /// Smart Battery Description Table (SBST)

@@ -474,7 +474,7 @@ typedef struct {
 ///

 typedef struct {

   EFI_ACPI_DESCRIPTION_HEADER Header;

-  UINT32                      Reserved1;  // Must be set to 1

+  UINT32                      Reserved1;  ///< Must be set to 1

   UINT64                      Reserved2;

 } EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;

 

@@ -483,11 +483,11 @@ typedef struct {
 ///

 #define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x02

 

-///

-/// SRAT structure types.

-/// All other values between 0x02 an 0xFF are reserved and

-/// will be ignored by OSPM.

-///

+//

+// SRAT structure types.

+// All other values between 0x02 an 0xFF are reserved and

+// will be ignored by OSPM.

+//

 #define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00

 #define EFI_ACPI_3_0_MEMORY_AFFINITY                      0x01

 

diff --git a/MdePkg/Include/IndustryStandard/Atapi.h b/MdePkg/Include/IndustryStandard/Atapi.h
index 0f34d8dfc4..4fadf10eee 100644
--- a/MdePkg/Include/IndustryStandard/Atapi.h
+++ b/MdePkg/Include/IndustryStandard/Atapi.h
@@ -141,9 +141,9 @@ typedef struct {
   UINT8 additional_sense_bytes_18_253[253 - 18 + 1];

 } ATAPI_REQUEST_SENSE_DATA;

 

-///

-/// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)

-///

+//

+// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)

+//

 

 ///

 /// READ CAPACITY Data 

@@ -342,7 +342,6 @@ typedef union {
 #define ATA_CMD_READ_LONG_WITH_RETRY    0x23   ///< defined in ATA-5

 #define ATA_CMD_READ_SECTORS_EXT        0x24   ///< defined in ATA-6

 

-

 //

 // Class 2: PIO Data-Out Commands

 //

@@ -382,28 +381,25 @@ typedef union {
 #define ATA_CMD_STANDBY_ALIAS           0xe2  ///< defined in ATA-6

 #define ATA_CMD_STANDBY_IMMEDIATE       0x94  ///< defined in ATA-3

 #define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0  ///< defined in ATA-6

-///

-/// S.M.A.R.T

-///

+//

+// S.M.A.R.T

+//

 #define ATA_CMD_SMART               0xb0

 #define ATA_CONSTANT_C2             0xc2

 #define ATA_CONSTANT_4F             0x4f

 #define ATA_SMART_ENABLE_OPERATION  0xd8

 #define ATA_SMART_RETURN_STATUS     0xda

 

-

-///

-/// Class 4: DMA Command

-///

+//

+// Class 4: DMA Command

+//

 #define ATA_CMD_READ_DMA              0xc8   ///< defined in ATA-6

 #define ATA_CMD_READ_DMA_WITH_RETRY   0xc9   ///< defined in ATA-4

 #define ATA_CMD_READ_DMA_EXT          0x25   ///< defined in ATA-6

 #define ATA_CMD_WRITE_DMA             0xca   ///< defined in ATA-6

 #define ATA_CMD_WRITE_DMA_WITH_RETRY  0xcb   ///< defined in ATA-4

 #define ATA_CMD_WRITE_DMA_EXT         0x35   ///< defined in ATA-6

-

-

-

+        

 ///

 /// default content of device control register, disable INT,

 /// Bit3 is set to 1 according ATA-1

@@ -419,12 +415,12 @@ typedef union {
 

 #define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i

 

-///

-/// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier

-/// defined in MultiMedia Commands (MMC, MMC-2) 

-///

-/// Sense Key 

-///

+//

+// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier

+// defined in MultiMedia Commands (MMC, MMC-2) 

+//

+// Sense Key 

+//

 #define ATA_SK_NO_SENSE         (0x0)

 #define ATA_SK_RECOVERY_ERROR   (0x1)

 #define ATA_SK_NOT_READY        (0x2)

@@ -442,9 +438,9 @@ typedef union {
 #define ATA_SK_MISCOMPARE       (0xE)

 #define ATA_SK_RESERVED_F       (0xF)

 

-///

-/// Additional Sense Codes

-///

+//

+// Additional Sense Codes

+//

 #define ATA_ASC_NOT_READY                   (0x04)

 #define ATA_ASC_MEDIA_ERR1                  (0x10)

 #define ATA_ASC_MEDIA_ERR2                  (0x11)

@@ -466,9 +462,9 @@ typedef union {
 //

 #define ATA_ASCQ_IN_PROGRESS  (0x01)

 

-///

-/// Error Register

-///

+//

+// Error Register

+//

 #define ATA_ERRREG_BBK   BIT7  ///< Bad block detected      defined in ATA-1

 #define ATA_ERRREG_UNC   BIT6  ///< Uncorrectable Data      defined in ATA-3

 #define ATA_ERRREG_MC    BIT5  ///< Media Change            defined in ATA-3

@@ -478,9 +474,9 @@ typedef union {
 #define ATA_ERRREG_TK0NF BIT1  ///< Track 0 Not Found       defined in ATA-3

 #define ATA_ERRREG_AMNF  BIT0  ///< Address Mark Not Found  defined in ATA-3

 

-///

-/// Status Register

-///

+//

+// Status Register

+//

 #define ATA_STSREG_BSY   BIT7  ///< Controller Busy         defined in ATA-6

 #define ATA_STSREG_DRDY  BIT6  ///< Drive Ready             defined in ATA-6

 #define ATA_STSREG_DWF   BIT5  ///< Drive Write Fault       defined in ATA-6

@@ -490,9 +486,9 @@ typedef union {
 #define ATA_STSREG_IDX   BIT1  ///< Index                   defined in ATA-3

 #define ATA_STSREG_ERR   BIT0  ///< Error                   defined in ATA-6

 

-///

-/// Device Control Register

-///

+//

+// Device Control Register

+//

 #define ATA_CTLREG_SRST  BIT2  ///< Software Reset

 #define ATA_CTLREG_IEN_L BIT1  ///< Interrupt Enable #

 

diff --git a/MdePkg/Include/IndustryStandard/ElTorito.h b/MdePkg/Include/IndustryStandard/ElTorito.h
index 12375015ef..a8deb461d0 100644
--- a/MdePkg/Include/IndustryStandard/ElTorito.h
+++ b/MdePkg/Include/IndustryStandard/ElTorito.h
@@ -19,9 +19,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #ifndef _ELTORITO_H_

 #define _ELTORITO_H_

 

-///

-/// CDROM_VOLUME_DESCRIPTOR.Types, defined in ISO 9660

-///

+//

+// CDROM_VOLUME_DESCRIPTOR.Types, defined in ISO 9660

+//

 #define CDVOL_TYPE_STANDARD 0x0

 #define CDVOL_TYPE_CODED    0x1

 #define CDVOL_TYPE_END      0xFF

diff --git a/MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h b/MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h
index 7fc7ac6377..a156b53e1a 100644
--- a/MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h
+++ b/MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h
@@ -1,6 +1,6 @@
 /** @file

-  The definition for iSCSI Boot Firmware Table, it's defined in

-  Microsoft iBFT document. 

+  The definition for iSCSI Boot Firmware Table, it's defined in Microsoft's

+  iSCSI Boot Firmware Table(iBFT) as Defined in ACPI 3.0b Specification. 

   

   Copyright (c) 2006 - 2008, Intel Corporation

   All rights reserved. This program and the accompanying materials                          

@@ -85,8 +85,9 @@ typedef struct {
   UINT16                                               Target1Offset;  

 } EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE;

 

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE_VERSION            0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE_FLAG_BOOT_FAILOVER 0x1

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE_VERSION              0x1

+

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE_FLAG_BOOT_FAILOVER   BIT0

 

 ///

 /// Initiator Structure

@@ -101,9 +102,10 @@ typedef struct {
   UINT16                                               IScsiNameOffset;

 } EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE;

 

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_VERSION            0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_FLAG_BLOCK_VALID   0x1 

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_FLAG_BOOT_SELECTED 0x2 

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_VERSION             0x1

+

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_FLAG_BLOCK_VALID    BIT0 

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_FLAG_BOOT_SELECTED  BIT1 

 

 ///

 /// NIC Structure

@@ -124,10 +126,11 @@ typedef struct {
   UINT16                                               HostNameOffset;

 } EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE;

 

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_VERSION            0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_BLOCK_VALID   0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_BOOT_SELECTED 0x2

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_GLOBAL        0x4

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_VERSION                 0x1

+

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_BLOCK_VALID        BIT0

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_BOOT_SELECTED      BIT1

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_GLOBAL             BIT2

 

 ///

 /// Target Structure

@@ -151,11 +154,12 @@ typedef struct {
   UINT16                                               ReverseCHAPSecretOffset;

 } EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE;

 

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_VERSION            0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_BLOCK_VALID   0x1

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_BOOT_SELECTED 0x2

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_RADIUS_CHAP   0x4

-#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_RADIUS_RCHAP  0x8

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_VERSION               0x1

+

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_BLOCK_VALID      BIT0

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_BOOT_SELECTED    BIT1

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_RADIUS_CHAP      BIT2

+#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_RADIUS_RCHAP     BIT3

 

 #pragma pack()

 

diff --git a/MdePkg/Include/IndustryStandard/Pci22.h b/MdePkg/Include/IndustryStandard/Pci22.h
index d88b28f825..9ac34aae82 100644
--- a/MdePkg/Include/IndustryStandard/Pci22.h
+++ b/MdePkg/Include/IndustryStandard/Pci22.h
@@ -123,9 +123,9 @@ typedef struct {
   UINT16  BridgeControl;        ///< Bridge Control

 } PCI_CARDBUS_CONTROL_REGISTER;

 

-///

-/// Definitions of PCI class bytes and manipulation macros.

-///

+//

+// Definitions of PCI class bytes and manipulation macros.

+//

 #define PCI_CLASS_OLD                 0x00

 #define   PCI_CLASS_OLD_OTHER           0x00

 #define   PCI_CLASS_OLD_VGA             0x01

@@ -350,9 +350,9 @@ typedef struct {
 #define PCI_MAXGNT_OFFSET                           0x3E ///< Max Grant Register

 #define PCI_MAXLAT_OFFSET                           0x3F ///< Max Latency Register

 

-///

-/// defined in PCI-to-PCI Bridge Architecture Specification

-///

+//

+// defined in PCI-to-PCI Bridge Architecture Specification

+//

 #define PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET      0x18   

 #define PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET    0x19   

 #define PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET  0x1a   

@@ -389,9 +389,9 @@ typedef union {
 #define EFI_PCI_COMMAND_SERR                            BIT8   ///< 0x0100

 #define EFI_PCI_COMMAND_FAST_BACK_TO_BACK               BIT9   ///< 0x0200

 

-///

-/// defined in PCI-to-PCI Bridge Architecture Specification

-///

+//

+// defined in PCI-to-PCI Bridge Architecture Specification

+//

 #define EFI_PCI_BRIDGE_CONTROL_PARITY_ERROR_RESPONSE    BIT0   ///< 0x0001

 #define EFI_PCI_BRIDGE_CONTROL_SERR                     BIT1   ///< 0x0002

 #define EFI_PCI_BRIDGE_CONTROL_ISA                      BIT2   ///< 0x0004

@@ -405,9 +405,9 @@ typedef union {
 #define EFI_PCI_BRIDGE_CONTROL_TIMER_STATUS             BIT10  ///< 0x0400

 #define EFI_PCI_BRIDGE_CONTROL_DISCARD_TIMER_SERR       BIT11  ///< 0x0800

 

-///

-/// Following are the PCI-CARDBUS bridge control bit, defined in PC Card Standard

-///

+//

+// Following are the PCI-CARDBUS bridge control bit, defined in PC Card Standard

+//

 #define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE           BIT7   ///< 0x0080

 #define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE       BIT8   ///< 0x0100

 #define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE       BIT9   ///< 0x0200

@@ -436,6 +436,7 @@ typedef union {
 #define EFI_PCI_CAPABILITY_ID_SLOTID  0x04

 #define EFI_PCI_CAPABILITY_ID_MSI     0x05

 #define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06

+

 typedef struct {

   UINT8 CapabilityID;

   UINT8 NextItemPtr;

@@ -543,7 +544,7 @@ typedef struct {
 #define PCI_EXPANSION_ROM_HEADER_SIGNATURE              0xaa55

 #define PCI_DATA_STRUCTURE_SIGNATURE                    SIGNATURE_32 ('P', 'C', 'I', 'R')

 #define PCI_CODE_TYPE_PCAT_IMAGE                        0x00

-#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED         0x0001  ///<defined in UEFI spec.

+#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED         0x0001  ///< defined in UEFI spec.

 

 typedef struct {

   UINT16  Signature;    ///< 0xaa55

diff --git a/MdePkg/Include/IndustryStandard/Pci23.h b/MdePkg/Include/IndustryStandard/Pci23.h
index e1289f75c6..b100dce1a0 100644
--- a/MdePkg/Include/IndustryStandard/Pci23.h
+++ b/MdePkg/Include/IndustryStandard/Pci23.h
@@ -27,9 +27,9 @@
 ///

 #define PCI_EXP_MAX_CONFIG_OFFSET     0x1000

 

-//

-// PCI Capability List IDs and records

-//

+///

+/// PCI Capability List IDs and records

+///

 #define EFI_PCI_CAPABILITY_ID_PCIX    0x07

 

 #pragma pack(1)