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| author | Tuan Phan <tphan@ventanamicro.com> | 2023-06-07 10:30:21 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-06-15 05:32:51 +0000 |
| commit | ea55bd8f66eeca5f4e80c3679bcf1b1007286b8a (patch) | |
| tree | 5f006c11a0409b290f073227e196a71510a467b1 /MdePkg/Include | |
| parent | 4dba2a9d08653a25750c9c74822adb6003c38e77 (diff) | |
| download | edk2-ea55bd8f66eeca5f4e80c3679bcf1b1007286b8a.tar.gz edk2-ea55bd8f66eeca5f4e80c3679bcf1b1007286b8a.tar.bz2 edk2-ea55bd8f66eeca5f4e80c3679bcf1b1007286b8a.zip | |
UefiCpuPkg: RISC-V: TimerLib: Fix delay function to use 64-bit
The timer compare register is 64-bit so simplifying the delay
function.
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Diffstat (limited to 'MdePkg/Include')
| -rw-r--r-- | MdePkg/Include/Register/RiscV64/RiscVImpl.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/MdePkg/Include/Register/RiscV64/RiscVImpl.h b/MdePkg/Include/Register/RiscV64/RiscVImpl.h index ee5c2ba603..6997de6cc0 100644 --- a/MdePkg/Include/Register/RiscV64/RiscVImpl.h +++ b/MdePkg/Include/Register/RiscV64/RiscVImpl.h @@ -20,6 +20,5 @@ Name:
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
-#define RISCV_TIMER_COMPARE_BITS 32
#endif
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