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authorzhoucheng <zhoucheng@phytium.com.cn>2021-08-19 15:30:55 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2021-08-30 03:44:08 +0000
commit443300be467d75efa749463e4f2e591cb3e25729 (patch)
treec6ca63a85a03415b45735f654d0f898b689b2dcd /MdePkg/Include
parentdc995ce9069b683d55fdb8d51235cb5920db8041 (diff)
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MdePkg:Update IndustryStandard/Nvme.h with Nvme amdin controller data
Update Nvme data structure Signed-off-by: Cheng Zhou <zhoucheng@phytium.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Diffstat (limited to 'MdePkg/Include')
-rw-r--r--MdePkg/Include/IndustryStandard/Nvme.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/MdePkg/Include/IndustryStandard/Nvme.h b/MdePkg/Include/IndustryStandard/Nvme.h
index 9b19a2074b..f7a1a9f6ca 100644
--- a/MdePkg/Include/IndustryStandard/Nvme.h
+++ b/MdePkg/Include/IndustryStandard/Nvme.h
@@ -353,7 +353,16 @@ typedef struct {
UINT8 Npss; /* Number of Power States Support */
UINT8 Avscc; /* Admin Vendor Specific Command Configuration */
UINT8 Apsta; /* Autonomous Power State Transition Attributes */
- UINT8 Rsvd2[246]; /* Reserved as of Nvm Express 1.1 Spec */
+ //
+ // Below fields before Rsvd2 are defined in NVM Express 1.3 Spec
+ //
+ UINT16 Wctemp; /* Warning Composite Temperature Threshold */
+ UINT16 Cctemp; /* Critical Composite Temperature Threshold */
+ UINT16 Mtfa; /* Maximum Time for Firmware Activation */
+ UINT32 Hmpre; /* Host Memory Buffer Preferred Size */
+ UINT32 Hmmin; /* Host Memory Buffer Minimum Size */
+ UINT8 Tnvmcap[16]; /* Total NVM Capacity */
+ UINT8 Rsvd2[216]; /* Reserved as of NVM Express */
//
// NVM Command Set Attributes
//