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author | Liming Gao <liming.gao@intel.com> | 2018-06-27 21:11:33 +0800 |
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committer | Liming Gao <liming.gao@intel.com> | 2018-06-28 11:19:47 +0800 |
commit | 9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107 (patch) | |
tree | 15a2cb1a7907a9114ee79130699ce7d324c942ea /MdePkg/Library/BaseCacheMaintenanceLib | |
parent | d1102dba7210b95e41d06c2338a22ba6af248645 (diff) | |
download | edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.tar.gz edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.tar.bz2 edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.zip |
MdePkg: Clean up source files
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library/BaseCacheMaintenanceLib')
4 files changed, 9 insertions, 9 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c index 79c84a0982..95373b6cf9 100644 --- a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c +++ b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c @@ -1,8 +1,8 @@ /** @file
- Cache Maintenance Functions. These functions vary by ARM architecture so the MdePkg
- versions are null functions used to make sure things will compile.
+ Cache Maintenance Functions. These functions vary by ARM architecture so the MdePkg
+ versions are null functions used to make sure things will compile.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf index d659161f33..d562db12d0 100644 --- a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf +++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf @@ -4,7 +4,7 @@ # Cache Maintenance Library that uses Base Library services to maintain caches.
# This library assumes there are no chipset dependencies required to maintain caches.
#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
#
# This program and the accompanying materials
@@ -24,7 +24,7 @@ FILE_GUID = 123dd843-57c9-4158-8418-ce68b3944ce7
MODULE_TYPE = BASE
VERSION_STRING = 1.1
- LIBRARY_CLASS = CacheMaintenanceLib
+ LIBRARY_CLASS = CacheMaintenanceLib
#
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c index 24e985174e..904533d4bf 100644 --- a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c +++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c @@ -1,7 +1,7 @@ /** @file
Cache Maintenance Functions.
- Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -194,7 +194,7 @@ InvalidateDataCache ( )
{
//
- // Invalidation of the entire data cache without writing back is not supported
+ // Invalidation of the entire data cache without writing back is not supported
// on IPF architecture, so a write back and invalidate operation is performed.
//
WriteBackInvalidateDataCache ();
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c index 147a9a78e4..42049144a4 100644 --- a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c +++ b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c @@ -1,7 +1,7 @@ /** @file
Cache Maintenance Functions.
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -135,7 +135,7 @@ WriteBackInvalidateDataCacheRange ( ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Address));
//
- // If the CPU does not support CLFLUSH instruction,
+ // If the CPU does not support CLFLUSH instruction,
// then promote flush range to flush entire cache.
//
AsmCpuid (0x01, NULL, &RegEbx, NULL, &RegEdx);
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