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| author | Dandan Bi <dandan.bi@intel.com> | 2021-02-08 10:06:45 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-03-30 12:48:30 +0000 |
| commit | 1c11e7a2142b1406ccff5e0af0893c94472871c8 (patch) | |
| tree | 86aa76dec08056f0976995d174381f99ec1b481f /MdePkg/Library/BaseCpuLib | |
| parent | b33cf5bfcb4c941370739dfbbe1532ff508fd29d (diff) | |
| download | edk2-1c11e7a2142b1406ccff5e0af0893c94472871c8.tar.gz edk2-1c11e7a2142b1406ccff5e0af0893c94472871c8.tar.bz2 edk2-1c11e7a2142b1406ccff5e0af0893c94472871c8.zip | |
MdePkg: Add RegisterFilterLib class and NULL instance
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246
1. Add a new library class (RegisterFilterLib) to filter
and trace port IO/MMIO/MSR access.
2. Add a NULL instance (RegisterFilterLibNull) can be used
to keep current behavior.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Diffstat (limited to 'MdePkg/Library/BaseCpuLib')
0 files changed, 0 insertions, 0 deletions