diff options
| author | Jian J Wang <jian.j.wang@intel.com> | 2017-12-07 20:14:35 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2017-12-08 14:38:48 +0800 |
| commit | 364a54742f569b7221f0022594ef3d8384a8517c (patch) | |
| tree | 58b6696056d1673888c563a55cc5ed1a4b188917 /MdePkg/Library/BaseLib | |
| parent | 408b8330499825e7bce0c78aa63a45709ea015e1 (diff) | |
| download | edk2-364a54742f569b7221f0022594ef3d8384a8517c.tar.gz edk2-364a54742f569b7221f0022594ef3d8384a8517c.tar.bz2 edk2-364a54742f569b7221f0022594ef3d8384a8517c.zip | |
MdePkg/BaseLib: Add stack switch related definitions for IA32
The new definitions include two structures
IA32_TASK_STATE_SEGMENT
IA32_TSS_DESCRIPTOR
two macros
IA32_GDT_TYPE_TSS
IA32_GDT_ALIGNMENT
and one API
VOID
EFIAPI
AsmWriteTr (
IN UINT16 Selector
);
They're needed to setup task gate and interrupt stack table for stack switch.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
Diffstat (limited to 'MdePkg/Library/BaseLib')
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 3 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/Ia32/WriteTr.nasm | 36 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/X64/WriteTr.nasm | 37 |
3 files changed, 76 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 320ac457ea..fbfb0063b7 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -67,6 +67,8 @@ BaseLibInternals.h
[Sources.Ia32]
+ Ia32/WriteTr.nasm
+
Ia32/Wbinvd.c | MSFT
Ia32/WriteMm7.c | MSFT
Ia32/WriteMm6.c | MSFT
@@ -447,6 +449,7 @@ X64/EnableCache.asm
X64/DisableCache.nasm
X64/DisableCache.asm
+ X64/WriteTr.nasm
X64/CpuBreakpoint.c | MSFT
X64/WriteMsr64.c | MSFT
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteTr.nasm b/MdePkg/Library/BaseLib/Ia32/WriteTr.nasm new file mode 100644 index 0000000000..cde5a3a423 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteTr.nasm @@ -0,0 +1,36 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteTr.nasm
+;
+; Abstract:
+;
+; Write TR register
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; AsmWriteTr (
+; UINT16 Selector
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteTr)
+ASM_PFX(AsmWriteTr):
+ mov eax, [esp+4]
+ ltr ax
+ ret
+
diff --git a/MdePkg/Library/BaseLib/X64/WriteTr.nasm b/MdePkg/Library/BaseLib/X64/WriteTr.nasm new file mode 100644 index 0000000000..3bf1500c36 --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/WriteTr.nasm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteTr.nasm
+;
+; Abstract:
+;
+; Write TR register
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; AsmWriteTr (
+; UINT16 Selector
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteTr)
+ASM_PFX(AsmWriteTr):
+ mov eax, ecx
+ ltr ax
+ ret
+
|