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authorLiming Gao <liming.gao@intel.com>2018-06-27 21:11:33 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-28 11:19:47 +0800
commit9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107 (patch)
tree15a2cb1a7907a9114ee79130699ce7d324c942ea /MdePkg/Library/BaseMemoryLibOptDxe/AArch64
parentd1102dba7210b95e41d06c2338a22ba6af248645 (diff)
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MdePkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library/BaseMemoryLibOptDxe/AArch64')
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S4
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S4
2 files changed, 4 insertions, 4 deletions
diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S
index 10b55b065c..56fe3b0956 100644
--- a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S
+++ b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S
@@ -169,7 +169,7 @@ L(copy96):
// Align DST to 16 byte alignment so that we don't cross cache line
// boundaries on both loads and stores. There are at least 96 bytes
- // to copy, so copy 16 bytes unaligned and then align. The loop
+ // to copy, so copy 16 bytes unaligned and then align. The loop
// copies 64 bytes per iteration and prefetches one iteration ahead.
.p2align 4
@@ -198,7 +198,7 @@ L(copy_long):
subs count, count, 64
b.hi 1b
- // Write the last full set of 64 bytes. The remainder is at most 64
+ // Write the last full set of 64 bytes. The remainder is at most 64
// bytes, so it is safe to always copy 64 bytes from the end even if
// there is just 1 byte left.
2:
diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S
index 08e1fbb170..99db2aebcb 100644
--- a/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S
+++ b/MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S
@@ -40,7 +40,7 @@
#define result x0
#define src x3
-#define tmp x4
+#define tmp x4
#define wtmp2 w5
#define synd x6
#define soff x9
@@ -68,7 +68,7 @@
ASM_GLOBAL ASM_PFX(InternalMemScanMem8)
ASM_PFX(InternalMemScanMem8):
// Do not dereference srcin if no bytes to compare.
- cbz cntin, .Lzero_length
+ cbz cntin, .Lzero_length
//
// Magic constant 0x40100401 allows us to identify which lane matches
// the requested byte.