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authorLiming Gao <liming.gao@intel.com>2018-06-27 21:11:33 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-28 11:19:47 +0800
commit9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107 (patch)
tree15a2cb1a7907a9114ee79130699ce7d324c942ea /MdePkg/Library/BasePciExpressLib
parentd1102dba7210b95e41d06c2338a22ba6af248645 (diff)
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MdePkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library/BasePciExpressLib')
-rw-r--r--MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf4
-rw-r--r--MdePkg/Library/BasePciExpressLib/PciExpressLib.c20
2 files changed, 12 insertions, 12 deletions
diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
index 4b14b5d89e..8c96d9a414 100644
--- a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
@@ -4,7 +4,7 @@
# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
# PCI Configuration cycles. Layers on top of an I/O Library instance.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -23,7 +23,7 @@
FILE_GUID = 287e50f4-a188-4699-b907-3e4080ca5688
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = PciExpressLib
+ LIBRARY_CLASS = PciExpressLib
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
diff --git a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c b/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
index 61be0098a6..988e91c681 100644
--- a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
+++ b/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
@@ -5,7 +5,7 @@
All assertions for I/O operations are handled in MMIO functions in the IoLib
Library.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -37,20 +37,20 @@
ASSERT (((A) & ~0xfffffff) == 0)
/**
- Registers a PCI device so PCI configuration registers may be accessed after
+ Registers a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
- Registers the PCI device specified by Address so all the PCI configuration
- registers associated with that PCI device may be accessed after SetVirtualAddressMap()
+
+ Registers the PCI device specified by Address so all the PCI configuration
+ registers associated with that PCI device may be accessed after SetVirtualAddressMap()
is called.
-
+
If Address > 0x0FFFFFFF, then ASSERT().
@param Address The address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.
@@ -70,10 +70,10 @@ PciExpressRegisterForRuntimeAccess (
/**
Gets the base address of PCI Express.
-
+
This internal functions retrieves PCI Express Base Address via a PCD entry
PcdPciExpressBaseAddress.
-
+
@return The base address of PCI Express.
**/