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authorLiming Gao <liming.gao@intel.com>2018-06-27 21:11:33 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-28 11:19:47 +0800
commit9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107 (patch)
tree15a2cb1a7907a9114ee79130699ce7d324c942ea /MdePkg/Library/BasePciLibPciExpress/PciLib.c
parentd1102dba7210b95e41d06c2338a22ba6af248645 (diff)
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MdePkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library/BasePciLibPciExpress/PciLib.c')
-rw-r--r--MdePkg/Library/BasePciLibPciExpress/PciLib.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/MdePkg/Library/BasePciLibPciExpress/PciLib.c b/MdePkg/Library/BasePciLibPciExpress/PciLib.c
index 487a0389b9..d52c973a0c 100644
--- a/MdePkg/Library/BasePciLibPciExpress/PciLib.c
+++ b/MdePkg/Library/BasePciLibPciExpress/PciLib.c
@@ -2,7 +2,7 @@
PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
Configuration cycles. Layers on PCI Express Library.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -20,19 +20,19 @@
#include <Library/PciExpressLib.h>
/**
- Registers a PCI device so PCI configuration registers may be accessed after
+ Registers a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
- Registers the PCI device specified by Address so all the PCI configuration registers
+
+ Registers the PCI device specified by Address so all the PCI configuration registers
associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
-
+
If Address > 0x0FFFFFFF, then ASSERT().
@param Address The address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.