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author | lgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-12-25 02:25:50 +0000 |
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committer | lgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-12-25 02:25:50 +0000 |
commit | 94952554cc604750f3df3d4e8ae068703481d258 (patch) | |
tree | 943da134082610ef812da34b008fe1a0feb107f9 /MdePkg/Library/BaseS3PciLib | |
parent | 2a956f7490cbac07c8eccf2cfc55fb0c02c0654c (diff) | |
download | edk2-94952554cc604750f3df3d4e8ae068703481d258.tar.gz edk2-94952554cc604750f3df3d4e8ae068703481d258.tar.bz2 edk2-94952554cc604750f3df3d4e8ae068703481d258.zip |
Add ASSERT() for BitField operations to make sure the input value is valid.
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Kinney, Michael D <Michael.D.Kinney@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14019 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/BaseS3PciLib')
-rw-r--r-- | MdePkg/Library/BaseS3PciLib/S3PciLib.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/MdePkg/Library/BaseS3PciLib/S3PciLib.c b/MdePkg/Library/BaseS3PciLib/S3PciLib.c index bbaf99c1c8..e29f7fe63e 100644 --- a/MdePkg/Library/BaseS3PciLib/S3PciLib.c +++ b/MdePkg/Library/BaseS3PciLib/S3PciLib.c @@ -3,7 +3,7 @@ the PCI operations to be replayed during an S3 resume. This library class
maps directly on top of the PciLib class.
- Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -277,6 +277,7 @@ S3PciBitFieldRead8 ( If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -316,6 +317,7 @@ S3PciBitFieldWrite8 ( If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -355,6 +357,7 @@ S3PciBitFieldOr8 ( If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -395,6 +398,8 @@ S3PciBitFieldAnd8 ( If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -645,6 +650,7 @@ S3PciBitFieldRead16 ( If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -685,6 +691,7 @@ S3PciBitFieldWrite16 ( If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -725,6 +732,7 @@ S3PciBitFieldOr16 ( If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -766,6 +774,8 @@ S3PciBitFieldAnd16 ( If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1016,6 +1026,7 @@ S3PciBitFieldRead32 ( If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1056,6 +1067,7 @@ S3PciBitFieldWrite32 ( If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1096,6 +1108,7 @@ S3PciBitFieldOr32 ( If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1137,6 +1150,8 @@ S3PciBitFieldAnd32 ( If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
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