summaryrefslogtreecommitdiffstats
path: root/MdePkg/Library/BaseSynchronizationLib
diff options
context:
space:
mode:
authorJeff Fan <jeff.fan@intel.com>2016-03-21 13:36:50 +0800
committerJeff Fan <jeff.fan@intel.com>2016-04-05 14:07:15 +0800
commit5f0a17d83a6443931068d428600824276ca2bd37 (patch)
tree2b35c0e698e2e58a55e8e0158b4e5074db0e1a2a /MdePkg/Library/BaseSynchronizationLib
parent0f18e1eda2a807283484adfbf5eaae6a92b1ffa7 (diff)
downloadedk2-5f0a17d83a6443931068d428600824276ca2bd37.tar.gz
edk2-5f0a17d83a6443931068d428600824276ca2bd37.tar.bz2
edk2-5f0a17d83a6443931068d428600824276ca2bd37.zip
MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64
From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'MdePkg/Library/BaseSynchronizationLib')
-rwxr-xr-xMdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf9
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h14
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c60
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c29
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c2
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c2
6 files changed, 112 insertions, 4 deletions
diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index bd1bec3fb5..bcd79355ba 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -1,7 +1,7 @@
## @file
# Base Synchronization Library implementation.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
#
# This program and the accompanying materials
@@ -30,6 +30,7 @@
BaseSynchronizationLibInternals.h
[Sources.IA32]
+ Ia32/InternalGetSpinLockProperties.c | MSFT
Ia32/InterlockedCompareExchange64.c | MSFT
Ia32/InterlockedCompareExchange32.c | MSFT
Ia32/InterlockedCompareExchange16.c | MSFT
@@ -44,10 +45,12 @@
Ia32/InterlockedIncrement.asm | INTEL
Synchronization.c | INTEL
+ Ia32/InternalGetSpinLockProperties.c | GCC
Ia32/GccInline.c | GCC
SynchronizationGcc.c | GCC
[Sources.X64]
+ Ia32/InternalGetSpinLockProperties.c | MSFT
X64/InterlockedCompareExchange64.c | MSFT
X64/InterlockedCompareExchange32.c | MSFT
X64/InterlockedCompareExchange16.c | MSFT
@@ -64,6 +67,7 @@
X64/InterlockedIncrement.asm | INTEL
Synchronization.c | INTEL
+ Ia32/InternalGetSpinLockProperties.c | GCC
X64/GccInline.c | GCC
SynchronizationGcc.c | GCC
@@ -73,6 +77,9 @@
Ipf/InterlockedCompareExchange32.s
Ipf/InterlockedCompareExchange16.s
+ Ipf/InternalGetSpinLockProperties.c | MSFT
+ Ipf/InternalGetSpinLockProperties.c | GCC
+
Synchronization.c | INTEL
SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC
diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
index 76f7023241..9716b9276b 100644
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
@@ -1,7 +1,7 @@
/** @file
Declaration of internal functions in BaseSynchronizationLib.
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -138,4 +138,16 @@ InternalSyncCompareExchange64 (
IN UINT64 ExchangeValue
);
+/**
+ Internal function to retrieve the architecture specific spin lock alignment
+ requirements for optimal spin lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+InternalGetSpinLockProperties (
+ VOID
+ );
+
#endif
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
new file mode 100644
index 0000000000..49f05fb18a
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
@@ -0,0 +1,60 @@
+/** @file
+ Internal function to get spin lock alignment.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseSynchronizationLibInternals.h"
+
+/**
+ Internal function to retrieve the architecture specific spin lock alignment
+ requirements for optimal spin lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+InternalGetSpinLockProperties (
+ VOID
+ )
+{
+ UINT32 RegEax;
+ UINT32 RegEbx;
+ UINTN FamilyId;
+ UINTN ModelId;
+ UINTN CacheLineSize;
+
+ //
+ // Retrieve CPUID Version Information
+ //
+ AsmCpuid (0x01, &RegEax, &RegEbx, NULL, NULL);
+ //
+ // EBX: Bits 15 - 08: CLFLUSH line size (Value * 8 = cache line size)
+ //
+ CacheLineSize = ((RegEbx >> 8) & 0xff) * 8;
+ //
+ // Retrieve CPU Family and Model
+ //
+ FamilyId = (RegEax >> 8) & 0xf;
+ ModelId = (RegEax >> 4) & 0xf;
+ if (FamilyId == 0x0f) {
+ //
+ // In processors based on Intel NetBurst microarchitecture, use two cache lines
+ //
+ ModelId = ModelId | ((RegEax >> 12) & 0xf0);
+ if (ModelId <= 0x04 || ModelId == 0x06) {
+ CacheLineSize *= 2;
+ }
+ }
+
+ return CacheLineSize;
+}
+
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c
new file mode 100644
index 0000000000..f6464c2db7
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c
@@ -0,0 +1,29 @@
+/** @file
+ Internal function to get spin lock alignment.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Internal function to retrieve the architecture specific spin lock alignment
+ requirements for optimal spin lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+InternalGetSpinLockProperties (
+ VOID
+ )
+{
+ return 32;
+}
+
diff --git a/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c b/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
index 31f28ec2c5..4b8c8e59c8 100644
--- a/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
+++ b/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
@@ -45,7 +45,7 @@ GetSpinLockProperties (
VOID
)
{
- return 32;
+ return InternalGetSpinLockProperties ();
}
/**
diff --git a/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c b/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
index 821c798121..db344b7e64 100644
--- a/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
+++ b/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
@@ -47,7 +47,7 @@ GetSpinLockProperties (
VOID
)
{
- return 32;
+ return InternalGetSpinLockProperties ();
}
/**