MdePkg: Clean up source files

1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>

10 files changed, 59 insertions, 59 deletions

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 03562c6e56..0be1d4331f 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -31,11 +31,11 @@
 

 [Sources.IA32]

   Ia32/InternalGetSpinLockProperties.c | MSFT

-  Ia32/InterlockedCompareExchange64.c | MSFT 

-  Ia32/InterlockedCompareExchange32.c | MSFT 

+  Ia32/InterlockedCompareExchange64.c | MSFT

+  Ia32/InterlockedCompareExchange32.c | MSFT

   Ia32/InterlockedCompareExchange16.c | MSFT

-  Ia32/InterlockedDecrement.c | MSFT 

-  Ia32/InterlockedIncrement.c | MSFT 

+  Ia32/InterlockedDecrement.c | MSFT

+  Ia32/InterlockedIncrement.c | MSFT

   SynchronizationMsc.c  | MSFT

 

   Ia32/InterlockedCompareExchange64.nasm| INTEL

@@ -54,22 +54,22 @@
   X64/InterlockedCompareExchange64.c | MSFT

   X64/InterlockedCompareExchange32.c | MSFT

   X64/InterlockedCompareExchange16.c | MSFT

-  

+

   X64/InterlockedCompareExchange64.nasm| INTEL

   X64/InterlockedCompareExchange32.nasm| INTEL

   X64/InterlockedCompareExchange16.nasm| INTEL

-  

-  X64/InterlockedDecrement.c | MSFT 

-  X64/InterlockedIncrement.c | MSFT 

-  SynchronizationMsc.c | MSFT 

+

+  X64/InterlockedDecrement.c | MSFT

+  X64/InterlockedIncrement.c | MSFT

+  SynchronizationMsc.c | MSFT

 

   X64/InterlockedDecrement.nasm| INTEL

   X64/InterlockedIncrement.nasm| INTEL

-  Synchronization.c | INTEL 

+  Synchronization.c | INTEL

 

   Ia32/InternalGetSpinLockProperties.c | GCC

   X64/GccInline.c | GCC

-  SynchronizationGcc.c  | GCC 

+  SynchronizationGcc.c  | GCC

 

 [Sources.IPF]

   Ipf/Synchronization.c

@@ -80,9 +80,9 @@
   Ipf/InternalGetSpinLockProperties.c | MSFT

   Ipf/InternalGetSpinLockProperties.c | GCC

 

-  Synchronization.c     | INTEL 

-  SynchronizationMsc.c  | MSFT 

-  SynchronizationGcc.c  | GCC 

+  Synchronization.c     | INTEL

+  SynchronizationMsc.c  | MSFT

+  SynchronizationGcc.c  | GCC

 

 [Sources.EBC]

   Synchronization.c

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
index 9716b9276b..37edd7c188 100644
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLibInternals.h
@@ -1,7 +1,7 @@
 /** @file

   Declaration of internal functions in BaseSynchronizationLib.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -143,7 +143,7 @@ InternalSyncCompareExchange64 (
   requirements for optimal spin lock performance.

 

   @return The architecture specific spin lock alignment.

-  

+

 **/

 UINTN

 InternalGetSpinLockProperties (

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c
index a57860203b..c13f4e06bc 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Ebc/Synchronization.c
@@ -1,7 +1,7 @@
 /** @file

   Implementation of synchronization functions on EBC.

 

-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -77,9 +77,9 @@ InternalSyncCompareExchange32 (
 /**

   Performs an atomic compare exchange operation on a 64-bit unsigned integer.

 

-  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified 

-  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and 

-  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned. 

+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified

+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and

+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned.

   The compare exchange operation must be performed using MP safe mechanisms.

 

   @param  Value         A pointer to the 64-bit value for the compare exchange

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
index bd81aad6c2..4ab293f243 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
@@ -1,7 +1,7 @@
 /** @file

   GCC inline implementation of BaseSynchronizationLib processor specific functions.

-  

-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

+

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -42,12 +42,12 @@ InternalSyncIncrement (
     "movl    %2, %%eax      "

     : "=a" (Result),          // %0

       "=m" (*Value)           // %1

-    : "m"  (*Value)           // %2 

+    : "m"  (*Value)           // %2

     : "memory",

       "cc"

     );

-    

-  return Result;    

+

+  return Result;

 

 }

 

@@ -72,18 +72,18 @@ InternalSyncDecrement (
   )

 {

    UINT32  Result;

-  

+

   __asm__ __volatile__ (

     "lock               \n\t"

     "decl    %2         \n\t"

     "movl    %2, %%eax      "

     : "=a" (Result),          // %0

       "=m" (*Value)           // %1

-    : "m"  (*Value)           // %2 

+    : "m"  (*Value)           // %2

     : "memory",

       "cc"

     );

-    

+

   return Result;

 }

 

@@ -163,7 +163,7 @@ InternalSyncCompareExchange32 (
     : "=a" (CompareValue)     // %0

     : "q"  (ExchangeValue),   // %1

       "m"  (*Value),          // %2

-      "0"  (CompareValue)     // %4 

+      "0"  (CompareValue)     // %4

     : "memory",

       "cc"

     );

@@ -198,8 +198,8 @@ InternalSyncCompareExchange64 (
 {

   __asm__ __volatile__ (

     "                       \n\t"

-    "push        %%ebx      \n\t" 

-    "movl        %2,%%ebx   \n\t"   

+    "push        %%ebx      \n\t"

+    "movl        %2,%%ebx   \n\t"

     "lock                   \n\t"

     "cmpxchg8b   (%1)       \n\t"

     "pop         %%ebx      \n\t"

@@ -210,6 +210,6 @@ InternalSyncCompareExchange64 (
     : "memory",

       "cc"

     );

-  

+

   return CompareValue;

 }

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
index 60f5c7f36b..50ffe8e3aa 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c
@@ -1,7 +1,7 @@
 /** @file

   Internal function to get spin lock alignment.

 

-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -19,7 +19,7 @@
   requirements for optimal spin lock performance.

 

   @return The architecture specific spin lock alignment.

-  

+

 **/

 UINTN

 InternalGetSpinLockProperties (

@@ -48,7 +48,7 @@ InternalGetSpinLockProperties (
   if (FamilyId == 0x0f) {

     //

     // In processors based on Intel NetBurst microarchitecture, use two cache lines

-    // 

+    //

     ModelId = ModelId | ((RegEax >> 12) & 0xf0);

     if (ModelId <= 0x04 || ModelId == 0x06) {

       CacheLineSize *= 2;

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c
index f6464c2db7..3993f6bb63 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Ipf/InternalGetSpinLockProperties.c
@@ -1,7 +1,7 @@
 /** @file

   Internal function to get spin lock alignment.

 

-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -17,7 +17,7 @@
   requirements for optimal spin lock performance.

 

   @return The architecture specific spin lock alignment.

-  

+

 **/

 UINTN

 InternalGetSpinLockProperties (

diff --git a/MdePkg/Library/BaseSynchronizationLib/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/Synchronization.c
index 4f2e21bcb3..76c5a1275c 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Synchronization.c
+++ b/MdePkg/Library/BaseSynchronizationLib/Synchronization.c
@@ -1,7 +1,7 @@
 /** @file

   Implementation of synchronization functions.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -22,7 +22,7 @@
   optimal spin lock performance.

 

   This function retrieves the spin lock alignment requirements for optimal

-  performance on a given CPU architecture. The spin lock alignment is byte alignment. 

+  performance on a given CPU architecture. The spin lock alignment is byte alignment.

   It must be a power of two and is returned by this function. If there are no alignment

   requirements, then 1 must be returned. The spin lock synchronization

   functions must function correctly if the spin lock size and alignment values

diff --git a/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c b/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
index 98c9648632..5ac548b19f 100644
--- a/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
+++ b/MdePkg/Library/BaseSynchronizationLib/SynchronizationGcc.c
@@ -1,7 +1,7 @@
 /** @file

   Implementation of synchronization functions.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -16,7 +16,7 @@
 #include "BaseSynchronizationLibInternals.h"

 

 //

-// GCC inline assembly for Read Write Barrier  

+// GCC inline assembly for Read Write Barrier

 //

 #define _ReadWriteBarrier() do { __asm__ __volatile__ ("": : : "memory"); } while(0)

 

@@ -28,7 +28,7 @@
   optimal spin lock performance.

 

   This function retrieves the spin lock alignment requirements for optimal

-  performance on a given CPU architecture. The spin lock alignment is byte alignment. 

+  performance on a given CPU architecture. The spin lock alignment is byte alignment.

   It must be a power of two and is returned by this function. If there are no alignment

   requirements, then 1 must be returned. The spin lock synchronization

   functions must function correctly if the spin lock size and alignment values

@@ -191,7 +191,7 @@ AcquireSpinLockOrFail (
 {

   SPIN_LOCK   LockValue;

   VOID        *Result;

-  

+

   ASSERT (SpinLock != NULL);

 

   LockValue = *SpinLock;

diff --git a/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c b/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
index 8bc6d2669e..e3298c8ab4 100644
--- a/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
+++ b/MdePkg/Library/BaseSynchronizationLib/SynchronizationMsc.c
@@ -1,7 +1,7 @@
 /** @file

   Implementation of synchronization functions.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -30,7 +30,7 @@ void    _ReadWriteBarrier (void);
   optimal spin lock performance.

 

   This function retrieves the spin lock alignment requirements for optimal

-  performance on a given CPU architecture. The spin lock alignment is byte alignment. 

+  performance on a given CPU architecture. The spin lock alignment is byte alignment.

   It must be a power of two and is returned by this function. If there are no alignment

   requirements, then 1 must be returned. The spin lock synchronization

   functions must function correctly if the spin lock size and alignment values

@@ -193,7 +193,7 @@ AcquireSpinLockOrFail (
 {

   SPIN_LOCK   LockValue;

   VOID        *Result;

-  

+

   ASSERT (SpinLock != NULL);

 

   LockValue = *SpinLock;

diff --git a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
index 6347073fee..5224dd063f 100644
--- a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
+++ b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
@@ -1,8 +1,8 @@
 /** @file

   GCC inline implementation of BaseSynchronizationLib processor specific functions.

-  

-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

-  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> 

+

+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>

+  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -43,12 +43,12 @@ InternalSyncIncrement (
     "mov     %2, %%eax      "

     : "=a" (Result),          // %0

       "=m" (*Value)           // %1

-    : "m"  (*Value)           // %2 

+    : "m"  (*Value)           // %2

     : "memory",

       "cc"

     );

-    

-  return Result;    

+

+  return Result;

 }

 

 

@@ -72,18 +72,18 @@ InternalSyncDecrement (
   )

 {

    UINT32  Result;

-  

+

   __asm__ __volatile__ (

     "lock               \n\t"

     "decl    %2         \n\t"

     "mov     %2, %%eax      "

     : "=a" (Result),          // %0

       "=m" (*Value)           // %1

-    : "m"  (*Value)           // %2 

+    : "m"  (*Value)           // %2

     : "memory",

       "cc"

     );

-    

+

   return Result;

 }

 

@@ -166,12 +166,12 @@ InternalSyncCompareExchange32 (
     : "=a" (CompareValue),    // %0

       "=m" (*Value)           // %1

     : "a"  (CompareValue),    // %2

-      "r"  (ExchangeValue),   // %3 

+      "r"  (ExchangeValue),   // %3

       "m"  (*Value)

     : "memory",

       "cc"

     );

-    

+

   return CompareValue;

 }

 

@@ -208,12 +208,12 @@ InternalSyncCompareExchange64 (
     : "=a" (CompareValue),    // %0

       "=m" (*Value)           // %1

     : "a"  (CompareValue),    // %2

-      "r"  (ExchangeValue),   // %3 

+      "r"  (ExchangeValue),   // %3

       "m"  (*Value)

     : "memory",

       "cc"

     );

-  

+

   return CompareValue;

 }