diff options
author | myronporter <myronporter@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-06-25 21:56:02 +0000 |
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committer | myronporter <myronporter@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-06-25 21:56:02 +0000 |
commit | 2fc59a003ed9104f9feebe0e418f2a04a50f3284 (patch) | |
tree | 6db3e57a6dc3e203bcc9cbc509ea734379fc9e29 /MdePkg/Library/SmmPciLibPciRootBridgeIo | |
parent | 22f6824925d63a113d1323120c6468114581b67a (diff) | |
download | edk2-2fc59a003ed9104f9feebe0e418f2a04a50f3284.tar.gz edk2-2fc59a003ed9104f9feebe0e418f2a04a50f3284.tar.bz2 edk2-2fc59a003ed9104f9feebe0e418f2a04a50f3284.zip |
Minor grammatical work--mostly adding periods. Items with ONLY period added did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/SmmPciLibPciRootBridgeIo')
-rw-r--r-- | MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c | 88 | ||||
-rw-r--r-- | MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf | 2 |
2 files changed, 45 insertions, 45 deletions
diff --git a/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c b/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c index 5d3f6a194a..ec883c9e7a 100644 --- a/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c +++ b/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c @@ -6,7 +6,7 @@ licensed and made available under the terms and conditions of
the BSD License which accompanies this distribution. The full
text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
+ http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@@ -34,7 +34,7 @@ /**
Translate PCI Lib address into format of PCI Root Bridge I/O Protocol.
- @param A Address that encodes the PCI Bus, Device, Function and
+ @param A The address that encodes the PCI Bus, Device, Function and
Register.
**/
@@ -81,7 +81,7 @@ PciLibConstructor ( It reads and returns the PCI configuration register specified by Address,
the width of data is specified by Width.
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param Width Width of data to read
@@ -115,7 +115,7 @@ SmmPciLibPciRootBridgeIoReadWorker ( value specified by Data. The width of data is specifed by Width.
Data is returned.
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param Width Width of data to write
@param Data The value to write.
@@ -149,7 +149,7 @@ SmmPciLibPciRootBridgeIoWriteWorker ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
@@ -180,7 +180,7 @@ PciRegisterForRuntimeAccess ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@return The read value from the PCI configuration register.
@@ -206,7 +206,7 @@ PciRead8 ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param Value The value to write.
@@ -238,7 +238,7 @@ PciWrite8 ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param OrData The value to OR with the PCI configuration register.
@@ -268,7 +268,7 @@ PciOr8 ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@@ -299,7 +299,7 @@ PciAnd8 ( If Address > 0x0FFFFFFF, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the result of the AND operation.
@@ -330,7 +330,7 @@ PciAndThenOr8 ( If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to read.
+ @param Address The PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -363,12 +363,12 @@ PciBitFieldRead8 ( If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..7.
- @param Value New value of the bit field.
+ @param Value The new value of the bit field.
@return The value written back to the PCI configuration register.
@@ -404,7 +404,7 @@ PciBitFieldWrite8 ( If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -445,7 +445,7 @@ PciBitFieldOr8 ( If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -488,7 +488,7 @@ PciBitFieldAnd8 ( If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..7.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -525,7 +525,7 @@ PciBitFieldAndThenOr8 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@return The read value from the PCI configuration register.
@@ -552,7 +552,7 @@ PciRead16 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param Value The value to write.
@@ -585,7 +585,7 @@ PciWrite16 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param OrData The value to OR with the PCI configuration register.
@@ -616,7 +616,7 @@ PciOr16 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@@ -648,7 +648,7 @@ PciAnd16 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 16-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the result of the AND operation.
@@ -680,7 +680,7 @@ PciAndThenOr16 ( If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to read.
+ @param Address The PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -714,12 +714,12 @@ PciBitFieldRead16 ( If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..15.
- @param Value New value of the bit field.
+ @param Value The new value of the bit field.
@return The value written back to the PCI configuration register.
@@ -756,7 +756,7 @@ PciBitFieldWrite16 ( If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -798,7 +798,7 @@ PciBitFieldOr16 ( If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -842,7 +842,7 @@ PciBitFieldAnd16 ( If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..15.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -879,7 +879,7 @@ PciBitFieldAndThenOr16 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@return The read value from the PCI configuration register.
@@ -906,7 +906,7 @@ PciRead32 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param Value The value to write.
@@ -939,7 +939,7 @@ PciWrite32 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param OrData The value to OR with the PCI configuration register.
@@ -970,7 +970,7 @@ PciOr32 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@@ -1002,7 +1002,7 @@ PciAnd32 ( If Address > 0x0FFFFFFF, then ASSERT().
If Address is not aligned on a 32-bit boundary, then ASSERT().
- @param Address Address that encodes the PCI Bus, Device, Function and
+ @param Address The address that encodes the PCI Bus, Device, Function and
Register.
@param AndData The value to AND with the PCI configuration register.
@param OrData The value to OR with the result of the AND operation.
@@ -1034,7 +1034,7 @@ PciAndThenOr32 ( If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to read.
+ @param Address The PCI configuration register to read.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1068,12 +1068,12 @@ PciBitFieldRead32 ( If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
Range 0..31.
- @param Value New value of the bit field.
+ @param Value The new value of the bit field.
@return The value written back to the PCI configuration register.
@@ -1110,7 +1110,7 @@ PciBitFieldWrite32 ( If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1152,7 +1152,7 @@ PciBitFieldOr32 ( If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1196,7 +1196,7 @@ PciBitFieldAnd32 ( If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
- @param Address PCI configuration register to write.
+ @param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
Range 0..31.
@param EndBit The ordinal of the most significant bit in the bit field.
@@ -1238,10 +1238,10 @@ PciBitFieldAndThenOr32 ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().
- @param StartAddress Starting address that encodes the PCI Bus, Device,
+ @param StartAddress The starting address that encodes the PCI Bus, Device,
Function and Register.
- @param Size Size in bytes of the transfer.
- @param Buffer Pointer to a buffer receiving the data read.
+ @param Size The size in bytes of the transfer.
+ @param Buffer The pointer to a buffer receiving the data read.
@return Size
@@ -1336,10 +1336,10 @@ PciReadBuffer ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().
- @param StartAddress Starting address that encodes the PCI Bus, Device,
+ @param StartAddress The starting address that encodes the PCI Bus, Device,
Function and Register.
- @param Size Size in bytes of the transfer.
- @param Buffer Pointer to a buffer containing the data to write.
+ @param Size The size in bytes of the transfer.
+ @param Buffer The pointer to a buffer containing the data to write.
@return Size written to StartAddress.
diff --git a/MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf b/MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf index 9a4e7b9639..ddf28e74fc 100644 --- a/MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf +++ b/MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf @@ -12,7 +12,7 @@ # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
+# http://opensource.org/licenses/bsd-license.php.
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
|