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authorxli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524>2009-05-14 03:13:31 +0000
committerxli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524>2009-05-14 03:13:31 +0000
commit59ceeabe504f4c7814f9560c411690a1ffdc31b2 (patch)
tree07838aa3ccbe32341dffa18d8b2f5ecc50ecbda0 /MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
parentc40a1556902e65bf4e998fad0c9a34684e84da10 (diff)
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1. Add address check for "RegisterForRuntime" APIs of PciLib, PciCf8Lib, PciExpressLib, and PciSegmentLib.
2. Update ASSERT condition for PciCf8Lib, and PciSegmentLib class. 3. According to MDE Lib Spec, add check for reserved bit field 63..48 for PCI segment address. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8311 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h')
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
index ea9fe6665e..2633b6d3c5 100644
--- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
+++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
@@ -1,7 +1,7 @@
/** @file
Include file of PciSegmentPciRootBridgeIo Library.
- Copyright (c) 2007 - 2008, Intel Corporation All rights
+ Copyright (c) 2007 - 2009, Intel Corporation All rights
reserved. This program and the accompanying materials are
licensed and made available under the terms and conditions of
the BSD License which accompanies this distribution. The full
@@ -37,14 +37,14 @@ typedef struct {
/**
Assert the validity of a PCI Segment address.
- A valid PCI address should not contain 1's in bits 31:28
+ A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
@param A The address to validate.
@param M Additional bits to assert to be zero.
**/
#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
- ASSERT (((A) & (0xf0000000 | (M))) == 0)
+ ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)
/**
Translate PCI Lib address into format of PCI Root Bridge I/O Protocol