diff options
| author | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
|---|---|---|
| committer | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
| commit | 878ddf1fc3540a715f63594ed22b6929e881afb4 (patch) | |
| tree | c56c44dac138137b510e1fba7c3efe5e4d84bea2 /MdePkg/Library | |
| download | edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.tar.gz edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.tar.bz2 edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.zip | |
Initial import.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library')
640 files changed, 65903 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.mbd b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.mbd new file mode 100644 index 0000000000..a0be253d11 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseCacheMaintenanceLib</BaseName>
+ <Guid>123dd843-57c9-4158-8418-ce68b3944ce7</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa new file mode 100644 index 0000000000..4fd80ab9bd --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa @@ -0,0 +1,57 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://nwlxweb02.jf.intel.com/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseCacheMaintenanceLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>123dd843-57c9-4158-8418-ce68b3944ce7</Guid>
+ <Version>0</Version>
+ <Abstract>Library Dependencies:BaseLib</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">CacheMaintenanceLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>x86Cache.c</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>x86Cache.c</Filename>
+ </Arch>
+ <Arch ArchType="EBC">
+ <Filename>EbcCache.c</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>IpfCache.c</Filename>
+ <Filename>Ipf/Cpu.s</Filename>
+ <Filename>Ipf/CallPalProc.s</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c new file mode 100644 index 0000000000..a7e36236c5 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c @@ -0,0 +1,85 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+}
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+}
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+}
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+}
+
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/CallPalProc.s b/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/CallPalProc.s new file mode 100644 index 0000000000..18b0f5815a --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/CallPalProc.s @@ -0,0 +1,38 @@ +/// @file
+/// Contains an implementation of CallPalProcStatic on Itanium-based
+/// architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: CallPalProc.s
+///
+///
+
+.auto
+.text
+
+.proc CallPalProcStatic
+.type CallPalProcStatic, @function
+CallPalProcStatic::
+ mov r9 = ar.k5
+ mov r8 = ip
+ add r8 = (PalProcReturn - CallPalProcStatic), r8
+ mov r28 = r32
+ mov b7 = r9
+ mov r29 = r33
+ mov r30 = r34
+ mov r31 = r35
+ mov r32 = b0
+ mov b0 = r8
+ br.sptk b7
+PalProcReturn:
+ mov b0 = r32
+ br.ret.sptk.many b0
+.endp CallPalProcStatic
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/Cpu.s b/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/Cpu.s new file mode 100644 index 0000000000..4f144c683e --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/Ipf/Cpu.s @@ -0,0 +1,106 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// Cpu.s
+//
+// Abstract:
+//
+//
+// Revision History:
+//
+//--
+
+ .file "Cpu.s"
+ .radix D
+ .section .text, "ax", "progbits"
+ .align 32
+ .section .pdata, "a", "progbits"
+ .align 4
+ .section .xdata, "a", "progbits"
+ .align 8
+ .section .data, "wa", "progbits"
+ .align 16
+ .section .rdata, "a", "progbits"
+ .align 16
+ .section .bss, "wa", "nobits"
+ .align 16
+ .section .tls$, "was", "progbits"
+ .align 16
+ .section .sdata, "was", "progbits"
+ .align 16
+ .section .sbss, "was", "nobits"
+ .align 16
+ .section .srdata, "as", "progbits"
+ .align 16
+ .section .rdata, "a", "progbits"
+ .align 16
+ .section .rtcode, "ax", "progbits"
+ .align 32
+ .type InvalidateInstructionCacheRange# ,@function
+ .global InvalidateInstructionCacheRange#
+// Function compile flags: /Ogsy
+ .section .rtcode
+
+// Begin code for function: InvalidateInstructionCacheRange:
+ .proc InvalidateInstructionCacheRange#
+ .align 32
+InvalidateInstructionCacheRange:
+// File e:\tmp\pioflush.c
+ { .mii //R-Addr: 0X00
+ alloc r3=2, 0, 0, 0 //11, 00000002H
+ cmp4.leu p0,p6=32, r33;; //15, 00000020H
+ (p6) mov r33=32;; //16, 00000020H
+ }
+ { .mii //R-Addr: 0X010
+ nop.m 0
+ zxt4 r29=r33;; //21
+ dep.z r30=r29, 0, 5;; //21, 00000005H
+ }
+ { .mii //R-Addr: 0X020
+ cmp4.eq p0,p7=r0, r30 //21
+ shr.u r28=r29, 5;; //19, 00000005H
+ (p7) adds r28=1, r28;; //22, 00000001H
+ }
+ { .mii //R-Addr: 0X030
+ nop.m 0
+ shl r27=r28, 5;; //25, 00000005H
+ zxt4 r26=r27;; //25
+ }
+ { .mfb //R-Addr: 0X040
+ add r31=r26, r32 //25
+ nop.f 0
+ nop.b 0
+ }
+$L143:
+ { .mii //R-Addr: 0X050
+ fc r32 //27
+ adds r32=32, r32;; //28, 00000020H
+ cmp.ltu p14,p15=r32, r31 //29
+ }
+ { .mfb //R-Addr: 0X060
+ nop.m 0
+ nop.f 0
+ (p14) br.cond.dptk.few $L143#;; //29, 880000/120000
+ }
+ { .mmi
+ sync.i;;
+ srlz.i
+ nop.i 0;;
+ }
+ { .mfb //R-Addr: 0X070
+ nop.m 0
+ nop.f 0
+ br.ret.sptk.few b0;; //31
+ }
+// End code for function:
+ .endp InvalidateInstructionCacheRange#
+// END
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c new file mode 100644 index 0000000000..b0d017bd7a --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c @@ -0,0 +1,95 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+typedef struct {
+ UINT64 Status;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+} PAL_PROC_RETURN;
+
+PAL_PROC_RETURN
+CallPalProcStatic (
+ IN UINT64 Arg1,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4
+ );
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+ CallPalProcStatic (1, 1, 1, 0);
+}
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ CallPalProcStatic (1, 2, 1, 0);
+}
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ WriteBackInvalidateDataCache ();
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ CallPalProcStatic (1, 2, 0, 0);
+}
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ WriteBackDataCache ();
+ return Address;
+}
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+}
+
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/build.xml b/MdePkg/Library/BaseCacheMaintenanceLib/build.xml new file mode 100644 index 0000000000..0df03c4356 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseCacheMaintenanceLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseCacheMaintenanceLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseCacheMaintenanceLib">
+ <GenBuild baseName="BaseCacheMaintenanceLib" mbdFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.mbd" msaFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.msa"/>
+ </target>
+ <target depends="BaseCacheMaintenanceLib_clean" name="clean"/>
+ <target depends="BaseCacheMaintenanceLib_cleanall" name="cleanall"/>
+ <target name="BaseCacheMaintenanceLib_clean">
+ <OutputDirSetup baseName="BaseCacheMaintenanceLib" mbdFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.mbd" msaFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseCacheMaintenanceLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseCacheMaintenanceLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseCacheMaintenanceLib_cleanall">
+ <OutputDirSetup baseName="BaseCacheMaintenanceLib" mbdFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.mbd" msaFilename="${MODULE_DIR}\BaseCacheMaintenanceLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseCacheMaintenanceLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseCacheMaintenanceLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseCacheMaintenanceLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c new file mode 100644 index 0000000000..f86d9d6221 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c @@ -0,0 +1,95 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Cache.c
+
+**/
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+ return;
+}
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ AsmWbinvd ();
+}
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ if (Length != 0) {
+ AsmWbinvd ();
+ }
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ AsmWbinvd ();
+}
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ AsmWbinvd ();
+ return Address;
+}
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+ AsmInvd ();
+}
+
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return Address;
+}
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.mbd b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.mbd new file mode 100644 index 0000000000..6463e09b5c --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseDebugLibNull</BaseName>
+ <Guid>9ba1d976-0624-41a3-8650-28165e8d9ae8</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa new file mode 100644 index 0000000000..9eae8f2334 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa @@ -0,0 +1,64 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseDebugLibNull</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>9ba1d976-0624-41a3-8650-28165e8d9ae8</Guid>
+ <Version>0</Version>
+ <Abstract>NULL Debug Library for UEFI drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PrintLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugPropertyMask</C_Name>
+ <Token>0x00000005</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugClearMemoryValue</C_Name>
+ <Token>0x00000008</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="PATCHABLE_IN_MODULE">
+ <C_Name>PcdDebugPrintErrorLevel</C_Name>
+ <Token>0x00000006</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseDebugLibNull/DebugLib.c b/MdePkg/Library/BaseDebugLibNull/DebugLib.c new file mode 100644 index 0000000000..1440f8f127 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/DebugLib.c @@ -0,0 +1,225 @@ +/** @file
+ Base Debug Library that uses PrintLib to print messages to a memory buffer.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Define the maximum debug and assert message length that this library supports
+//
+#define MAX_DEBUG_MESSAGE_LENGTH 0x100
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CHAR8 *Format,
+ ...
+ )
+{
+ CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+ VA_LIST Marker;
+
+ //
+ // If Format is NULL, then ASSERT().
+ //
+ ASSERT (Format != NULL);
+
+ //
+ // Print the assert message to a buffer
+ //
+ VA_START (Marker, Format);
+ AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
+ VA_END (Marker);
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form “ASSERT <FileName>(<LineNumber>): <Description>\n”
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of “(NULL) Filename” is printed.
+
+ If Description is NULL, then a <Description> string of “(NULL) Description” is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CHAR8 *FileName,
+ IN INTN LineNumber,
+ IN CHAR8 *Description
+ )
+{
+ CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+
+ //
+ // Print the assert message to a buffer
+ //
+ AsciiSPrint (Buffer, sizeof (Buffer), "ASSERT %s(%d): %s\n", FileName, LineNumber, Description);
+
+ //
+ // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
+ //
+ if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+ CpuBreakpoint ();
+ } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+ CpuDeadLoop ();
+ }
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS – Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ //
+ // If Buffer is NULL, then ASSERT().
+ //
+ ASSERT (Buffer != NULL);
+
+ //
+ // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
+ //
+ return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BaseDebugLibNull/build.xml b/MdePkg/Library/BaseDebugLibNull/build.xml new file mode 100644 index 0000000000..fec569082a --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseDebugLibNull"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseDebugLibNull"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseDebugLibNull">
+ <GenBuild baseName="BaseDebugLibNull" mbdFilename="${MODULE_DIR}\BaseDebugLibNull.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibNull.msa"/>
+ </target>
+ <target depends="BaseDebugLibNull_clean" name="clean"/>
+ <target depends="BaseDebugLibNull_cleanall" name="cleanall"/>
+ <target name="BaseDebugLibNull_clean">
+ <OutputDirSetup baseName="BaseDebugLibNull" mbdFilename="${MODULE_DIR}\BaseDebugLibNull.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseDebugLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseDebugLibNull_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseDebugLibNull_cleanall">
+ <OutputDirSetup baseName="BaseDebugLibNull" mbdFilename="${MODULE_DIR}\BaseDebugLibNull.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseDebugLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseDebugLibNull_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseDebugLibNull*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.mbd b/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.mbd new file mode 100644 index 0000000000..0fc959a5c8 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseDebugLibReportStatusCode</BaseName>
+ <Guid>bda39d3a-451b-4350-8266-81ab10fa0523</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.msa b/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.msa new file mode 100644 index 0000000000..cd781d23d5 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibReportStatusCode/BaseDebugLibReportStatusCode.msa @@ -0,0 +1,64 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseDebugLibReportStatusCode</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>bda39d3a-451b-4350-8266-81ab10fa0523</Guid>
+ <Version>0</Version>
+ <Abstract>Debug Library for PEIMs that send debug messages to ReportStatusCode</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">ReportStatusCodeLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugPropertyMask</C_Name>
+ <Token>0x00000005</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugClearMemoryValue</C_Name>
+ <Token>0x00000008</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="PATCHABLE_IN_MODULE">
+ <C_Name>PcdDebugPrintErrorLevel</C_Name>
+ <Token>0x00000006</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseDebugLibReportStatusCode/DebugLib.c b/MdePkg/Library/BaseDebugLibReportStatusCode/DebugLib.c new file mode 100644 index 0000000000..8a4c6a2c1c --- /dev/null +++ b/MdePkg/Library/BaseDebugLibReportStatusCode/DebugLib.c @@ -0,0 +1,283 @@ +/** @file
+ Debug Library that fowards all messages to ReportStatusCode()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CHAR8 *Format,
+ ...
+ )
+{
+ UINT64 Buffer[EFI_STATUS_CODE_DATA_MAX_SIZE / sizeof (UINT64)];
+ EFI_DEBUG_INFO *DebugInfo;
+ UINTN TotalSize;
+ UINTN Index;
+ VA_LIST Marker;
+ UINT64 *ArgumentPointer;
+
+ //
+ // If Format is NULL, then ASSERT().
+ //
+ ASSERT (Format != NULL);
+
+ //
+ // Check driver Debug Level value and global debug level
+ //
+ if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
+ return;
+ }
+
+ TotalSize = sizeof (EFI_DEBUG_INFO) + 12 * sizeof (UINT64) + AsciiStrLen (Format) + 1;
+ if (TotalSize > EFI_STATUS_CODE_DATA_MAX_SIZE) {
+ return;
+ }
+
+ //
+ // Then EFI_DEBUG_INFO
+ //
+ DebugInfo = (EFI_DEBUG_INFO *)Buffer;
+ DebugInfo->ErrorLevel = (UINT32)ErrorLevel;
+
+ //
+ // 256 byte mini Var Arg stack. That is followed by the format string.
+ //
+ VA_START (Marker, Format);
+ for (Index = 0, ArgumentPointer = (UINT64 *)(DebugInfo + 1); Index < 12; Index++, ArgumentPointer++) {
+ *ArgumentPointer = VA_ARG (Marker, UINT64);
+ }
+ VA_END (Marker);
+ AsciiStrCpy ((CHAR8 *)ArgumentPointer, Format);
+
+ //
+ //
+ //
+ REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
+ EFI_DEBUG_CODE,
+ (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_DC_UNSPECIFIED),
+ DebugInfo,
+ TotalSize
+ );
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form “ASSERT <FileName>(<LineNumber>): <Description>\n”
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of “(NULL) Filename” is printed.
+
+ If Description is NULL, then a <Description> string of “(NULL) Description” is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CHAR8 *FileName,
+ IN INTN LineNumber,
+ IN CHAR8 *Description
+ )
+{
+ UINT64 Buffer[EFI_STATUS_CODE_DATA_MAX_SIZE / sizeof(UINT64)];
+ EFI_DEBUG_ASSERT_DATA *AssertData;
+ UINTN TotalSize;
+ CHAR8 *Temp;
+
+ //
+ // Make sure it will all fit in the passed in buffer
+ //
+ TotalSize = sizeof (EFI_DEBUG_ASSERT_DATA) + AsciiStrLen (FileName) + 1 + AsciiStrLen (Description) + 1;
+ if (TotalSize <= EFI_STATUS_CODE_DATA_MAX_SIZE) {
+ //
+ // Fill in EFI_DEBUG_ASSERT_DATA
+ //
+ AssertData = (EFI_DEBUG_ASSERT_DATA *)Buffer;
+ AssertData->LineNumber = (UINT32)LineNumber;
+
+ //
+ // Copy Ascii FileName including NULL.
+ //
+ Temp = AsciiStrCpy ((CHAR8 *)(AssertData + 1), FileName);
+
+ //
+ // Copy Ascii Description
+ //
+ AsciiStrCpy (Temp + AsciiStrLen(FileName) + 1, Description);
+
+ REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
+ (EFI_ERROR_CODE | EFI_ERROR_UNRECOVERED),
+ (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE),
+ AssertData,
+ TotalSize
+ );
+ }
+
+ //
+ // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
+ //
+ if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+ CpuBreakpoint ();
+ } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+ CpuDeadLoop ();
+ }
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS – Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ //
+ // If Buffer is NULL, then ASSERT().
+ //
+ ASSERT (Buffer != NULL);
+
+ //
+ // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
+ //
+ return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BaseDebugLibReportStatusCode/build.xml b/MdePkg/Library/BaseDebugLibReportStatusCode/build.xml new file mode 100644 index 0000000000..edfc5fcd8d --- /dev/null +++ b/MdePkg/Library/BaseDebugLibReportStatusCode/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseDebugLibReportStatusCode"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseDebugLibReportStatusCode"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseDebugLibReportStatusCode">
+ <GenBuild baseName="BaseDebugLibReportStatusCode" mbdFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.msa"/>
+ </target>
+ <target depends="BaseDebugLibReportStatusCode_clean" name="clean"/>
+ <target depends="BaseDebugLibReportStatusCode_cleanall" name="cleanall"/>
+ <target name="BaseDebugLibReportStatusCode_clean">
+ <OutputDirSetup baseName="BaseDebugLibReportStatusCode" mbdFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseDebugLibReportStatusCode_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseDebugLibReportStatusCode_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseDebugLibReportStatusCode_cleanall">
+ <OutputDirSetup baseName="BaseDebugLibReportStatusCode" mbdFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.mbd" msaFilename="${MODULE_DIR}\BaseDebugLibReportStatusCode.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseDebugLibReportStatusCode_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseDebugLibReportStatusCode_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseDebugLibReportStatusCode*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.mbd b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.mbd new file mode 100644 index 0000000000..8f0c6909e2 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.mbd @@ -0,0 +1,33 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseIoLibIntrinsic</BaseName>
+ <Guid>926c9cd0-4bb8-479b-9ac4-8a2a23f85307</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+ <BuildOptions ToolChain="MSFT">
+ <Option>C_PROJ_FLAGS = ${C_PROJ_FLAGS}</Option>
+ </BuildOptions>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa new file mode 100644 index 0000000000..91acec75b1 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseIoLibIntrinsic</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>926c9cd0-4bb8-479b-9ac4-8a2a23f85307</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>IoLib.c</Filename>
+ <Filename>IoLibMsc.c</Filename>
+ <Filename>IoLibGcc.c</Filename>
+ <Filename>IoHighLevel.c</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>IoLib.c</Filename>
+ <Filename>IoLibMsc.c</Filename>
+ <Filename>IoLibGcc.c</Filename>
+ <Filename>IoHighLevel.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c new file mode 100644 index 0000000000..48a7477d81 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c @@ -0,0 +1,2272 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) | OrData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) & AndData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (IoRead8 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) | OrData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) & AndData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (IoRead16 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) | OrData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) & AndData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (MmioRead8 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) | OrData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) & AndData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (MmioRead16 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c new file mode 100644 index 0000000000..126457a7e5 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c @@ -0,0 +1,255 @@ +/** @file
+ Common I/O Library routines.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ return *(volatile UINT8*)Address;
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return *(volatile UINT8*)Address = Value;
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 1) == 0);
+ return *(volatile UINT16*)Address;
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Address & 1) == 0);
+ return *(volatile UINT16*)Address = Value;
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 3) == 0);
+ return *(volatile UINT32*)Address;
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Address & 3) == 0);
+ return *(volatile UINT32*)Address = Value;
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 7) == 0);
+ return *(volatile UINT64*)Address;
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ ASSERT ((Address & 7) == 0);
+ return *(volatile UINT64*)Address = Value;
+}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c new file mode 100644 index 0000000000..a065c14299 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c @@ -0,0 +1,194 @@ +/** @file
+ I/O Library. This file has compiler specifics for GCC as there is no
+ ANSI C standard for doing IO.
+
+ GCC - uses EFIAPI assembler. __asm__ calls GAS. __volatile__ makes sure the
+ compiler puts the assembler in this exact location. The complex GNUC
+ operations are not optimzed. It would be possible to also write these
+ with EFIAPI assembler.
+
+ We don't advocate putting compiler specifics in libraries or drivers but there
+ is no other way to make this work.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibGcc.c
+
+**/
+
+#ifdef __GNUC__
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ UINT8 Data;
+
+ __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ UINT16 Data;
+
+ ASSERT ((Port & 1) == 0);
+ __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Port & 1) == 0);
+ __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ UINT32 Data;
+
+ ASSERT ((Port & 3) == 0);
+ __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Port & 3) == 0);
+ __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;
+}
+
+#endif
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c new file mode 100644 index 0000000000..8bce7a5eb9 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c @@ -0,0 +1,193 @@ +/** @file
+ I/O Library. This file has compiler specifics for Microsft C as there is no
+ ANSI C standard for doing IO.
+
+ MSC - uses intrinsic functions and the optimize will remove the function call
+ overhead.
+
+ We don't advocate putting compiler specifics in libraries or drivers but there
+ is no other way to make this work.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibMsc.c
+
+**/
+
+
+#if _MSC_EXTENSIONS
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+int _inp (unsigned short port);
+unsigned short _inpw (unsigned short port);
+unsigned long _inpd (unsigned short port);
+int _outp (unsigned short port, int databyte );
+unsigned short _outpw(unsigned short port, unsigned short dataword );
+unsigned long _outpd(unsigned short port, unsigned long dataword );
+
+#pragma intrinsic(_inp)
+#pragma intrinsic(_inpw)
+#pragma intrinsic(_inpd)
+#pragma intrinsic(_outp)
+#pragma intrinsic(_outpw)
+#pragma intrinsic(_outpd)
+
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ return (UINT8)_inp ((UINT16)Port);
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)_outp ((UINT16)Port, Value);
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ ASSERT ((Port & 1) == 0);
+ return _inpw((UINT16)Port);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Port & 1) == 0);
+ return _outpw ((UINT16)Port, Value);
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ ASSERT ((Port & 3) == 0);
+ return _inpd((UINT16)Port);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Port & 3) == 0);
+ return _outpd ((UINT16)Port, Value);
+}
+
+#endif
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/build.xml b/MdePkg/Library/BaseIoLibIntrinsic/build.xml new file mode 100644 index 0000000000..9ef6c0ccb7 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseIoLibIntrinsic"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseIoLibIntrinsic"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseIoLibIntrinsic">
+ <GenBuild baseName="BaseIoLibIntrinsic" mbdFilename="${MODULE_DIR}\BaseIoLibIntrinsic.mbd" msaFilename="${MODULE_DIR}\BaseIoLibIntrinsic.msa"/>
+ </target>
+ <target depends="BaseIoLibIntrinsic_clean" name="clean"/>
+ <target depends="BaseIoLibIntrinsic_cleanall" name="cleanall"/>
+ <target name="BaseIoLibIntrinsic_clean">
+ <OutputDirSetup baseName="BaseIoLibIntrinsic" mbdFilename="${MODULE_DIR}\BaseIoLibIntrinsic.mbd" msaFilename="${MODULE_DIR}\BaseIoLibIntrinsic.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseIoLibIntrinsic_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseIoLibIntrinsic_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseIoLibIntrinsic_cleanall">
+ <OutputDirSetup baseName="BaseIoLibIntrinsic" mbdFilename="${MODULE_DIR}\BaseIoLibIntrinsic.mbd" msaFilename="${MODULE_DIR}\BaseIoLibIntrinsic.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseIoLibIntrinsic_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseIoLibIntrinsic_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseIoLibIntrinsic*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ARShiftU64.c b/MdePkg/Library/BaseLib/ARShiftU64.c new file mode 100644 index 0000000000..feb5430311 --- /dev/null +++ b/MdePkg/Library/BaseLib/ARShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathARShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/BaseLib.mbd b/MdePkg/Library/BaseLib/BaseLib.mbd new file mode 100644 index 0000000000..971777a6d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseLib</BaseName>
+ <Guid>27d67720-ea68-48ae-93da-a3a074c90e30</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-22 18:15</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseLib/BaseLib.msa b/MdePkg/Library/BaseLib/BaseLib.msa new file mode 100644 index 0000000000..efc9eadda7 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.msa @@ -0,0 +1,309 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>27d67720-ea68-48ae-93da-a3a074c90e30</Guid>
+ <Version>0</Version>
+ <Abstract>Memory-only library functions with no library constructordestructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-22 18:15</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">TimerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>String.c</Filename>
+ <Filename>LinkedList.c</Filename>
+ <Filename>Synchronization.c</Filename>
+ <Filename>Cpu.c</Filename>
+ <Filename>CpuDeadLoop.c</Filename>
+ <Filename>BitField.c</Filename>
+ <Filename>ARShiftU64.c</Filename>
+ <Filename>DivS64x64Remainder.c</Filename>
+ <Filename>DivU64x32.c</Filename>
+ <Filename>DivU64x32Remainder.c</Filename>
+ <Filename>DivU64x64Remainder.c</Filename>
+ <Filename>GetPowerOfTwo32.c</Filename>
+ <Filename>GetPowerOfTwo64.c</Filename>
+ <Filename>HighBitSet32.c</Filename>
+ <Filename>HighBitSet64.c</Filename>
+ <Filename>LowBitSet32.c</Filename>
+ <Filename>LowBitSet64.c</Filename>
+ <Filename>LRotU32.c</Filename>
+ <Filename>LRotU64.c</Filename>
+ <Filename>LShiftU64.c</Filename>
+ <Filename>ModU64x32.c</Filename>
+ <Filename>MultS64x64.c</Filename>
+ <Filename>MultU64x32.c</Filename>
+ <Filename>MultU64x64.c</Filename>
+ <Filename>RRotU32.c</Filename>
+ <Filename>RRotU64.c</Filename>
+ <Filename>RShiftU64.c</Filename>
+ <Filename>SwapBytes16.c</Filename>
+ <Filename>SwapBytes32.c</Filename>
+ <Filename>SwapBytes64.c</Filename>
+ <Arch ArchType="IA32">
+ <Filename>x86LowLevel.c</Filename>
+ <Filename>x86Thunk.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Ia32\Non-existing.c</Filename>
+ <Filename>Ia32\LShiftU64.asm</Filename>
+ <Filename>Ia32\RShiftU64.asm</Filename>
+ <Filename>Ia32\ARShiftU64.asm</Filename>
+ <Filename>Ia32\LRotU64.asm</Filename>
+ <Filename>Ia32\RRotU64.asm</Filename>
+ <Filename>Ia32\MultU64x32.asm</Filename>
+ <Filename>Ia32\MultU64x64.asm</Filename>
+ <Filename>Ia32\DivU64x32.asm</Filename>
+ <Filename>Ia32\ModU64x32.asm</Filename>
+ <Filename>Ia32\DivU64x32Remainder.asm</Filename>
+ <Filename>Ia32\DivU64x64Remainder.asm</Filename>
+ <Filename>Ia32\DivS64x64Remainder.c</Filename>
+ <Filename>Ia32\SwapBytes64.asm</Filename>
+ <Filename>Ia32\SetJump.asm</Filename>
+ <Filename>Ia32\LongJump.asm</Filename>
+ <Filename>Ia32\SwitchStack.c</Filename>
+ <Filename>Ia32\CpuId.asm</Filename>
+ <Filename>Ia32\ReadEflags.asm</Filename>
+ <Filename>Ia32\ReadMsr64.asm</Filename>
+ <Filename>Ia32\WriteMsr32.asm</Filename>
+ <Filename>Ia32\WriteMsr64.asm</Filename>
+ <Filename>Ia32\ReadCr0.asm</Filename>
+ <Filename>Ia32\ReadCr2.asm</Filename>
+ <Filename>Ia32\ReadCr3.asm</Filename>
+ <Filename>Ia32\ReadCr4.asm</Filename>
+ <Filename>Ia32\WriteCr0.asm</Filename>
+ <Filename>Ia32\WriteCr2.asm</Filename>
+ <Filename>Ia32\WriteCr3.asm</Filename>
+ <Filename>Ia32\WriteCr4.asm</Filename>
+ <Filename>Ia32\ReadDr0.asm</Filename>
+ <Filename>Ia32\ReadDr1.asm</Filename>
+ <Filename>Ia32\ReadDr2.asm</Filename>
+ <Filename>Ia32\ReadDr3.asm</Filename>
+ <Filename>Ia32\ReadDr4.asm</Filename>
+ <Filename>Ia32\ReadDr5.asm</Filename>
+ <Filename>Ia32\ReadDr6.asm</Filename>
+ <Filename>Ia32\ReadDr7.asm</Filename>
+ <Filename>Ia32\WriteDr0.asm</Filename>
+ <Filename>Ia32\WriteDr1.asm</Filename>
+ <Filename>Ia32\WriteDr2.asm</Filename>
+ <Filename>Ia32\WriteDr3.asm</Filename>
+ <Filename>Ia32\WriteDr4.asm</Filename>
+ <Filename>Ia32\WriteDr5.asm</Filename>
+ <Filename>Ia32\WriteDr6.asm</Filename>
+ <Filename>Ia32\WriteDr7.asm</Filename>
+ <Filename>Ia32\ReadCs.asm</Filename>
+ <Filename>Ia32\ReadDs.asm</Filename>
+ <Filename>Ia32\ReadEs.asm</Filename>
+ <Filename>Ia32\ReadFs.asm</Filename>
+ <Filename>Ia32\ReadGs.asm</Filename>
+ <Filename>Ia32\ReadSs.asm</Filename>
+ <Filename>Ia32\ReadTr.asm</Filename>
+ <Filename>Ia32\ReadGdtr.asm</Filename>
+ <Filename>Ia32\WriteGdtr.asm</Filename>
+ <Filename>Ia32\ReadIdtr.asm</Filename>
+ <Filename>Ia32\WriteIdtr.asm</Filename>
+ <Filename>Ia32\ReadLdtr.asm</Filename>
+ <Filename>Ia32\WriteLdtr.asm</Filename>
+ <Filename>Ia32\FxSave.asm</Filename>
+ <Filename>Ia32\FxRestore.asm</Filename>
+ <Filename>Ia32\ReadMm0.asm</Filename>
+ <Filename>Ia32\ReadMm1.asm</Filename>
+ <Filename>Ia32\ReadMm2.asm</Filename>
+ <Filename>Ia32\ReadMm3.asm</Filename>
+ <Filename>Ia32\ReadMm4.asm</Filename>
+ <Filename>Ia32\ReadMm5.asm</Filename>
+ <Filename>Ia32\ReadMm6.asm</Filename>
+ <Filename>Ia32\ReadMm7.asm</Filename>
+ <Filename>Ia32\WriteMm0.asm</Filename>
+ <Filename>Ia32\WriteMm1.asm</Filename>
+ <Filename>Ia32\WriteMm2.asm</Filename>
+ <Filename>Ia32\WriteMm3.asm</Filename>
+ <Filename>Ia32\WriteMm4.asm</Filename>
+ <Filename>Ia32\WriteMm5.asm</Filename>
+ <Filename>Ia32\WriteMm6.asm</Filename>
+ <Filename>Ia32\WriteMm7.asm</Filename>
+ <Filename>Ia32\ReadTsc.asm</Filename>
+ <Filename>Ia32\ReadPmc.asm</Filename>
+ <Filename>Ia32\Monitor.asm</Filename>
+ <Filename>Ia32\Mwait.asm</Filename>
+ <Filename>Ia32\EnablePaging32.asm</Filename>
+ <Filename>Ia32\DisablePaging32.asm</Filename>
+ <Filename>Ia32\EnablePaging64.asm</Filename>
+ <Filename>Ia32\Wbinvd.asm</Filename>
+ <Filename>Ia32\Invd.asm</Filename>
+ <Filename>Ia32\FlushCacheLine.asm</Filename>
+ <Filename>Ia32\InterlockedIncrement.asm</Filename>
+ <Filename>Ia32\InterlockedDecrement.asm</Filename>
+ <Filename>Ia32\InterlockedCompareExchange32.asm</Filename>
+ <Filename>Ia32\InterlockedCompareExchange64.asm</Filename>
+ <Filename>Ia32\EnableInterrupts.asm</Filename>
+ <Filename>Ia32\DisableInterrupts.asm</Filename>
+ <Filename>Ia32\EnableDisableInterrupts.asm</Filename>
+ <Filename>Ia32\CpuSleep.asm</Filename>
+ <Filename>Ia32\CpuPause.asm</Filename>
+ <Filename>Ia32\CpuBreakpoint.asm</Filename>
+ <Filename>Ia32\CpuFlushTlb.asm</Filename>
+ <Filename>Ia32\Thunk16.asm</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>x86LowLevel.c</Filename>
+ <Filename>x86Thunk.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Math64.c</Filename>
+ <Filename>x64\Non-existing.c</Filename>
+ <Filename>x64\SwitchStack.asm</Filename>
+ <Filename>x64\SetJump.asm</Filename>
+ <Filename>x64\LongJump.asm</Filename>
+ <Filename>x64\CpuId.asm</Filename>
+ <Filename>x64\ReadEflags.asm</Filename>
+ <Filename>x64\ReadMsr32.asm</Filename>
+ <Filename>x64\ReadMsr64.asm</Filename>
+ <Filename>x64\WriteMsr32.asm</Filename>
+ <Filename>x64\WriteMsr64.asm</Filename>
+ <Filename>x64\ReadCr0.asm</Filename>
+ <Filename>x64\ReadCr2.asm</Filename>
+ <Filename>x64\ReadCr3.asm</Filename>
+ <Filename>x64\ReadCr4.asm</Filename>
+ <Filename>x64\WriteCr0.asm</Filename>
+ <Filename>x64\WriteCr2.asm</Filename>
+ <Filename>x64\WriteCr3.asm</Filename>
+ <Filename>x64\WriteCr4.asm</Filename>
+ <Filename>x64\ReadDr0.asm</Filename>
+ <Filename>x64\ReadDr1.asm</Filename>
+ <Filename>x64\ReadDr2.asm</Filename>
+ <Filename>x64\ReadDr3.asm</Filename>
+ <Filename>x64\ReadDr4.asm</Filename>
+ <Filename>x64\ReadDr5.asm</Filename>
+ <Filename>x64\ReadDr6.asm</Filename>
+ <Filename>x64\ReadDr7.asm</Filename>
+ <Filename>x64\WriteDr0.asm</Filename>
+ <Filename>x64\WriteDr1.asm</Filename>
+ <Filename>x64\WriteDr2.asm</Filename>
+ <Filename>x64\WriteDr3.asm</Filename>
+ <Filename>x64\WriteDr4.asm</Filename>
+ <Filename>x64\WriteDr5.asm</Filename>
+ <Filename>x64\WriteDr6.asm</Filename>
+ <Filename>x64\WriteDr7.asm</Filename>
+ <Filename>x64\ReadCs.asm</Filename>
+ <Filename>x64\ReadDs.asm</Filename>
+ <Filename>x64\ReadEs.asm</Filename>
+ <Filename>x64\ReadFs.asm</Filename>
+ <Filename>x64\ReadGs.asm</Filename>
+ <Filename>x64\ReadSs.asm</Filename>
+ <Filename>x64\ReadTr.asm</Filename>
+ <Filename>x64\ReadGdtr.asm</Filename>
+ <Filename>x64\WriteGdtr.asm</Filename>
+ <Filename>x64\ReadIdtr.asm</Filename>
+ <Filename>x64\WriteIdtr.asm</Filename>
+ <Filename>x64\ReadLdtr.asm</Filename>
+ <Filename>x64\WriteLdtr.asm</Filename>
+ <Filename>x64\FxSave.asm</Filename>
+ <Filename>x64\FxRestore.asm</Filename>
+ <Filename>x64\ReadMm0.asm</Filename>
+ <Filename>x64\ReadMm1.asm</Filename>
+ <Filename>x64\ReadMm2.asm</Filename>
+ <Filename>x64\ReadMm3.asm</Filename>
+ <Filename>x64\ReadMm4.asm</Filename>
+ <Filename>x64\ReadMm5.asm</Filename>
+ <Filename>x64\ReadMm6.asm</Filename>
+ <Filename>x64\ReadMm7.asm</Filename>
+ <Filename>x64\WriteMm0.asm</Filename>
+ <Filename>x64\WriteMm1.asm</Filename>
+ <Filename>x64\WriteMm2.asm</Filename>
+ <Filename>x64\WriteMm3.asm</Filename>
+ <Filename>x64\WriteMm4.asm</Filename>
+ <Filename>x64\WriteMm5.asm</Filename>
+ <Filename>x64\WriteMm6.asm</Filename>
+ <Filename>x64\WriteMm7.asm</Filename>
+ <Filename>x64\ReadTsc.asm</Filename>
+ <Filename>x64\ReadPmc.asm</Filename>
+ <Filename>x64\Monitor.asm</Filename>
+ <Filename>x64\Mwait.asm</Filename>
+ <Filename>x64\DisablePaging64.asm</Filename>
+ <Filename>x64\Wbinvd.asm</Filename>
+ <Filename>x64\Invd.asm</Filename>
+ <Filename>x64\FlushCacheLine.asm</Filename>
+ <Filename>x64\InterlockedIncrement.asm</Filename>
+ <Filename>x64\InterlockedDecrement.asm</Filename>
+ <Filename>x64\InterlockedCompareExchange32.asm</Filename>
+ <Filename>x64\InterlockedCompareExchange64.asm</Filename>
+ <Filename>x64\EnableInterrupts.asm</Filename>
+ <Filename>x64\DisableInterrupts.asm</Filename>
+ <Filename>x64\EnableDisableInterrupts.asm</Filename>
+ <Filename>x64\CpuSleep.asm</Filename>
+ <Filename>x64\CpuPause.asm</Filename>
+ <Filename>x64\CpuBreakpoint.asm</Filename>
+ <Filename>x64\CpuFlushTlb.asm</Filename>
+ <Filename>x64\Thunk16.asm</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>Math64.c</Filename>
+ <Filename>Ipf\setjmp.s</Filename>
+ <Filename>Ipf\SwitchStack.s</Filename>
+ <Filename>Ipf\Unaligned.c</Filename>
+ <Filename>Ipf\CpuBreakpoint.c</Filename>
+ <Filename>Ipf\InterlockedCompareExchange32.s</Filename>
+ <Filename>Ipf\InterlockedCompareExchange64.s</Filename>
+ <Filename>Ipf\Synchronization.c</Filename>
+ </Arch>
+ <Arch ArchType="EBC">
+ <Filename>Math64.c</Filename>
+ <Filename>SwitchStack.c</Filename>
+ <Filename>SetJumpLongJump.c</Filename>
+ <Filename>Unaligned.c</Filename>
+ <Filename>Ebc\CpuBreakpoint.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumUnicodeStringLength</C_Name>
+ <Token>0x00000001</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumAsciiStringLength</C_Name>
+ <Token>0x00000002</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdMaximumLinkedListLength</C_Name>
+ <Token>0x00000003</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdSpinLockTimeout</C_Name>
+ <Token>0x00000004</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseLib/BaseLibInternals.h b/MdePkg/Library/BaseLib/BaseLibInternals.h new file mode 100644 index 0000000000..4cccdae528 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLibInternals.h @@ -0,0 +1,195 @@ +/** @file
+ Declaration of internal functions in BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseLibInternals.h
+
+**/
+
+#ifndef __BASE_LIB_INTERNALS__
+#define __BASE_LIB_INTERNALS__
+
+//
+// Math functions
+//
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ );
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ );
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ );
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ );
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ );
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ );
+
+//
+// Ia32 and x64 specific functions
+//
+
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ );
+
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ );
+
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ );
+
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ );
+
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ );
+
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ );
+
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86EnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ );
+
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseLib/BitField.c b/MdePkg/Library/BaseLib/BitField.c new file mode 100644 index 0000000000..ad953396ac --- /dev/null +++ b/MdePkg/Library/BaseLib/BitField.c @@ -0,0 +1,812 @@ +/** @file
+ Bit field functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BitField.c
+
+**/
+
+unsigned int
+EFIAPI
+BitFieldReadUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return (Operand & ~((unsigned int)-2 << EndBit)) >> StartBit;
+}
+
+unsigned int
+EFIAPI
+BitFieldOrUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int OrData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand | ((OrData << StartBit) & ~((unsigned int)-2 << EndBit));
+}
+
+unsigned int
+EFIAPI
+BitFieldAndUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int AndData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand & ~((~AndData << StartBit) & ~((unsigned int)-2 << EndBit));
+}
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr8 (
+ BitFieldAnd8 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr16 (
+ BitFieldAnd16 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr32 (
+ BitFieldAnd32 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);
+}
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return Operand |
+ (LShiftU64 (OrData, StartBit) & ~LShiftU64 ((UINT64)-2, EndBit));
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return Operand &
+ ~(LShiftU64 (~AndData, StartBit) & ~LShiftU64 ((UINT64)-2, EndBit));
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr64 (
+ BitFieldAnd64 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
diff --git a/MdePkg/Library/BaseLib/Cpu.c b/MdePkg/Library/BaseLib/Cpu.c new file mode 100644 index 0000000000..cc7a608f83 --- /dev/null +++ b/MdePkg/Library/BaseLib/Cpu.c @@ -0,0 +1,67 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Cpu.c
+
+**/
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ )
+{
+ BOOLEAN InterruptState;
+
+ InterruptState = GetInterruptState ();
+ DisableInterrupts ();
+ return InterruptState;
+}
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ )
+{
+ if (InterruptState) {
+ EnableInterrupts ();
+ } else {
+ DisableInterrupts ();
+ }
+ return InterruptState;
+}
diff --git a/MdePkg/Library/BaseLib/CpuDeadLoop.c b/MdePkg/Library/BaseLib/CpuDeadLoop.c new file mode 100644 index 0000000000..f8f530207a --- /dev/null +++ b/MdePkg/Library/BaseLib/CpuDeadLoop.c @@ -0,0 +1,33 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ )
+{
+ volatile UINTN Index;
+
+ for (Index = 0; Index == 0;);
+}
diff --git a/MdePkg/Library/BaseLib/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/DivS64x64Remainder.c new file mode 100644 index 0000000000..aa28fc8ccb --- /dev/null +++ b/MdePkg/Library/BaseLib/DivS64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32.c b/MdePkg/Library/BaseLib/DivU64x32.c new file mode 100644 index 0000000000..b223c6c87b --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/DivU64x32Remainder.c new file mode 100644 index 0000000000..aa34b31e46 --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/DivU64x64Remainder.c new file mode 100644 index 0000000000..0caa5295aa --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c new file mode 100644 index 0000000000..b0b262f367 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c @@ -0,0 +1,100 @@ +/** @file
+ Base Library CPU Functions for EBC
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+extern
+UINT64
+_break (
+ CHAR8 BreakCode
+ );
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ _break (3);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+ return FALSE;
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo32.c b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c new file mode 100644 index 0000000000..6dfe8056b4 --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitPos;
+
+ return (BitPos = HighBitSet32 (Operand)) > 0 ? 1ul << BitPos : 0;
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo64.c b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c new file mode 100644 index 0000000000..9994fb8f12 --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitPos;
+
+ return (BitPos = HighBitSet64 (Operand)) > 0 ? LShiftU64 (1, BitPos) : 0;
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet32.c b/MdePkg/Library/BaseLib/HighBitSet32.c new file mode 100644 index 0000000000..65f067ac1a --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet32.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ for (BitIndex = -1; Operand != 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet64.c b/MdePkg/Library/BaseLib/HighBitSet64.c new file mode 100644 index 0000000000..50889777b5 --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet64.c @@ -0,0 +1,43 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ for (BitIndex = -1;
+ Operand != 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c new file mode 100644 index 0000000000..987fc9c846 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c @@ -0,0 +1,101 @@ +/** @file
+ Base Library CPU functions for Itanium
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//void __mfa (void);
+
+#pragma intrinsic (_enable)
+#pragma intrinsic (_disable)
+#pragma intrinsic (__break)
+#pragma intrinsic (__mfa)
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __break (0);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ __mfa ();
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _disable ();
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _enable ();
+}
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ return FALSE;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s new file mode 100644 index 0000000000..3a278d7268 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s @@ -0,0 +1,29 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange32 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange32.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange32
+.type InternalSyncCompareExchange32, @function
+InternalSyncCompareExchange32::
+ zxt4 r33 = r33
+ mov ar.ccv = r33
+ cmpxchg4.rel r8 = [r32], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange32
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s new file mode 100644 index 0000000000..200e30e09e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s @@ -0,0 +1,28 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange64 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange64.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange64
+.type InternalSyncCompareExchange64, @function
+InternalSyncCompareExchange64::
+ mov ar.ccv = r33
+ cmpxchg8.rel r8 = [r64], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange64
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/Ipf/SwitchStack.s b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s new file mode 100644 index 0000000000..4dd17f533e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s @@ -0,0 +1,122 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// SwitchStack.s
+//
+// Abstract:
+//
+// Contains an implementation of a stack switch for the Itanium-based architecture.
+//
+//
+//
+// Revision History:
+//
+//--
+
+ .file "SwitchStack.s"
+
+#include "asm.h"
+#include "ia_64gen.h"
+
+// Define hardware RSE Configuration Register
+//
+// RS Configuration (RSC) bit field positions
+
+#define RSC_MODE 0
+#define RSC_PL 2
+#define RSC_BE 4
+// RSC bits 5-15 reserved
+#define RSC_MBZ0 5
+#define RSC_MBZ0_V 0x3ff
+#define RSC_LOADRS 16
+#define RSC_LOADRS_LEN 14
+// RSC bits 30-63 reserved
+#define RSC_MBZ1 30
+#define RSC_MBZ1_V 0x3ffffffffULL
+
+// RSC modes
+// Lazy
+#define RSC_MODE_LY (0x0)
+// Store intensive
+#define RSC_MODE_SI (0x1)
+// Load intensive
+#define RSC_MODE_LI (0x2)
+// Eager
+#define RSC_MODE_EA (0x3)
+
+// RSC Endian bit values
+#define RSC_BE_LITTLE 0
+#define RSC_BE_BIG 1
+
+// RSC while in kernel: enabled, little endian, pl = 0, eager mode
+#define RSC_KERNEL ((RSC_MODE_EA<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+// Lazy RSC in kernel: enabled, little endian, pl = 0, lazy mode
+#define RSC_KERNEL_LAZ ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+// RSE disabled: disabled, pl = 0, little endian, eager mode
+#define RSC_KERNEL_DISABLED ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))
+
+
+//VOID
+//SwitchStack (
+// VOID *ContinuationFunction,
+// UINTN Parameter,
+// UINTN NewTopOfStack,
+// UINTN NewBSPStore OPTIONAL
+//)
+///*++
+//
+//Input Arguments
+//
+// ContinuationFunction - This is a pointer to the PLABEL of the function that should be called once the
+// new stack has been created.
+// Parameter - The parameter to pass to the continuation function
+// NewTopOfStack - This is the new top of the memory stack for ensuing code. This is mandatory and
+// should be non-zero
+// NewBSPStore - This is the new BSP store for the ensuing code. It is optional on IA-32 and mandatory on Itanium-based platform.
+//
+//--*/
+
+PROCEDURE_ENTRY(SwitchStack)
+
+ mov r16 = -0x10;;
+ and r16 = r34, r16;; // get new stack value in R16, 0 the last nibble.
+ mov r15 = r35;; // Get new BspStore into R15
+ mov r13 = r32;; // this is a pointer to the PLABEL of the continuation function.
+ mov r17 = r33;; // this is the parameter to pass to the continuation function
+
+ alloc r11=0,0,0,0 // Set 0-size frame
+ ;;
+ flushrs;;
+
+ mov r21 = RSC_KERNEL_DISABLED // for rse disable
+ ;;
+ mov ar.rsc = r21 // turn off RSE
+
+ add sp = r0, r16;; // transfer to the EFI stack
+ mov ar.bspstore = r15 // switch to EFI BSP
+ invala // change of ar.bspstore needs invala.
+
+ mov r18 = RSC_KERNEL_LAZ // RSC enabled, Lazy mode
+ ;;
+ mov ar.rsc = r18 // turn rse on, in kernel mode
+ ;;
+ alloc r11=0,0,1,0;; // alloc 0 outs going to ensuing DXE IPL service
+ mov out0 = r17
+ ld8 r16 = [r13],8;; // r16 = address of continuation function from the PLABEL
+ ld8 gp = [r13] // gp = gp of continuation function from the PLABEL
+ mov b6 = r16
+ ;;
+ br.call.sptk.few b0=b6;; // Call the continuation function
+ ;;
+PROCEDURE_EXIT(SwitchStack)
+
+
diff --git a/MdePkg/Library/BaseLib/Ipf/Synchronization.c b/MdePkg/Library/BaseLib/Ipf/Synchronization.c new file mode 100644 index 0000000000..9eb8799e30 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/Synchronization.c @@ -0,0 +1,59 @@ +/** @file
+ Implementation of synchronization functions on Itanium.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue == InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue + 1
+ ));
+ return OriginalValue + 1;
+}
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue == InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue - 1
+ ));
+ return OriginalValue - 1;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/Unaligned.c b/MdePkg/Library/BaseLib/Ipf/Unaligned.c new file mode 100644 index 0000000000..eeeb0f85bb --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/Unaligned.c @@ -0,0 +1,220 @@ +/** @file
+ Unaligned access functions of BaseLib for IPF.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ return (UINT16)(((UINT8*)Buffer)[0] | (((UINT8*)Buffer)[1] << 8));
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ ((UINT8*)Buffer)[0] = (UINT8)Value;
+ ((UINT8*)Buffer)[1] = (UINT8)(Value >> 8);
+ return Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return (UINT32)(
+ ReadUnaligned16 ((UINT16*)Buffer) |
+ (((UINT8*)Buffer)[2] << 16)
+ );
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ *(UINT8*)((UINT16*)Buffer + 1) = (UINT8)(Value >> 16);
+ return Value;
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return (UINT32)(
+ ReadUnaligned16 ((UINT16*)Buffer) |
+ (ReadUnaligned16 ((UINT16*)Buffer + 1) << 16)
+ );
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ WriteUnaligned16 ((UINT16*)Buffer + 1, (UINT16)(Value >> 16));
+ return Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ return (UINT64)(
+ ReadUnaligned32 ((UINT32*)Buffer) |
+ LShiftU64 (ReadUnaligned32 ((UINT32*)Buffer + 1), 32)
+ );
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ WriteUnaligned32 ((UINT32*)Buffer, (UINT32)Value);
+ WriteUnaligned32 ((UINT32*)Buffer + 1, (UINT32)RShiftU64 (Value, 32));
+ return Value;
+}
diff --git a/MdePkg/Library/BaseLib/Ipf/asm.h b/MdePkg/Library/BaseLib/Ipf/asm.h new file mode 100644 index 0000000000..8ef0b30626 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/asm.h @@ -0,0 +1,27 @@ +/// @file
+/// This module contains generic macros for an assembly writer.
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: asm.h
+///
+#ifndef _ASM_H
+#define _ASM_H
+
+#define TRUE 1
+#define FALSE 0
+#define PROCEDURE_ENTRY(name) .##text; \
+ .##type name, @function; \
+ .##proc name; \
+ name::
+
+#define PROCEDURE_EXIT(name) .##endp name
+
+#endif // _ASM_H
diff --git a/MdePkg/Library/BaseLib/Ipf/ia_64gen.h b/MdePkg/Library/BaseLib/Ipf/ia_64gen.h new file mode 100644 index 0000000000..081cc4a8f6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/ia_64gen.h @@ -0,0 +1,205 @@ +/// @file
+///
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ia_64gen.h
+///
+#ifndef _IA64GEN_H
+#define _IA64GEN_H
+
+#define TT_UNAT 0
+#define C_PSR 0
+#define J_UNAT 0
+#define T_TYPE 0
+#define T_IPSR 0x8
+#define T_ISR 0x10
+#define T_IIP 0x18
+#define T_IFA 0x20
+#define T_IIPA 0x28
+#define T_IFS 0x30
+#define T_IIM 0x38
+#define T_RSC 0x40
+#define T_BSP 0x48
+#define T_BSPSTORE 0x50
+#define T_RNAT 0x58
+#define T_PFS 0x60
+#define T_KBSPSTORE 0x68
+#define T_UNAT 0x70
+#define T_CCV 0x78
+#define T_DCR 0x80
+#define T_PREDS 0x88
+#define T_NATS 0x90
+#define T_R1 0x98
+#define T_GP 0x98
+#define T_R2 0xa0
+#define T_R3 0xa8
+#define T_R4 0xb0
+#define T_R5 0xb8
+#define T_R6 0xc0
+#define T_R7 0xc8
+#define T_R8 0xd0
+#define T_R9 0xd8
+#define T_R10 0xe0
+#define T_R11 0xe8
+#define T_R12 0xf0
+#define T_SP 0xf0
+#define T_R13 0xf8
+#define T_R14 0x100
+#define T_R15 0x108
+#define T_R16 0x110
+#define T_R17 0x118
+#define T_R18 0x120
+#define T_R19 0x128
+#define T_R20 0x130
+#define T_R21 0x138
+#define T_R22 0x140
+#define T_R23 0x148
+#define T_R24 0x150
+#define T_R25 0x158
+#define T_R26 0x160
+#define T_R27 0x168
+#define T_R28 0x170
+#define T_R29 0x178
+#define T_R30 0x180
+#define T_R31 0x188
+#define T_F2 0x1f0
+#define T_F3 0x200
+#define T_F4 0x210
+#define T_F5 0x220
+#define T_F6 0x230
+#define T_F7 0x240
+#define T_F8 0x250
+#define T_F9 0x260
+#define T_F10 0x270
+#define T_F11 0x280
+#define T_F12 0x290
+#define T_F13 0x2a0
+#define T_F14 0x2b0
+#define T_F15 0x2c0
+#define T_F16 0x2d0
+#define T_F17 0x2e0
+#define T_F18 0x2f0
+#define T_F19 0x300
+#define T_F20 0x310
+#define T_F21 0x320
+#define T_F22 0x330
+#define T_F23 0x340
+#define T_F24 0x350
+#define T_F25 0x360
+#define T_F26 0x370
+#define T_F27 0x380
+#define T_F28 0x390
+#define T_F29 0x3a0
+#define T_F30 0x3b0
+#define T_F31 0x3c0
+#define T_FPSR 0x1e0
+#define T_B0 0x190
+#define T_B1 0x198
+#define T_B2 0x1a0
+#define T_B3 0x1a8
+#define T_B4 0x1b0
+#define T_B5 0x1b8
+#define T_B6 0x1c0
+#define T_B7 0x1c8
+#define T_EC 0x1d0
+#define T_LC 0x1d8
+#define J_NATS 0x8
+#define J_PFS 0x10
+#define J_BSP 0x18
+#define J_RNAT 0x20
+#define J_PREDS 0x28
+#define J_LC 0x30
+#define J_R4 0x38
+#define J_R5 0x40
+#define J_R6 0x48
+#define J_R7 0x50
+#define J_SP 0x58
+#define J_F2 0x60
+#define J_F3 0x70
+#define J_F4 0x80
+#define J_F5 0x90
+#define J_F16 0xa0
+#define J_F17 0xb0
+#define J_F18 0xc0
+#define J_F19 0xd0
+#define J_F20 0xe0
+#define J_F21 0xf0
+#define J_F22 0x100
+#define J_F23 0x110
+#define J_F24 0x120
+#define J_F25 0x130
+#define J_F26 0x140
+#define J_F27 0x150
+#define J_F28 0x160
+#define J_F29 0x170
+#define J_F30 0x180
+#define J_F31 0x190
+#define J_FPSR 0x1a0
+#define J_B0 0x1a8
+#define J_B1 0x1b0
+#define J_B2 0x1b8
+#define J_B3 0x1c0
+#define J_B4 0x1c8
+#define J_B5 0x1d0
+#define TRAP_FRAME_LENGTH 0x3d0
+#define C_UNAT 0x28
+#define C_NATS 0x30
+#define C_PFS 0x8
+#define C_BSPSTORE 0x10
+#define C_RNAT 0x18
+#define C_RSC 0x20
+#define C_PREDS 0x38
+#define C_LC 0x40
+#define C_DCR 0x48
+#define C_R1 0x50
+#define C_GP 0x50
+#define C_R4 0x58
+#define C_R5 0x60
+#define C_R6 0x68
+#define C_R7 0x70
+#define C_SP 0x78
+#define C_R13 0x80
+#define C_F2 0x90
+#define C_F3 0xa0
+#define C_F4 0xb0
+#define C_F5 0xc0
+#define C_F16 0xd0
+#define C_F17 0xe0
+#define C_F18 0xf0
+#define C_F19 0x100
+#define C_F20 0x110
+#define C_F21 0x120
+#define C_F22 0x130
+#define C_F23 0x140
+#define C_F24 0x150
+#define C_F25 0x160
+#define C_F26 0x170
+#define C_F27 0x180
+#define C_F28 0x190
+#define C_F29 0x1a0
+#define C_F30 0x1b0
+#define C_F31 0x1c0
+#define C_FPSR 0x1d0
+#define C_B0 0x1d8
+#define C_B1 0x1e0
+#define C_B2 0x1e8
+#define C_B3 0x1f0
+#define C_B4 0x1f8
+#define C_B5 0x200
+#define TT_R2 0x8
+#define TT_R3 0x10
+#define TT_R8 0x18
+#define TT_R9 0x20
+#define TT_R10 0x28
+#define TT_R11 0x30
+#define TT_R14 0x38
+
+#endif _IA64GEN_H
diff --git a/MdePkg/Library/BaseLib/Ipf/setjmp.s b/MdePkg/Library/BaseLib/Ipf/setjmp.s new file mode 100644 index 0000000000..6569db6af4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ipf/setjmp.s @@ -0,0 +1,317 @@ +/// @file
+/// Contains an implementation of setjmp and longjmp for the
+/// Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: setjmp.s
+///
+///
+
+ .file "setjmp.s"
+
+#include "asm.h"
+#include "ia_64gen.h"
+
+/// int SetJump(struct jmp_buffer save)
+///
+/// Setup a non-local goto.
+///
+/// Description:
+///
+/// SetJump stores the current register set in the area pointed to
+/// by "save". It returns zero. Subsequent calls to "LongJump" will
+/// restore the registers and return non-zero to the same location.
+///
+/// On entry, r32 contains the pointer to the jmp_buffer
+///
+
+PROCEDURE_ENTRY(SetJump)
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ mov r32 = r33
+
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ add r10 = J_PREDS, r32 // skip Unats & pfs save area
+ add r11 = J_BSP, r32
+ //
+ // save immediate context
+ //
+ mov r2 = ar.bsp // save backing store pointer
+ mov r3 = pr // save predicates
+ ;;
+ //
+ // save user Unat register
+ //
+ mov r16 = ar.lc // save loop count register
+ mov r14 = ar.unat // save user Unat register
+
+ st8 [r10] = r3, J_LC-J_PREDS
+ st8 [r11] = r2, J_R4-J_BSP
+ ;;
+ st8 [r10] = r16, J_R5-J_LC
+ st8 [r32] = r14, J_NATS // Note: Unat at the
+ // beginning of the save area
+ mov r15 = ar.pfs
+ ;;
+ //
+ // save preserved general registers & NaT's
+ //
+ st8.spill [r11] = r4, J_R6-J_R4
+ ;;
+ st8.spill [r10] = r5, J_R7-J_R5
+ ;;
+ st8.spill [r11] = r6, J_SP-J_R6
+ ;;
+ st8.spill [r10] = r7, J_F3-J_R7
+ ;;
+ st8.spill [r11] = sp, J_F2-J_SP
+ ;;
+ //
+ // save spilled Unat and pfs registers
+ //
+ mov r2 = ar.unat // save Unat register after spill
+ ;;
+ st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
+ ;;
+ st8 [r32] = r15 // save pfs
+ //
+ // save floating registers
+ //
+ stf.spill [r11] = f2, J_F4-J_F2
+ stf.spill [r10] = f3, J_F5-J_F3
+ ;;
+ stf.spill [r11] = f4, J_F16-J_F4
+ stf.spill [r10] = f5, J_F17-J_F5
+ ;;
+ stf.spill [r11] = f16, J_F18-J_F16
+ stf.spill [r10] = f17, J_F19-J_F17
+ ;;
+ stf.spill [r11] = f18, J_F20-J_F18
+ stf.spill [r10] = f19, J_F21-J_F19
+ ;;
+ stf.spill [r11] = f20, J_F22-J_F20
+ stf.spill [r10] = f21, J_F23-J_F21
+ ;;
+ stf.spill [r11] = f22, J_F24-J_F22
+ stf.spill [r10] = f23, J_F25-J_F23
+ ;;
+ stf.spill [r11] = f24, J_F26-J_F24
+ stf.spill [r10] = f25, J_F27-J_F25
+ ;;
+ stf.spill [r11] = f26, J_F28-J_F26
+ stf.spill [r10] = f27, J_F29-J_F27
+ ;;
+ stf.spill [r11] = f28, J_F30-J_F28
+ stf.spill [r10] = f29, J_F31-J_F29
+ ;;
+ stf.spill [r11] = f30, J_FPSR-J_F30
+ stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
+ //
+ // save FPSR register & branch registers
+ //
+ mov r2 = ar.fpsr // save fpsr register
+ mov r3 = b0
+ ;;
+ st8 [r11] = r2, J_B1-J_FPSR
+ st8 [r10] = r3, J_B2-J_B0
+ mov r2 = b1
+ mov r3 = b2
+ ;;
+ st8 [r11] = r2, J_B3-J_B1
+ st8 [r10] = r3, J_B4-J_B2
+ mov r2 = b3
+ mov r3 = b4
+ ;;
+ st8 [r11] = r2, J_B5-J_B3
+ st8 [r10] = r3
+ mov r2 = b5
+ ;;
+ st8 [r11] = r2
+ ;;
+ //
+ // return
+ //
+ mov r8 = r0 // return 0 from setjmp
+ mov ar.unat = r14 // restore unat
+ br.ret.sptk b0
+
+PROCEDURE_EXIT(SetJump)
+
+
+//
+// void LongJump(struct jmp_buffer *)
+//
+// Perform a non-local goto.
+//
+// Description:
+//
+// LongJump initializes the register set to the values saved by a
+// previous 'SetJump' and jumps to the return location saved by that
+// 'SetJump'. This has the effect of unwinding the stack and returning
+// for a second time to the 'SetJump'.
+//
+
+PROCEDURE_ENTRY(LongJump)
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ mov r32 = r33
+
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ //
+ // caching the return value as we do invala in the end
+ //
+/// mov r8 = r33 // return value
+ mov r8 = 1 // For now return hard coded 1
+
+ //
+ // get immediate context
+ //
+ mov r14 = ar.rsc // get user RSC conf
+ add r10 = J_PFS, r32 // get address of pfs
+ add r11 = J_NATS, r32
+ ;;
+ ld8 r15 = [r10], J_BSP-J_PFS // get pfs
+ ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
+ ;;
+ mov ar.unat = r2
+ ;;
+ ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
+ mov ar.rsc = r0 // put RSE in enforced lazy
+ mov ar.pfs = r15
+ ;;
+
+ //
+ // while returning from longjmp the BSPSTORE and BSP needs to be
+ // same and discard all the registers allocated after we did
+ // setjmp. Also, we need to generate the RNAT register since we
+ // did not flushed the RSE on setjmp.
+ //
+ mov r17 = ar.bspstore // get current BSPSTORE
+ ;;
+ cmp.ltu p6,p7 = r17, r16 // is it less than BSP of
+(p6) br.spnt.few .flush_rse
+ mov r19 = ar.rnat // get current RNAT
+ ;;
+ loadrs // invalidate dirty regs
+ br.sptk.many .restore_rnat // restore RNAT
+
+.flush_rse:
+ flushrs
+ ;;
+ mov r19 = ar.rnat // get current RNAT
+ mov r17 = r16 // current BSPSTORE
+ ;;
+.restore_rnat:
+ //
+ // check if RNAT is saved between saved BSP and curr BSPSTORE
+ //
+ dep r18 = 1,r16,3,6 // get RNAT address
+ ;;
+ cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE
+ ;;
+(p8) ld8 r19 = [r18] // get RNAT from RSE
+ ;;
+ mov ar.bspstore = r16 // set new BSPSTORE
+ ;;
+ mov ar.rnat = r19 // restore RNAT
+ mov ar.rsc = r14 // restore RSC conf
+
+
+ ld8 r3 = [r11], J_R4-J_LC // get lc register
+ ld8 r2 = [r10], J_R5-J_PREDS // get predicates
+ ;;
+ mov pr = r2, -1
+ mov ar.lc = r3
+ //
+ // restore preserved general registers & NaT's
+ //
+ ld8.fill r4 = [r11], J_R6-J_R4
+ ;;
+ ld8.fill r5 = [r10], J_R7-J_R5
+ ld8.fill r6 = [r11], J_SP-J_R6
+ ;;
+ ld8.fill r7 = [r10], J_F2-J_R7
+ ld8.fill sp = [r11], J_F3-J_SP
+ ;;
+ //
+ // restore floating registers
+ //
+ ldf.fill f2 = [r10], J_F4-J_F2
+ ldf.fill f3 = [r11], J_F5-J_F3
+ ;;
+ ldf.fill f4 = [r10], J_F16-J_F4
+ ldf.fill f5 = [r11], J_F17-J_F5
+ ;;
+ ldf.fill f16 = [r10], J_F18-J_F16
+ ldf.fill f17 = [r11], J_F19-J_F17
+ ;;
+ ldf.fill f18 = [r10], J_F20-J_F18
+ ldf.fill f19 = [r11], J_F21-J_F19
+ ;;
+ ldf.fill f20 = [r10], J_F22-J_F20
+ ldf.fill f21 = [r11], J_F23-J_F21
+ ;;
+ ldf.fill f22 = [r10], J_F24-J_F22
+ ldf.fill f23 = [r11], J_F25-J_F23
+ ;;
+ ldf.fill f24 = [r10], J_F26-J_F24
+ ldf.fill f25 = [r11], J_F27-J_F25
+ ;;
+ ldf.fill f26 = [r10], J_F28-J_F26
+ ldf.fill f27 = [r11], J_F29-J_F27
+ ;;
+ ldf.fill f28 = [r10], J_F30-J_F28
+ ldf.fill f29 = [r11], J_F31-J_F29
+ ;;
+ ldf.fill f30 = [r10], J_FPSR-J_F30
+ ldf.fill f31 = [r11], J_B0-J_F31 ;;
+
+ //
+ // restore branch registers and fpsr
+ //
+ ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
+ ld8 r17 = [r11], J_B2-J_B0 // get return pointer
+ ;;
+ mov ar.fpsr = r16
+ mov b0 = r17
+ ld8 r2 = [r10], J_B3-J_B1
+ ld8 r3 = [r11], J_B4-J_B2
+ ;;
+ mov b1 = r2
+ mov b2 = r3
+ ld8 r2 = [r10], J_B5-J_B3
+ ld8 r3 = [r11]
+ ;;
+ mov b3 = r2
+ mov b4 = r3
+ ld8 r2 = [r10]
+ ld8 r21 = [r32] // get user unat
+ ;;
+ mov b5 = r2
+ mov ar.unat = r21
+
+ //
+ // invalidate ALAT
+ //
+ invala ;;
+
+ br.ret.sptk b0
+PROCEDURE_EXIT(LongJump)
+
+
diff --git a/MdePkg/Library/BaseLib/LRotU32.c b/MdePkg/Library/BaseLib/LRotU32.c new file mode 100644 index 0000000000..ea782463d0 --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand << Count) | (Operand >> (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/LRotU64.c b/MdePkg/Library/BaseLib/LRotU64.c new file mode 100644 index 0000000000..cf751f98f5 --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LShiftU64.c b/MdePkg/Library/BaseLib/LShiftU64.c new file mode 100644 index 0000000000..50449eb9e3 --- /dev/null +++ b/MdePkg/Library/BaseLib/LShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LinkedList.c b/MdePkg/Library/BaseLib/LinkedList.c new file mode 100644 index 0000000000..0f42749775 --- /dev/null +++ b/MdePkg/Library/BaseLib/LinkedList.c @@ -0,0 +1,433 @@ +/** @file
+ Linked List Library Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LinkedList.c
+
+**/
+
+BOOLEAN
+EFIAPI
+IsNodeInList (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ UINTN Count;
+ CONST LIST_ENTRY *Ptr;
+ BOOLEAN Found;
+
+ //
+ // Test the validity of List and Node
+ //
+ ASSERT (List != NULL);
+ ASSERT (List->ForwardLink != NULL);
+ ASSERT (List->BackLink != NULL);
+ ASSERT (Node != NULL);
+
+ Count = FixedPcdGet32 (PcdMaximumLinkedListLength);
+ Ptr = List;
+ do {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ } while ((Ptr != List) && (Ptr != Node) && (Count > 0));
+ Found = (BOOLEAN)(Ptr == Node);
+
+ if (FixedPcdGet32 (PcdMaximumLinkedListLength) > 0) {
+ while ((Count > 0) && (Ptr != List)) {
+ Ptr = Ptr->ForwardLink;
+ }
+ ASSERT (Count > 0);
+ }
+
+ return Found;
+}
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN OUT LIST_ENTRY *List
+ )
+
+{
+ ASSERT (List != NULL);
+
+ List->ForwardLink = List;
+ List->BackLink = List;
+ return List;
+}
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List->ForwardLink;
+ Entry->BackLink = List;
+ Entry->ForwardLink->BackLink = Entry;
+ List->ForwardLink = Entry;
+ return List;
+}
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List;
+ Entry->BackLink = List->BackLink;
+ Entry->BackLink->ForwardLink = Entry;
+ List->BackLink = Entry;
+ return List;
+}
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return List->ForwardLink;
+}
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return Node->ForwardLink;
+}
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return (BOOLEAN)(List->ForwardLink == List);
+}
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(Node == List);
+}
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
+}
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ FirstEntry and SecondEntry contains more than PcdMaximumLinkedListLenth
+ nodes, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN OUT LIST_ENTRY *FirstEntry,
+ IN OUT LIST_ENTRY *SecondEntry
+ )
+{
+ LIST_ENTRY *Ptr;
+
+ if (FirstEntry == SecondEntry) {
+ return SecondEntry;
+ }
+
+ //
+ // ASSERT Entry1 and Entry2 are in the same linked list
+ //
+ ASSERT (IsNodeInList (FirstEntry, SecondEntry));
+
+ //
+ // Ptr is the node pointed to by FirstEntry->ForwardLink
+ //
+ Ptr = RemoveEntryList (FirstEntry);
+
+ //
+ // If FirstEntry immediately follows SecondEntry, FirstEntry willl be placed
+ // immediately in front of SecondEntry
+ //
+ if (Ptr->BackLink == SecondEntry) {
+ return InsertTailList (SecondEntry, FirstEntry);
+ }
+
+ //
+ // Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,
+ // then there are no further steps necessary
+ //
+ if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {
+ return Ptr;
+ }
+
+ //
+ // Move SecondEntry to the front of Ptr
+ //
+ RemoveEntryList (SecondEntry);
+ InsertTailList (Ptr, SecondEntry);
+ return SecondEntry;
+}
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ Entry contains more than PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ )
+{
+ ASSERT (!IsListEmpty (Entry));
+
+ Entry->ForwardLink->BackLink = Entry->BackLink;
+ Entry->BackLink->ForwardLink = Entry->ForwardLink;
+ return Entry->ForwardLink;
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet32.c b/MdePkg/Library/BaseLib/LowBitSet32.c new file mode 100644 index 0000000000..5a21245264 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet32.c @@ -0,0 +1,44 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0; (Operand & 1) == 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet64.c b/MdePkg/Library/BaseLib/LowBitSet64.c new file mode 100644 index 0000000000..a3e5ba0842 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0;
+ (Operand & 1) == 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/Math64.c b/MdePkg/Library/BaseLib/Math64.c new file mode 100644 index 0000000000..27d75232c5 --- /dev/null +++ b/MdePkg/Library/BaseLib/Math64.c @@ -0,0 +1,174 @@ +/** @file
+ Leaf math worker functions that require 64-bit arithmetic support from the
+ compiler.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Math64.c
+
+**/
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand << Count;
+}
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand >> Count;
+}
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ //
+ // Test if this compiler supports arithmetic shift
+ //
+ if ((((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1)) == -1) {
+ //
+ // Arithmetic shift is supported
+ //
+ return (UINT64)((INT64)Operand >> Count);
+ }
+
+ //
+ // Arithmetic is not supported
+ //
+ return (Operand >> Count) |
+ ((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);
+}
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand << Count) | (Operand >> (64 - Count));
+}
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand >> Count) | (Operand << (64 - Count));
+}
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return (UINT64)(
+ ((UINT64)SwapBytes32 ((UINT32)Operand) << 32) |
+ ((UINT64)SwapBytes32 ((UINT32)(Operand >> 32)))
+ );
+}
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend / Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend % Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = (UINT32)(Dividend % Divisor);
+ }
+ return Dividend / Divisor;
+}
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
diff --git a/MdePkg/Library/BaseLib/ModU64x32.c b/MdePkg/Library/BaseLib/ModU64x32.c new file mode 100644 index 0000000000..a8737f43f6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ModU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathModU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/MultS64x64.c b/MdePkg/Library/BaseLib/MultS64x64.c new file mode 100644 index 0000000000..7e8d3184f5 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultS64x64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ )
+{
+ return (INT64)MultU64x64 (Multiplicand, Multiplier);
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x32.c b/MdePkg/Library/BaseLib/MultU64x32.c new file mode 100644 index 0000000000..4c30472bfa --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x32.c @@ -0,0 +1,45 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x32 (Multiplicand, Multiplier);
+ // TODO: ASSERT (Result not overflow);
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x64.c b/MdePkg/Library/BaseLib/MultU64x64.c new file mode 100644 index 0000000000..6324c3e335 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x64.c @@ -0,0 +1,45 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x64 (Multiplicand, Multiplier);
+ // TODO: ASSERT (Result not overflow);
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/RRotU32.c b/MdePkg/Library/BaseLib/RRotU32.c new file mode 100644 index 0000000000..93dda94b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand >> Count) | (Operand << (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/RRotU64.c b/MdePkg/Library/BaseLib/RRotU64.c new file mode 100644 index 0000000000..d55bbfc79f --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/RShiftU64.c b/MdePkg/Library/BaseLib/RShiftU64.c new file mode 100644 index 0000000000..f9ae4f6efa --- /dev/null +++ b/MdePkg/Library/BaseLib/RShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/SetJumpLongJump.c b/MdePkg/Library/BaseLib/SetJumpLongJump.c new file mode 100644 index 0000000000..a2381251f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/SetJumpLongJump.c @@ -0,0 +1,40 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetJumpLongJump.c
+
+**/
+
+
+
+UINTN
+EFIAPI
+SetJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+ ASSERT (FALSE);
+ return 0;
+}
+
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+ ASSERT (Value != 0);
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c new file mode 100644 index 0000000000..fb39a22a42 --- /dev/null +++ b/MdePkg/Library/BaseLib/String.c @@ -0,0 +1,798 @@ +/** @file
+ Unicode string primatives.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: String.c
+
+**/
+
+/**
+ Copies one Null-terminated Unicode string to another Null-terminated Unicode
+ string and returns the new Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destiantion
+
+**/
+CHAR16 *
+EFIAPI
+StrCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ CHAR16 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > StrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated Unicode string with a maximum length to another
+ Null-terminated Unicode string with a maximum length and returns the new
+ Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. At most, Length Unicode
+ characters are copied from Source to Destination. If Length is 0, then
+ Destination is returned unmodified. If Length is greater that the number of
+ Unicode characters in Source, then Destination is padded with Null Unicode
+ characters. If Source and Destination overlap, then the results are
+ undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to copy.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR16 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL if Length is not zero
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ // Q: Does Source have to be NULL-terminated?
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while ((*Source != L'\0') && (Length > 1)) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated Unicode string.
+
+ This function returns the number of Unicode characters in the Null-terminated
+ Unicode string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+StrLen (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+
+ for (Length = 0; *String != L'\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (FixedPcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (Length < FixedPcdGet32 (PcdMaximumUnicodeStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated Unicode string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated Unicode
+ string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+StrSize (
+ IN CONST CHAR16 *String
+ )
+{
+ return (StrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated Unicode strings, and returns the difference
+ between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched Unicode character in SecondString subtracted from the first
+ mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Compares two Null-terminated Unicode strings with maximum lengths, and
+ returns the difference between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. At most, Length Unicode
+ characters will be compared. If Length is 0, then 0 is returned. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched Unicode character in SecondString
+ subtracted from the first mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to compare.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrnCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength.
+ // Length tests are performed inside StrLen().
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') &&
+ (*FirstString != *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string to another Null-terminated
+ Unicode string, and returns the concatenated Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination. The Null-terminated concatenated
+ Unicode String is returned. If Source and Destination overlap, then the
+ results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ StrCpy (Destination + StrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string with a maximum length to the
+ end of another Null-terminated Unicode string, and returns the concatenated
+ Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination, and Destination is returned. At
+ most, Length Unicode characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ StrnCpy (Destination + StrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Copies one Null-terminated ASCII string to another Null-terminated ASCII
+ string and returns the new ASCII string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ CHAR8 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated ASCII string with a maximum length to another
+ Null-terminated ASCII string with a maximum length and returns the new ASCII
+ string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. At most, Length ASCII characters
+ are copied from Source to Destination. If Length is 0, then Destination is
+ returned unmodified. If Length is greater that the number of ASCII characters
+ in Source, then Destination is padded with Null ASCII characters. If Source
+ and Destination overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to copy.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR8 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while (*Source && Length > 1) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated ASCII string.
+
+ This function returns the number of ASCII characters in the Null-terminated
+ ASCII string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+
+ for (Length = 0; *String != '\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (FixedPcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (Length < FixedPcdGet32 (PcdMaximumAsciiStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated ASCII string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated ASCII string
+ specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrSize (
+ IN CONST CHAR8 *String
+ )
+{
+ return (AsciiStrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated ASCII strings, and returns the difference
+ between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched ASCII character in SecondString subtracted from the first
+ mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+STATIC
+CHAR8
+EFIAPI
+AsciiToUpper (
+ IN CHAR8 Chr
+ )
+{
+ return (Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr;
+}
+
+/**
+ Performs a case insensitive comparison of two Null-terminated ASCII strings,
+ and returns the difference between the first mismatched ASCII characters.
+
+ This function performs a case insensitive comparison of the Null-terminated
+ ASCII string FirstString to the Null-terminated ASCII string SecondString. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched lower case ASCII character in
+ SecondString subtracted from the first mismatched lower case ASCII character
+ in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString using case insensitive
+ comparisons.
+ @retval !=0 FirstString is not identical to SecondString using case
+ insensitive comparisons.
+
+**/
+INTN
+EFIAPI
+AsciiStriCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') &&
+ (AsciiToUpper (*FirstString) == AsciiToUpper (*SecondString))) {
+ FirstString++;
+ SecondString++;
+ }
+
+ return AsciiToUpper (*FirstString) - AsciiToUpper (*SecondString);
+}
+
+/**
+ Compares two Null-terminated ASCII strings with maximum lengths, and returns
+ the difference between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. At most, Length ASCII characters
+ will be compared. If Length is 0, then 0 is returned. If FirstString is
+ identical to SecondString, then 0 is returned. Otherwise, the value returned
+ is the first mismatched ASCII character in SecondString subtracted from the
+ first mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrnCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') &&
+ (*FirstString != *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string to another Null-terminated
+ ASCII string, and returns the concatenated ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents of
+ Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination. The Null-terminated concatenated ASCII
+ String is returned.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ AsciiStrCpy (Destination + AsciiStrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string with a maximum length to the
+ end of another Null-terminated ASCII string, and returns the concatenated
+ ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents
+ of Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination, and Destination is returned. At most,
+ Length ASCII characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Destination contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ AsciiStrnCpy (Destination + AsciiStrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes16.c b/MdePkg/Library/BaseLib/SwapBytes16.c new file mode 100644 index 0000000000..c8460a28f7 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes16.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Operand
+ )
+{
+ return (Operand << 8) | (Operand >> 8);
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes32.c b/MdePkg/Library/BaseLib/SwapBytes32.c new file mode 100644 index 0000000000..4e683b09d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes32.c @@ -0,0 +1,39 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Operand
+ )
+{
+ return (UINT32)(
+ ((UINT32)SwapBytes16 ((UINT16)Operand) << 16) |
+ ((UINT32)SwapBytes16 ((UINT16)(Operand >> 16)))
+ );
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes64.c b/MdePkg/Library/BaseLib/SwapBytes64.c new file mode 100644 index 0000000000..1b0882fc9a --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes64.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return InternalMathSwapBytes64 (Operand);
+}
diff --git a/MdePkg/Library/BaseLib/SwitchStack.c b/MdePkg/Library/BaseLib/SwitchStack.c new file mode 100644 index 0000000000..73b8edb1af --- /dev/null +++ b/MdePkg/Library/BaseLib/SwitchStack.c @@ -0,0 +1,52 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ //
+ // This version of this function does not actually change the stack pointer
+ // This is to support compilation of CPU types that do not support assemblers
+ // such as EBC
+ //
+ EntryPoint (Context1, Context2);
+}
diff --git a/MdePkg/Library/BaseLib/Synchronization.c b/MdePkg/Library/BaseLib/Synchronization.c new file mode 100644 index 0000000000..df395869a2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Synchronization.c @@ -0,0 +1,353 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+#define SPIN_LOCK_RELEASED ((SPIN_LOCK)0)
+#define SPIN_LOCK_ACQUIRED ((SPIN_LOCK)-1)
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ );
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ );
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ );
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = 0;
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (FixedPcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ FixedPcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ return (BOOLEAN)(
+ InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ ) == (VOID*)SPIN_LOCK_RELEASED
+ );
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = 0;
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ switch (sizeof (*Value)) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Unaligned.c b/MdePkg/Library/BaseLib/Unaligned.c new file mode 100644 index 0000000000..9d0521e595 --- /dev/null +++ b/MdePkg/Library/BaseLib/Unaligned.c @@ -0,0 +1,203 @@ +/** @file
+ Unaligned access functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return *Buffer & 0xffffff;
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ return *Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ return *Buffer;
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ return *Buffer = Value;
+}
diff --git a/MdePkg/Library/BaseLib/build.xml b/MdePkg/Library/BaseLib/build.xml new file mode 100644 index 0000000000..7533da8ddc --- /dev/null +++ b/MdePkg/Library/BaseLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseLib">
+ <GenBuild baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ </target>
+ <target depends="BaseLib_clean" name="clean"/>
+ <target depends="BaseLib_cleanall" name="cleanall"/>
+ <target name="BaseLib_clean">
+ <OutputDirSetup baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseLib_cleanall">
+ <OutputDirSetup baseName="BaseLib" mbdFilename="${MODULE_DIR}\BaseLib.mbd" msaFilename="${MODULE_DIR}\BaseLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm new file mode 100644 index 0000000000..6b9cfa18a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ARShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathARShiftU64 PROC
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+InternalMathARShiftU64 ENDP
+
+ END
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/ARShiftU64.s b/MdePkg/Library/BaseLib/ia32/ARShiftU64.s new file mode 100644 index 0000000000..d6af974d0f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ARShiftU64.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ARShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit arithmetic right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _ARShiftU64
+_ARShiftU64:
+ movb 12(%esp),%cl
+ movl 8(%esp),%eax
+ cltd
+ testb $32,%cl
+# MISMATCH: " cmovz edx, eax"
+ cmovz %eax, %edx
+# MISMATCH: " cmovz eax, [esp + 4]"
+ cmovz 4(%esp), %eax
+ shrdl %cl,%edx,%eax
+ sar %cl,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm new file mode 100644 index 0000000000..a4d397874d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuBreakpoint PROC
+ int 3
+ ret
+_CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s new file mode 100644 index 0000000000..e5d18c35b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuBreakpoint.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuBreakpoint.s
+#
+# Abstract:
+#
+# CpuBreakpoint function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuBreakpoint (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuBreakpoint
+_CpuBreakpoint:
+ int 3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm new file mode 100644 index 0000000000..de87ad75e9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuFlushTlb PROC
+ mov eax, cr3
+ mov cr3, eax
+ ret
+_CpuFlushTlb ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s new file mode 100644 index 0000000000..1d85fa77da --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuFlushTlb.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuFlushTlb.Asm
+#
+# Abstract:
+#
+# CpuFlushTlb function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuFlushTlb (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuFlushTlb
+_CpuFlushTlb:
+ movl %cr3, %eax
+ movl %eax, %cr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuId.asm b/MdePkg/Library/BaseLib/ia32/CpuId.asm new file mode 100644 index 0000000000..2c94e3a1ae --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuId.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuId.s b/MdePkg/Library/BaseLib/ia32/CpuId.s new file mode 100644 index 0000000000..989daba127 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuId.s @@ -0,0 +1,63 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.Asm
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmCpuid (
+# IN UINT32 RegisterInEax,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+.globl _AsmCpuid
+_AsmCpuid:
+ push %ebx
+ push %edi
+ movl 12(%esp),%eax
+ cpuid
+ movl %ecx,%edi
+ movl 16(%esp),%ecx
+ jecxz L1
+ movl %eax,(%ecx)
+L1:
+ movl 20(%esp),%ecx
+ jecxz L2
+ movl %ebx,(%ecx)
+L2:
+ movl 24(%esp),%ecx
+ jecxz L3
+ movl %edi,(%ecx)
+L3:
+ movl 28(%esp),%ecx
+ jecxz L4
+ movl %edx,(%ecx)
+L4:
+ pop %edi
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/ia32/CpuPause.asm b/MdePkg/Library/BaseLib/ia32/CpuPause.asm new file mode 100644 index 0000000000..79a4f2f67b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuPause.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuPause PROC
+ pause
+ ret
+_CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuPause.s b/MdePkg/Library/BaseLib/ia32/CpuPause.s new file mode 100644 index 0000000000..ace2c6764a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuPause.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuPause.Asm
+#
+# Abstract:
+#
+# CpuPause function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuPause (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuPause
+_CpuPause:
+ pause
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/CpuSleep.asm b/MdePkg/Library/BaseLib/ia32/CpuSleep.asm new file mode 100644 index 0000000000..66fb90e903 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuSleep.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuSleep PROC
+ hlt
+ ret
+_CpuSleep ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/CpuSleep.s b/MdePkg/Library/BaseLib/ia32/CpuSleep.s new file mode 100644 index 0000000000..9b7713128f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/CpuSleep.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuSleep.Asm
+#
+# Abstract:
+#
+# CpuSleep function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuSleep (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuSleep
+_CpuSleep:
+ hlt
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm new file mode 100644 index 0000000000..74bdd0bd98 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_DisableInterrupts PROC
+ cli
+ ret
+_DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s new file mode 100644 index 0000000000..cc9c95c30f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisableInterrupts.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableInterrupts.Asm
+#
+# Abstract:
+#
+# DisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# DisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _DisableInterrupts
+_DisableInterrupts:
+ cli
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm b/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm new file mode 100644 index 0000000000..04ae8cf514 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86DisablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DisablePaging32.s b/MdePkg/Library/BaseLib/ia32/DisablePaging32.s new file mode 100644 index 0000000000..21e8a82c0e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DisablePaging32.s @@ -0,0 +1,58 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisablePaging32.Asm
+#
+# Abstract:
+#
+# AsmDisablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmDisablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmDisablePaging32
+_AsmDisablePaging32:
+ movl 4(%esp),%ebx
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ pushfl
+ popl %edi
+ cli
+ movl %cr0, %eax
+ btrl $31,%eax
+ movl 16(%esp),%esp
+ movl %eax, %cr0
+ pushl %edi
+ popfl
+ pushl %edx
+ pushl %ecx
+ call *%ebx
+ jmp .
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c new file mode 100644 index 0000000000..219f48f321 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivS64x64Remainder.c @@ -0,0 +1,38 @@ +/** @file
+ Integer division worker functions for Ia32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DivS64x64Remainder.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+INT64
+EFIAPI
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder
+ )
+{
+ INT64 Quot;
+
+ Quot = InternalMathDivRemU64x64 (
+ Dividend >= 0 ? Dividend : -Dividend,
+ Divisor >= 0 ? Divisor : -Divisor,
+ (UINT64 *) Remainder
+ );
+ if (Remainder != NULL && Dividend < 0) {
+ *Remainder = -*Remainder;
+ }
+ return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;
+}
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32.asm b/MdePkg/Library/BaseLib/ia32/DivU64x32.asm new file mode 100644 index 0000000000..1ad5474586 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathDivU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, [esp + 8]
+ div ecx
+ pop edx
+ ret
+InternalMathDivU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32.s b/MdePkg/Library/BaseLib/ia32/DivU64x32.s new file mode 100644 index 0000000000..689c7092c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _DivU64x32
+_DivU64x32:
+ movl 8(%esp),%eax
+ movl 12(%esp),%ecx
+ xorl %edx,%edx
+ divl %ecx
+ pushl %eax
+ movl 8(%esp),%eax
+ divl %ecx
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm new file mode 100644 index 0000000000..f1c6c1f4ac --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathDivRemU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, [esp + 8]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, [esp + 8]
+ div ecx
+ mov ecx, [esp + 20]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ pop edx
+ ret
+InternalMathDivRemU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s new file mode 100644 index 0000000000..1f34f18255 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x32Remainder.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivError.asm
+#
+# Abstract:
+#
+# Set error flag for all division functions
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _InternalMathDivRemU64x32
+_InternalMathDivRemU64x32:
+ movl 12(%esp),%ecx
+ movl 8(%esp),%eax
+ xorl %edx,%edx
+ divl %ecx
+ pushl %eax
+ movl 8(%esp),%eax
+ divl %ecx
+ movl 20(%esp),%ecx
+ jecxz L1
+ movl %edx,(%ecx)
+L1:
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm new file mode 100644 index 0000000000..261211b946 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.asm @@ -0,0 +1,83 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+EXTERN InternalMathDivRemU64x32:PROC
+
+InternalMathDivRemU64x64 PROC
+ mov ecx, [esp + 16]
+ test ecx, ecx
+ jnz _@DivRemU64x64
+ mov ecx, [esp + 20]
+ jecxz @F
+ and dword ptr [ecx + 4], 0
+ mov [esp + 16], ecx
+@@:
+ jmp InternalMathDivRemU64x32
+InternalMathDivRemU64x64 ENDP
+
+_@DivRemU64x64 PROC USES ebx esi edi
+ mov edx, dword ptr [esp + 20]
+ mov eax, dword ptr [esp + 16]
+ mov edi, edx
+ mov esi, eax
+ mov ebx, dword ptr [esp + 24]
+@@:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz @B
+ div ebx
+ mov ebx, eax
+ mov ecx, [esp + 28]
+ mul dword ptr [esp + 24]
+ imul ecx, ebx
+ add edx, ecx
+ mov ecx, dword ptr [esp + 32]
+ jc @TooLarge
+ cmp edi, edx
+ ja @Correct
+ jb @TooLarge
+ cmp esi, eax
+ jae @Correct
+@TooLarge:
+ dec ebx
+ jecxz @Return
+ sub eax, dword ptr [esp + 24]
+ sbb edx, dword ptr [esp + 28]
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx
+ xor edx, edx
+ ret
+_@DivRemU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s new file mode 100644 index 0000000000..f604f7c72e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/DivU64x64Remainder.s @@ -0,0 +1,89 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x64Remainder.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+# both the quotient and the remainder
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.extern _InternalMathDivRemU64x32
+
+.global _InternalMathDivRemU64x64
+_InternalMathDivRemU64x64:
+ movl 16(%esp),%ecx
+ testl %ecx,%ecx
+ jnz _DivRemU64x64
+ movl 20(%esp),%ecx
+ jecxz L1
+ and $0,4(%ecx)
+ movl %ecx,16(%esp)
+L1:
+ jmp _InternalMathDivRemU64x32
+
+
+.global DivRemU64x64
+DivRemU64x64:
+# MISMATCH: "DivRemU64x64: USES ebx esi edi"
+ push %ebx
+ push %esi
+ push %edi
+ mov 20(%esp), %edx
+ mov 16(%esp), %eax
+ movl %edx,%edi
+ movl %eax,%esi
+ mov 24(%esp), %ebx
+L2:
+ shrl %edx
+ rcrl $1,%eax
+ shrdl $1,%ecx,%ebx
+ shrl %ecx
+ jnz L2
+ divl %ebx
+ movl %eax,%ebx
+ movl 28(%esp),%ecx
+ mull 24(%esp)
+ imull %ebx,%ecx
+ addl %ecx,%edx
+ mov 32(%esp), %ecx
+ jc TooLarge
+ cmpl %edx,%edi
+ ja Correct
+ jb TooLarge
+ cmpl %eax,%esi
+ jae Correct
+TooLarge:
+ decl %ebx
+ jecxz Return
+ sub 24(%esp), %eax
+ sbb 28(%esp), %edx
+Correct:
+ jecxz Return
+ subl %eax,%esi
+ sbbl %edx,%edi
+ movl %esi,(%ecx)
+ movl %edi,4(%ecx)
+Return:
+ movl %ebx,%eax
+ xorl %edx,%edx
+ push %edi
+ push %esi
+ push %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..fe2016da87 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+_EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s new file mode 100644 index 0000000000..80362a95b2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableDisableInterrupts.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableDisableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableDisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableDisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _EnableDisableInterrupts
+_EnableDisableInterrupts:
+ sti
+ cli
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm new file mode 100644 index 0000000000..194dd8f935 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableInterrupts PROC
+ sti
+ ret
+_EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s new file mode 100644 index 0000000000..74413d83b6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnableInterrupts.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _EnableInterrupts
+_EnableInterrupts:
+ sti
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm b/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm new file mode 100644 index 0000000000..cf6f2fe458 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86EnablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging32.s b/MdePkg/Library/BaseLib/ia32/EnablePaging32.s new file mode 100644 index 0000000000..6f9befcb4a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging32.s @@ -0,0 +1,58 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging32.Asm
+#
+# Abstract:
+#
+# AsmEnablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmEnablePaging32
+_AsmEnablePaging32:
+ movl 4(%esp),%ebx
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ pushfl
+ popl %edi
+ cli
+ movl %cr0, %eax
+ btsl $31,%eax
+ movl 16(%esp),%esp
+ movl %eax, %cr0
+ pushl %edi
+ popfl
+ pushl %edx
+ pushl %ecx
+ call *%ebx
+ jmp .
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm b/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm new file mode 100644 index 0000000000..6c9b0ea76b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging64.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+ .code
+
+InternalX86EnablePaging64 PROC
+ cli
+ mov [esp], @F ; offset for far retf
+ mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31
+ mov cr0, eax ; enable paging
+ retf
+@@: ; long mode starts here
+ DB 67h, 48h
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 67h, 48h
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 67h, 48h
+ mov edx, [esp + 10h] ; mov rdx, [esp + 10h]
+ DB 67h, 48h
+ mov esp, [esp + 18h] ; mov rsp, [esp + 18h]
+ DB 48h
+ add esp, -20h ; add rsp, -20h
+ call ebx ; call rbx
+ jmp $
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/EnablePaging64.s b/MdePkg/Library/BaseLib/ia32/EnablePaging64.s new file mode 100644 index 0000000000..b365ea762a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/EnablePaging64.s @@ -0,0 +1,66 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging64.Asm
+#
+# Abstract:
+#
+# AsmEnablePaging64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+ #.MODEL flat
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmEnablePaging64 (
+# IN UINT16 CodeSelector,
+# IN UINT64 EntryPoint,
+# IN UINT64 Context1, OPTIONAL
+# IN UINT64 Context2, OPTIONAL
+# IN UINT64 NewStack
+# );
+#------------------------------------------------------------------------------
+.global _AsmEnablePaging64
+_AsmEnablePaging64:
+ cli
+ movl $$LongStart, (%esp)
+ movl %cr4, %eax
+ orb $0x20, %al
+ movl %eax, %cr4 # enable PAE
+ movl $0xc0000080, %ecx
+ rdmsr
+ orb $1, %ah # set LME
+ wrmsr
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl %eax, %cr0 # enable paging
+ lret
+LongStart: # long mode starts here
+ .byte 0x67,0x48
+ movl (%esp), %ebx # mov rbx, [esp]
+ .byte 0x67,0x48
+ movl 8(%esp), %ecx # mov rcx, [esp + 8]
+ .byte 0x67,0x48
+ movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
+ .byte 0x67,0x48
+ movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
+ .byte 0x48
+ addl $0x-20, %esp # add rsp, -20h
+ call *%ebx # call rbx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm new file mode 100644 index 0000000000..d79f217610 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+_AsmFlushCacheLine PROC
+ mov eax, [esp + 4]
+ clflush [eax]
+ ret
+_AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s new file mode 100644 index 0000000000..c14bd11d68 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FlushCacheLine.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FlushCacheLine.Asm
+#
+# Abstract:
+#
+# AsmFlushCacheLine function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFlushCacheLine (
+# IN VOID *LinearAddress
+# );
+#------------------------------------------------------------------------------
+.global _AsmFlushCacheLine
+_AsmFlushCacheLine:
+ movl 4(%esp),%eax
+ clflush (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/FxRestore.asm b/MdePkg/Library/BaseLib/ia32/FxRestore.asm new file mode 100644 index 0000000000..e9e37d1384 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxRestore.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ mov eax, [esp + 4]
+ fxrstor [eax]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FxRestore.s b/MdePkg/Library/BaseLib/ia32/FxRestore.s new file mode 100644 index 0000000000..631a3ef68a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxRestore.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxRestore.Asm
+#
+# Abstract:
+#
+# AsmFxRestore function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFxRestore (
+# IN CONST IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+.global _AsmFxRestore
+_AsmFxRestore:
+ movl 4(%esp),%eax
+ fxrstor (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/FxSave.asm b/MdePkg/Library/BaseLib/ia32/FxSave.asm new file mode 100644 index 0000000000..22496c5e57 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxSave.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ mov eax, [esp + 4]
+ fxsave [eax]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/FxSave.s b/MdePkg/Library/BaseLib/ia32/FxSave.s new file mode 100644 index 0000000000..44a55126a9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/FxSave.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxSave.Asm
+#
+# Abstract:
+#
+# AsmFxSave function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFxSave (
+# OUT IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+.global _AsmFxSave
+_AsmFxSave:
+ movl 4(%esp),%eax
+ fxsave (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..c8c20fbc92 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov ecx, [esp + 4]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ lock cmpxchg [ecx], edx
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s new file mode 100644 index 0000000000..43bb92526e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange32.s @@ -0,0 +1,64 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange32.Asm
+#
+# Abstract:
+#
+# InterlockedCompareExchange32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InterlockedCompareExchangePointer (
+# IN VOID **Value,
+# IN VOID *CompareValue,
+# IN VOID *ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchangePointer
+_InterlockedCompareExchangePointer:
+ #
+ # InterlockedCompareExchangePointer() shares the same code as
+ # InterlockedCompareExchange32() on IA32 and thus no code inside this
+ # function
+ #
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedCompareExchange32 (
+# IN UINT32 *Value,
+# IN UINT32 CompareValue,
+# IN UINT32 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchange32
+_InterlockedCompareExchange32:
+ movl 4(%esp),%ecx
+ movl 8(%esp),%eax
+ movl 12(%esp),%edx
+ lock cmpxchgl %edx,(%ecx)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..cded9206b8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InterlockedCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC USES esi ebx
+ mov esi, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov ebx, [esp + 24]
+ mov ecx, [esp + 28]
+ lock cmpxchg8b qword ptr [esi]
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s new file mode 100644 index 0000000000..abc51e905b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedCompareExchange64.s @@ -0,0 +1,52 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange64.Asm
+#
+# Abstract:
+#
+# InterlockedCompareExchange64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InterlockedCompareExchange64 (
+# IN UINT64 *Value,
+# IN UINT64 CompareValue,
+# IN UINT64 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedCompareExchange64
+ push %esi
+ push %ebx
+ movl 12(%esp),%esi
+ movl 16(%esp),%eax
+ movl 20(%esp),%edx
+ movl 24(%esp),%ebx
+ movl 28(%esp),%ecx
+ lock
+ cmpxchg8b (%esi)
+ pop %ebx
+ pop %esi
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm new file mode 100644 index 0000000000..d8495405c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ mov eax, [esp + 4]
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s new file mode 100644 index 0000000000..a7b653ac20 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedDecrement.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedDecrement.Asm
+#
+# Abstract:
+#
+# InterlockedDecrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedDecrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedDecrement
+_InterlockedDecrement:
+ movl 4(%esp),%eax
+ lock
+ decl (%eax)
+ movl (%eax),%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm new file mode 100644 index 0000000000..a7bfb6fccd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ mov eax, [esp + 4]
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s new file mode 100644 index 0000000000..3f9beec211 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/InterlockedIncrement.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedIncrement.Asm
+#
+# Abstract:
+#
+# InterlockedIncrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedIncrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+.global _InterlockedIncrement
+_InterlockedIncrement:
+ movl 4(%esp),%eax
+ lock
+ incl (%eax)
+ movl (%eax),%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Invd.asm b/MdePkg/Library/BaseLib/ia32/Invd.asm new file mode 100644 index 0000000000..5767f54848 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Invd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmInvd PROC
+ invd
+ ret
+_AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Invd.s b/MdePkg/Library/BaseLib/ia32/Invd.s new file mode 100644 index 0000000000..6d6c8d46cd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Invd.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Invd.Asm
+#
+# Abstract:
+#
+# AsmInvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmInvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmInvd
+_AsmInvd:
+ invd
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LRotU64.asm b/MdePkg/Library/BaseLib/ia32/LRotU64.asm new file mode 100644 index 0000000000..1d5562a799 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LRotU64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.asm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathLRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathLRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LRotU64.s b/MdePkg/Library/BaseLib/ia32/LRotU64.s new file mode 100644 index 0000000000..9c961ce378 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LRotU64.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LRotU64.asm
+#
+# Abstract:
+#
+# 64-bit left rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LRotU64
+ push %ebx
+ movb 16(%esp),%cl
+ movl 12(%esp),%edx
+ movl 8(%esp),%eax
+ shldl %cl,%edx,%ebx
+ shldl %cl,%eax,%edx
+ rorl %cl,%ebx
+ shldl %cl,%ebx,%eax
+ testb $32,%cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/ia32/LShiftU64.asm new file mode 100644 index 0000000000..9ce946ddd1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathLShiftU64 PROC
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32
+ cmovz eax, edx
+ cmovz edx, [esp + 8]
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+InternalMathLShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LShiftU64.s b/MdePkg/Library/BaseLib/ia32/LShiftU64.s new file mode 100644 index 0000000000..94cbc12265 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LShiftU64.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit left shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LShiftU64
+_LShiftU64:
+ movb 12(%esp),%cl
+ xorl %eax,%eax
+ movl 4(%esp),%edx
+ testb $32,%cl
+ cmovz %edx, %eax
+ cmovz 8(%esp), %edx
+ shldl %cl,%eax,%edx
+ shll %cl,%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/LongJump.asm b/MdePkg/Library/BaseLib/ia32/LongJump.asm new file mode 100644 index 0000000000..ff0cef2273 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LongJump.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+_LongJump PROC
+ pop eax
+ pop edx
+ pop eax
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20]
+_LongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/LongJump.s b/MdePkg/Library/BaseLib/ia32/LongJump.s new file mode 100644 index 0000000000..3da09142fc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/LongJump.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LongJump.Asm
+#
+# Abstract:
+#
+# Implementation of LongJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _LongJump
+_LongJump:
+ popl %eax
+ popl %edx
+ popl %eax
+ movl (%edx),%ebx
+ movl 4(%edx),%esi
+ movl 8(%edx),%edi
+ movl 12(%edx),%ebp
+ movl 16(%edx),%esp
+ jmpl *20(%edx)
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ModU64x32.asm b/MdePkg/Library/BaseLib/ia32/ModU64x32.asm new file mode 100644 index 0000000000..62481ce98a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ModU64x32.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathModU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+InternalMathModU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ModU64x32.s b/MdePkg/Library/BaseLib/ia32/ModU64x32.s new file mode 100644 index 0000000000..ed9c2fee25 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ModU64x32.s @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.asm
+#
+# Abstract:
+#
+# Calculate the remainder of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _ModU64x32
+_ModU64x32:
+ movl 8(%esp),%eax
+ movl 12(%esp),%ecx
+ xorl %edx,%edx
+ divl %ecx
+ movl 4(%esp),%eax
+ divl %ecx
+ movl %edx,%eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Monitor.asm b/MdePkg/Library/BaseLib/ia32/Monitor.asm new file mode 100644 index 0000000000..5d92d26673 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Monitor.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+_AsmMonitor PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0fh, 1, 0c8h
+ ret
+_AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Monitor.s b/MdePkg/Library/BaseLib/ia32/Monitor.s new file mode 100644 index 0000000000..8da0e341ed --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Monitor.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Monitor.Asm
+#
+# Abstract:
+#
+# AsmMonitor function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMonitor (
+# IN UINTN Eax,
+# IN UINTN Ecx,
+# IN UINTN Edx
+# );
+#------------------------------------------------------------------------------
+.global _AsmMonitor
+_AsmMonitor:
+ movl 4(%esp),%eax
+ movl 8(%esp),%ecx
+ movl 12(%esp),%edx
+ monitor %eax,%ecx,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x32.asm b/MdePkg/Library/BaseLib/ia32/MultU64x32.asm new file mode 100644 index 0000000000..e2806e3082 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x32.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathMultU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8]
+ mul dword ptr [esp + 4]
+ add edx, ecx
+ ret
+InternalMathMultU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x32.s b/MdePkg/Library/BaseLib/ia32/MultU64x32.s new file mode 100644 index 0000000000..03c520bcf7 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x32.s @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x32.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _MultU64x32
+_MultU64x32:
+ movl 12(%esp),%ecx
+ movl %ecx,%eax
+ imull 8(%esp),%ecx
+ mull 4(%esp)
+ addl %ecx,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x64.asm b/MdePkg/Library/BaseLib/ia32/MultU64x64.asm new file mode 100644 index 0000000000..24c6a7daa3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x64.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMathMultU64x64 PROC USES ebx
+ mov ebx, [esp + 8]
+ mov edx, [esp + 16]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20]
+ imul edx, [esp + 12]
+ add ebx, edx
+ mul ecx
+ add edx, ebx
+ ret
+InternalMathMultU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/MultU64x64.s b/MdePkg/Library/BaseLib/ia32/MultU64x64.s new file mode 100644 index 0000000000..8841fc44dc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/MultU64x64.s @@ -0,0 +1,49 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x64.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and another 64-bit integer
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _MultS64x64
+_MultS64x64:
+ #
+ # MultS64x32 shares the same implementation with _MultU64x32, and thus no
+ # code inside this function.
+ #
+
+
+.global _MultU64x64
+ push %ebx
+ movl 8(%esp),%ebx
+ movl 16(%esp),%edx
+ movl %ebx,%ecx
+ movl %edx,%eax
+ imull 20(%esp),%ebx
+ imull 12(%esp),%edx
+ addl %edx,%ebx
+ mull %ecx
+ addl %ebx,%edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Mwait.asm b/MdePkg/Library/BaseLib/ia32/Mwait.asm new file mode 100644 index 0000000000..91d505b4e2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Mwait.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+_AsmMwait PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0fh, 1, 0c9h
+ ret
+_AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Mwait.s b/MdePkg/Library/BaseLib/ia32/Mwait.s new file mode 100644 index 0000000000..7e04453352 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Mwait.s @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Mwait.Asm
+#
+# Abstract:
+#
+# AsmMwait function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMwait (
+# IN UINTN Eax,
+# IN UINTN Ecx
+# );
+#------------------------------------------------------------------------------
+.global _AsmMwait
+_AsmMwait:
+ movl 4(%esp),%eax
+ movl 8(%esp),%ecx
+ mwait %eax,%ecx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Non-existing.c b/MdePkg/Library/BaseLib/ia32/Non-existing.c new file mode 100644 index 0000000000..4132d30c31 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Non-existing.c @@ -0,0 +1,30 @@ +/** @file
+ Non-existing BaseLib functions on Ia32
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/ia32/RRotU64.asm b/MdePkg/Library/BaseLib/ia32/RRotU64.asm new file mode 100644 index 0000000000..062e201e8d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RRotU64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.asm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathRRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathRRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/RRotU64.s b/MdePkg/Library/BaseLib/ia32/RRotU64.s new file mode 100644 index 0000000000..541e420a3c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RRotU64.s @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RRotU64.asm
+#
+# Abstract:
+#
+# 64-bit right rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _RRotU64
+ push %ebx
+ movb 16(%esp),%cl
+ movl 8(%esp),%eax
+ movl 12(%esp),%edx
+ shrdl %cl,%eax,%ebx
+ shrdl %cl,%edx,%eax
+ roll %cl,%ebx
+ shrdl %cl,%ebx,%edx
+ testb $32,%cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/ia32/RShiftU64.asm new file mode 100644 index 0000000000..effbc55e1c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RShiftU64.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMathRShiftU64 PROC
+ mov cl, [esp + 12]
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+InternalMathRShiftU64 ENDP
+
+ END
\ No newline at end of file diff --git a/MdePkg/Library/BaseLib/ia32/RShiftU64.s b/MdePkg/Library/BaseLib/ia32/RShiftU64.s new file mode 100644 index 0000000000..5b681e391b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/RShiftU64.s @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit logical right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _RShiftU64
+_RShiftU64:
+ movb 12(%esp),%cl
+ xorl %edx,%edx
+ movl 8(%esp),%eax
+ testb $32,%cl
+ cmovz %eax, %edx
+ cmovz 4(%esp), %eax
+ shrdl %cl,%edx,%eax
+ shrl %cl,%edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr0.asm b/MdePkg/Library/BaseLib/ia32/ReadCr0.asm new file mode 100644 index 0000000000..579cee2377 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr0 PROC
+ mov eax, cr0
+ ret
+_AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr0.s b/MdePkg/Library/BaseLib/ia32/ReadCr0.s new file mode 100644 index 0000000000..3108b71eeb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr0.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr0.Asm
+#
+# Abstract:
+#
+# AsmReadCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr0
+_AsmReadCr0:
+ movl %cr0, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr2.asm b/MdePkg/Library/BaseLib/ia32/ReadCr2.asm new file mode 100644 index 0000000000..3e4a926abd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr2 PROC
+ mov eax, cr2
+ ret
+_AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr2.s b/MdePkg/Library/BaseLib/ia32/ReadCr2.s new file mode 100644 index 0000000000..3ce287a252 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr2.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr2.Asm
+#
+# Abstract:
+#
+# AsmReadCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr2
+_AsmReadCr2:
+ movl %cr2, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr3.asm b/MdePkg/Library/BaseLib/ia32/ReadCr3.asm new file mode 100644 index 0000000000..c24ded8051 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr3 PROC
+ mov eax, cr3
+ ret
+_AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr3.s b/MdePkg/Library/BaseLib/ia32/ReadCr3.s new file mode 100644 index 0000000000..2bd63c725a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr3.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr3.Asm
+#
+# Abstract:
+#
+# AsmReadCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr3
+_AsmReadCr3:
+ movl %cr3, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr4.asm b/MdePkg/Library/BaseLib/ia32/ReadCr4.asm new file mode 100644 index 0000000000..258f37a97f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCr4 PROC
+ mov eax, cr4
+ ret
+_AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCr4.s b/MdePkg/Library/BaseLib/ia32/ReadCr4.s new file mode 100644 index 0000000000..4d746d807b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCr4.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr4.Asm
+#
+# Abstract:
+#
+# AsmReadCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCr4
+_AsmReadCr4:
+ movl %cr4, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCs.asm b/MdePkg/Library/BaseLib/ia32/ReadCs.asm new file mode 100644 index 0000000000..5972d66754 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadCs PROC
+ mov ax, cs
+ ret
+_AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadCs.s b/MdePkg/Library/BaseLib/ia32/ReadCs.s new file mode 100644 index 0000000000..66bf4b9eeb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadCs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCs.Asm
+#
+# Abstract:
+#
+# AsmReadCs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadCs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadCs
+_AsmReadCs:
+ movw %cs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr0.asm b/MdePkg/Library/BaseLib/ia32/ReadDr0.asm new file mode 100644 index 0000000000..4da1dd8d0d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr0 PROC
+ mov eax, dr0
+ ret
+_AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr0.s b/MdePkg/Library/BaseLib/ia32/ReadDr0.s new file mode 100644 index 0000000000..00c521b51d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr0.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr0.Asm
+#
+# Abstract:
+#
+# AsmReadDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr0
+_AsmReadDr0:
+ movl %dr0, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr1.asm b/MdePkg/Library/BaseLib/ia32/ReadDr1.asm new file mode 100644 index 0000000000..8724dd228b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr1.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr1 PROC
+ mov eax, dr1
+ ret
+_AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr1.s b/MdePkg/Library/BaseLib/ia32/ReadDr1.s new file mode 100644 index 0000000000..81d0e54919 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr1.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr1.Asm
+#
+# Abstract:
+#
+# AsmReadDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr1
+_AsmReadDr1:
+ movl %dr1, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr2.asm b/MdePkg/Library/BaseLib/ia32/ReadDr2.asm new file mode 100644 index 0000000000..9122d42545 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr2 PROC
+ mov eax, dr2
+ ret
+_AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr2.s b/MdePkg/Library/BaseLib/ia32/ReadDr2.s new file mode 100644 index 0000000000..296fff699e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr2.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr2.Asm
+#
+# Abstract:
+#
+# AsmReadDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr2
+_AsmReadDr2:
+ movl %dr2, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr3.asm b/MdePkg/Library/BaseLib/ia32/ReadDr3.asm new file mode 100644 index 0000000000..7c1ee9826d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr3 PROC
+ mov eax, dr3
+ ret
+_AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr3.s b/MdePkg/Library/BaseLib/ia32/ReadDr3.s new file mode 100644 index 0000000000..e99391de81 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr3.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr3.Asm
+#
+# Abstract:
+#
+# AsmReadDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr3
+_AsmReadDr3:
+ movl %dr3, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr4.asm b/MdePkg/Library/BaseLib/ia32/ReadDr4.asm new file mode 100644 index 0000000000..01724555d2 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr4 PROC
+ DB 0fh, 21h, 0e0h
+ ret
+_AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr5.asm b/MdePkg/Library/BaseLib/ia32/ReadDr5.asm new file mode 100644 index 0000000000..a95527e44c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr5.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr5 PROC
+ DB 0fh, 21h, 0e8h
+ ret
+_AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr6.asm b/MdePkg/Library/BaseLib/ia32/ReadDr6.asm new file mode 100644 index 0000000000..b2d9a3d252 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr6.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr6 PROC
+ mov eax, dr6
+ ret
+_AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr6.s b/MdePkg/Library/BaseLib/ia32/ReadDr6.s new file mode 100644 index 0000000000..bdadd80672 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr6.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr6.Asm
+#
+# Abstract:
+#
+# AsmReadDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr6
+_AsmReadDr6:
+ movl %dr6, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr7.asm b/MdePkg/Library/BaseLib/ia32/ReadDr7.asm new file mode 100644 index 0000000000..23924b1184 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr7.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDr7 PROC
+ mov eax, dr7
+ ret
+_AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDr7.s b/MdePkg/Library/BaseLib/ia32/ReadDr7.s new file mode 100644 index 0000000000..cf213caac9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDr7.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr7.Asm
+#
+# Abstract:
+#
+# AsmReadDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDr7
+_AsmReadDr7:
+ movl %dr7, %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDs.asm b/MdePkg/Library/BaseLib/ia32/ReadDs.asm new file mode 100644 index 0000000000..6992766e58 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadDs PROC
+ mov ax, ds
+ ret
+_AsmReadDs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadDs.s b/MdePkg/Library/BaseLib/ia32/ReadDs.s new file mode 100644 index 0000000000..ca1e37937a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadDs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDs.Asm
+#
+# Abstract:
+#
+# AsmReadDs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadDs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadDs
+_AsmReadDs:
+ movw %ds,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEflags.asm b/MdePkg/Library/BaseLib/ia32/ReadEflags.asm new file mode 100644 index 0000000000..365b1dee87 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEflags.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadEflags PROC
+ pushfd
+ pop eax
+ ret
+_AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEflags.s b/MdePkg/Library/BaseLib/ia32/ReadEflags.s new file mode 100644 index 0000000000..a70a209ffb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEflags.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEflags.Asm
+#
+# Abstract:
+#
+# AsmReadEflags function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadEflags (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadEflags
+_AsmReadEflags:
+ pushfl
+ popl %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEs.asm b/MdePkg/Library/BaseLib/ia32/ReadEs.asm new file mode 100644 index 0000000000..0ced46aa62 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadEs PROC
+ mov ax, es
+ ret
+_AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadEs.s b/MdePkg/Library/BaseLib/ia32/ReadEs.s new file mode 100644 index 0000000000..69727b5afc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadEs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEs.Asm
+#
+# Abstract:
+#
+# AsmReadEs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadEs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadEs
+_AsmReadEs:
+ movw %es,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadFs.asm b/MdePkg/Library/BaseLib/ia32/ReadFs.asm new file mode 100644 index 0000000000..f1790c6e9e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadFs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadFs PROC
+ mov ax, fs
+ ret
+_AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadFs.s b/MdePkg/Library/BaseLib/ia32/ReadFs.s new file mode 100644 index 0000000000..7f4fdfa77c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadFs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadFs.Asm
+#
+# Abstract:
+#
+# AsmReadFs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadFs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadFs
+_AsmReadFs:
+ movw %fs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm new file mode 100644 index 0000000000..beacb62b0d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ mov eax, [esp + 4]
+ sgdt fword ptr [eax]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGdtr.s b/MdePkg/Library/BaseLib/ia32/ReadGdtr.s new file mode 100644 index 0000000000..f03a05696d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGdtr.Asm
+#
+# Abstract:
+#
+# AsmReadGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmReadGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadGdtr
+_AsmReadGdtr:
+ movl 4(%esp),%eax
+ sgdt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGs.asm b/MdePkg/Library/BaseLib/ia32/ReadGs.asm new file mode 100644 index 0000000000..1de0ebfc88 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadGs PROC
+ mov ax, gs
+ ret
+_AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadGs.s b/MdePkg/Library/BaseLib/ia32/ReadGs.s new file mode 100644 index 0000000000..0d88a60a52 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadGs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGs.Asm
+#
+# Abstract:
+#
+# AsmReadGs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadGs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadGs
+_AsmReadGs:
+ movw %gs,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm new file mode 100644 index 0000000000..95158be903 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadIdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalX86ReadIdtr PROC
+ mov eax, [esp + 4]
+ sidt fword ptr [eax]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadIdtr.s b/MdePkg/Library/BaseLib/ia32/ReadIdtr.s new file mode 100644 index 0000000000..fa72d3ba7d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadIdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadIdtr.Asm
+#
+# Abstract:
+#
+# AsmReadIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmReadIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadIdtr
+_AsmReadIdtr:
+ movl 4(%esp),%eax
+ sidt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm b/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm new file mode 100644 index 0000000000..a859a0e553 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadLdtr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadLdtr PROC
+ sldt ax
+ ret
+_AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadLdtr.s b/MdePkg/Library/BaseLib/ia32/ReadLdtr.s new file mode 100644 index 0000000000..aea1d9265c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadLdtr.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadLdtr.Asm
+#
+# Abstract:
+#
+# AsmReadLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadLdtr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadLdtr
+_AsmReadLdtr:
+ sldt %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm0.asm b/MdePkg/Library/BaseLib/ia32/ReadMm0.asm new file mode 100644 index 0000000000..c45895b2a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm0.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm0 PROC
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+_AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm0.s b/MdePkg/Library/BaseLib/ia32/ReadMm0.s new file mode 100644 index 0000000000..dd6b846836 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm0.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm0.Asm
+#
+# Abstract:
+#
+# AsmReadMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm0
+_AsmReadMm0:
+ pushl %eax
+ pushl %eax
+ movq %mm0,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm1.asm b/MdePkg/Library/BaseLib/ia32/ReadMm1.asm new file mode 100644 index 0000000000..ea748cbd7e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm1.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm1 PROC
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+_AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm1.s b/MdePkg/Library/BaseLib/ia32/ReadMm1.s new file mode 100644 index 0000000000..cbaafff0f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm1.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm1.Asm
+#
+# Abstract:
+#
+# AsmReadMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm1
+_AsmReadMm1:
+ pushl %eax
+ pushl %eax
+ movq %mm1,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm2.asm b/MdePkg/Library/BaseLib/ia32/ReadMm2.asm new file mode 100644 index 0000000000..ab16c513f3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm2.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm2 PROC
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+_AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm2.s b/MdePkg/Library/BaseLib/ia32/ReadMm2.s new file mode 100644 index 0000000000..22a5d71ebc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm2.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm2.Asm
+#
+# Abstract:
+#
+# AsmReadMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm2
+_AsmReadMm2:
+ pushl %eax
+ pushl %eax
+ movq %mm2,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm3.asm b/MdePkg/Library/BaseLib/ia32/ReadMm3.asm new file mode 100644 index 0000000000..3c4bf34492 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm3.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm3 PROC
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+_AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm3.s b/MdePkg/Library/BaseLib/ia32/ReadMm3.s new file mode 100644 index 0000000000..dae267af7a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm3.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm3.Asm
+#
+# Abstract:
+#
+# AsmReadMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm3
+_AsmReadMm3:
+ pushl %eax
+ pushl %eax
+ movq %mm3,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm4.asm b/MdePkg/Library/BaseLib/ia32/ReadMm4.asm new file mode 100644 index 0000000000..4c2beb885b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm4.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm4 PROC
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+_AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm4.s b/MdePkg/Library/BaseLib/ia32/ReadMm4.s new file mode 100644 index 0000000000..0ae1afcedd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm4.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm4.Asm
+#
+# Abstract:
+#
+# AsmReadMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm4
+_AsmReadMm4:
+ pushl %eax
+ pushl %eax
+ movq %mm4,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm5.asm b/MdePkg/Library/BaseLib/ia32/ReadMm5.asm new file mode 100644 index 0000000000..66e38265c6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm5.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm5 PROC
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+_AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm5.s b/MdePkg/Library/BaseLib/ia32/ReadMm5.s new file mode 100644 index 0000000000..2fad14a7e0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm5.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm5.Asm
+#
+# Abstract:
+#
+# AsmReadMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm5
+_AsmReadMm5:
+ pushl %eax
+ pushl %eax
+ movq %mm5,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm6.asm b/MdePkg/Library/BaseLib/ia32/ReadMm6.asm new file mode 100644 index 0000000000..69d9e13f6b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm6.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm6 PROC
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+_AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm6.s b/MdePkg/Library/BaseLib/ia32/ReadMm6.s new file mode 100644 index 0000000000..22cddfa486 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm6.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm6.Asm
+#
+# Abstract:
+#
+# AsmReadMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm6
+_AsmReadMm6:
+ pushl %eax
+ pushl %eax
+ movq %mm6,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm7.asm b/MdePkg/Library/BaseLib/ia32/ReadMm7.asm new file mode 100644 index 0000000000..a8788cbf7a --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm7.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadMm7 PROC
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+_AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMm7.s b/MdePkg/Library/BaseLib/ia32/ReadMm7.s new file mode 100644 index 0000000000..fb485a00c9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMm7.s @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm7.Asm
+#
+# Abstract:
+#
+# AsmReadMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMm7
+_AsmReadMm7:
+ pushl %eax
+ pushl %eax
+ movq %mm7,(%esp)
+ popl %eax
+ popl %edx
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm b/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm new file mode 100644 index 0000000000..6c9fe00033 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMsr64.asm @@ -0,0 +1,55 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmReadMsr32 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+_AsmReadMsr32 PROC
+ ;
+ ; AsmReadMsr32 shares the same implementation with AsmReadMsr64 and thus no
+ ; code inside this function
+ ;
+_AsmReadMsr32 ENDP
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+_AsmReadMsr64 PROC
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+_AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadMsr64.s b/MdePkg/Library/BaseLib/ia32/ReadMsr64.s new file mode 100644 index 0000000000..6a2c9c6688 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadMsr64.s @@ -0,0 +1,57 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMsr64.Asm
+#
+# Abstract:
+#
+# AsmReadMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmReadMsr32 (
+# IN UINT32 Index
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMsr32
+_AsmReadMsr32:
+ #
+ # AsmReadMsr32 shares the same implementation with AsmReadMsr64 and thus no
+ # code inside this function
+ #
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadMsr64 (
+# IN UINT64 Index
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadMsr64
+_AsmReadMsr64:
+ movl 4(%esp),%ecx
+ rdmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadPmc.asm b/MdePkg/Library/BaseLib/ia32/ReadPmc.asm new file mode 100644 index 0000000000..1fe598158d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadPmc.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+_AsmReadPmc PROC
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+_AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadPmc.s b/MdePkg/Library/BaseLib/ia32/ReadPmc.s new file mode 100644 index 0000000000..868e85c23d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadPmc.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadPmc.Asm
+#
+# Abstract:
+#
+# AsmReadPmc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadPmc (
+# IN UINT32 PmcIndex
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadPmc
+_AsmReadPmc:
+ movl 4(%esp),%ecx
+ rdpmc
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadSs.asm b/MdePkg/Library/BaseLib/ia32/ReadSs.asm new file mode 100644 index 0000000000..6d0cd9f2a0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadSs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadSs PROC
+ mov ax, ss
+ ret
+_AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadSs.s b/MdePkg/Library/BaseLib/ia32/ReadSs.s new file mode 100644 index 0000000000..7db65c1490 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadSs.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadSs.Asm
+#
+# Abstract:
+#
+# AsmReadSs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadSs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadSs
+_AsmReadSs:
+ movw %ss,%ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTr.asm b/MdePkg/Library/BaseLib/ia32/ReadTr.asm new file mode 100644 index 0000000000..d77ee89123 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadTr PROC
+ str ax
+ ret
+_AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTr.s b/MdePkg/Library/BaseLib/ia32/ReadTr.s new file mode 100644 index 0000000000..8c31e9d9fa --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTr.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTr.Asm
+#
+# Abstract:
+#
+# AsmReadTr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadTr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadTr
+_AsmReadTr:
+ str %eax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTsc.asm b/MdePkg/Library/BaseLib/ia32/ReadTsc.asm new file mode 100644 index 0000000000..ea3c164ecd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmReadTsc PROC
+ rdtsc
+ ret
+_AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/ReadTsc.s b/MdePkg/Library/BaseLib/ia32/ReadTsc.s new file mode 100644 index 0000000000..e7981c05b0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/ReadTsc.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTsc.Asm
+#
+# Abstract:
+#
+# AsmReadTsc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadTsc (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmReadTsc
+_AsmReadTsc:
+ rdtsc
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/SetJump.asm b/MdePkg/Library/BaseLib/ia32/SetJump.asm new file mode 100644 index 0000000000..41277cd20f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SetJump.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat
+ .code
+
+_SetJump PROC
+ pop ecx
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx
+ xor eax, eax
+ jmp ecx
+_SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/SetJump.s b/MdePkg/Library/BaseLib/ia32/SetJump.s new file mode 100644 index 0000000000..b1b6a84f63 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SetJump.s @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetJump.Asm
+#
+# Abstract:
+#
+# Implementation of SetJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+.global _SetJump
+_SetJump:
+ popl %ecx
+ movl (%esp),%edx
+ movl %ebx,(%edx)
+ movl %esi,4(%edx)
+ movl %edi,8(%edx)
+ movl %ebp,12(%edx)
+ movl %esp,16(%edx)
+ movl %ecx,20(%edx)
+ xorl %eax,%eax
+ jmp *%ecx
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm b/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm new file mode 100644 index 0000000000..72e366bd4d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SwapBytes64.asm @@ -0,0 +1,36 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+InternalMathSwapBytes64 PROC
+ mov eax, [esp + 8]
+ mov edx, [esp + 4]
+ bswap eax
+ bswap edx
+ ret
+InternalMathSwapBytes64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/SwitchStack.c b/MdePkg/Library/BaseLib/ia32/SwitchStack.c new file mode 100644 index 0000000000..77800e35dd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/SwitchStack.c @@ -0,0 +1,57 @@ +/** @file
+ SwitchStack() function for IA-32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1,
+ IN VOID *Context2,
+ IN VOID *NewStack
+ )
+{
+ BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
+
+ ASSERT (EntryPoint != NULL && NewStack != NULL);
+
+ JumpBuffer.Eip = (UINTN)EntryPoint;
+ JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);
+ JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);
+ ((VOID**)JumpBuffer.Esp)[1] = Context1;
+ ((VOID**)JumpBuffer.Esp)[2] = Context2;
+
+ LongJump (&JumpBuffer, (UINTN)-1);
+}
diff --git a/MdePkg/Library/BaseLib/ia32/Thunk16.asm b/MdePkg/Library/BaseLib/ia32/Thunk16.asm new file mode 100644 index 0000000000..2d62d72aef --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Thunk16.asm @@ -0,0 +1,163 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+
+ .data
+
+NullSegSel DQ 0
+_16BitCsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment
+ DB 0
+_16BitDsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment
+ DB 0
+GdtEnd LABEL QWORD
+
+ .const
+
+_16Gdtr LABEL FWORD
+ DW offset GdtEnd - offset NullSegSel - 1
+ DD offset NullSegSel
+
+_16Idtr FWORD (1 SHL 10) - 1
+
+ .code
+
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DD ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
+ mov esi, [esp + 36] ; esi <- RegSet
+ push sizeof (IA32_REGS)
+ pop ecx
+ movzx edx, (IA32_REGS ptr [esi])._SS
+ mov edi, (IA32_REGS ptr [esi])._ESP
+ sub edi, ecx ; reserve space on realmode stack
+ push edi ; save stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ add edi, eax ; edi <- linear address of 16-bit stack
+ rep movsb ; copy RegSet
+ mov esi, edx ; esi <- 16-bit stack segment
+ pop ebx ; ebx <- 16-bit stack offset
+ mov edi, [esp + 40] ; edi <- realmode patch
+ push cs ; save CS segment selector
+ push offset @BackToThunk ; offset to back from real mode
+ mov eax, offset @16Return
+ stosd
+ xor eax, eax
+ stosw ; set CS base to 0
+ mov eax, esp
+ stosd
+ mov eax, ss
+ stosd
+ mov eax, cr0
+ mov ecx, eax ; ecx <- CR0
+ and ecx, 7ffffffeh ; clear PE, PG bits
+ stosd
+ mov eax, cr4
+ mov ebp, eax
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ stosd
+ sidt fword ptr [esp + 44] ; use parameter space to save IDTR
+ sgdt fword ptr [edi]
+ lidt _16Idtr
+ push 10h
+ pop eax
+ push 8
+ push offset @16Start
+ lgdt _16Gdtr
+ retf
+@16Start: ; 16-bit starts here
+ mov ss, eax ; set SS to be a 16-bit segment
+ mov cr0, ecx
+ mov cr4, ebp
+ mov ss, esi ; set up 16-bit stack
+ mov sp, bx ; mov esp, ebx actually
+ popaw ; popad actually
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ add sp, 4 ; skip _EFLAGS
+ DB 66h
+ retf ; transfer control to 16-bit code
+@16Return:
+ pushf ; pushfd actually
+ push gs
+ push fs
+ push es
+ push ds
+ pushaw ; pushad actually
+ DB 67h, 66h
+ lds esi, fword ptr (IA32_REGS ptr [esp])._EIP
+ DB 67h, 66h
+ mov eax, [esi + 12]
+ mov cr4, eax ; restore CR4
+ DB 67h, 66h
+ lgdt fword ptr [esi + 16]
+ DB 67h, 66h
+ mov eax, [esi + 8]
+ mov cr0, eax ; restore CR0
+ xor ax, ax ; xor eax, eax actually
+ mov eax, ss
+ DB 67h
+ mov dword ptr (IA32_REGS ptr [esp])._SS, eax
+ shl ax, 4 ; shl eax, 4 actually
+ add ax, sp ; add eax, esp actually
+ add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)
+ DB 67h, 66h
+ mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp
+ DB 67h, 66h
+ lss esp, fword ptr [esi] ; restore protected mode stack
+ DB 66h
+ retf ; go back to protected mode
+@BackToThunk:
+ lidt fword ptr [esp + 36] ; restore protected mode IDTR
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Thunk16.s b/MdePkg/Library/BaseLib/ia32/Thunk16.s new file mode 100644 index 0000000000..4236996226 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Thunk16.s @@ -0,0 +1,191 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Thunk.asm
+#
+# Abstract:
+#
+# Real mode thunk
+#
+#------------------------------------------------------------------------------
+
+
+
+MISMATCH: "EXTERNDEF C mCode16Size:DWORD"
+
+MISMATCH: "CONST SEGMENT FLAT "DATA" READONLY"
+
+MISMATCH: "mCode16Size DD _TEXT16SIZE"
+
+MISMATCH: "CONSTS"
+
+MISMATCH: "_DATA SEGMENT FLAT "DATA""
+
+MISMATCH: "NullSegSel DQ 0"
+MISMATCH: "_16BitCsSel LABEL QWORD"
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x9b
+ .byte 0x8f # 16-bit segment
+ .byte 0
+
+MISMATCH: "_16Gdtr LABEL FWORD"
+MISMATCH: " DW $ - offset NullSegSel - 1"
+MISMATCH: " DD offset NullSegSel"
+
+MISMATCH: "_DATAS"
+
+MISMATCH: "_TEXT SEGMENT FLAT "CODE" PARA"
+
+MISMATCH: "IA32_REGS STRUC 4t"
+MISMATCH: "_EDI DD ?"
+MISMATCH: "_ESI DD ?"
+MISMATCH: "_EBP DD ?"
+MISMATCH: "_ESP DD ?"
+MISMATCH: "_EBX DD ?"
+MISMATCH: "_EDX DD ?"
+MISMATCH: "_ECX DD ?"
+MISMATCH: "_EAX DD ?"
+MISMATCH: "_DS DW ?"
+MISMATCH: "_ES DW ?"
+MISMATCH: "_FS DW ?"
+MISMATCH: "_GS DW ?"
+MISMATCH: "_EFLAGS DD ?"
+MISMATCH: "_EIP DD ?"
+MISMATCH: "_CS DW ?"
+MISMATCH: "_SS DW ?"
+MISMATCH: "IA32_REGSS"
+
+MISMATCH: "_STK16 STRUC 1t"
+MISMATCH: "RetEip DD ?"
+MISMATCH: "RetCs DW ?"
+MISMATCH: "ThunkFlags DW ?"
+MISMATCH: "SavedEsp DD ?"
+MISMATCH: "SavedSs DW ?"
+MISMATCH: "SavedGdtr FWORD ?"
+MISMATCH: "SavedCr0 DD ?"
+MISMATCH: "SavedCr4 DD ?"
+MISMATCH: "_STK16S"
+
+.global _InternalAsmThunk16
+MISMATCH: "_InternalAsmThunk16: USES ebp ebx esi edi ds es fs gs"
+MISMATCH: " ASSUME esi:PTR IA32_REGS"
+ movl 36(%esp),%esi
+MISMATCH: " movzx edx, [esi]._SS"
+ movl $[esi]._ESP, %edi
+MISMATCH: " add edi, - sizeof (_STK16) - sizeof (IA32_REGS)"
+ pushl %edi # save stack offset
+ imull $16,%edx,%eax # eax <- edx*16
+ addl %eax,%edi # edi <- linear address of 16-bit stack
+MISMATCH: " push sizeof (IA32_REGS) / 4"
+ popl %ecx
+ rep
+ movsl # copy context to 16-bit stack
+ popl %ebx # ebx <- 16-bit stack offset
+MISMATCH: " mov eax, offset @F "
+ stosl
+ movl %cs,%eax # return segment
+ stosw
+ movl 40(%esp),%eax # THUNK flags
+ stosw
+ movl %esp,%eax
+ stosl # save esp
+ movl %ss,%eax # save ss
+ stosw
+MISMATCH: " sgdt fword ptr [edi] "
+MISMATCH: " sidt fword ptr [esp + 36] "
+ movl %cr0, %esi
+ movl %esi,6(%edi) # save CR0
+MISMATCH: " and esi, NOT 80000001h "
+ movl %cr4, %eax
+ movl %eax,10(%edi) # save CR4
+MISMATCH: " and al, NOT 30h "
+ movl %edx,%edi # edi <- 16-bit stack segment
+ movl 44(%esp),%edx
+ shll $16,%edx
+ pushl %edx
+MISMATCH: " lgdt _16Gdtr "
+ .byte 0xea
+MISMATCH: " DD offset @16Bit"
+ .word 8 # jmp far 8:@16Bit
+@16Bit:
+ movl %esi, %cr0 # disable protected mode
+ movl %eax, %cr4 # disable PAE & PSE
+ lret
+@@:
+ movl %ss,%eax
+ shll $4,%eax
+ addl %esp,%eax # eax <- address of 16-bit stack
+MISMATCH: " lss esp, fword ptr (_STK16 ptr [esp + sizeof (IA32_REGS)]).SavedEsp"
+MISMATCH: " lidt fword ptr [esp + 36] "
+ ret
+
+
+MISMATCH: "_TEXTS"
+
+MISMATCH: "_TEXT16 SEGMENT USE16 "CODE" PARA"
+
+.global _Code16Addr
+MISMATCH: "_Code16Addr: C"
+
+
+.global RealMode
+RealMode:
+MISMATCH: " ASSUME bp:PTR _STK16"
+ movw %di,%ss # set up stack
+ movl %ebx,%esp
+MISMATCH: " lidt fword ptr cs:[_16Idtr - _Code16Addr]"
+ popal
+ popl %ds
+ popl %es
+ popl %fs
+ popl %gs
+ addw $4,%sp # skip EFlags
+MISMATCH: " test (_STK16 ptr [esp + 8]).ThunkFlags, 1"
+ jz @F
+ pushf
+@@:
+ pushw %cs
+MISMATCH: " push @FarCallRet - _Code16Addr"
+ jz @F
+MISMATCH: " jmp fword ptr [esp + 6]"
+@@:
+MISMATCH: " jmp fword ptr [esp + 4]"
+@FarCallRet:
+ pushfl
+ pushw %gs
+ pushw %fs
+ pushw %es
+ pushw %ds
+ pushal
+ cli
+MISMATCH: " lea bp, [esp + sizeof (IA32_REGS)]"
+ .byte 0x66
+MISMATCH: " lgdt [bp].SavedGdtr"
+ movl $[bp].SavedCr4, %eax
+ movl %eax, %cr4
+ movl $[bp].SavedCr0, %eax
+ movl %eax, %cr0 # restore CR0
+MISMATCH: " jmp fword ptr [bp].RetEip"
+
+
+MISMATCH: "_16Idtr FWORD (1 SHL 10) - 1"
+
+_TEXT16:
+
+MISMATCH: "_TEXT16SIZE = _TEXT16- _Code16Addr"
+
+MISMATCH: "_TEXT16S"
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/Wbinvd.asm b/MdePkg/Library/BaseLib/ia32/Wbinvd.asm new file mode 100644 index 0000000000..07258fb9e9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Wbinvd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWbinvd PROC
+ wbinvd
+ ret
+_AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/Wbinvd.s b/MdePkg/Library/BaseLib/ia32/Wbinvd.s new file mode 100644 index 0000000000..e9f6c0ce6b --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/Wbinvd.s @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Wbinvd.Asm
+#
+# Abstract:
+#
+# AsmWbinvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWbinvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWbinvd
+_AsmWbinvd:
+ wbinvd
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr0.asm b/MdePkg/Library/BaseLib/ia32/WriteCr0.asm new file mode 100644 index 0000000000..d64d621cd5 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr0 PROC
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+_AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr0.s b/MdePkg/Library/BaseLib/ia32/WriteCr0.s new file mode 100644 index 0000000000..6e3ad50765 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr0.Asm
+#
+# Abstract:
+#
+# AsmWriteCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr0
+_AsmWriteCr0:
+ movl 4(%esp),%eax
+ movl %eax, %cr0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr2.asm b/MdePkg/Library/BaseLib/ia32/WriteCr2.asm new file mode 100644 index 0000000000..7ab5b0f64f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr2 PROC
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+_AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr2.s b/MdePkg/Library/BaseLib/ia32/WriteCr2.s new file mode 100644 index 0000000000..cf45e01a24 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr2.Asm
+#
+# Abstract:
+#
+# AsmWriteCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr2
+_AsmWriteCr2:
+ movl 4(%esp),%eax
+ movl %eax, %cr2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr3.asm b/MdePkg/Library/BaseLib/ia32/WriteCr3.asm new file mode 100644 index 0000000000..9753de1abe --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr3 PROC
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+_AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr3.s b/MdePkg/Library/BaseLib/ia32/WriteCr3.s new file mode 100644 index 0000000000..1c55581905 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr3.Asm
+#
+# Abstract:
+#
+# AsmWriteCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr3
+_AsmWriteCr3:
+ movl 4(%esp),%eax
+ movl %eax, %cr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr4.asm b/MdePkg/Library/BaseLib/ia32/WriteCr4.asm new file mode 100644 index 0000000000..60bfe78cb6 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmWriteCr4 PROC
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+_AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteCr4.s b/MdePkg/Library/BaseLib/ia32/WriteCr4.s new file mode 100644 index 0000000000..fbe48c1cd0 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteCr4.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr4.Asm
+#
+# Abstract:
+#
+# AsmWriteCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteCr4
+_AsmWriteCr4:
+ movl 4(%esp),%eax
+ movl %eax, %cr4
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr0.asm b/MdePkg/Library/BaseLib/ia32/WriteDr0.asm new file mode 100644 index 0000000000..3dab544c49 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr0 PROC
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+_AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr0.s b/MdePkg/Library/BaseLib/ia32/WriteDr0.s new file mode 100644 index 0000000000..a5a84de6b4 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr0.Asm
+#
+# Abstract:
+#
+# AsmWriteDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr0 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr0
+_AsmWriteDr0:
+ movl 4(%esp),%eax
+ movl %eax, %dr0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr1.asm b/MdePkg/Library/BaseLib/ia32/WriteDr1.asm new file mode 100644 index 0000000000..5898206c53 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr1 PROC
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+_AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr1.s b/MdePkg/Library/BaseLib/ia32/WriteDr1.s new file mode 100644 index 0000000000..66fc2c7cf3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr1.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr1.Asm
+#
+# Abstract:
+#
+# AsmWriteDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr1 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr1
+_AsmWriteDr1:
+ movl 4(%esp),%eax
+ movl %eax, %dr1
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr2.asm b/MdePkg/Library/BaseLib/ia32/WriteDr2.asm new file mode 100644 index 0000000000..3ed25fc8ef --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr2 PROC
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+_AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr2.s b/MdePkg/Library/BaseLib/ia32/WriteDr2.s new file mode 100644 index 0000000000..7b3f780510 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr2.Asm
+#
+# Abstract:
+#
+# AsmWriteDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr2 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr2
+_AsmWriteDr2:
+ movl 4(%esp),%eax
+ movl %eax, %dr2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr3.asm b/MdePkg/Library/BaseLib/ia32/WriteDr3.asm new file mode 100644 index 0000000000..c1dbc826b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr3 PROC
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+_AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr3.s b/MdePkg/Library/BaseLib/ia32/WriteDr3.s new file mode 100644 index 0000000000..34d3e4f0cb --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr3.Asm
+#
+# Abstract:
+#
+# AsmWriteDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr3 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr3
+_AsmWriteDr3:
+ movl 4(%esp),%eax
+ movl %eax, %dr3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr4.asm b/MdePkg/Library/BaseLib/ia32/WriteDr4.asm new file mode 100644 index 0000000000..2c82512acc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr4 PROC
+ mov eax, [esp + 4]
+ DB 0fh, 23h, 0e0h
+ ret
+_AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr5.asm b/MdePkg/Library/BaseLib/ia32/WriteDr5.asm new file mode 100644 index 0000000000..dc074244a1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr5 PROC
+ mov eax, [esp + 4]
+ DB 0fh, 23h, 0e8h
+ ret
+_AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr6.asm b/MdePkg/Library/BaseLib/ia32/WriteDr6.asm new file mode 100644 index 0000000000..e307e827dd --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr6 PROC
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+_AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr6.s b/MdePkg/Library/BaseLib/ia32/WriteDr6.s new file mode 100644 index 0000000000..7d7726be64 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr6.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr6.Asm
+#
+# Abstract:
+#
+# AsmWriteDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr6 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr6
+_AsmWriteDr6:
+ movl 4(%esp),%eax
+ movl %eax, %dr6
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr7.asm b/MdePkg/Library/BaseLib/ia32/WriteDr7.asm new file mode 100644 index 0000000000..55dbdc9c52 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteDr7 PROC
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+_AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteDr7.s b/MdePkg/Library/BaseLib/ia32/WriteDr7.s new file mode 100644 index 0000000000..a96f445632 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteDr7.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr7.Asm
+#
+# Abstract:
+#
+# AsmWriteDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteDr7 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteDr7
+_AsmWriteDr7:
+ movl 4(%esp),%eax
+ movl %eax, %dr7
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm new file mode 100644 index 0000000000..a317e75388 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteGdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686P
+ .model flat,C
+ .code
+
+InternalX86WriteGdtr PROC
+ mov eax, [esp + 4]
+ lgdt fword ptr [eax]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteGdtr.s b/MdePkg/Library/BaseLib/ia32/WriteGdtr.s new file mode 100644 index 0000000000..c3eb63d9e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteGdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteGdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteGdtr
+_AsmWriteGdtr:
+ movl 4(%esp),%eax
+ lgdt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm new file mode 100644 index 0000000000..d4b3b51a04 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteIdtr.asm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686P
+ .model flat,C
+ .code
+
+InternalX86WriteIdtr PROC
+ mov eax, [esp + 4]
+ lidt fword ptr [eax]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteIdtr.s b/MdePkg/Library/BaseLib/ia32/WriteIdtr.s new file mode 100644 index 0000000000..f71b696d97 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteIdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteIdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteIdtr
+_AsmWriteIdtr:
+ movl 4(%esp),%eax
+ lidt (%eax)
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm b/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm new file mode 100644 index 0000000000..39f8b2ed5e --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteLdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+_AsmWriteLdtr PROC
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+_AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteLdtr.s b/MdePkg/Library/BaseLib/ia32/WriteLdtr.s new file mode 100644 index 0000000000..3797bd547d --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteLdtr.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteLdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteLdtr (
+# IN UINT16 Ldtr
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteLdtr
+_AsmWriteLdtr:
+ movl 4(%esp),%eax
+ lldtw %ax
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm0.asm b/MdePkg/Library/BaseLib/ia32/WriteMm0.asm new file mode 100644 index 0000000000..e924dbdb61 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm0 PROC
+ movq mm0, [esp + 4]
+ ret
+_AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm0.s b/MdePkg/Library/BaseLib/ia32/WriteMm0.s new file mode 100644 index 0000000000..c4444219a9 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm0.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm0.Asm
+#
+# Abstract:
+#
+# AsmWriteMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm0 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm0
+_AsmWriteMm0:
+ movq 4(%esp),%mm0
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm1.asm b/MdePkg/Library/BaseLib/ia32/WriteMm1.asm new file mode 100644 index 0000000000..1f1d8ce8dc --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm1 PROC
+ movq mm1, [esp + 4]
+ ret
+_AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm1.s b/MdePkg/Library/BaseLib/ia32/WriteMm1.s new file mode 100644 index 0000000000..e3a492f9ec --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm1.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm1.Asm
+#
+# Abstract:
+#
+# AsmWriteMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm1 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm1
+_AsmWriteMm1:
+ movq 4(%esp),%mm1
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm2.asm b/MdePkg/Library/BaseLib/ia32/WriteMm2.asm new file mode 100644 index 0000000000..a18417a0d1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm2 PROC
+ movq mm2, [esp + 4]
+ ret
+_AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm2.s b/MdePkg/Library/BaseLib/ia32/WriteMm2.s new file mode 100644 index 0000000000..eaebb37636 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm2.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm2.Asm
+#
+# Abstract:
+#
+# AsmWriteMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm2 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm2
+_AsmWriteMm2:
+ movq 4(%esp),%mm2
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm3.asm b/MdePkg/Library/BaseLib/ia32/WriteMm3.asm new file mode 100644 index 0000000000..7aad49f77f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm3 PROC
+ movq mm3, [esp + 4]
+ ret
+_AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm3.s b/MdePkg/Library/BaseLib/ia32/WriteMm3.s new file mode 100644 index 0000000000..a514091732 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm3.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm3.Asm
+#
+# Abstract:
+#
+# AsmWriteMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm3 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm3
+_AsmWriteMm3:
+ movq 4(%esp),%mm3
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm4.asm b/MdePkg/Library/BaseLib/ia32/WriteMm4.asm new file mode 100644 index 0000000000..8be9c4beb8 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm4 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm4 PROC
+ movq mm4, [esp + 4]
+ ret
+_AsmWriteMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm4.s b/MdePkg/Library/BaseLib/ia32/WriteMm4.s new file mode 100644 index 0000000000..6d4a6cdce1 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm4.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm4.Asm
+#
+# Abstract:
+#
+# AsmWriteMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm4 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm4
+_AsmWriteMm4:
+ movq 4(%esp),%mm4
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm5.asm b/MdePkg/Library/BaseLib/ia32/WriteMm5.asm new file mode 100644 index 0000000000..bc501b397c --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm5 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm5 PROC
+ movq mm5, [esp + 4]
+ ret
+_AsmWriteMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm5.s b/MdePkg/Library/BaseLib/ia32/WriteMm5.s new file mode 100644 index 0000000000..15d433271f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm5.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm5.Asm
+#
+# Abstract:
+#
+# AsmWriteMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm5 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm5
+_AsmWriteMm5:
+ movq 4(%esp),%mm5
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm6.asm b/MdePkg/Library/BaseLib/ia32/WriteMm6.asm new file mode 100644 index 0000000000..4a6445cb63 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm6 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm6 PROC
+ movq mm6, [esp + 4]
+ ret
+_AsmWriteMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm6.s b/MdePkg/Library/BaseLib/ia32/WriteMm6.s new file mode 100644 index 0000000000..6b1361e7a3 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm6.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm6.Asm
+#
+# Abstract:
+#
+# AsmWriteMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm6 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm6
+_AsmWriteMm6:
+ movq 4(%esp),%mm6
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm7.asm b/MdePkg/Library/BaseLib/ia32/WriteMm7.asm new file mode 100644 index 0000000000..3bc73fed27 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMm7 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMm7 PROC
+ movq mm7, [esp + 4]
+ ret
+_AsmWriteMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMm7.s b/MdePkg/Library/BaseLib/ia32/WriteMm7.s new file mode 100644 index 0000000000..d702fbb242 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMm7.s @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm7.Asm
+#
+# Abstract:
+#
+# AsmWriteMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMm7 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMm7
+_AsmWriteMm7:
+ movq 4(%esp),%mm7
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm b/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm new file mode 100644 index 0000000000..ba14514c93 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr32.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr32.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmWriteMsr32 (
+; IN UINT32 Index,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMsr32 PROC
+ mov eax, [esp + 8]
+ xor edx, edx
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+_AsmWriteMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr32.s b/MdePkg/Library/BaseLib/ia32/WriteMsr32.s new file mode 100644 index 0000000000..450b3b7b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr32.s @@ -0,0 +1,45 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr32.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmWriteMsr32 (
+# IN UINT32 Index,
+# IN UINT32 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMsr32
+_AsmWriteMsr32:
+ movl 8(%esp),%eax
+ xorl %edx,%edx
+ movl 4(%esp),%ecx
+ wrmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm b/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm new file mode 100644 index 0000000000..5afc074291 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr64.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+_AsmWriteMsr64 PROC
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+_AsmWriteMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/ia32/WriteMsr64.s b/MdePkg/Library/BaseLib/ia32/WriteMsr64.s new file mode 100644 index 0000000000..802aad7803 --- /dev/null +++ b/MdePkg/Library/BaseLib/ia32/WriteMsr64.s @@ -0,0 +1,45 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr64.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMsr64 (
+# IN UINT32 Index,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.global _AsmWriteMsr64
+_AsmWriteMsr64:
+ movl 12(%esp),%edx
+ movl 8(%esp),%eax
+ movl 4(%esp),%ecx
+ wrmsr
+ ret
+
+
+
diff --git a/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm new file mode 100644 index 0000000000..f1ebe47b21 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuBreakpoint.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuBreakpoint PROC
+ int 3
+ ret
+CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm new file mode 100644 index 0000000000..c2c4490e9d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuFlushTlb.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuFlushTlb PROC
+ mov rax, cr3
+ mov cr3, rax
+ ret
+CpuFlushTlb ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuId.asm b/MdePkg/Library/BaseLib/x64/CpuId.asm new file mode 100644 index 0000000000..867e92a677 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuId.asm @@ -0,0 +1,62 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; )
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES rbx
+ mov eax, ecx
+ push rdx
+ push rax ; save Index on stack
+ cpuid
+ test r9, r9
+ jz @F
+ mov [r9], ecx
+@@:
+ pop rcx
+ jrcxz @F
+ mov [rcx], eax
+@@:
+ mov rcx, r8
+ jrcxz @F
+ mov [rcx], ebx
+@@:
+ mov rcx, [rsp + 30h]
+ jrcxz @F
+ mov [rcx], edx
+@@:
+ pop rax ; restore Index to rax as return value
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuPause.asm b/MdePkg/Library/BaseLib/x64/CpuPause.asm new file mode 100644 index 0000000000..d16da37712 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuPause.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/CpuSleep.asm b/MdePkg/Library/BaseLib/x64/CpuSleep.asm new file mode 100644 index 0000000000..b2c4907032 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/CpuSleep.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuSleep PROC
+ hlt
+ ret
+CpuSleep ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm b/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm new file mode 100644 index 0000000000..586832c1a2 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/DisableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/DisablePaging64.asm b/MdePkg/Library/BaseLib/x64/DisablePaging64.asm new file mode 100644 index 0000000000..3134e42571 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/DisablePaging64.asm @@ -0,0 +1,54 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging64.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86DisablePaging64 PROC
+ cli
+ shl rcx, 32
+ lea ecx, @F
+ push rcx
+ mov ebx, edx
+ mov esi, r8d
+ mov edi, r9d
+ mov eax, [rsp + 28h]
+ retf
+@@:
+ mov esp, eax ; set up new stack
+ mov rax, cr0
+ btr eax, 31
+ mov cr0, rax ; disable paging
+ mov ecx, 0c0000080h
+ rdmsr
+ and ah, NOT 1 ; clear LME
+ wrmsr
+ mov rax, cr4
+ and al, NOT (1 SHL 5) ; clear PAE
+ mov cr4, rax
+ push rdi
+ push rsi
+ call rbx
+ jmp $
+InternalX86DisablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..0d0400f007 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/EnableDisableInterrupts.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm b/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm new file mode 100644 index 0000000000..8fb4adfe37 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/EnableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableInterrupts PROC
+ sti
+ ret
+EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm b/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm new file mode 100644 index 0000000000..1d470e8753 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FlushCacheLine.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ clflush [rcx]
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FxRestore.asm b/MdePkg/Library/BaseLib/x64/FxRestore.asm new file mode 100644 index 0000000000..8acfc2f00f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FxRestore.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86FxRestore PROC
+ fxrstor [rcx]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/FxSave.asm b/MdePkg/Library/BaseLib/x64/FxSave.asm new file mode 100644 index 0000000000..cacb1f5283 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/FxSave.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86FxSave PROC
+ fxsave [rcx]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..55b055453f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange32.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov eax, edx
+ lock cmpxchg [rcx], r8d
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..88c25a56de --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedCompareExchange64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InterlockedCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC
+ mov rax, rdx
+ lock cmpxchg [rcx], r8
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm new file mode 100644 index 0000000000..f907fed4a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedDecrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ lock dec dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm new file mode 100644 index 0000000000..f5a4130bf1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/InterlockedIncrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ lock inc dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Invd.asm b/MdePkg/Library/BaseLib/x64/Invd.asm new file mode 100644 index 0000000000..446587923b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Invd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmInvd PROC
+ invd
+ ret
+AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/LongJump.asm b/MdePkg/Library/BaseLib/x64/LongJump.asm new file mode 100644 index 0000000000..6634778592 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/LongJump.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of LongJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+LongJump PROC
+ mov rbx, [rcx]
+ mov rsp, [rcx + 8]
+ mov rbp, [rcx + 10h]
+ mov rdi, [rcx + 18h]
+ mov rsi, [rcx + 20h]
+ mov r12, [rcx + 28h]
+ mov r13, [rcx + 30h]
+ mov r14, [rcx + 38h]
+ mov r15, [rcx + 40h]
+ mov rax, rdx
+ jmp qword ptr [rcx + 48h]
+LongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Monitor.asm b/MdePkg/Library/BaseLib/x64/Monitor.asm new file mode 100644 index 0000000000..0140494d30 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Monitor.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, ecx
+ mov ecx, edx
+ mov edx, r8d
+ DB 0fh, 1, 0c8h
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Mwait.asm b/MdePkg/Library/BaseLib/x64/Mwait.asm new file mode 100644 index 0000000000..8f76d944f1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Mwait.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, ecx
+ mov ecx, edx
+ DB 0fh, 1, 0c9h
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Non-existing.c b/MdePkg/Library/BaseLib/x64/Non-existing.c new file mode 100644 index 0000000000..b2c737857d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Non-existing.c @@ -0,0 +1,54 @@ +/** @file
+ Non-existing BaseLib functions on x64
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InternalX86EnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr0.asm b/MdePkg/Library/BaseLib/x64/ReadCr0.asm new file mode 100644 index 0000000000..3e369c3a81 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov rax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr2.asm b/MdePkg/Library/BaseLib/x64/ReadCr2.asm new file mode 100644 index 0000000000..8476f5af18 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov rax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr3.asm b/MdePkg/Library/BaseLib/x64/ReadCr3.asm new file mode 100644 index 0000000000..af54d46373 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov rax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCr4.asm b/MdePkg/Library/BaseLib/x64/ReadCr4.asm new file mode 100644 index 0000000000..c8a881db9e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov rax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadCs.asm b/MdePkg/Library/BaseLib/x64/ReadCs.asm new file mode 100644 index 0000000000..126149a47c --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadCs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov ax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr0.asm b/MdePkg/Library/BaseLib/x64/ReadDr0.asm new file mode 100644 index 0000000000..7e0d6b714a --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov rax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr1.asm b/MdePkg/Library/BaseLib/x64/ReadDr1.asm new file mode 100644 index 0000000000..22f11c4e0f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov rax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr2.asm b/MdePkg/Library/BaseLib/x64/ReadDr2.asm new file mode 100644 index 0000000000..3b81605861 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov rax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr3.asm b/MdePkg/Library/BaseLib/x64/ReadDr3.asm new file mode 100644 index 0000000000..1968fd0d67 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov rax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr4.asm b/MdePkg/Library/BaseLib/x64/ReadDr4.asm new file mode 100644 index 0000000000..97740016b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr5.asm b/MdePkg/Library/BaseLib/x64/ReadDr5.asm new file mode 100644 index 0000000000..0582502220 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr6.asm b/MdePkg/Library/BaseLib/x64/ReadDr6.asm new file mode 100644 index 0000000000..a3dafb9b9f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov rax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDr7.asm b/MdePkg/Library/BaseLib/x64/ReadDr7.asm new file mode 100644 index 0000000000..0cff14b5c4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov rax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadDs.asm b/MdePkg/Library/BaseLib/x64/ReadDs.asm new file mode 100644 index 0000000000..bdcddb65d8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadDs.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov ax, ds
+ ret
+AsmReadDs ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseLib/x64/ReadEflags.asm b/MdePkg/Library/BaseLib/x64/ReadEflags.asm new file mode 100644 index 0000000000..174ae95887 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadEflags.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfq
+ pop rax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadEs.asm b/MdePkg/Library/BaseLib/x64/ReadEs.asm new file mode 100644 index 0000000000..40384bcd71 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadEs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov ax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadFs.asm b/MdePkg/Library/BaseLib/x64/ReadFs.asm new file mode 100644 index 0000000000..b63e474023 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadFs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov ax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadGdtr.asm b/MdePkg/Library/BaseLib/x64/ReadGdtr.asm new file mode 100644 index 0000000000..2d40599a8b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadGdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86ReadGdtr PROC
+ sgdt fword ptr [rcx]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadGs.asm b/MdePkg/Library/BaseLib/x64/ReadGs.asm new file mode 100644 index 0000000000..02d140e670 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadGs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov ax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadIdtr.asm b/MdePkg/Library/BaseLib/x64/ReadIdtr.asm new file mode 100644 index 0000000000..260f697178 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadIdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86ReadIdtr PROC
+ sidt fword ptr [rcx]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadLdtr.asm b/MdePkg/Library/BaseLib/x64/ReadLdtr.asm new file mode 100644 index 0000000000..3d6a2f8843 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt eax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm0.asm b/MdePkg/Library/BaseLib/x64/ReadMm0.asm new file mode 100644 index 0000000000..1239bcacd6 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ DB 48h, 0fh, 7eh, 0c0h
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm1.asm b/MdePkg/Library/BaseLib/x64/ReadMm1.asm new file mode 100644 index 0000000000..b42bd7f63f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ DB 48h, 0fh, 7eh, 0c8h
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm2.asm b/MdePkg/Library/BaseLib/x64/ReadMm2.asm new file mode 100644 index 0000000000..b10782e403 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ DB 48h, 0fh, 7eh, 0d0h
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm3.asm b/MdePkg/Library/BaseLib/x64/ReadMm3.asm new file mode 100644 index 0000000000..15a96475bd --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ DB 48h, 0fh, 7eh, 0d8h
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm4.asm b/MdePkg/Library/BaseLib/x64/ReadMm4.asm new file mode 100644 index 0000000000..73f528342e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ DB 48h, 0fh, 7eh, 0e0h
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm5.asm b/MdePkg/Library/BaseLib/x64/ReadMm5.asm new file mode 100644 index 0000000000..a487889480 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ DB 48h, 0fh, 7eh, 0e8h
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm6.asm b/MdePkg/Library/BaseLib/x64/ReadMm6.asm new file mode 100644 index 0000000000..56f81bf7b1 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ DB 48h, 0fh, 7eh, 0f0h
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMm7.asm b/MdePkg/Library/BaseLib/x64/ReadMm7.asm new file mode 100644 index 0000000000..e3ad6bb658 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMm7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ DB 48h, 0fh, 7eh, 0f8h
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMsr32.asm b/MdePkg/Library/BaseLib/x64/ReadMsr32.asm new file mode 100644 index 0000000000..271eabbeae --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMsr32.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr32.Asm
+;
+; Abstract:
+;
+; AsmReadMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmReadMsr32 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr32 PROC
+ rdmsr
+ ret
+AsmReadMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadMsr64.asm b/MdePkg/Library/BaseLib/x64/ReadMsr64.asm new file mode 100644 index 0000000000..4444c18676 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadMsr64.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ rdmsr
+ shl rax, 20h
+ shrd rax, rdx, 20h
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadPmc.asm b/MdePkg/Library/BaseLib/x64/ReadPmc.asm new file mode 100644 index 0000000000..b5004d6f34 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadPmc.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ rdpmc
+ shl ecx, 1
+ jnc @F
+ shl rax, 20h
+ shrd rax, rdx, 20h
+@@:
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadSs.asm b/MdePkg/Library/BaseLib/x64/ReadSs.asm new file mode 100644 index 0000000000..4aa480d71b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadSs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov ax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadTr.asm b/MdePkg/Library/BaseLib/x64/ReadTr.asm new file mode 100644 index 0000000000..7cf8cdfd43 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadTr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str eax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/ReadTsc.asm b/MdePkg/Library/BaseLib/x64/ReadTsc.asm new file mode 100644 index 0000000000..25fa2cc5d8 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ shl rax, 20h
+ shrd rax, rdx, 20h
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/SetJump.asm b/MdePkg/Library/BaseLib/x64/SetJump.asm new file mode 100644 index 0000000000..305e721b8b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/SetJump.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+SetJump PROC
+ pop rdx
+ mov [rcx], rbx
+ mov [rcx + 8], rsp
+ mov [rcx + 10h], rbp
+ mov [rcx + 18h], rdi
+ mov [rcx + 20h], rsi
+ mov [rcx + 28h], r12
+ mov [rcx + 30h], r13
+ mov [rcx + 38h], r14
+ mov [rcx + 40h], r15
+ mov [rcx + 48h], rdx
+ xor rax, rax
+ jmp rdx
+SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/SwitchStack.asm b/MdePkg/Library/BaseLib/x64/SwitchStack.asm new file mode 100644 index 0000000000..0dfddc011b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/SwitchStack.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SwitchStack.Asm
+;
+; Abstract:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; Routine Description:
+;
+; Routine for switching stacks with 1 parameter
+;
+; Arguments:
+;
+; (rcx) EntryPoint - Entry point with new stack.
+; (rdx) Context - Parameter for entry point.
+; (r8) Context2 - Parameter2 for entry point.
+; (r9) NewStack - Pointer to new stack.
+;
+; Returns:
+;
+; None
+;
+;------------------------------------------------------------------------------
+SwitchStack PROC
+ mov rax, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ lea rsp, [r9 - 20h]
+ call rax
+SwitchStack ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Thunk16.asm b/MdePkg/Library/BaseLib/x64/Thunk16.asm new file mode 100644 index 0000000000..f3e80840b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Thunk16.asm @@ -0,0 +1,189 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .data
+
+NullSegSel DQ 0
+_16CsSegSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment
+ DB 0
+_16BitDsSel LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment
+ DB 0
+GdtEnd LABEL QWORD
+
+ .const
+
+_16Gdtr LABEL FWORD
+ DW offset GdtEnd - offset NullSegSel - 1
+ DQ offset NullSegSel
+
+_16Idtr FWORD (1 SHL 10) - 1
+
+ .code
+
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_RFLAGS DQ ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+InternalAsmThunk16 PROC USES rbp rbx rsi rdi r12 r13 r14 r15
+ mov eax, ds
+ push rax
+ mov eax, es
+ push rax
+ push fs
+ push gs
+ mov rsi, rcx ; rsi <- RegSet
+ push sizeof (IA32_REGS)
+ pop rcx
+ movzx r8, (IA32_REGS ptr [rsi])._SS
+ xor rdi, rdi
+ mov edi, (IA32_REGS ptr [rsi])._ESP
+ sub rdi, rcx ; reserve space on realmode stack
+ push rdi ; save stack offset
+ imul rax, r8, 16
+ add rdi, rax ; rdi <- linear address of 16-bit stack
+ rep movsb ; copy RegSet
+ mov rsi, r8 ; si <- 16-bit stack segment
+ pop rbx ; rbx <- 16-bit stack offset
+ mov rdi, rdx ; rdi <- realmode patch
+ lea eax, @BackToThunk ; rax <- address to back from real mode
+ push rax ; use in a far return
+ mov eax, cs
+ mov [rsp + 4], eax ; save CS
+ lea eax, @16Return ; thus @Return must < 4GB
+ stosd ; set ret address offset
+ xor eax, eax
+ stosw ; set ret CS base to 0
+ mov eax, esp
+ stosd ; rsp must < 4GB
+ mov eax, ss
+ stosd
+ mov rax, cr0
+ mov ecx, eax ; ecx <- CR0
+ and ecx, 7ffffffeh ; clear PE, PG bits
+ stosd
+ mov rax, cr4
+ mov ebp, eax
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ stosd
+ sidt fword ptr [rsp + 70h] ; use parameter space to save IDTR
+ sgdt fword ptr [rdi]
+ lea edi, _16Idtr
+ lea eax, @16Start ; rax <- seg:offset of @16Start
+ push rax
+ mov dword ptr [rsp + 4], 8
+ push 10h
+ pop rax ; rax <- 10h as dataseg selector
+ lgdt _16Gdtr
+ retf
+@16Start: ; 16-bit starts here
+ mov ss, eax ; set SS to be a 16-bit segment
+ mov cr0, rcx ; disable protected mode
+ mov cr4, rbp
+ DB 66h
+ mov ecx, 0c0000080h
+ rdmsr
+ and ah, NOT 1 ; clear LME
+ wrmsr
+ mov ss, esi ; set up 16-bit stack
+ mov sp, bx ; mov esp, ebx actually
+ lidt fword ptr [edi]
+ DB 66h, 61h ; popad
+ DB 1fh ; pop ds
+ DB 7 ; pop es
+ pop fs
+ pop gs
+ add sp, 8 ; skip _RFLAGS
+ DB 66h
+ retf ; transfer control to 16-bit code
+@16Return:
+ DB 66h
+ push 0 ; high order 32 bits of rflags
+ pushf ; pushfd actually
+ push gs
+ push fs
+ DB 6 ; push es
+ DB 1eh ; push ds
+ DB 66h, 60h ; pushad
+ DB 67h, 66h, 0c5h, 74h, 24h, 30h ; lds esi, [esp + 12*4]
+ DB 66h
+ mov eax, [esi + 12]
+ mov cr4, rax ; restore CR4
+ DB 66h
+ lgdt fword ptr [esi + 16]
+ DB 66h
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ DB 66h
+ mov eax, [esi + 8]
+ mov cr0, rax ; restore CR0
+ xor ax, ax ; xor eax, eax actually
+ mov eax, ss
+ mov dword ptr (IA32_REGS ptr [esp])._SS, eax
+ shl ax, 4 ; shl eax, 4 actually
+ add ax, sp ; add eax, esp actually
+ add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)
+ DB 66h
+ mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp
+ DB 66h
+ lss esp, fword ptr [esi] ; restore protected mode stack
+ DB 66h
+ retf ; go back to protected mode
+@BackToThunk:
+ lidt fword ptr [rsp + 68h] ; restore protected mode IDTR
+ shl rax, 32
+ shr rax, 32 ; clear high order 32 bits of RAX
+ pop gs
+ pop fs
+ pop rcx
+ mov es, ecx
+ pop rcx
+ mov ds, ecx
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/Wbinvd.asm b/MdePkg/Library/BaseLib/x64/Wbinvd.asm new file mode 100644 index 0000000000..ca0cb252b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/Wbinvd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr0.asm b/MdePkg/Library/BaseLib/x64/WriteCr0.asm new file mode 100644 index 0000000000..defc7e7c96 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov cr0, rcx
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr2.asm b/MdePkg/Library/BaseLib/x64/WriteCr2.asm new file mode 100644 index 0000000000..ebe6f89d62 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov cr2, rcx
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr3.asm b/MdePkg/Library/BaseLib/x64/WriteCr3.asm new file mode 100644 index 0000000000..5715dea9b7 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov cr3, rcx
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteCr4.asm b/MdePkg/Library/BaseLib/x64/WriteCr4.asm new file mode 100644 index 0000000000..210744e16f --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov cr4, rcx
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr0.asm b/MdePkg/Library/BaseLib/x64/WriteDr0.asm new file mode 100644 index 0000000000..2515a20404 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov dr0, rcx
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr1.asm b/MdePkg/Library/BaseLib/x64/WriteDr1.asm new file mode 100644 index 0000000000..89f36ac3f9 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov dr1, rcx
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr2.asm b/MdePkg/Library/BaseLib/x64/WriteDr2.asm new file mode 100644 index 0000000000..820977c2e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov dr2, rcx
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr3.asm b/MdePkg/Library/BaseLib/x64/WriteDr3.asm new file mode 100644 index 0000000000..51c1407277 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov dr3, rcx
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr4.asm b/MdePkg/Library/BaseLib/x64/WriteDr4.asm new file mode 100644 index 0000000000..12b643825b --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ DB 0fh, 23h, 0e1h
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr5.asm b/MdePkg/Library/BaseLib/x64/WriteDr5.asm new file mode 100644 index 0000000000..6d454d5267 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ DB 0fh, 23h, 0e9h
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr6.asm b/MdePkg/Library/BaseLib/x64/WriteDr6.asm new file mode 100644 index 0000000000..b7b9f2509d --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov dr6, rcx
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteDr7.asm b/MdePkg/Library/BaseLib/x64/WriteDr7.asm new file mode 100644 index 0000000000..de2237b6e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov dr7, rcx
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteGdtr.asm b/MdePkg/Library/BaseLib/x64/WriteGdtr.asm new file mode 100644 index 0000000000..1757e3dea4 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteGdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86WriteGdtr PROC
+ lgdt fword ptr [rcx]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteIdtr.asm b/MdePkg/Library/BaseLib/x64/WriteIdtr.asm new file mode 100644 index 0000000000..09fcb9e457 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteIdtr.asm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalX86WriteIdtr PROC
+ lidt fword ptr [rcx]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteLdtr.asm b/MdePkg/Library/BaseLib/x64/WriteLdtr.asm new file mode 100644 index 0000000000..d85ae38f29 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+AsmWriteLdtr PROC
+ lldt cx
+ ret
+AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm0.asm b/MdePkg/Library/BaseLib/x64/WriteMm0.asm new file mode 100644 index 0000000000..bb9a576125 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ DB 48h, 0fh, 6eh, 0c1h
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm1.asm b/MdePkg/Library/BaseLib/x64/WriteMm1.asm new file mode 100644 index 0000000000..1bab3bcd8e --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ DB 48h, 0fh, 6eh, 0c9h
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm2.asm b/MdePkg/Library/BaseLib/x64/WriteMm2.asm new file mode 100644 index 0000000000..97e8a6a676 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ DB 48h, 0fh, 6eh, 0d1h
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm3.asm b/MdePkg/Library/BaseLib/x64/WriteMm3.asm new file mode 100644 index 0000000000..d55e19a406 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ DB 48h, 0fh, 6eh, 0d9h
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm4.asm b/MdePkg/Library/BaseLib/x64/WriteMm4.asm new file mode 100644 index 0000000000..2a69b93bcc --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm4 PROC
+ DB 48h, 0fh, 6eh, 0e1h
+ ret
+AsmWriteMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm5.asm b/MdePkg/Library/BaseLib/x64/WriteMm5.asm new file mode 100644 index 0000000000..c4d798bcbd --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm5.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm5 PROC
+ DB 48h, 0fh, 6eh, 0e9h
+ ret
+AsmWriteMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm6.asm b/MdePkg/Library/BaseLib/x64/WriteMm6.asm new file mode 100644 index 0000000000..c0164f66da --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm6 PROC
+ DB 48h, 0fh, 6eh, 0f1h
+ ret
+AsmWriteMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMm7.asm b/MdePkg/Library/BaseLib/x64/WriteMm7.asm new file mode 100644 index 0000000000..20768e2b78 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMm7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm7 PROC
+ DB 48h, 0fh, 6eh, 0f9h
+ ret
+AsmWriteMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMsr32.asm b/MdePkg/Library/BaseLib/x64/WriteMsr32.asm new file mode 100644 index 0000000000..0a74403624 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMsr32.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr32.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; AsmWriteMsr32 (
+; IN UINT32 Index,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr32 PROC
+ mov eax, edx
+ xor edx, edx
+ wrmsr
+ ret
+AsmWriteMsr32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x64/WriteMsr64.asm b/MdePkg/Library/BaseLib/x64/WriteMsr64.asm new file mode 100644 index 0000000000..3337f45891 --- /dev/null +++ b/MdePkg/Library/BaseLib/x64/WriteMsr64.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr64 PROC
+ push rdx
+ mov eax, edx
+ shr rdx, 20h
+ wrmsr
+ pop rax
+ ret
+AsmWriteMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/x86LowLevel.c b/MdePkg/Library/BaseLib/x86LowLevel.c new file mode 100644 index 0000000000..c222c6ccb6 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86LowLevel.c @@ -0,0 +1,979 @@ +/** @file
+ IA-32/x64 specific functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86LowLevel.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+//
+// Bit-wise MSR operations
+//
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrOr64 (Index, OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ )
+{
+ return (UINT32)AsmMsrAnd64 (Index, AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Value) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (OrData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAndThenOr64 (
+ Index,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAndThenOr64 (
+ AsmReadMsr64 (Index),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ )
+ );
+}
+
+//
+// Base Library CPU Functions
+//
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ IA32_EFLAGS32 EFlags;
+
+ EFlags.UintN = AsmReadEflags ();
+ return (BOOLEAN)(EFlags.Bits.IF == 1);
+}
+
+//
+// Ia32 and x64 specific functions
+//
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86ReadGdtr (Gdtr);
+}
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86WriteGdtr (Gdtr);
+}
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86ReadIdtr (Idtr);
+}
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86WriteIdtr (Idtr);
+}
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+ InternalX86FxSave (Buffer);
+}
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+ InternalX86FxRestore (Buffer);
+}
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
+
+//
+// x86 version of MemoryFence()
+//
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+}
diff --git a/MdePkg/Library/BaseLib/x86Thunk.c b/MdePkg/Library/BaseLib/x86Thunk.c new file mode 100644 index 0000000000..8cb5f4f8bd --- /dev/null +++ b/MdePkg/Library/BaseLib/x86Thunk.c @@ -0,0 +1,127 @@ +/** @file
+ Real Mode Thunk Functions for IA32 and X64.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Thunk.c
+
+**/
+
+/**
+ Invokes 16-bit code in big real mode and returns the updated register set.
+
+ This function transfers control to the 16-bit code specified by CS:EIP using
+ the stack specified by SS:ESP in RegisterSet. The updated registers are saved
+ on the real mode stack and the starting address of the save area is returned.
+
+ @param RegisterSet Values of registers before invocation of 16-bit code.
+ @param Patch Pointer to the area following the 16-bit code.
+
+ @return The pointer to a IA32_REGISTER_SET structure containing the updated
+ register values.
+
+**/
+IA32_REGISTER_SET *
+InternalAsmThunk16 (
+ IN IA32_REGISTER_SET *RegisterSet,
+ IN OUT VOID *Patch
+ );
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ ASSERT (ThunkContext != NULL);
+}
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used. This function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ UINT16 *Patch;
+
+ ASSERT (ThunkContext != NULL);
+
+ Patch = (UINT16*)(
+ (UINTN)ThunkContext->RealModeCode +
+ ThunkContext->RealModeCodeSize
+ );
+
+ //
+ // 0x9a66 is the OpCode of far call with an operand size override.
+ //
+ *Patch = 0x9a66;
+
+ //
+ // CopyMem() here copies the updated register values back to RealModeState
+ //
+ CopyMem (
+ &ThunkContext->RealModeState,
+ InternalAsmThunk16 (&ThunkContext->RealModeState, Patch + 1),
+ sizeof (ThunkContext->RealModeState)
+ );
+}
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk. This
+ function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ AsmPrepareThunk16 (ThunkContext);
+ AsmThunk16 (ThunkContext);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.mbd b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.mbd new file mode 100644 index 0000000000..767de2f139 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseMemoryLib</BaseName>
+ <Guid>fd44e603-002a-4b29-9f5f-529e815b6165</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 13:55</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa new file mode 100644 index 0000000000..ebd241bc71 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseMemoryLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>fd44e603-002a-4b29-9f5f-529e815b6165</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 13:55</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>CopyMem.c</Filename>
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibGeneric.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>SetMem.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseMemoryLib/CopyMem.c b/MdePkg/Library/BaseMemoryLib/CopyMem.c new file mode 100644 index 0000000000..f2106acb18 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/CopyMem.c @@ -0,0 +1,60 @@ +/** @file
+ Implementation of the EfiCopyMem routine. This function is broken
+ out into its own source file so that it can be excluded from a
+ build for a particular platform easily if an optimized version
+ is desired.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EfiCopyMem.c
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ //
+ // Declare the local variables that actually move the data elements as
+ // volatile to prevent the optimizer from replacing this function with
+ // the intrinsic memcpy()
+ //
+ volatile UINT8 *Destination8;
+ CONST UINT8 *Source8;
+
+ if (Source > Destination) {
+ Destination8 = (UINT8*)Destination;
+ Source8 = (CONST UINT8*)Source;
+ while (Length-- != 0) {
+ *(Destination8++) = *(Source8++);
+ }
+ } else if (Source < Destination) {
+ Destination8 = (UINT8*)Destination + Length;
+ Source8 = (CONST UINT8*)Source + Length;
+ while (Length-- != 0) {
+ *(--Destination8) = *(--Source8);
+ }
+ }
+ return Destination;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c new file mode 100644 index 0000000000..ef9f358a79 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c @@ -0,0 +1,282 @@ +/** @file
+ Architecture Independent Base Memory Library Implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGeneric.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ do {
+ ((UINT16*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ do {
+ ((UINT32*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ do {
+ ((UINT64*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ return InternalMemSetMem (Buffer, Length, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length > 0);
+ while ((--Length != 0) &&
+ (*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {
+ DestinationBuffer = (INT8*)DestinationBuffer + 1;
+ SourceBuffer = (INT8*)SourceBuffer + 1;
+ }
+ return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ CONST UINT8 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT8*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ CONST UINT16 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT16*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ CONST UINT32 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT32*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ CONST UINT64 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT64*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGuid.c b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibWrapper.c b/MdePkg/Library/BaseMemoryLib/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMem.c b/MdePkg/Library/BaseMemoryLib/SetMem.c new file mode 100644 index 0000000000..bd7fee014d --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMem.c @@ -0,0 +1,51 @@ +/** @file
+ Implementation of the EfiSetMem routine. This function is broken
+ out into its own source file so that it can be excluded from a
+ build for a particular platform easily if an optimized version
+ is desired.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EfiSetMem.c
+
+**/
+
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ //
+ // Declare the local variables that actually move the data elements as
+ // volatile to prevent the optimizer from replacing this function with
+ // the intrinsic memset()
+ //
+ volatile UINT8 *Pointer;
+
+ Pointer = (UINT8*)Buffer;
+ while (Size-- != 0) {
+ *(Pointer++) = Value;
+ }
+ return Buffer;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/build.xml b/MdePkg/Library/BaseMemoryLib/build.xml new file mode 100644 index 0000000000..fd1b805b43 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseMemoryLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseMemoryLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseMemoryLib">
+ <GenBuild baseName="BaseMemoryLib" mbdFilename="${MODULE_DIR}\BaseMemoryLib.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLib.msa"/>
+ </target>
+ <target depends="BaseMemoryLib_clean" name="clean"/>
+ <target depends="BaseMemoryLib_cleanall" name="cleanall"/>
+ <target name="BaseMemoryLib_clean">
+ <OutputDirSetup baseName="BaseMemoryLib" mbdFilename="${MODULE_DIR}\BaseMemoryLib.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseMemoryLib_cleanall">
+ <OutputDirSetup baseName="BaseMemoryLib" mbdFilename="${MODULE_DIR}\BaseMemoryLib.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseMemoryLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.mbd b/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.mbd new file mode 100644 index 0000000000..adea3a035c --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseMemoryLibMmx</BaseName>
+ <Guid>d458a654-f64c-49db-b8d1-3821306bf1f6</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 19:53</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.msa b/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.msa new file mode 100644 index 0000000000..37abf06853 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/BaseMemoryLibMmx.msa @@ -0,0 +1,58 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseMemoryLibMmx</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>d458a654-f64c-49db-b8d1-3821306bf1f6</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 19:53</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>Ia32\CopyMem.asm</Filename>
+ <Filename>Ia32\SetMem.asm</Filename>
+ <Filename>Ia32\ZeroMem.asm</Filename>
+ <Filename>Ia32\SetMem16.asm</Filename>
+ <Filename>Ia32\SetMem32.asm</Filename>
+ <Filename>Ia32\SetMem64.asm</Filename>
+ <Filename>Ia32\CompareMem.asm</Filename>
+ <Filename>Ia32\ScanMem8.asm</Filename>
+ <Filename>Ia32\ScanMem16.asm</Filename>
+ <Filename>Ia32\ScanMem32.asm</Filename>
+ <Filename>Ia32\ScanMem64.asm</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseMemoryLibMmx/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibMmx/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLibMmx/MemLibWrapper.c b/MdePkg/Library/BaseMemoryLibMmx/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibMmx/build.xml b/MdePkg/Library/BaseMemoryLibMmx/build.xml new file mode 100644 index 0000000000..13a9a993ea --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseMemoryLibMmx"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseMemoryLibMmx"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseMemoryLibMmx">
+ <GenBuild baseName="BaseMemoryLibMmx" mbdFilename="${MODULE_DIR}\BaseMemoryLibMmx.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibMmx.msa"/>
+ </target>
+ <target depends="BaseMemoryLibMmx_clean" name="clean"/>
+ <target depends="BaseMemoryLibMmx_cleanall" name="cleanall"/>
+ <target name="BaseMemoryLibMmx_clean">
+ <OutputDirSetup baseName="BaseMemoryLibMmx" mbdFilename="${MODULE_DIR}\BaseMemoryLibMmx.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibMmx.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibMmx_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibMmx_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseMemoryLibMmx_cleanall">
+ <OutputDirSetup baseName="BaseMemoryLibMmx" mbdFilename="${MODULE_DIR}\BaseMemoryLibMmx.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibMmx.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibMmx_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibMmx_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseMemoryLibMmx*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/CompareMem.asm new file mode 100644 index 0000000000..4e35d1c858 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/CompareMem.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemCompareMem PROC USES esi edi
+ mov esi, [esp + 12]
+ mov edi, [esp + 16]
+ mov ecx, [esp + 20]
+ repe cmpsb
+ movzx eax, byte ptr [esi - 1]
+ movzx edx, byte ptr [edi - 1]
+ sub eax, edx
+ sub eax, edx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/CopyMem.asm new file mode 100644 index 0000000000..b709a809d5 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/CopyMem.asm @@ -0,0 +1,86 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_CopyMem (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemCopyMem PROC USES esi edi
+ mov esi, [esp + 16] ; esi <- Source
+ mov edi, [esp + 12] ; edi <- Destination
+ mov edx, [esp + 20] ; edx <- Count
+ lea eax, [edi + edx - 1] ; eax <- End of Destination
+ cmp esi, edi
+ jae @F
+ cmp eax, esi ; Overlapped?
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ xor ecx, ecx
+ sub ecx, esi
+ and ecx, 7 ; ecx + esi aligns on 8-byte boundary
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx ; edx <- remaining bytes to copy
+ rep movsb
+@@:
+ mov ecx, edx
+ and edx, 7
+ shr ecx, 3 ; ecx <- # of Qwords to copy
+ jz @CopyBytes
+ push eax
+ push eax
+ movq [esp], mm0 ; save mm0
+@@:
+ movq mm0, [esi]
+ movntq [edi], mm0
+ add esi, 8
+ add edi, 8
+ loop @B
+ mfence
+ movq mm0, [esp] ; restore mm0
+ pop ecx ; stack cleanup
+ pop ecx ; stack cleanup
+ jmp @CopyBytes
+@CopyBackward:
+ mov edi, eax ; edi <- Last byte in Destination
+ lea esi, [esi + edx - 1] ; esi <- Last byte in Source
+ std
+@CopyBytes:
+ mov ecx, edx
+ rep movsb
+ cld
+ mov eax, [esp + 12]
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem16.asm new file mode 100644 index 0000000000..7071942ede --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem16.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem16 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasw
+ lea eax, [edi - 2]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem32.asm new file mode 100644 index 0000000000..e6aaf02bc3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem32.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem32 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasd
+ lea eax, [edi - 4]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem64.asm new file mode 100644 index 0000000000..f9725a4a5d --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem64.asm @@ -0,0 +1,53 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ cmp eax, [edi]
+ lea edi, [edi + 8]
+ loopne @B
+ jne @F
+ cmp edx, [edi - 4]
+ jecxz @F
+ jne @B
+@@:
+ lea eax, [edi - 8]
+ cmovne eax, ecx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem8.asm new file mode 100644 index 0000000000..6ae1900189 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/ScanMem8.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem8 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov al, [esp + 16]
+ repne scasb
+ lea eax, [edi - 1]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem.asm new file mode 100644 index 0000000000..f2c55f1296 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem PROC USES edi
+ mov ecx, [esp + 12] ; ecx <- Count
+ mov edi, [esp + 8] ; edi <- Buffer
+ mov edx, ecx
+ shr ecx, 3 ; # of Qwords to set
+ mov al, [esp + 16] ; al <- Value
+ jz @SetBytes
+ mov ah, al ; ax <- Value | (Value << 8)
+ push ecx
+ push ecx
+ movq [esp], mm0 ; save mm0
+ movd mm0, eax
+ pshufw mm0, mm0, 0 ; fill mm0 with 8 Value's
+@@:
+ movntq [edi], mm0
+ add edi, 8
+ loop @B
+ mfence
+ movq mm0, [esp] ; restore mm0
+ pop ecx ; stack cleanup
+ pop ecx
+@SetBytes:
+ and edx, 7
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8] ; eax <- Buffer as return value
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem16.asm new file mode 100644 index 0000000000..f9dc533fd8 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem16.asm @@ -0,0 +1,59 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem16 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT16 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem16 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ mov ecx, edx
+ and edx, 3
+ shr ecx, 2
+ mov eax, [esp + 16]
+ jz @SetWords
+ movd mm0, eax
+ pshufw mm0, mm0, 0
+@@:
+ movntq [edi], mm0
+ add edi, 8
+ loop @B
+ mfence
+@SetWords:
+ mov ecx, edx
+ rep stosw
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem32.asm new file mode 100644 index 0000000000..7f24fcd744 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem32.asm @@ -0,0 +1,59 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem32 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT32 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem32 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ mov ecx, edx
+ shr ecx, 1
+ movd mm0, [esp + 16]
+ mov eax, edi
+ jz @SetDwords
+ pshufw mm0, mm0, 44h
+@@:
+ movntq [edi], mm0
+ add edi, 8
+ loop @B
+ mfence
+@SetDwords:
+ test dl, 1
+ jz @F
+ movd [edi], mm0
+@@:
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem64.asm new file mode 100644 index 0000000000..b607608505 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/SetMem64.asm @@ -0,0 +1,50 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem64 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT64 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem64 PROC USES edi
+ movq mm0, [esp + 16]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, edi
+@@:
+ movntq [edi], mm0
+ add edi, 8
+ loop @B
+ mfence
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibMmx/ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibMmx/ia32/ZeroMem.asm new file mode 100644 index 0000000000..31ef120525 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibMmx/ia32/ZeroMem.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_ZeroMem (
+; IN VOID *Buffer,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemZeroMem PROC USES edi
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edx, ecx
+ shr ecx, 3
+ jz @ZeroBytes
+ pxor mm0, mm0
+@@:
+ movntq [edi], mm0
+ add edi, 8
+ loop @B
+ mfence
+@ZeroBytes:
+ and edx, 7
+ xor eax, eax
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8]
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.mbd b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.mbd new file mode 100644 index 0000000000..400ca94b35 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseMemoryLibRepStr</BaseName>
+ <Guid>e7884bf4-51a1-485b-982a-ff89129983bc</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 13:39</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa new file mode 100644 index 0000000000..24c67a044e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa @@ -0,0 +1,73 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseMemoryLibRepStr</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>e7884bf4-51a1-485b-982a-ff89129983bc</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 13:39</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>Ia32\CopyMem.asm</Filename>
+ <Filename>Ia32\SetMem.asm</Filename>
+ <Filename>Ia32\SetMem16.asm</Filename>
+ <Filename>Ia32\SetMem32.asm</Filename>
+ <Filename>Ia32\SetMem64.asm</Filename>
+ <Filename>Ia32\ZeroMem.asm</Filename>
+ <Filename>Ia32\CompareMem.asm</Filename>
+ <Filename>Ia32\ScanMem8.asm</Filename>
+ <Filename>Ia32\ScanMem16.asm</Filename>
+ <Filename>Ia32\ScanMem32.asm</Filename>
+ <Filename>Ia32\ScanMem64.asm</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>x64\CopyMem.asm</Filename>
+ <Filename>x64\SetMem.asm</Filename>
+ <Filename>x64\SetMem16.asm</Filename>
+ <Filename>x64\SetMem32.asm</Filename>
+ <Filename>x64\SetMem64.asm</Filename>
+ <Filename>x64\ZeroMem.asm</Filename>
+ <Filename>x64\CompareMem.asm</Filename>
+ <Filename>x64\ScanMem8.asm</Filename>
+ <Filename>x64\ScanMem16.asm</Filename>
+ <Filename>x64\ScanMem32.asm</Filename>
+ <Filename>x64\ScanMem64.asm</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm new file mode 100644 index 0000000000..3cf6fe7f73 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemCompareMem PROC USES esi edi
+ mov esi, [esp + 12]
+ mov edi, [esp + 16]
+ mov ecx, [esp + 20]
+ repe cmpsb
+ movzx eax, byte ptr [esi - 1]
+ movzx edx, byte ptr [edi - 1]
+ sub eax, edx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm new file mode 100644 index 0000000000..7b3e5eafee --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm @@ -0,0 +1,55 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.Asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemCopyMem PROC USES esi edi
+ mov esi, [esp + 16] ; esi <- Source
+ mov edi, [esp + 12] ; edi <- Destination
+ mov edx, [esp + 20] ; edx <- Count
+ lea eax, [edi + edx - 1] ; eax <- End of Destination
+ cmp esi, edi
+ jae @F
+ cmp eax, esi
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ mov ecx, edx
+ and edx, 3
+ shr ecx, 2
+ rep movsd ; Copy as many Dwords as possible
+ jmp @CopyBytes
+@CopyBackward:
+ mov edi, eax ; edi <- End of Destination
+ lea esi, [esi + edx - 1] ; esi <- End of Source
+ std
+@CopyBytes:
+ mov ecx, edx
+ rep movsb ; Copy bytes backward
+ cld
+ mov eax, [esp + 12] ; eax <- Destination as return value
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm new file mode 100644 index 0000000000..7071942ede --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem16 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasw
+ lea eax, [edi - 2]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm new file mode 100644 index 0000000000..e6aaf02bc3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem32 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasd
+ lea eax, [edi - 4]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm new file mode 100644 index 0000000000..f9725a4a5d --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm @@ -0,0 +1,53 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ cmp eax, [edi]
+ lea edi, [edi + 8]
+ loopne @B
+ jne @F
+ cmp edx, [edi - 4]
+ jecxz @F
+ jne @B
+@@:
+ lea eax, [edi - 8]
+ cmovne eax, ecx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm new file mode 100644 index 0000000000..6ae1900189 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem8 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov al, [esp + 16]
+ repne scasb
+ lea eax, [edi - 1]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm new file mode 100644 index 0000000000..495dd3f4ba --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.Asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemSetMem PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosb
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm new file mode 100644 index 0000000000..483e26e2b6 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.Asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemSetMem16 PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosw
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm new file mode 100644 index 0000000000..18b77ce183 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.Asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemSetMem32 PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosd
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm new file mode 100644 index 0000000000..3f6f3ecf9d --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.Asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemSetMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ mov [edi + ecx*4 - 8], eax
+ mov [edi + ecx*4 - 4], edx
+ loop @B
+ mov eax, edi
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm new file mode 100644 index 0000000000..f892250d16 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.Asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalMemZeroMem PROC USES edi
+ xor eax, eax
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edx, ecx
+ shr ecx, 2
+ and edx, 3
+ push edi
+ rep stosd
+ mov ecx, edx
+ rep stosb
+ pop eax
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/build.xml b/MdePkg/Library/BaseMemoryLibRepStr/build.xml new file mode 100644 index 0000000000..cc6423b839 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseMemoryLibRepStr"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseMemoryLibRepStr"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseMemoryLibRepStr">
+ <GenBuild baseName="BaseMemoryLibRepStr" mbdFilename="${MODULE_DIR}\BaseMemoryLibRepStr.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibRepStr.msa"/>
+ </target>
+ <target depends="BaseMemoryLibRepStr_clean" name="clean"/>
+ <target depends="BaseMemoryLibRepStr_cleanall" name="cleanall"/>
+ <target name="BaseMemoryLibRepStr_clean">
+ <OutputDirSetup baseName="BaseMemoryLibRepStr" mbdFilename="${MODULE_DIR}\BaseMemoryLibRepStr.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibRepStr.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibRepStr_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibRepStr_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseMemoryLibRepStr_cleanall">
+ <OutputDirSetup baseName="BaseMemoryLibRepStr" mbdFilename="${MODULE_DIR}\BaseMemoryLibRepStr.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibRepStr.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibRepStr_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibRepStr_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseMemoryLibRepStr*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/CompareMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/CompareMem.asm new file mode 100644 index 0000000000..b8e289bb27 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/CompareMem.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemCompareMem PROC USES rsi rdi
+ mov rsi, rcx
+ mov rdi, rdx
+ mov rcx, r8
+ repe cmpsb
+ movzx rax, byte ptr [rsi - 1]
+ movzx rdx, byte ptr [rdi - 1]
+ sub rax, rdx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/CopyMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/CopyMem.asm new file mode 100644 index 0000000000..43630715cb --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/CopyMem.asm @@ -0,0 +1,52 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.Asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemCopyMem PROC USES rsi rdi
+ mov rsi, rdx ; rsi <- Source
+ mov rdi, rcx ; rdi <- Destination
+ lea r9, [rdi + r8 - 1] ; r9 <- End of Destination
+ cmp rsi, rdi
+ mov rax, rdi ; rax <- Destination as return value
+ jae @F
+ cmp r9, rsi
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ mov rcx, r8
+ and r8, 7
+ shr rcx, 3
+ rep movsq ; Copy as many Qwords as possible
+ jmp @CopyBytes
+@CopyBackward:
+ mov rdi, r9 ; rdi <- End of Destination
+ lea rsi, [rsi + r8 - 1] ; esi <- End of Source
+ std ; set direction flag
+@CopyBytes:
+ mov rcx, r8
+ rep movsb ; Copy bytes backward
+ cld
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem16.asm new file mode 100644 index 0000000000..6af88fae5b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem16.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem16 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasw
+ lea rax, [rdi - 2]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem32.asm new file mode 100644 index 0000000000..f9c9feb00e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem32.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem32 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasd
+ lea rax, [rdi - 4]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem64.asm new file mode 100644 index 0000000000..2f286c9e2f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem64.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem64 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasq
+ lea rax, [rdi - 8]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem8.asm new file mode 100644 index 0000000000..4027ece768 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/ScanMem8.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem8 PROC USES rdi
+ mov rdi, rcx
+ mov rcx, rdx
+ mov rax, r8
+ repne scasb
+ lea rax, [rdi - 1]
+ cmovnz rax, rcx ; set rax to 0 if not found
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem.asm new file mode 100644 index 0000000000..b9108c750e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.Asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemSetMem PROC USES rdi
+ mov rax, r8
+ mov rdi, rcx
+ xchg rcx, rdx
+ rep stosb
+ mov rax, rdx
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem16.asm new file mode 100644 index 0000000000..3a9fd47fc3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem16.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.Asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemSetMem16 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ xchg rcx, rdx
+ rep stosw
+ mov rax, rdx
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem32.asm new file mode 100644 index 0000000000..2020d19065 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem32.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.Asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemSetMem32 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ xchg rcx, rdx
+ rep stosd
+ mov rax, rdx
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem64.asm new file mode 100644 index 0000000000..70ca4fb75a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/SetMem64.asm @@ -0,0 +1,35 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.Asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemSetMem64 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ xchg rcx, rdx
+ rep stosq
+ mov rax, rdx
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/x64/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/x64/ZeroMem.asm new file mode 100644 index 0000000000..c18a2e27c1 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/x64/ZeroMem.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.Asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemZeroMem PROC USES rdi
+ push rcx
+ xor rax, rax
+ mov rdi, rcx
+ mov rcx, rdx
+ shr rcx, 3
+ and rdx, 7
+ rep stosq
+ mov ecx, edx
+ rep stosb
+ pop rax
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.mbd b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.mbd new file mode 100644 index 0000000000..346968572a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseMemoryLibSse2</BaseName>
+ <Guid>65a18235-5096-4032-8c63-214f0249ce8d</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 13:46</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa new file mode 100644 index 0000000000..6336f58b85 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa @@ -0,0 +1,73 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseMemoryLibSse2</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>65a18235-5096-4032-8c63-214f0249ce8d</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 13:46</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>Ia32\CopyMem.asm</Filename>
+ <Filename>Ia32\SetMem.asm</Filename>
+ <Filename>Ia32\SetMem16.asm</Filename>
+ <Filename>Ia32\SetMem32.asm</Filename>
+ <Filename>Ia32\SetMem64.asm</Filename>
+ <Filename>Ia32\ZeroMem.asm</Filename>
+ <Filename>Ia32\CompareMem.asm</Filename>
+ <Filename>Ia32\ScanMem8.asm</Filename>
+ <Filename>Ia32\ScanMem16.asm</Filename>
+ <Filename>Ia32\ScanMem32.asm</Filename>
+ <Filename>Ia32\ScanMem64.asm</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ <Filename>x64\CopyMem.asm</Filename>
+ <Filename>x64\SetMem.asm</Filename>
+ <Filename>x64\SetMem16.asm</Filename>
+ <Filename>x64\SetMem32.asm</Filename>
+ <Filename>x64\SetMem64.asm</Filename>
+ <Filename>x64\ZeroMem.asm</Filename>
+ <Filename>x64\CompareMem.asm</Filename>
+ <Filename>x64\ScanMem8.asm</Filename>
+ <Filename>x64\ScanMem16.asm</Filename>
+ <Filename>x64\ScanMem32.asm</Filename>
+ <Filename>x64\ScanMem64.asm</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/build.xml b/MdePkg/Library/BaseMemoryLibSse2/build.xml new file mode 100644 index 0000000000..39482b0bfa --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseMemoryLibSse2"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseMemoryLibSse2"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseMemoryLibSse2">
+ <GenBuild baseName="BaseMemoryLibSse2" mbdFilename="${MODULE_DIR}\BaseMemoryLibSse2.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibSse2.msa"/>
+ </target>
+ <target depends="BaseMemoryLibSse2_clean" name="clean"/>
+ <target depends="BaseMemoryLibSse2_cleanall" name="cleanall"/>
+ <target name="BaseMemoryLibSse2_clean">
+ <OutputDirSetup baseName="BaseMemoryLibSse2" mbdFilename="${MODULE_DIR}\BaseMemoryLibSse2.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibSse2.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibSse2_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibSse2_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseMemoryLibSse2_cleanall">
+ <OutputDirSetup baseName="BaseMemoryLibSse2" mbdFilename="${MODULE_DIR}\BaseMemoryLibSse2.mbd" msaFilename="${MODULE_DIR}\BaseMemoryLibSse2.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseMemoryLibSse2_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseMemoryLibSse2_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseMemoryLibSse2*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/CompareMem.asm new file mode 100644 index 0000000000..4e35d1c858 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/CompareMem.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemCompareMem PROC USES esi edi
+ mov esi, [esp + 12]
+ mov edi, [esp + 16]
+ mov ecx, [esp + 20]
+ repe cmpsb
+ movzx eax, byte ptr [esi - 1]
+ movzx edx, byte ptr [edi - 1]
+ sub eax, edx
+ sub eax, edx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/CopyMem.asm new file mode 100644 index 0000000000..6127cc2188 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/CopyMem.asm @@ -0,0 +1,84 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_CopyMem (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemCopyMem PROC USES esi edi
+ mov esi, [esp + 16] ; esi <- Source
+ mov edi, [esp + 12] ; edi <- Destination
+ mov edx, [esp + 20] ; edx <- Count
+ lea eax, [edi + edx - 1] ; eax <- End of Destination
+ cmp esi, edi
+ jae @F
+ cmp eax, esi ; Overlapped?
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx ; edx <- remaining bytes to copy
+ rep movsb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4 ; ecx <- # of DQwords to copy
+ jz @CopyBytes
+ add esp, -16
+ movdqu [esp], xmm0 ; save xmm0
+@@:
+ movdqu xmm0, [esi] ; esi may not be 16-bytes aligned
+ movntdq [edi], xmm0 ; edi should be 16-bytes aligned
+ add esi, 16
+ add edi, 16
+ loop @B
+ mfence
+ movdqu xmm0, [esp] ; restore xmm0
+ add esp, 16 ; stack cleanup
+ jmp @CopyBytes
+@CopyBackward:
+ mov edi, eax ; edi <- Last byte in Destination
+ lea esi, [esi + edx - 1] ; esi <- Last byte in Source
+ std
+@CopyBytes:
+ mov ecx, edx
+ rep movsb
+ cld
+ mov eax, [esp + 12] ; eax <- Destination as return value
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem16.asm new file mode 100644 index 0000000000..7071942ede --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem16.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem16 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasw
+ lea eax, [edi - 2]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem32.asm new file mode 100644 index 0000000000..e6aaf02bc3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem32.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem32 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasd
+ lea eax, [edi - 4]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem64.asm new file mode 100644 index 0000000000..f9725a4a5d --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem64.asm @@ -0,0 +1,53 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ cmp eax, [edi]
+ lea edi, [edi + 8]
+ loopne @B
+ jne @F
+ cmp edx, [edi - 4]
+ jecxz @F
+ jne @B
+@@:
+ lea eax, [edi - 8]
+ cmovne eax, ecx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem8.asm new file mode 100644 index 0000000000..6ae1900189 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/ScanMem8.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+InternalMemScanMem8 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov al, [esp + 16]
+ repne scasb
+ lea eax, [edi - 1]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem.asm new file mode 100644 index 0000000000..62b10cff0a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem.asm @@ -0,0 +1,74 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem PROC USES edi
+ mov edx, [esp + 12] ; edx <- Count
+ mov edi, [esp + 8] ; edi <- Buffer
+ mov al, [esp + 16] ; al <- Value
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4 ; ecx <- # of DQwords to set
+ jz @SetBytes
+ mov ah, al ; ax <- Value | (Value << 8)
+ add esp, -16
+ movdqu [esp], xmm0 ; save xmm0
+ movd xmm0, eax
+ pshuflw xmm0, xmm0, 0 ; xmm0[0..63] <- Value repeats 8 times
+ movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
+@@:
+ movntdq [edi], xmm0 ; edi should be 16-byte aligned
+ add edi, 16
+ loop @B
+ mfence
+ movdqu xmm0, [esp] ; restore xmm0
+ add esp, 16 ; stack cleanup
+@SetBytes:
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8] ; eax <- Buffer as return value
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem16.asm new file mode 100644 index 0000000000..3fabb00d31 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem16.asm @@ -0,0 +1,70 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem16 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT16 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem16 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ mov eax, [esp + 16]
+ jz @F
+ shr ecx, 1
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosw
+@@:
+ mov ecx, edx
+ and edx, 7
+ shr ecx, 3
+ jz @SetWords
+ movd xmm0, eax
+ pshuflw xmm0, xmm0, 0
+ movlhps xmm0, xmm0
+@@:
+ movntdq [edi], xmm0 ; edi should be 16-byte aligned
+ add edi, 16
+ loop @B
+ mfence
+@SetWords:
+ mov ecx, edx
+ rep stosw
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem32.asm new file mode 100644 index 0000000000..a7f1f0e127 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem32.asm @@ -0,0 +1,69 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem32 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT32 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem32 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ mov eax, [esp + 16]
+ jz @F
+ shr ecx, 2
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosd
+@@:
+ mov ecx, edx
+ and edx, 3
+ shr ecx, 2
+ jz @SetDwords
+ movd xmm0, eax
+ pshufd xmm0, xmm0, 0
+@@:
+ movntdq [edi], xmm0
+ add edi, 16
+ loop @B
+ mfence
+@SetDwords:
+ mov ecx, edx
+ rep stosd
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem64.asm new file mode 100644 index 0000000000..1ddc7ea191 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/SetMem64.asm @@ -0,0 +1,63 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem64 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT64 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ test edi, 8
+ DB 0f2h, 0fh, 12h, 44h, 24h, 16 ; movddup xmm0, [esp + 16]
+ jz @F
+ movq [edi], xmm0
+ add edi, 8
+ dec ecx
+@@:
+ mov edx, ecx
+ shr ecx, 1
+ jz @SetQwords
+@@:
+ movntdq [edi], xmm0
+ add edi, 16
+ loop @B
+ mfence
+@SetQwords:
+ test dl, 1
+ jz @F
+ movq [edi], xmm0
+@@:
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibSse2/ia32/ZeroMem.asm new file mode 100644 index 0000000000..b532382e2e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ia32/ZeroMem.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_ZeroMem (
+; IN VOID *Buffer,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemZeroMem PROC USES edi
+ mov edi, [esp + 8]
+ mov edx, [esp + 12]
+ xor ecx, ecx
+ sub ecx, edi
+ xor eax, eax
+ and ecx, 15
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4
+ jz @ZeroBytes
+ pxor xmm0, xmm0
+@@:
+ movntdq [edi], xmm0
+ add edi, 16
+ loop @B
+ mfence
+@ZeroBytes:
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8]
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/CompareMem.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/CompareMem.asm new file mode 100644 index 0000000000..b8e289bb27 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/CompareMem.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemCompareMem PROC USES rsi rdi
+ mov rsi, rcx
+ mov rdi, rdx
+ mov rcx, r8
+ repe cmpsb
+ movzx rax, byte ptr [rsi - 1]
+ movzx rdx, byte ptr [rdi - 1]
+ sub rax, rdx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/CopyMem.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/CopyMem.asm new file mode 100644 index 0000000000..955cd25f36 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/CopyMem.asm @@ -0,0 +1,78 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_CopyMem (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemCopyMem PROC USES rsi rdi
+ mov rsi, rdx ; rsi <- Source
+ mov rdi, rcx ; rdi <- Destination
+ lea r9, [rdi + r8 - 1] ; r9 <- Last byte of Destination
+ cmp rsi, rdi
+ mov rax, rdi ; rax <- Destination as return value
+ jae @F ; Copy forward if Source > Destination
+ cmp r9, rsi ; Overlapped?
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ xor rcx, rcx
+ sub rcx, rdi ; rcx <- -rdi
+ and rcx, 15 ; rcx + rsi should be 16 bytes aligned
+ jz @F ; skip if rcx == 0
+ cmp rcx, r8
+ cmova rcx, r8
+ sub r8, rcx
+ rep movsb
+@@:
+ mov rcx, r8
+ and r8, 15
+ shr rcx, 4 ; rcx <- # of DQwords to copy
+ jz @CopyBytes
+ movdqa [rsp + 18h], xmm0 ; save xmm0 on stack
+@@:
+ movdqu xmm0, [rsi] ; rsi may not be 16-byte aligned
+ movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
+ add rsi, 16
+ add rdi, 16
+ loop @B
+ mfence
+ movdqa xmm0, [rsp + 18h] ; restore xmm0
+ jmp @CopyBytes ; copy remaining bytes
+@CopyBackward:
+ mov rdi, r9 ; rdi <- Last byte of Destination
+ lea rsi, [rsi + r8 - 1] ; rsi <- Last byte of Source
+ std
+@CopyBytes:
+ mov rcx, r8
+ rep movsb
+ cld
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem16.asm new file mode 100644 index 0000000000..6af88fae5b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem16.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem16 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasw
+ lea rax, [rdi - 2]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem32.asm new file mode 100644 index 0000000000..f9c9feb00e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem32.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem32 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasd
+ lea rax, [rdi - 4]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem64.asm new file mode 100644 index 0000000000..2f286c9e2f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem64.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem64 PROC USES rdi
+ mov rdi, rcx
+ mov rax, r8
+ mov rcx, rdx
+ repne scasq
+ lea rax, [rdi - 8]
+ cmovnz rax, rcx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem8.asm new file mode 100644 index 0000000000..4027ece768 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/ScanMem8.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+InternalMemScanMem8 PROC USES rdi
+ mov rdi, rcx
+ mov rcx, rdx
+ mov rax, r8
+ repne scasb
+ lea rax, [rdi - 1]
+ cmovnz rax, rcx ; set rax to 0 if not found
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem.asm new file mode 100644 index 0000000000..2aba207ab9 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem.asm @@ -0,0 +1,69 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem PROC USES rdi
+ mov rdi, rcx ; rdi <- Buffer
+ mov al, r8b ; al <- Value
+ mov r9, rdi ; r9 <- Buffer as return value
+ xor rcx, rcx
+ sub rcx, rdi
+ and rcx, 15 ; rcx + rdi aligns on 16-byte boundary
+ jz @F
+ cmp rcx, rdx
+ cmova rcx, rdx
+ sub rdx, rcx
+ rep stosb
+@@:
+ mov rcx, rdx
+ and rdx, 15
+ shr rcx, 4
+ jz @SetBytes
+ mov ah, al ; ax <- Value repeats twice
+ movdqa [rsp + 10h], xmm0 ; save xmm0
+ movd xmm0, eax ; xmm0[0..16] <- Value repeats twice
+ pshuflw xmm0, xmm0, 0 ; xmm0[0..63] <- Value repeats 8 times
+ movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
+@@:
+ movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
+ add rdi, 16
+ loop @B
+ mfence
+ movdqa xmm0, [rsp + 10h] ; restore xmm0
+@SetBytes:
+ mov ecx, edx ; high 32 bits of rcx are always zero
+ rep stosb
+ mov rax, r9 ; rax <- Return value
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem16.asm new file mode 100644 index 0000000000..a2f4d0e538 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem16.asm @@ -0,0 +1,67 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem16 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT16 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem16 PROC USES rdi
+ mov rdi, rcx
+ mov r9, rdi
+ xor rcx, rcx
+ sub rcx, rdi
+ and rcx, 15
+ mov rax, r8
+ jz @F
+ shr rcx, 1
+ cmp rcx, rdx
+ cmova rcx, rdx
+ sub rdx, rcx
+ rep stosw
+@@:
+ mov rcx, rdx
+ and edx, 7
+ shr rcx, 3
+ jz @SetWords
+ movd xmm0, eax
+ pshuflw xmm0, xmm0, 0
+ movlhps xmm0, xmm0
+@@:
+ movntdq [rdi], xmm0
+ add rdi, 16
+ loop @B
+ mfence
+@SetWords:
+ mov ecx, edx
+ rep stosw
+ mov rax, r9
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem32.asm new file mode 100644 index 0000000000..24207ec699 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem32.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem32 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem32 PROC USES rdi
+ mov rdi, rcx
+ mov r9, rdi
+ xor rcx, rcx
+ sub rcx, rdi
+ and rcx, 15
+ mov rax, r8
+ jz @F
+ shr rcx, 2
+ cmp rcx, rdx
+ cmova rcx, rdx
+ sub rdx, rcx
+ rep stosd
+@@:
+ mov rcx, rdx
+ and edx, 3
+ shr rcx, 2
+ jz @SetDwords
+ movd xmm0, eax
+ pshufd xmm0, xmm0, 0
+@@:
+ movntdq [rdi], xmm0
+ add rdi, 16
+ loop @B
+ mfence
+@SetDwords:
+ mov ecx, edx
+ rep stosd
+ mov rax, r9
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem64.asm new file mode 100644 index 0000000000..8b33386ad0 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/SetMem64.asm @@ -0,0 +1,61 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_SetMem64 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem64 PROC USES rdi
+ mov rdi, rcx
+ mov r9, rcx
+ test cl, 8
+ jz @F
+ mov [rdi], r8
+ add rdi, 8
+ dec rdx
+@@:
+ mov rcx, rdx
+ shr rcx, 1
+ jz @SetQwords
+ movd xmm0, r8
+ movlhps xmm0, xmm0
+@@:
+ movntdq [rdi], xmm0
+ add rdi, 16
+ loop @B
+ mfence
+@SetQwords:
+ test dl, 1
+ jz @F
+ mov [rdi], r8
+@@:
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/x64/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibSse2/x64/ZeroMem.asm new file mode 100644 index 0000000000..6d0f99ba94 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/x64/ZeroMem.asm @@ -0,0 +1,63 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; _mem_ZeroMem (
+; IN VOID *Buffer,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemZeroMem PROC USES rdi
+ mov rdi, rcx
+ xor rcx, rcx
+ xor eax, eax
+ sub rcx, rdi
+ and rcx, 15
+ mov r8, rdi
+ jz @F
+ cmp rcx, rdx
+ cmova rcx, rdx
+ sub rdx, rcx
+ rep stosb
+@@:
+ mov rcx, rdx
+ and edx, 15
+ shr rcx, 4
+ jz @ZeroBytes
+ pxor xmm0, xmm0
+@@:
+ movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
+ add rdi, 16
+ loop @B
+ mfence
+@ZeroBytes:
+ mov ecx, edx
+ rep stosb
+ mov rax, r8
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.mbd b/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.mbd new file mode 100644 index 0000000000..695b32e958 --- /dev/null +++ b/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePcdLibNull</BaseName>
+ <Guid>40096a3a-5c2a-4fbc-aef7-5475dd7ab334</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-31 10:50</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.msa b/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.msa new file mode 100644 index 0000000000..5768d45a49 --- /dev/null +++ b/MdePkg/Library/BasePcdLibNull/BasePcdLibNull.msa @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePcdLibNull</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>40096a3a-5c2a-4fbc-aef7-5475dd7ab334</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Abstract>NULL PCD Library</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-03-31 10:50</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PcdLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePcdLibNull/PcdLib.c b/MdePkg/Library/BasePcdLibNull/PcdLib.c new file mode 100644 index 0000000000..6c01017024 --- /dev/null +++ b/MdePkg/Library/BasePcdLibNull/PcdLib.c @@ -0,0 +1,734 @@ +/** @file
+ A emptry template implementation of PCD Library.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PcdLib.c
+
+**/
+
+
+
+/**
+ Sets the current SKU in the PCD database to the value specified by SkuId. SkuId is returned.
+
+ @param[in] SkuId The SKU value that will be used when the PCD service will retrieve and
+ set values associated with a PCD token.
+
+ @retval UINTN Return the SKU ID that just be set.
+
+**/
+UINTN
+EFIAPI
+LibPcdSetSku (
+ IN UINTN SkuId
+ )
+{
+ return SkuId;
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Returns the 8-bit value for the token specified by TokenNumber.
+
+**/
+UINT8
+EFIAPI
+LibPcdGet8 (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Returns the 16-bit value for the token specified by TokenNumber.
+
+**/
+UINT16
+EFIAPI
+LibPcdGet16 (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Returns the 32-bit value for the token specified by TokenNumber.
+
+**/
+UINT32
+EFIAPI
+LibPcdGet32 (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Returns the 64-bit value for the token specified by TokenNumber.
+
+**/
+UINT64
+EFIAPI
+LibPcdGet64 (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the pointer to the buffer of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Returns the pointer to the token specified by TokenNumber.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetPtr (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Returns the Boolean value of the token specified by TokenNumber.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetBool (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Returns the size of the token specified by TokenNumber.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetSize (
+ IN UINTN TokenNumber
+ )
+{
+ return 0;
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Return the UINT8.
+
+**/
+UINT8
+EFIAPI
+LibPcdGetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Return the UINT16.
+
+**/
+UINT16
+EFIAPI
+LibPcdGetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Return the UINT32.
+
+**/
+UINT32
+EFIAPI
+LibPcdGetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Return the UINT64.
+
+**/
+UINT64
+EFIAPI
+LibPcdGetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the pointer to the buffer of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Return the VOID* pointer.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Return the BOOLEAN.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Return the size.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetExSize (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return 0;
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSet8 (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT16 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSet16 (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSet32 (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSet64 (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber to
+ the value specified by Value. Value is returned.
+ If Value is NULL, then ASSERT().
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value A pointer to the buffer to set.
+
+ @retval VOID* Return the pointer for the buffer been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetPtr (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ ASSERT (Value != NULL);
+ //
+ // Remove the CONST
+ //
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The boolean value to set.
+
+ @retval BOOLEAN Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetBool (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ return Value;
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+ If Value is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval VOID * Return the value been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ //
+ // Remove the CONST
+ //
+ ASSERT (Guid != NULL);
+ ASSERT (Value != NULL);
+
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The Boolean value to set.
+
+ @retval Boolean Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return Value;
+}
+
+
+
+/**
+ When the token specified by TokenNumber and Guid is set,
+ then notification function specified by NotificationFunction is called.
+ If Guid is NULL, then the default token space is used.
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates which
+ namespace to set a value from. If NULL, then the default
+ token space is used.
+ @param[in] TokenNumber The PCD token number to monitor.
+ @param[in] NotificationFunction The function to call when the token
+ specified by Guid and TokenNumber is set.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCallbackOnSet (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ ASSERT (NotificationFunction != NULL);
+}
+
+
+
+/**
+ Disable a notification function that was established with LibPcdCallbackonSet().
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Specify the GUID token space.
+ @param[in] TokenNumber Specify the token number.
+ @param[in] NotificationFunction The callback function to be unregistered.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCancelCallback (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ ASSERT (NotificationFunction != NULL);
+}
+
+
+
+/**
+ Retrieves the next PCD token number from the token space specified by Guid.
+ If Guid is NULL, then the default token space is used. If TokenNumber is 0,
+ then the first token number is returned. Otherwise, the token number that
+ follows TokenNumber in the token space is returned. If TokenNumber is the last
+ token number in the token space, then 0 is returned. If TokenNumber is not 0 and
+ is not in the token space specified by Guid, then ASSERT().
+
+ @param[in] Pointer to a 128-bit unique value that designates which namespace
+ to set a value from. If NULL, then the default token space is used.
+ @param[in] The previous PCD token number. If 0, then retrieves the first PCD
+ token number.
+
+ @retval UINTN The next valid token number.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetNextToken (
+ IN CONST GUID *Guid, OPTIONAL
+ IN OUT UINTN *TokenNumber
+ )
+{
+ return 0;
+}
diff --git a/MdePkg/Library/BasePcdLibNull/build.xml b/MdePkg/Library/BasePcdLibNull/build.xml new file mode 100644 index 0000000000..2e4e22b070 --- /dev/null +++ b/MdePkg/Library/BasePcdLibNull/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePcdLibNull"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePcdLibNull"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePcdLibNull">
+ <GenBuild baseName="BasePcdLibNull" mbdFilename="${MODULE_DIR}\BasePcdLibNull.mbd" msaFilename="${MODULE_DIR}\BasePcdLibNull.msa"/>
+ </target>
+ <target depends="BasePcdLibNull_clean" name="clean"/>
+ <target depends="BasePcdLibNull_cleanall" name="cleanall"/>
+ <target name="BasePcdLibNull_clean">
+ <OutputDirSetup baseName="BasePcdLibNull" mbdFilename="${MODULE_DIR}\BasePcdLibNull.mbd" msaFilename="${MODULE_DIR}\BasePcdLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePcdLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePcdLibNull_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePcdLibNull_cleanall">
+ <OutputDirSetup baseName="BasePcdLibNull" mbdFilename="${MODULE_DIR}\BasePcdLibNull.mbd" msaFilename="${MODULE_DIR}\BasePcdLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePcdLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePcdLibNull_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePcdLibNull*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.mbd b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.mbd new file mode 100644 index 0000000000..f05ef61e26 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePciCf8Lib</BaseName>
+ <Guid>472ab06d-9810-4c00-bb7f-dad1828fc1ab</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa new file mode 100644 index 0000000000..6ffbf8a0b1 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePciCf8Lib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>472ab06d-9810-4c00-bb7f-dad1828fc1ab</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PciCf8Lib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePciCf8Lib/PciLib.c b/MdePkg/Library/BasePciCf8Lib/PciLib.c new file mode 100644 index 0000000000..c5880bdeee --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/PciLib.c @@ -0,0 +1,1431 @@ +/** @file
+ PCI Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+//
+// Declare I/O Ports used to perform PCI Confguration Cycles
+//
+#define PCI_CONFIGURATION_ADDRESS_PORT 0xCF8
+#define PCI_CONFIGURATION_DATA_PORT 0xCFC
+
+//
+// Declare macro to convert PCI Library formatted address to CF8 formatted address
+//
+// PCI Library formatted address CF8 Formatted Address
+// ============================= ======================
+// Bits 00..11 Register Bits 00..07 Register
+// Bits 12..14 Function Bits 08..10 Function
+// Bits 15..19 Device Bits 11..15 Device
+// Bits 20..27 Bus Bits 16..23 Bus
+// Bits 28..31 Reserved(MBZ) Bits 24..30 Reserved(MBZ)
+// Bits 31..31 Must be 1
+//
+
+/**
+ Assert the validity of a PCI address. A valid PCI address should contain 1's
+ only in the low 28 bits.
+
+ @param A The address to validate.
+ @param M Additional bits to assert to be zero.
+
+**/
+#define ASSERT_INVALID_PCI_ADDRESS(A,M) \
+ ASSERT (((A) & (~0xffff0ff | (M))) == 0)
+
+/**
+ Convert a PCI Express address to PCI CF8 address.
+
+ @param A The address to convert.
+
+ @retval The coverted address.
+
+**/
+#define PCI_TO_CF8_ADDRESS(A) \
+ ((UINT32)(((A) >> 4) | ((A) & 0xfc) | 0x80000000))
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Read8 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Write8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Or8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8And8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8AndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAndThenOr8(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Read16 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Write16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Or16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8And16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8AndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAndThenOr16(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Read32 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead32 (PCI_CONFIGURATION_DATA_PORT);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Write32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Or32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8And32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8AndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAndThenOr32(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8ReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ UINTN EndAddress;
+
+ EndAddress = StartAddress + Size;
+
+ if (StartAddress < EndAddress && (StartAddress & 1)) {
+ //
+ // Read a byte if StartAddress is byte aligned
+ //
+ *(UINT8*)Buffer = PciCf8Read8 (StartAddress);
+ StartAddress += sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (StartAddress < EndAddress && (StartAddress & 2)) {
+ //
+ // Read a word if StartAddress is word aligned
+ //
+ *(UINT16*)Buffer = PciCf8Read16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (EndAddress - StartAddress >= 4) {
+ //
+ // Read as many double words as possible
+ //
+ *(UINT32*)Buffer = PciCf8Read32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if ((EndAddress & 2) != 0) {
+ //
+ // Read the last remaining word if exist
+ //
+ *(UINT16*)Buffer = PciCf8Read16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (EndAddress & 1) {
+ //
+ // Read the last remaining byte if exist
+ //
+ *(UINT8*)Buffer = PciCf8Read8 (StartAddress);
+ }
+
+ return Size;
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8WriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ UINTN EndAddress;
+
+ EndAddress = StartAddress + Size;
+
+ if ((StartAddress < EndAddress) && ((StartAddress & 1)!= 0)) {
+ //
+ // Write a byte if StartAddress is byte aligned
+ //
+ PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
+ StartAddress += sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (StartAddress < EndAddress && (StartAddress & 2)) {
+ //
+ // Write a word if StartAddress is word aligned
+ //
+ PciCf8Write16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (EndAddress - StartAddress >= 4) {
+ //
+ // Write as many double words as possible
+ //
+ PciCf8Write32 (StartAddress, *(UINT32*)Buffer);
+ StartAddress += sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (EndAddress & 2) {
+ //
+ // Write the last remaining word if exist
+ //
+ PciCf8Write16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (EndAddress & 1) {
+ //
+ // Write the last remaining byte if exist
+ //
+ PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
+ }
+
+ return Size;
+}
diff --git a/MdePkg/Library/BasePciCf8Lib/build.xml b/MdePkg/Library/BasePciCf8Lib/build.xml new file mode 100644 index 0000000000..fdf000bbbd --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePciCf8Lib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePciCf8Lib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePciCf8Lib">
+ <GenBuild baseName="BasePciCf8Lib" mbdFilename="${MODULE_DIR}\BasePciCf8Lib.mbd" msaFilename="${MODULE_DIR}\BasePciCf8Lib.msa"/>
+ </target>
+ <target depends="BasePciCf8Lib_clean" name="clean"/>
+ <target depends="BasePciCf8Lib_cleanall" name="cleanall"/>
+ <target name="BasePciCf8Lib_clean">
+ <OutputDirSetup baseName="BasePciCf8Lib" mbdFilename="${MODULE_DIR}\BasePciCf8Lib.mbd" msaFilename="${MODULE_DIR}\BasePciCf8Lib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciCf8Lib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciCf8Lib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePciCf8Lib_cleanall">
+ <OutputDirSetup baseName="BasePciCf8Lib" mbdFilename="${MODULE_DIR}\BasePciCf8Lib.mbd" msaFilename="${MODULE_DIR}\BasePciCf8Lib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciCf8Lib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciCf8Lib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePciCf8Lib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.mbd b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.mbd new file mode 100644 index 0000000000..a7051c285a --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePciExpressLib</BaseName>
+ <Guid>287e50f4-a188-4699-b907-3e4080ca5688</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa new file mode 100644 index 0000000000..dd071189dc --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePciExpressLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>287e50f4-a188-4699-b907-3e4080ca5688</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PciExpressLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePciExpressLib/PciLib.c b/MdePkg/Library/BasePciExpressLib/PciLib.c new file mode 100644 index 0000000000..a3dab38ec3 --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/PciLib.c @@ -0,0 +1,1328 @@ +/** @file
+ PCI Library.
+
+ Functions in this library instance make use of MMIO functions in IoLib to
+ access memory mapped PCI configuration space.
+
+ All assertions for I/O operations are handled in MMIO functions in the IoLib
+ Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+/**
+ Assert the validity of a PCI address. A valid PCI address should contain 1's
+ only in the low 28 bits.
+
+ @param A The address to validate.
+
+**/
+#define ASSERT_INVALID_PCI_ADDRESS(A) \
+ ASSERT (((A) & ~0xfffffff) == 0)
+
+
+UINTN
+EFIAPI
+GetPciExpressBaseAddress (
+ VOID
+ )
+{
+ /// @bug Change this to a PCD Get call to retrieve the PCI-E Base Address
+ return 0xc0000000;
+}
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressRead8 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead8 (GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite8 (GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr8 (GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd8 (GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr8 (
+ GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead8 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite8 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr8 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd8 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr8 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressRead16 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead16 (GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite16 (GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr16 (GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd16 (GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr16 (
+ GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead16 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite16 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr16 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd16 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr16 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressRead32 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead32 (GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite32 (GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr32 (GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd32 (GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr32 (
+ GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead32 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite32 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr32 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd32 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr32 (
+ GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ UINTN EndAddress;
+
+ EndAddress = StartAddress + Size;
+
+ if (StartAddress < EndAddress && (StartAddress & 1)) {
+ //
+ // Read a byte if StartAddress is byte aligned
+ //
+ *(UINT8*)Buffer = PciExpressRead8 (StartAddress);
+ StartAddress += sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (StartAddress < EndAddress && (StartAddress & 2)) {
+ //
+ // Read a word if StartAddress is word aligned
+ //
+ *(UINT16*)Buffer = PciExpressRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (EndAddress - StartAddress >= 4) {
+ //
+ // Read as many double words as possible
+ //
+ *(UINT32*)Buffer = PciExpressRead32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if ((EndAddress & 2) != 0) {
+ //
+ // Read the last remaining word if exist
+ //
+ *(UINT16*)Buffer = PciExpressRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (EndAddress & 1) {
+ //
+ // Read the last remaining byte if exist
+ //
+ *(UINT8*)Buffer = PciExpressRead8 (StartAddress);
+ }
+
+ return Size;
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ UINTN EndAddress;
+
+ EndAddress = StartAddress + Size;
+
+ if ((StartAddress < EndAddress) && ((StartAddress & 1)!= 0)) {
+ //
+ // Write a byte if StartAddress is byte aligned
+ //
+ PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
+ StartAddress += sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (StartAddress < EndAddress && (StartAddress & 2)) {
+ //
+ // Write a word if StartAddress is word aligned
+ //
+ PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (EndAddress - StartAddress >= 4) {
+ //
+ // Write as many double words as possible
+ //
+ PciExpressWrite32 (StartAddress, *(UINT32*)Buffer);
+ StartAddress += sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (EndAddress & 2) {
+ //
+ // Write the last remaining word if exist
+ //
+ PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (EndAddress & 1) {
+ //
+ // Write the last remaining byte if exist
+ //
+ PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
+ }
+
+ return Size;
+}
diff --git a/MdePkg/Library/BasePciExpressLib/build.xml b/MdePkg/Library/BasePciExpressLib/build.xml new file mode 100644 index 0000000000..576b73207a --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePciExpressLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePciExpressLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePciExpressLib">
+ <GenBuild baseName="BasePciExpressLib" mbdFilename="${MODULE_DIR}\BasePciExpressLib.mbd" msaFilename="${MODULE_DIR}\BasePciExpressLib.msa"/>
+ </target>
+ <target depends="BasePciExpressLib_clean" name="clean"/>
+ <target depends="BasePciExpressLib_cleanall" name="cleanall"/>
+ <target name="BasePciExpressLib_clean">
+ <OutputDirSetup baseName="BasePciExpressLib" mbdFilename="${MODULE_DIR}\BasePciExpressLib.mbd" msaFilename="${MODULE_DIR}\BasePciExpressLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciExpressLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciExpressLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePciExpressLib_cleanall">
+ <OutputDirSetup baseName="BasePciExpressLib" mbdFilename="${MODULE_DIR}\BasePciExpressLib.mbd" msaFilename="${MODULE_DIR}\BasePciExpressLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciExpressLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciExpressLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePciExpressLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.mbd b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.mbd new file mode 100644 index 0000000000..b908388955 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePciLibCf8</BaseName>
+ <Guid>28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa new file mode 100644 index 0000000000..808a82bd76 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePciLibCf8</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PciLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PciCf8Lib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePciLibCf8/PciLib.c b/MdePkg/Library/BasePciLibCf8/PciLib.c new file mode 100644 index 0000000000..3a41809dbd --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/PciLib.c @@ -0,0 +1,1070 @@ +/** @file
+ PCI Library using Port CF8/CFC access.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciRead8 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read8 (Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ )
+{
+ return PciCf8Write8 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8Or8 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return PciCf8And8 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8AndThenOr8 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead8 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return PciCf8BitFieldWrite8 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8BitFieldOr8 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return PciCf8BitFieldAnd8 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciRead16 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read16 (Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ )
+{
+ return PciCf8Write16 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8Or16 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return PciCf8And16 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8AndThenOr16 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead16 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return PciCf8BitFieldWrite16 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8BitFieldOr16 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return PciCf8BitFieldAnd16 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciRead32 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read32 (Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ )
+{
+ return PciCf8Write32 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8Or32 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return PciCf8And32 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8AndThenOr32 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead32 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return PciCf8BitFieldWrite32 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8BitFieldOr32 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return PciCf8BitFieldAnd32 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ return PciCf8ReadBuffer (StartAddress, Size, Buffer);
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ return PciCf8WriteBuffer (StartAddress, Size, Buffer);
+}
diff --git a/MdePkg/Library/BasePciLibCf8/build.xml b/MdePkg/Library/BasePciLibCf8/build.xml new file mode 100644 index 0000000000..3e59bd0642 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePciLibCf8"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePciLibCf8"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePciLibCf8">
+ <GenBuild baseName="BasePciLibCf8" mbdFilename="${MODULE_DIR}\BasePciLibCf8.mbd" msaFilename="${MODULE_DIR}\BasePciLibCf8.msa"/>
+ </target>
+ <target depends="BasePciLibCf8_clean" name="clean"/>
+ <target depends="BasePciLibCf8_cleanall" name="cleanall"/>
+ <target name="BasePciLibCf8_clean">
+ <OutputDirSetup baseName="BasePciLibCf8" mbdFilename="${MODULE_DIR}\BasePciLibCf8.mbd" msaFilename="${MODULE_DIR}\BasePciLibCf8.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciLibCf8_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciLibCf8_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePciLibCf8_cleanall">
+ <OutputDirSetup baseName="BasePciLibCf8" mbdFilename="${MODULE_DIR}\BasePciLibCf8.mbd" msaFilename="${MODULE_DIR}\BasePciLibCf8.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciLibCf8_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciLibCf8_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePciLibCf8*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.mbd b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.mbd new file mode 100644 index 0000000000..c2caa74b26 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePciLibPciExpress</BaseName>
+ <Guid>8987081e-daeb-44a9-8bef-a195b22d9417</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa new file mode 100644 index 0000000000..f98049cb38 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePciLibPciExpress</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>8987081e-daeb-44a9-8bef-a195b22d9417</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PciLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PciExpressLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePciLibPciExpress/PciLib.c b/MdePkg/Library/BasePciLibPciExpress/PciLib.c new file mode 100644 index 0000000000..59bcd2dc0e --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/PciLib.c @@ -0,0 +1,1070 @@ +/** @file
+ PCI Library using PC Express access.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciRead8 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead8 (Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ )
+{
+ return PciExpressWrite8 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressOr8 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return PciExpressAnd8 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressAndThenOr8 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead8 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return PciExpressBitFieldWrite8 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressBitFieldOr8 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return PciExpressBitFieldAnd8 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciRead16 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead16 (Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ )
+{
+ return PciExpressWrite16 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressOr16 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return PciExpressAnd16 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressAndThenOr16 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead16 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return PciExpressBitFieldWrite16 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressBitFieldOr16 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return PciExpressBitFieldAnd16 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciRead32 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead32 (Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ )
+{
+ return PciExpressWrite32 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressOr32 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return PciExpressAnd32 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressAndThenOr32 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead32 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return PciExpressBitFieldWrite32 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressBitFieldOr32 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return PciExpressBitFieldAnd32 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ return PciExpressReadBuffer (StartAddress, Size, Buffer);
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ return PciExpressWriteBuffer (StartAddress, Size, Buffer);
+}
diff --git a/MdePkg/Library/BasePciLibPciExpress/build.xml b/MdePkg/Library/BasePciLibPciExpress/build.xml new file mode 100644 index 0000000000..162f29e06e --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePciLibPciExpress"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePciLibPciExpress"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePciLibPciExpress">
+ <GenBuild baseName="BasePciLibPciExpress" mbdFilename="${MODULE_DIR}\BasePciLibPciExpress.mbd" msaFilename="${MODULE_DIR}\BasePciLibPciExpress.msa"/>
+ </target>
+ <target depends="BasePciLibPciExpress_clean" name="clean"/>
+ <target depends="BasePciLibPciExpress_cleanall" name="cleanall"/>
+ <target name="BasePciLibPciExpress_clean">
+ <OutputDirSetup baseName="BasePciLibPciExpress" mbdFilename="${MODULE_DIR}\BasePciLibPciExpress.mbd" msaFilename="${MODULE_DIR}\BasePciLibPciExpress.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciLibPciExpress_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciLibPciExpress_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePciLibPciExpress_cleanall">
+ <OutputDirSetup baseName="BasePciLibPciExpress" mbdFilename="${MODULE_DIR}\BasePciLibPciExpress.mbd" msaFilename="${MODULE_DIR}\BasePciLibPciExpress.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePciLibPciExpress_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePciLibPciExpress_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePciLibPciExpress*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.mbd b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.mbd new file mode 100644 index 0000000000..8bb2641d77 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePeCoffGetEntryPointLib</BaseName>
+ <Guid>be490364-73d2-420d-950e-f6450ca75dfb</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004 - 2005, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa new file mode 100644 index 0000000000..7a619df39b --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePeCoffGetEntryPointLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>be490364-73d2-420d-950e-f6450ca75dfb</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the PEI library.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004 - 2005, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeCoffGetEntryPointLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeCoffGetEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c new file mode 100644 index 0000000000..d5ff7db009 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c @@ -0,0 +1,54 @@ +/** @file
+ Tiano PE/COFF loader.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffGetEntryPoint.c
+
+**/
+
+
+
+/**
+ Loads a PE/COFF image into memory.
+
+ @param Pe32Data Pointer to a PE/COFF Image
+
+ @param EntryPoint Pointer to the entry point of the PE/COFF image
+
+ @retval EFI_SUCCESS if the EntryPoint was returned
+ @retval EFI_INVALID_PARAMETER if the EntryPoint could not be found from Pe32Data
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderGetEntryPoint (
+ IN VOID *Pe32Data,
+ IN OUT VOID **EntryPoint
+ )
+{
+ EFI_IMAGE_DOS_HEADER *DosHeader;
+ EFI_IMAGE_NT_HEADERS *PeHeader;
+
+ DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
+ if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ //
+ // DOS image header is present, so read the PE header after the DOS image header
+ //
+ PeHeader = (EFI_IMAGE_NT_HEADERS *) ((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));
+ } else {
+ //
+ // DOS image header is not present, so PE header is at the image base
+ //
+ PeHeader = (EFI_IMAGE_NT_HEADERS *) Pe32Data;
+ }
+ *EntryPoint = (VOID *) ((UINTN) Pe32Data + (UINTN) (PeHeader->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
+ return RETURN_SUCCESS;
+}
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/build.xml b/MdePkg/Library/BasePeCoffGetEntryPointLib/build.xml new file mode 100644 index 0000000000..4d74c32630 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePeCoffGetEntryPointLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePeCoffGetEntryPointLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePeCoffGetEntryPointLib">
+ <GenBuild baseName="BasePeCoffGetEntryPointLib" mbdFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.msa"/>
+ </target>
+ <target depends="BasePeCoffGetEntryPointLib_clean" name="clean"/>
+ <target depends="BasePeCoffGetEntryPointLib_cleanall" name="cleanall"/>
+ <target name="BasePeCoffGetEntryPointLib_clean">
+ <OutputDirSetup baseName="BasePeCoffGetEntryPointLib" mbdFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePeCoffGetEntryPointLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePeCoffGetEntryPointLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePeCoffGetEntryPointLib_cleanall">
+ <OutputDirSetup baseName="BasePeCoffGetEntryPointLib" mbdFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffGetEntryPointLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePeCoffGetEntryPointLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePeCoffGetEntryPointLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePeCoffGetEntryPointLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c new file mode 100644 index 0000000000..c7f3354637 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c @@ -0,0 +1,1019 @@ +/** @file
+ Tiano PE/COFF loader.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLoader.c
+
+**/
+
+
+
+
+STATIC
+RETURN_STATUS
+PeCoffLoaderGetPeHeader (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ OUT EFI_IMAGE_NT_HEADERS *PeHdr,
+ OUT EFI_TE_IMAGE_HEADER *TeHdr
+ );
+
+STATIC
+RETURN_STATUS
+PeCoffLoaderCheckImageType (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ IN EFI_IMAGE_NT_HEADERS *PeHdr,
+ IN EFI_TE_IMAGE_HEADER *TeHdr
+ );
+
+STATIC
+VOID *
+PeCoffLoaderImageAddress (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ IN UINTN Address
+ );
+
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+ IN UINT16 *Reloc,
+ IN OUT CHAR8 *Fixup,
+ IN OUT CHAR8 **FixupData,
+ IN UINT64 Adjust
+ );
+
+
+
+/**
+ Retrieves the PE or TE Header from a PE/COFF or TE image.
+
+ @param ImageContext The context of the image being loaded.
+
+ @param PeHdr The buffer in which to return the PE header.
+
+ @param TeHdr The buffer in which to return the TE header.
+
+ @return
+ RETURN_SUCCESS if the PE or TE Header is read,
+ Otherwise, the error status from reading the PE/COFF or TE image using the ImageRead function.
+
+**/
+STATIC
+RETURN_STATUS
+PeCoffLoaderGetPeHeader (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ OUT EFI_IMAGE_NT_HEADERS *PeHdr,
+ OUT EFI_TE_IMAGE_HEADER *TeHdr
+ )
+{
+ RETURN_STATUS Status;
+ EFI_IMAGE_DOS_HEADER DosHdr;
+ UINTN Size;
+
+ ImageContext->IsTeImage = FALSE;
+ //
+ // Read the DOS image headers
+ //
+ Size = sizeof (EFI_IMAGE_DOS_HEADER);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ 0,
+ &Size,
+ &DosHdr
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+
+ ImageContext->PeCoffHeaderOffset = 0;
+ if (DosHdr.e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ //
+ // DOS image header is present, so read the PE header after the DOS image header
+ //
+ ImageContext->PeCoffHeaderOffset = DosHdr.e_lfanew;
+ }
+ //
+ // Read the PE/COFF Header
+ //
+ Size = sizeof (EFI_IMAGE_NT_HEADERS);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ ImageContext->PeCoffHeaderOffset,
+ &Size,
+ PeHdr
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+ //
+ // Check the PE/COFF Header Signature. If not, then try to read a TE header
+ //
+ if (PeHdr->Signature != EFI_IMAGE_NT_SIGNATURE) {
+ Size = sizeof (EFI_TE_IMAGE_HEADER);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ 0,
+ &Size,
+ TeHdr
+ );
+ if (TeHdr->Signature != EFI_TE_IMAGE_HEADER_SIGNATURE) {
+ return RETURN_UNSUPPORTED;
+ }
+
+ ImageContext->IsTeImage = TRUE;
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Checks the PE or TE header of a PE/COFF or TE image to determine if it supported.
+
+ @param ImageContext The context of the image being loaded.
+
+ @param PeHdr The buffer in which to return the PE header.
+
+ @param TeHdr The buffer in which to return the TE header.
+
+ @retval RETURN_SUCCESS if the PE/COFF or TE image is supported
+ @retval RETURN_UNSUPPORTED of the PE/COFF or TE image is not supported.
+
+**/
+STATIC
+RETURN_STATUS
+PeCoffLoaderCheckImageType (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ IN EFI_IMAGE_NT_HEADERS *PeHdr,
+ IN EFI_TE_IMAGE_HEADER *TeHdr
+ )
+{
+ //
+ // See if the machine type is supported. We support a native machine type (IA-32/Itanium-based)
+ // and the machine type for the Virtual Machine.
+ //
+ if (ImageContext->IsTeImage == FALSE) {
+ ImageContext->Machine = PeHdr->FileHeader.Machine;
+ } else {
+ ImageContext->Machine = TeHdr->Machine;
+ }
+
+ if (!(EFI_IMAGE_MACHINE_TYPE_SUPPORTED (ImageContext->Machine))) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_MACHINE_TYPE;
+ return RETURN_UNSUPPORTED;
+ }
+
+ //
+ // See if the image type is supported. We support EFI Applications,
+ // EFI Boot Service Drivers, and EFI Runtime Drivers.
+ //
+ if (ImageContext->IsTeImage == FALSE) {
+ ImageContext->ImageType = PeHdr->OptionalHeader.Subsystem;
+ } else {
+ ImageContext->ImageType = (UINT16) (TeHdr->Subsystem);
+ }
+
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Retrieves information on a PE/COFF image.
+
+ @param This Calling context
+ @param ImageContext The context of the image being loaded
+
+ @retval RETURN_SUCCESS The information on the PE/COFF image was collected.
+ @retval RETURN_INVALID_PARAMETER ImageContext is NULL.
+ @retval RETURN_UNSUPPORTED The PE/COFF image is not supported.
+ @retval Otherwise The error status from reading the PE/COFF image using the
+ ImageContext->ImageRead() function
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderGetImageInfo (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ RETURN_STATUS Status;
+ EFI_IMAGE_NT_HEADERS PeHdr;
+ EFI_TE_IMAGE_HEADER TeHdr;
+ EFI_IMAGE_DATA_DIRECTORY *DebugDirectoryEntry;
+ UINTN Size;
+ UINTN Index;
+ UINTN DebugDirectoryEntryRva;
+ UINTN DebugDirectoryEntryFileOffset;
+ UINTN SectionHeaderOffset;
+ EFI_IMAGE_SECTION_HEADER SectionHeader;
+ EFI_IMAGE_DEBUG_DIRECTORY_ENTRY DebugEntry;
+
+ if (NULL == ImageContext) {
+ return RETURN_INVALID_PARAMETER;
+ }
+ //
+ // Assume success
+ //
+ ImageContext->ImageError = IMAGE_ERROR_SUCCESS;
+
+ Status = PeCoffLoaderGetPeHeader (ImageContext, &PeHdr, &TeHdr);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+ //
+ // Verify machine type
+ //
+ Status = PeCoffLoaderCheckImageType (ImageContext, &PeHdr, &TeHdr);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+ //
+ // Retrieve the base address of the image
+ //
+ if (!(ImageContext->IsTeImage)) {
+ ImageContext->ImageAddress = PeHdr.OptionalHeader.ImageBase;
+ } else {
+ ImageContext->ImageAddress = (PHYSICAL_ADDRESS) (TeHdr.ImageBase);
+ }
+ //
+ // Initialize the alternate destination address to 0 indicating that it
+ // should not be used.
+ //
+ ImageContext->DestinationAddress = 0;
+
+ //
+ // Initialize the codeview pointer.
+ //
+ ImageContext->CodeView = NULL;
+ ImageContext->PdbPointer = NULL;
+
+ //
+ // Three cases with regards to relocations:
+ // - Image has base relocs, RELOCS_STRIPPED==0 => image is relocatable
+ // - Image has no base relocs, RELOCS_STRIPPED==1 => Image is not relocatable
+ // - Image has no base relocs, RELOCS_STRIPPED==0 => Image is relocatable but
+ // has no base relocs to apply
+ // Obviously having base relocations with RELOCS_STRIPPED==1 is invalid.
+ //
+ // Look at the file header to determine if relocations have been stripped, and
+ // save this info in the image context for later use.
+ //
+ if ((!(ImageContext->IsTeImage)) && ((PeHdr.FileHeader.Characteristics & EFI_IMAGE_FILE_RELOCS_STRIPPED) != 0)) {
+ ImageContext->RelocationsStripped = TRUE;
+ } else {
+ ImageContext->RelocationsStripped = FALSE;
+ }
+
+ if (!(ImageContext->IsTeImage)) {
+ ImageContext->ImageSize = (UINT64) PeHdr.OptionalHeader.SizeOfImage;
+ ImageContext->SectionAlignment = PeHdr.OptionalHeader.SectionAlignment;
+ ImageContext->SizeOfHeaders = PeHdr.OptionalHeader.SizeOfHeaders;
+
+ //
+ // Modify ImageSize to contain .PDB file name if required and initialize
+ // PdbRVA field...
+ //
+ if (PeHdr.OptionalHeader.NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_DEBUG) {
+ DebugDirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *) &(PeHdr.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG]);
+
+ DebugDirectoryEntryRva = DebugDirectoryEntry->VirtualAddress;
+
+ //
+ // Determine the file offset of the debug directory... This means we walk
+ // the sections to find which section contains the RVA of the debug
+ // directory
+ //
+ DebugDirectoryEntryFileOffset = 0;
+
+ SectionHeaderOffset = (UINTN)(
+ ImageContext->PeCoffHeaderOffset +
+ sizeof (UINT32) +
+ sizeof (EFI_IMAGE_FILE_HEADER) +
+ PeHdr.FileHeader.SizeOfOptionalHeader
+ );
+
+ for (Index = 0; Index < PeHdr.FileHeader.NumberOfSections; Index++) {
+ //
+ // Read section header from file
+ //
+ Size = sizeof (EFI_IMAGE_SECTION_HEADER);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ SectionHeaderOffset,
+ &Size,
+ &SectionHeader
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+
+ if (DebugDirectoryEntryRva >= SectionHeader.VirtualAddress &&
+ DebugDirectoryEntryRva < SectionHeader.VirtualAddress + SectionHeader.Misc.VirtualSize) {
+ DebugDirectoryEntryFileOffset =
+ DebugDirectoryEntryRva - SectionHeader.VirtualAddress + SectionHeader.PointerToRawData;
+ break;
+ }
+
+ SectionHeaderOffset += sizeof (EFI_IMAGE_SECTION_HEADER);
+ }
+
+ if (DebugDirectoryEntryFileOffset != 0) {
+ for (Index = 0; Index < DebugDirectoryEntry->Size; Index++) {
+ //
+ // Read next debug directory entry
+ //
+ Size = sizeof (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ DebugDirectoryEntryFileOffset,
+ &Size,
+ &DebugEntry
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+
+ if (DebugEntry.Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
+ ImageContext->DebugDirectoryEntryRva = (UINT32) (DebugDirectoryEntryRva + Index * sizeof (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY));
+ if (DebugEntry.RVA == 0 && DebugEntry.FileOffset != 0) {
+ ImageContext->ImageSize += DebugEntry.SizeOfData;
+ }
+
+ return RETURN_SUCCESS;
+ }
+ }
+ }
+ }
+ } else {
+ ImageContext->ImageSize = 0;
+ ImageContext->SectionAlignment = 4096;
+ ImageContext->SizeOfHeaders = sizeof (EFI_TE_IMAGE_HEADER) + (UINTN) TeHdr.BaseOfCode - (UINTN) TeHdr.StrippedSize;
+
+ DebugDirectoryEntry = &TeHdr.DataDirectory[1];
+ DebugDirectoryEntryRva = DebugDirectoryEntry->VirtualAddress;
+ SectionHeaderOffset = (UINTN) (sizeof (EFI_TE_IMAGE_HEADER));
+
+ DebugDirectoryEntryFileOffset = 0;
+
+ for (Index = 0; Index < TeHdr.NumberOfSections;) {
+ //
+ // Read section header from file
+ //
+ Size = sizeof (EFI_IMAGE_SECTION_HEADER);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ SectionHeaderOffset,
+ &Size,
+ &SectionHeader
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+
+ if (DebugDirectoryEntryRva >= SectionHeader.VirtualAddress &&
+ DebugDirectoryEntryRva < SectionHeader.VirtualAddress + SectionHeader.Misc.VirtualSize) {
+ DebugDirectoryEntryFileOffset = DebugDirectoryEntryRva -
+ SectionHeader.VirtualAddress +
+ SectionHeader.PointerToRawData +
+ sizeof (EFI_TE_IMAGE_HEADER) -
+ TeHdr.StrippedSize;
+
+ //
+ // File offset of the debug directory was found, if this is not the last
+ // section, then skip to the last section for calculating the image size.
+ //
+ if (Index < (UINTN) TeHdr.NumberOfSections - 1) {
+ SectionHeaderOffset += (TeHdr.NumberOfSections - 1 - Index) * sizeof (EFI_IMAGE_SECTION_HEADER);
+ Index = TeHdr.NumberOfSections - 1;
+ continue;
+ }
+ }
+
+ //
+ // In Te image header there is not a field to describe the ImageSize.
+ // Actually, the ImageSize equals the RVA plus the VirtualSize of
+ // the last section mapped into memory (Must be rounded up to
+ // a mulitple of Section Alignment). Per the PE/COFF specification, the
+ // section headers in the Section Table must appear in order of the RVA
+ // values for the corresponding sections. So the ImageSize can be determined
+ // by the RVA and the VirtualSize of the last section header in the
+ // Section Table.
+ //
+ if ((++Index) == (UINTN) TeHdr.NumberOfSections) {
+ ImageContext->ImageSize = (SectionHeader.VirtualAddress + SectionHeader.Misc.VirtualSize +
+ ImageContext->SectionAlignment - 1) & ~(ImageContext->SectionAlignment - 1);
+ }
+
+ SectionHeaderOffset += sizeof (EFI_IMAGE_SECTION_HEADER);
+ }
+
+ if (DebugDirectoryEntryFileOffset != 0) {
+ for (Index = 0; Index < DebugDirectoryEntry->Size; Index++) {
+ //
+ // Read next debug directory entry
+ //
+ Size = sizeof (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ DebugDirectoryEntryFileOffset,
+ &Size,
+ &DebugEntry
+ );
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+
+ if (DebugEntry.Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
+ ImageContext->DebugDirectoryEntryRva = (UINT32) (DebugDirectoryEntryRva + Index * sizeof (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY));
+ return RETURN_SUCCESS;
+ }
+ }
+ }
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Converts an image address to the loaded address.
+
+ @param ImageContext The context of the image being loaded.
+
+ @param Address The address to be converted to the loaded address.
+
+ @return NULL if the address can not be converted, otherwise, the converted address
+
+**/
+STATIC
+VOID *
+PeCoffLoaderImageAddress (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext,
+ IN UINTN Address
+ )
+{
+ if (Address >= ImageContext->ImageSize) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_IMAGE_ADDRESS;
+ return NULL;
+ }
+
+ return (CHAR8 *) ((UINTN) ImageContext->ImageAddress + Address);
+}
+
+/**
+ Relocates a PE/COFF image in memory.
+
+ @param This Calling context.
+
+ @param ImageContext Contains information on the loaded image to relocate.
+
+ @retval RETURN_SUCCESS if the PE/COFF image was relocated.
+ @retval RETURN_LOAD_ERROR if the image is not a valid PE/COFF image.
+ @retval RETURN_UNSUPPORTED not support.
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderRelocateImage (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ RETURN_STATUS Status;
+ EFI_IMAGE_NT_HEADERS *PeHdr;
+ EFI_TE_IMAGE_HEADER *TeHdr;
+ EFI_IMAGE_DATA_DIRECTORY *RelocDir;
+ UINT64 Adjust;
+ EFI_IMAGE_BASE_RELOCATION *RelocBase;
+ EFI_IMAGE_BASE_RELOCATION *RelocBaseEnd;
+ UINT16 *Reloc;
+ UINT16 *RelocEnd;
+ CHAR8 *Fixup;
+ CHAR8 *FixupBase;
+ UINT16 *F16;
+ UINT32 *F32;
+ CHAR8 *FixupData;
+ PHYSICAL_ADDRESS BaseAddress;
+
+ PeHdr = NULL;
+ TeHdr = NULL;
+ //
+ // Assume success
+ //
+ ImageContext->ImageError = IMAGE_ERROR_SUCCESS;
+
+ //
+ // If there are no relocation entries, then we are done
+ //
+ if (ImageContext->RelocationsStripped) {
+ return RETURN_SUCCESS;
+ }
+
+ //
+ // If the destination address is not 0, use that rather than the
+ // image address as the relocation target.
+ //
+ if (ImageContext->DestinationAddress) {
+ BaseAddress = ImageContext->DestinationAddress;
+ } else {
+ BaseAddress = ImageContext->ImageAddress;
+ }
+
+ if (!(ImageContext->IsTeImage)) {
+ PeHdr = (EFI_IMAGE_NT_HEADERS *)((UINTN)ImageContext->ImageAddress +
+ ImageContext->PeCoffHeaderOffset);
+ Adjust = (UINT64) BaseAddress - PeHdr->OptionalHeader.ImageBase;
+ PeHdr->OptionalHeader.ImageBase = (UINTN)BaseAddress;
+
+ //
+ // Find the relocation block
+ //
+ // Per the PE/COFF spec, you can't assume that a given data directory
+ // is present in the image. You have to check the NumberOfRvaAndSizes in
+ // the optional header to verify a desired directory entry is there.
+ //
+ if (PeHdr->OptionalHeader.NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC) {
+ RelocDir = &PeHdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
+ RelocBase = PeCoffLoaderImageAddress (ImageContext, RelocDir->VirtualAddress);
+ RelocBaseEnd = PeCoffLoaderImageAddress (
+ ImageContext,
+ RelocDir->VirtualAddress + RelocDir->Size - 1
+ );
+ } else {
+ //
+ // Set base and end to bypass processing below.
+ //
+ RelocBase = RelocBaseEnd = 0;
+ }
+ } else {
+ TeHdr = (EFI_TE_IMAGE_HEADER *) (UINTN) (ImageContext->ImageAddress);
+ Adjust = (UINT64) (BaseAddress - TeHdr->ImageBase);
+ TeHdr->ImageBase = (UINT64) (BaseAddress);
+
+ //
+ // Find the relocation block
+ //
+ RelocDir = &TeHdr->DataDirectory[0];
+ RelocBase = (EFI_IMAGE_BASE_RELOCATION *)(UINTN)(
+ ImageContext->ImageAddress +
+ RelocDir->VirtualAddress +
+ sizeof(EFI_TE_IMAGE_HEADER) -
+ TeHdr->StrippedSize
+ );
+ RelocBaseEnd = (EFI_IMAGE_BASE_RELOCATION *) ((UINTN) RelocBase + (UINTN) RelocDir->Size - 1);
+ }
+
+ //
+ // Run the relocation information and apply the fixups
+ //
+ FixupData = ImageContext->FixupData;
+ while (RelocBase < RelocBaseEnd) {
+
+ Reloc = (UINT16 *) ((CHAR8 *) RelocBase + sizeof (EFI_IMAGE_BASE_RELOCATION));
+ RelocEnd = (UINT16 *) ((CHAR8 *) RelocBase + RelocBase->SizeOfBlock);
+ if (!(ImageContext->IsTeImage)) {
+ FixupBase = PeCoffLoaderImageAddress (ImageContext, RelocBase->VirtualAddress);
+ } else {
+ FixupBase = (CHAR8 *)(UINTN)(ImageContext->ImageAddress +
+ RelocBase->VirtualAddress +
+ sizeof(EFI_TE_IMAGE_HEADER) -
+ TeHdr->StrippedSize
+ );
+ }
+
+ if ((CHAR8 *) RelocEnd < (CHAR8 *) ((UINTN) ImageContext->ImageAddress) ||
+ (CHAR8 *) RelocEnd > (CHAR8 *)((UINTN)ImageContext->ImageAddress +
+ (UINTN)ImageContext->ImageSize)) {
+ ImageContext->ImageError = IMAGE_ERROR_FAILED_RELOCATION;
+ return RETURN_LOAD_ERROR;
+ }
+
+ //
+ // Run this relocation record
+ //
+ while (Reloc < RelocEnd) {
+
+ Fixup = FixupBase + (*Reloc & 0xFFF);
+ switch ((*Reloc) >> 12) {
+ case EFI_IMAGE_REL_BASED_ABSOLUTE:
+ break;
+
+ case EFI_IMAGE_REL_BASED_HIGH:
+ F16 = (UINT16 *) Fixup;
+ *F16 = (UINT16) ((*F16 << 16) + (UINT16) Adjust);
+ if (FixupData != NULL) {
+ *(UINT16 *) FixupData = *F16;
+ FixupData = FixupData + sizeof (UINT16);
+ }
+ break;
+
+ case EFI_IMAGE_REL_BASED_LOW:
+ F16 = (UINT16 *) Fixup;
+ *F16 = (UINT16) (*F16 + (UINT16) Adjust);
+ if (FixupData != NULL) {
+ *(UINT16 *) FixupData = *F16;
+ FixupData = FixupData + sizeof (UINT16);
+ }
+ break;
+
+ case EFI_IMAGE_REL_BASED_HIGHLOW:
+ F32 = (UINT32 *) Fixup;
+ *F32 = *F32 + (UINT32) Adjust;
+ if (FixupData != NULL) {
+ FixupData = ALIGN_POINTER (FixupData, sizeof (UINT32));
+ *(UINT32 *) FixupData = *F32;
+ FixupData = FixupData + sizeof (UINT32);
+ }
+ break;
+
+ case EFI_IMAGE_REL_BASED_HIGHADJ:
+ //
+ // Return the same EFI_UNSUPPORTED return code as
+ // PeCoffLoaderRelocateImageEx() returns if it does not recognize
+ // the relocation type.
+ //
+ ImageContext->ImageError = IMAGE_ERROR_FAILED_RELOCATION;
+ return RETURN_UNSUPPORTED;
+
+ default:
+ Status = PeCoffLoaderRelocateImageEx (Reloc, Fixup, &FixupData, Adjust);
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_FAILED_RELOCATION;
+ return Status;
+ }
+ }
+
+ //
+ // Next relocation record
+ //
+ Reloc += 1;
+ }
+
+ //
+ // Next reloc block
+ //
+ RelocBase = (EFI_IMAGE_BASE_RELOCATION *) RelocEnd;
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Loads a PE/COFF image into memory.
+
+ @param This Calling context.
+
+ @param ImageContext Contains information on image to load into memory.
+
+ @retval RETURN_SUCCESS if the PE/COFF image was loaded.
+ @retval RETURN_BUFFER_TOO_SMALL if the caller did not provide a large enough buffer.
+ @retval RETURN_LOAD_ERROR if the image is a runtime driver with no relocations.
+ @retval RETURN_INVALID_PARAMETER if the image address is invalid.
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderLoadImage (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+{
+ RETURN_STATUS Status;
+ EFI_IMAGE_NT_HEADERS *PeHdr;
+ EFI_TE_IMAGE_HEADER *TeHdr;
+ PE_COFF_LOADER_IMAGE_CONTEXT CheckContext;
+ EFI_IMAGE_SECTION_HEADER *FirstSection;
+ EFI_IMAGE_SECTION_HEADER *Section;
+ UINTN NumberOfSections;
+ UINTN Index;
+ CHAR8 *Base;
+ CHAR8 *End;
+ CHAR8 *MaxEnd;
+ EFI_IMAGE_DATA_DIRECTORY *DirectoryEntry;
+ EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *DebugEntry;
+ UINTN Size;
+ UINT32 TempDebugEntryRva;
+
+ PeHdr = NULL;
+ TeHdr = NULL;
+ //
+ // Assume success
+ //
+ ImageContext->ImageError = IMAGE_ERROR_SUCCESS;
+
+ //
+ // Copy the provided context info into our local version, get what we
+ // can from the original image, and then use that to make sure everything
+ // is legit.
+ //
+ CopyMem (&CheckContext, ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));
+
+ Status = PeCoffLoaderGetImageInfo (&CheckContext);
+ if (RETURN_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Make sure there is enough allocated space for the image being loaded
+ //
+ if (ImageContext->ImageSize < CheckContext.ImageSize) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_IMAGE_SIZE;
+ return RETURN_BUFFER_TOO_SMALL;
+ }
+
+ //
+ // If there's no relocations, then make sure it's not a runtime driver,
+ // and that it's being loaded at the linked address.
+ //
+ if (CheckContext.RelocationsStripped) {
+ //
+ // If the image does not contain relocations and it is a runtime driver
+ // then return an error.
+ //
+ if (CheckContext.ImageType == EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_SUBSYSTEM;
+ return RETURN_LOAD_ERROR;
+ }
+ //
+ // If the image does not contain relocations, and the requested load address
+ // is not the linked address, then return an error.
+ //
+ if (CheckContext.ImageAddress != ImageContext->ImageAddress) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_IMAGE_ADDRESS;
+ return RETURN_INVALID_PARAMETER;
+ }
+ }
+ //
+ // Make sure the allocated space has the proper section alignment
+ //
+ if (!(ImageContext->IsTeImage)) {
+ if ((ImageContext->ImageAddress & (CheckContext.SectionAlignment - 1)) != 0) {
+ ImageContext->ImageError = IMAGE_ERROR_INVALID_SECTION_ALIGNMENT;
+ return RETURN_INVALID_PARAMETER;
+ }
+ }
+ //
+ // Read the entire PE/COFF or TE header into memory
+ //
+ if (!(ImageContext->IsTeImage)) {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ 0,
+ &ImageContext->SizeOfHeaders,
+ (VOID *) (UINTN) ImageContext->ImageAddress
+ );
+
+ PeHdr = (EFI_IMAGE_NT_HEADERS *)
+ ((UINTN)ImageContext->ImageAddress + ImageContext->PeCoffHeaderOffset);
+
+ FirstSection = (EFI_IMAGE_SECTION_HEADER *) (
+ (UINTN)ImageContext->ImageAddress +
+ ImageContext->PeCoffHeaderOffset +
+ sizeof(UINT32) +
+ sizeof(EFI_IMAGE_FILE_HEADER) +
+ PeHdr->FileHeader.SizeOfOptionalHeader
+ );
+ NumberOfSections = (UINTN) (PeHdr->FileHeader.NumberOfSections);
+ } else {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ 0,
+ &ImageContext->SizeOfHeaders,
+ (void *) (UINTN) ImageContext->ImageAddress
+ );
+
+ TeHdr = (EFI_TE_IMAGE_HEADER *) (UINTN) (ImageContext->ImageAddress);
+
+ FirstSection = (EFI_IMAGE_SECTION_HEADER *) (
+ (UINTN)ImageContext->ImageAddress +
+ sizeof(EFI_TE_IMAGE_HEADER)
+ );
+ NumberOfSections = (UINTN) (TeHdr->NumberOfSections);
+
+ }
+
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return RETURN_LOAD_ERROR;
+ }
+
+ //
+ // Load each section of the image
+ //
+ Section = FirstSection;
+ for (Index = 0, MaxEnd = NULL; Index < NumberOfSections; Index++) {
+
+ //
+ // Compute sections address
+ //
+ Base = PeCoffLoaderImageAddress (ImageContext, Section->VirtualAddress);
+ End = PeCoffLoaderImageAddress (
+ ImageContext,
+ Section->VirtualAddress + Section->Misc.VirtualSize - 1
+ );
+ if (ImageContext->IsTeImage) {
+ Base = (CHAR8 *) ((UINTN) Base + sizeof (EFI_TE_IMAGE_HEADER) - (UINTN) TeHdr->StrippedSize);
+ End = (CHAR8 *) ((UINTN) End + sizeof (EFI_TE_IMAGE_HEADER) - (UINTN) TeHdr->StrippedSize);
+ }
+
+ if (End > MaxEnd) {
+ MaxEnd = End;
+ }
+ //
+ // If the base start or end address resolved to 0, then fail.
+ //
+ if ((Base == NULL) || (End == NULL)) {
+ ImageContext->ImageError = IMAGE_ERROR_SECTION_NOT_LOADED;
+ return RETURN_LOAD_ERROR;
+ }
+
+ //
+ // Read the section
+ //
+ Size = (UINTN) Section->Misc.VirtualSize;
+ if ((Size == 0) || (Size > Section->SizeOfRawData)) {
+ Size = (UINTN) Section->SizeOfRawData;
+ }
+
+ if (Section->SizeOfRawData) {
+ if (!(ImageContext->IsTeImage)) {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ Section->PointerToRawData,
+ &Size,
+ Base
+ );
+ } else {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ Section->PointerToRawData + sizeof (EFI_TE_IMAGE_HEADER) - (UINTN) TeHdr->StrippedSize,
+ &Size,
+ Base
+ );
+ }
+
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return Status;
+ }
+ }
+
+ //
+ // If raw size is less then virt size, zero fill the remaining
+ //
+
+ if (Size < Section->Misc.VirtualSize) {
+ ZeroMem (Base + Size, Section->Misc.VirtualSize - Size);
+ }
+
+ //
+ // Next Section
+ //
+ Section += 1;
+ }
+
+ //
+ // Get image's entry point
+ //
+ if (!(ImageContext->IsTeImage)) {
+ ImageContext->EntryPoint = (PHYSICAL_ADDRESS) (UINTN) PeCoffLoaderImageAddress (
+ ImageContext,
+ PeHdr->OptionalHeader.AddressOfEntryPoint
+ );
+ } else {
+ ImageContext->EntryPoint = (PHYSICAL_ADDRESS) (
+ (UINTN)ImageContext->ImageAddress +
+ (UINTN)TeHdr->AddressOfEntryPoint +
+ (UINTN)sizeof(EFI_TE_IMAGE_HEADER) -
+ (UINTN) TeHdr->StrippedSize
+ );
+ }
+
+ //
+ // Determine the size of the fixup data
+ //
+ // Per the PE/COFF spec, you can't assume that a given data directory
+ // is present in the image. You have to check the NumberOfRvaAndSizes in
+ // the optional header to verify a desired directory entry is there.
+ //
+ if (!(ImageContext->IsTeImage)) {
+ if (PeHdr->OptionalHeader.NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC) {
+ DirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *)
+ &PeHdr->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
+ ImageContext->FixupDataSize = DirectoryEntry->Size / sizeof (UINT16) * sizeof (UINTN);
+ } else {
+ ImageContext->FixupDataSize = 0;
+ }
+ } else {
+ DirectoryEntry = &TeHdr->DataDirectory[0];
+ ImageContext->FixupDataSize = DirectoryEntry->Size / sizeof (UINT16) * sizeof (UINTN);
+ }
+ //
+ // Consumer must allocate a buffer for the relocation fixup log.
+ // Only used for runtime drivers.
+ //
+ ImageContext->FixupData = NULL;
+
+ //
+ // Load the Codeview info if present
+ //
+ if (ImageContext->DebugDirectoryEntryRva != 0) {
+ if (!(ImageContext->IsTeImage)) {
+ DebugEntry = PeCoffLoaderImageAddress (
+ ImageContext,
+ ImageContext->DebugDirectoryEntryRva
+ );
+ } else {
+ DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *)(UINTN)(
+ ImageContext->ImageAddress +
+ ImageContext->DebugDirectoryEntryRva +
+ sizeof(EFI_TE_IMAGE_HEADER) -
+ TeHdr->StrippedSize
+ );
+ }
+
+ if (DebugEntry != NULL) {
+ TempDebugEntryRva = DebugEntry->RVA;
+ if (DebugEntry->RVA == 0 && DebugEntry->FileOffset != 0) {
+ Section--;
+ if ((UINTN) Section->SizeOfRawData < Section->Misc.VirtualSize) {
+ TempDebugEntryRva = Section->VirtualAddress + Section->Misc.VirtualSize;
+ } else {
+ TempDebugEntryRva = Section->VirtualAddress + Section->SizeOfRawData;
+ }
+ }
+
+ if (TempDebugEntryRva != 0) {
+ if (!(ImageContext->IsTeImage)) {
+ ImageContext->CodeView = PeCoffLoaderImageAddress (ImageContext, TempDebugEntryRva);
+ } else {
+ ImageContext->CodeView = (VOID *)(
+ (UINTN)ImageContext->ImageAddress +
+ (UINTN)TempDebugEntryRva +
+ (UINTN)sizeof(EFI_TE_IMAGE_HEADER) -
+ (UINTN) TeHdr->StrippedSize
+ );
+ }
+
+ if (ImageContext->CodeView == NULL) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return RETURN_LOAD_ERROR;
+ }
+
+ if (DebugEntry->RVA == 0) {
+ Size = DebugEntry->SizeOfData;
+ if (!(ImageContext->IsTeImage)) {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ DebugEntry->FileOffset,
+ &Size,
+ ImageContext->CodeView
+ );
+ } else {
+ Status = ImageContext->ImageRead (
+ ImageContext->Handle,
+ DebugEntry->FileOffset + sizeof (EFI_TE_IMAGE_HEADER) - TeHdr->StrippedSize,
+ &Size,
+ ImageContext->CodeView
+ );
+ //
+ // Should we apply fix up to this field according to the size difference between PE and TE?
+ // Because now we maintain TE header fields unfixed, this field will also remain as they are
+ // in original PE image.
+ //
+ }
+
+ if (RETURN_ERROR (Status)) {
+ ImageContext->ImageError = IMAGE_ERROR_IMAGE_READ;
+ return RETURN_LOAD_ERROR;
+ }
+
+ DebugEntry->RVA = TempDebugEntryRva;
+ }
+
+ switch (*(UINT32 *) ImageContext->CodeView) {
+ case CODEVIEW_SIGNATURE_NB10:
+ ImageContext->PdbPointer = (CHAR8 *) ImageContext->CodeView + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY);
+ break;
+
+ case CODEVIEW_SIGNATURE_RSDS:
+ ImageContext->PdbPointer = (CHAR8 *) ImageContext->CodeView + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY);
+ break;
+
+ default:
+ break;
+ }
+ }
+ }
+ }
+
+ return Status;
+}
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.mbd b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.mbd new file mode 100644 index 0000000000..7e8def950d --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePeCoffLib</BaseName>
+ <Guid>556f5d10-7309-4af4-b80a-8196bd60946f</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004 - 2005, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.msa b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.msa new file mode 100644 index 0000000000..534558c7fa --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePeCoffLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>556f5d10-7309-4af4-b80a-8196bd60946f</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the PEI library.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004 - 2005, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeCoffLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>BasePeCoff.c</Filename>
+ <Arch ArchType="IA32">
+ <Filename>ia32\PeCoffLoaderEx.c</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>x64\PeCoffLoaderEx.c</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>ipf\PeCoffLoaderEx.c</Filename>
+ </Arch>
+ <Arch ArchType="EBC">
+ <Filename>ebc\PeCoffLoaderEx.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePeCoffLib/Ebc/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/Ebc/PeCoffLoaderEx.c new file mode 100644 index 0000000000..6cfc566bd4 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/Ebc/PeCoffLoaderEx.c @@ -0,0 +1,43 @@ +/** @file
+ EBC Specific relocation fixups.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLoaderEx.c
+
+**/
+
+
+
+
+/**
+ Performs an IA-32 specific relocation fixup.
+
+ @param Reloc Pointer to the relocation record.
+
+ @param Fixup Pointer to the address to fix up.
+
+ @param FixupData Pointer to a buffer to log the fixups.
+
+ @param Adjust The offset to adjust the fixup.
+
+ @retval EFI_UNSUPPORTED Unsupported now.
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+ IN UINT16 *Reloc,
+ IN OUT CHAR8 *Fixup,
+ IN OUT CHAR8 **FixupData,
+ IN UINT64 Adjust
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
diff --git a/MdePkg/Library/BasePeCoffLib/Ia32/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/Ia32/PeCoffLoaderEx.c new file mode 100644 index 0000000000..4ee64c2b36 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/Ia32/PeCoffLoaderEx.c @@ -0,0 +1,44 @@ +/** @file
+ IA-32 Specific relocation fixups.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLoaderEx.c
+
+**/
+
+
+
+
+
+/**
+ Performs an IA-32 specific relocation fixup.
+
+ @param Reloc Pointer to the relocation record.
+
+ @param Fixup Pointer to the address to fix up.
+
+ @param FixupData Pointer to a buffer to log the fixups.
+
+ @param Adjust The offset to adjust the fixup.
+
+ @retval EFI_UNSUPPORTED Unsupported now.
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+ IN UINT16 *Reloc,
+ IN OUT CHAR8 *Fixup,
+ IN OUT CHAR8 **FixupData,
+ IN UINT64 Adjust
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
diff --git a/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c new file mode 100644 index 0000000000..d35231e9cd --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c @@ -0,0 +1,230 @@ +/** @file
+ Fixes Intel Itanium(TM) specific relocation types.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLoaderEx.c
+
+**/
+
+
+
+
+
+#define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
+ Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
+
+#define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
+ *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
+ ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
+
+#define IMM64_IMM7B_INST_WORD_X 3
+#define IMM64_IMM7B_SIZE_X 7
+#define IMM64_IMM7B_INST_WORD_POS_X 4
+#define IMM64_IMM7B_VAL_POS_X 0
+
+#define IMM64_IMM9D_INST_WORD_X 3
+#define IMM64_IMM9D_SIZE_X 9
+#define IMM64_IMM9D_INST_WORD_POS_X 18
+#define IMM64_IMM9D_VAL_POS_X 7
+
+#define IMM64_IMM5C_INST_WORD_X 3
+#define IMM64_IMM5C_SIZE_X 5
+#define IMM64_IMM5C_INST_WORD_POS_X 13
+#define IMM64_IMM5C_VAL_POS_X 16
+
+#define IMM64_IC_INST_WORD_X 3
+#define IMM64_IC_SIZE_X 1
+#define IMM64_IC_INST_WORD_POS_X 12
+#define IMM64_IC_VAL_POS_X 21
+
+#define IMM64_IMM41a_INST_WORD_X 1
+#define IMM64_IMM41a_SIZE_X 10
+#define IMM64_IMM41a_INST_WORD_POS_X 14
+#define IMM64_IMM41a_VAL_POS_X 22
+
+#define IMM64_IMM41b_INST_WORD_X 1
+#define IMM64_IMM41b_SIZE_X 8
+#define IMM64_IMM41b_INST_WORD_POS_X 24
+#define IMM64_IMM41b_VAL_POS_X 32
+
+#define IMM64_IMM41c_INST_WORD_X 2
+#define IMM64_IMM41c_SIZE_X 23
+#define IMM64_IMM41c_INST_WORD_POS_X 0
+#define IMM64_IMM41c_VAL_POS_X 40
+
+#define IMM64_SIGN_INST_WORD_X 3
+#define IMM64_SIGN_SIZE_X 1
+#define IMM64_SIGN_INST_WORD_POS_X 27
+#define IMM64_SIGN_VAL_POS_X 63
+
+/**
+ Performs an Itanium-based specific relocation fixup.
+
+ @param Reloc Pointer to the relocation record.
+
+ @param Fixup Pointer to the address to fix up.
+
+ @param FixupData Pointer to a buffer to log the fixups.
+
+ @param Adjust The offset to adjust the fixup.
+
+ @return Status code.
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+ IN UINT16 *Reloc,
+ IN OUT CHAR8 *Fixup,
+ IN OUT CHAR8 **FixupData,
+ IN UINT64 Adjust
+ )
+{
+ UINT64 *F64;
+ UINT64 FixupVal;
+
+ switch ((*Reloc) >> 12) {
+
+ case EFI_IMAGE_REL_BASED_DIR64:
+ F64 = (UINT64 *) Fixup;
+ *F64 = *F64 + (UINT64) Adjust;
+ if (*FixupData != NULL) {
+ *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
+ *(UINT64 *)(*FixupData) = *F64;
+ *FixupData = *FixupData + sizeof(UINT64);
+ }
+ break;
+
+ case EFI_IMAGE_REL_BASED_IA64_IMM64:
+
+ //
+ // Align it to bundle address before fixing up the
+ // 64-bit immediate value of the movl instruction.
+ //
+
+ Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
+ FixupVal = (UINT64)0;
+
+ //
+ // Extract the lower 32 bits of IMM64 from bundle
+ //
+ EXT_IMM64(FixupVal,
+ (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
+ IMM64_IMM7B_SIZE_X,
+ IMM64_IMM7B_INST_WORD_POS_X,
+ IMM64_IMM7B_VAL_POS_X
+ );
+
+ EXT_IMM64(FixupVal,
+ (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
+ IMM64_IMM9D_SIZE_X,
+ IMM64_IMM9D_INST_WORD_POS_X,
+ IMM64_IMM9D_VAL_POS_X
+ );
+
+ EXT_IMM64(FixupVal,
+ (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
+ IMM64_IMM5C_SIZE_X,
+ IMM64_IMM5C_INST_WORD_POS_X,
+ IMM64_IMM5C_VAL_POS_X
+ );
+
+ EXT_IMM64(FixupVal,
+ (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
+ IMM64_IC_SIZE_X,
+ IMM64_IC_INST_WORD_POS_X,
+ IMM64_IC_VAL_POS_X
+ );
+
+ EXT_IMM64(FixupVal,
+ (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,
+ IMM64_IMM41a_SIZE_X,
+ IMM64_IMM41a_INST_WORD_POS_X,
+ IMM64_IMM41a_VAL_POS_X
+ );
+
+ //
+ // Update 64-bit address
+ //
+ FixupVal += Adjust;
+
+ //
+ // Insert IMM64 into bundle
+ //
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
+ IMM64_IMM7B_SIZE_X,
+ IMM64_IMM7B_INST_WORD_POS_X,
+ IMM64_IMM7B_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
+ IMM64_IMM9D_SIZE_X,
+ IMM64_IMM9D_INST_WORD_POS_X,
+ IMM64_IMM9D_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
+ IMM64_IMM5C_SIZE_X,
+ IMM64_IMM5C_INST_WORD_POS_X,
+ IMM64_IMM5C_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
+ IMM64_IC_SIZE_X,
+ IMM64_IC_INST_WORD_POS_X,
+ IMM64_IC_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),
+ IMM64_IMM41a_SIZE_X,
+ IMM64_IMM41a_INST_WORD_POS_X,
+ IMM64_IMM41a_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),
+ IMM64_IMM41b_SIZE_X,
+ IMM64_IMM41b_INST_WORD_POS_X,
+ IMM64_IMM41b_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),
+ IMM64_IMM41c_SIZE_X,
+ IMM64_IMM41c_INST_WORD_POS_X,
+ IMM64_IMM41c_VAL_POS_X
+ );
+
+ INS_IMM64(FixupVal,
+ ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
+ IMM64_SIGN_SIZE_X,
+ IMM64_SIGN_INST_WORD_POS_X,
+ IMM64_SIGN_VAL_POS_X
+ );
+
+ F64 = (UINT64 *) Fixup;
+ if (*FixupData != NULL) {
+ *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
+ *(UINT64 *)(*FixupData) = *F64;
+ *FixupData = *FixupData + sizeof(UINT64);
+ }
+ break;
+
+ default:
+ return RETURN_UNSUPPORTED;
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/MdePkg/Library/BasePeCoffLib/build.xml b/MdePkg/Library/BasePeCoffLib/build.xml new file mode 100644 index 0000000000..0aff39d00b --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePeCoffLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePeCoffLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePeCoffLib">
+ <GenBuild baseName="BasePeCoffLib" mbdFilename="${MODULE_DIR}\BasePeCoffLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffLib.msa"/>
+ </target>
+ <target depends="BasePeCoffLib_clean" name="clean"/>
+ <target depends="BasePeCoffLib_cleanall" name="cleanall"/>
+ <target name="BasePeCoffLib_clean">
+ <OutputDirSetup baseName="BasePeCoffLib" mbdFilename="${MODULE_DIR}\BasePeCoffLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePeCoffLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePeCoffLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePeCoffLib_cleanall">
+ <OutputDirSetup baseName="BasePeCoffLib" mbdFilename="${MODULE_DIR}\BasePeCoffLib.mbd" msaFilename="${MODULE_DIR}\BasePeCoffLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePeCoffLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePeCoffLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePeCoffLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePeCoffLib/x64/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/x64/PeCoffLoaderEx.c new file mode 100644 index 0000000000..7648447f71 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/x64/PeCoffLoaderEx.c @@ -0,0 +1,56 @@ +/** @file
+ x64 Specific relocation fixups.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLoaderEx.c
+
+**/
+
+
+
+
+/**
+ Performs an x64 specific relocation fixup.
+
+ @param Reloc Pointer to the relocation record
+ @param Fixup Pointer to the address to fix up
+ @param FixupData Pointer to a buffer to log the fixups
+ @param Adjust The offset to adjust the fixup
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+ IN UINT16 *Reloc,
+ IN OUT CHAR8 *Fixup,
+ IN OUT CHAR8 **FixupData,
+ IN UINT64 Adjust
+ )
+{
+ UINT64 *F64;
+
+ switch ((*Reloc) >> 12) {
+
+ case EFI_IMAGE_REL_BASED_DIR64:
+ F64 = (UINT64 *) Fixup;
+ *F64 = *F64 + (UINT64) Adjust;
+ if (*FixupData != NULL) {
+ *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
+ *(UINT64 *)(*FixupData) = *F64;
+ *FixupData = *FixupData + sizeof(UINT64);
+ }
+ break;
+
+ default:
+ return RETURN_UNSUPPORTED;
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.mbd b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.mbd new file mode 100644 index 0000000000..ac9c3ac33f --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePerformanceLibNull</BaseName>
+ <Guid>FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-04 11:05</Created>
+ <Modified>2006-04-04 11:05</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa new file mode 100644 index 0000000000..3147d641ef --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa @@ -0,0 +1,52 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePerformanceLibNull</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-04 11:05</Created>
+ <Updated>2006-04-04 11:05</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PerformanceLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PerformanceLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdPerformanceLibraryPropertyMask</C_Name>
+ <Token>0x00000001</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c new file mode 100644 index 0000000000..01226cbb02 --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c @@ -0,0 +1,148 @@ +/** @file
+ Base Performance Library which provides no service.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PerformanceLib.c
+
+**/
+
+/**
+ Creates a record for the beginning of a performance measurement.
+
+ Creates a record that contains the Handle, Token, and Module.
+ If TimeStamp is not zero, then TimeStamp is added to the record as the start time.
+ If TimeStamp is zero, then this function reads the current time stamp
+ and adds that time stamp value to the record as the start time.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The start of the measurement was recorded.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.
+
+**/
+RETURN_STATUS
+EFIAPI
+StartPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token,
+ IN CONST CHAR8 *Module,
+ IN UINT64 TimeStamp
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+/**
+ Fills in the end time of a performance measurement.
+
+ Looks up the record that matches Handle, Token, and Module.
+ If the record can not be found then return RETURN_NOT_FOUND.
+ If the record is found and TimeStamp is not zero,
+ then TimeStamp is added to the record as the end time.
+ If the record is found and TimeStamp is zero, then this function reads
+ the current time stamp and adds that time stamp value to the record as the end time.
+ If this function is called multiple times for the same record, then the end time is overwritten.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The end of the measurement was recorded.
+ @retval RETURN_NOT_FOUND The specified measurement record could not be found.
+
+**/
+RETURN_STATUS
+EFIAPI
+EndPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token,
+ IN CONST CHAR8 *Module,
+ IN UINT64 TimeStamp
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+/**
+ Retrieves a previously logged performance measurement.
+
+ Retrieves the performance log entry from the performance log
+ that immediately follows the log entry specified by LogEntryKey.
+ If LogEntryKey is zero, then the first entry from the performance log is returned.
+ If the log entry specified by LogEntryKey is the last entry in the performance log,
+ then 0 is returned. Otherwise, the performance log entry is returned in Handle,
+ Token, Module, StartTimeStamp, and EndTimeStamp.
+ The key for the current performance log entry is returned.
+
+ @param LogEntryKey The key for the previous performance measurement log entry.
+ If 0, then the first performance measurement log entry is retrieved.
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param StartTimeStamp The 64-bit time stamp that was recorded when the measurement was started.
+ @param EndTimeStamp The 64-bit time stamp that was recorded when the measurement was ended.
+
+ @return The key for the current performance log entry.
+
+**/
+UINTN
+EFIAPI
+GetPerformanceMeasurement (
+ UINTN LogEntryKey,
+ OUT CONST VOID **Handle,
+ OUT CONST CHAR8 **Token,
+ OUT CONST CHAR8 **Module,
+ OUT UINT64 *StartTimeStamp,
+ OUT UINT64 *EndTimeStamp
+ )
+{
+ ASSERT (Handle != NULL);
+ ASSERT (Token != NULL);
+ ASSERT (Module != NULL);
+ ASSERT (StartTimeStamp != NULL);
+ ASSERT (EndTimeStamp != NULL);
+
+ return 0;
+}
+
+/**
+ Returns TRUE if the performance measurement macros are enabled.
+
+ This function returns TRUE if the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set.
+ @retval FALSE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PerformanceMeasurementEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdPerformanceLibraryPropertyMask) & PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BasePerformanceLibNull/build.xml b/MdePkg/Library/BasePerformanceLibNull/build.xml new file mode 100644 index 0000000000..aec9654740 --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePerformanceLibNull"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePerformanceLibNull"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePerformanceLibNull">
+ <GenBuild baseName="BasePerformanceLibNull" mbdFilename="${MODULE_DIR}\BasePerformanceLibNull.mbd" msaFilename="${MODULE_DIR}\BasePerformanceLibNull.msa"/>
+ </target>
+ <target depends="BasePerformanceLibNull_clean" name="clean"/>
+ <target depends="BasePerformanceLibNull_cleanall" name="cleanall"/>
+ <target name="BasePerformanceLibNull_clean">
+ <OutputDirSetup baseName="BasePerformanceLibNull" mbdFilename="${MODULE_DIR}\BasePerformanceLibNull.mbd" msaFilename="${MODULE_DIR}\BasePerformanceLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePerformanceLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePerformanceLibNull_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePerformanceLibNull_cleanall">
+ <OutputDirSetup baseName="BasePerformanceLibNull" mbdFilename="${MODULE_DIR}\BasePerformanceLibNull.mbd" msaFilename="${MODULE_DIR}\BasePerformanceLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePerformanceLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePerformanceLibNull_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePerformanceLibNull*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.mbd b/MdePkg/Library/BasePrintLib/BasePrintLib.mbd new file mode 100644 index 0000000000..8ac041b255 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/BasePrintLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BasePrintLib</BaseName>
+ <Guid>a86fbfca-0183-4eeb-aa8a-762e3b7da1f3</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.msa b/MdePkg/Library/BasePrintLib/BasePrintLib.msa new file mode 100644 index 0000000000..90f47a71ca --- /dev/null +++ b/MdePkg/Library/BasePrintLib/BasePrintLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BasePrintLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>a86fbfca-0183-4eeb-aa8a-762e3b7da1f3</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PrintLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PrintLib.c</Filename>
+ <Filename>PrintLibInternal.c</Filename>
+ <Filename>PrintLibInternal.h</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BasePrintLib/PrintLib.c b/MdePkg/Library/BasePrintLib/PrintLib.c new file mode 100644 index 0000000000..9b8285f714 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLib.c @@ -0,0 +1,639 @@ +/** @file
+ Print Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLib.c
+
+**/
+
+#include "PrintLibInternal.h"
+
+typedef struct {
+ RETURN_STATUS Status;
+ CHAR8 *String;
+} STATUS_LOOKUP_TABLE_ENTRY;
+
+static CONST STATUS_LOOKUP_TABLE_ENTRY StatusString[] = {
+ { RETURN_SUCCESS, "Success" },
+ { RETURN_LOAD_ERROR, "Load Error" },
+ { RETURN_INVALID_PARAMETER, "Invalid Parameter" },
+ { RETURN_UNSUPPORTED, "Unsupported" },
+ { RETURN_BAD_BUFFER_SIZE, "Bad Buffer Size" },
+ { RETURN_BUFFER_TOO_SMALL, "Buffer Too Small" },
+ { RETURN_NOT_READY, "Not Ready" },
+ { RETURN_DEVICE_ERROR, "Device Error" },
+ { RETURN_WRITE_PROTECTED, "Write Protected" },
+ { RETURN_OUT_OF_RESOURCES, "Out of Resources" },
+ { RETURN_VOLUME_CORRUPTED, "Volume Corrupt" },
+ { RETURN_VOLUME_FULL, "Volume Full" },
+ { RETURN_NO_MEDIA, "No Media" },
+ { RETURN_MEDIA_CHANGED, "Media changed" },
+ { RETURN_NOT_FOUND, "Not Found" },
+ { RETURN_ACCESS_DENIED, "Access Denied" },
+ { RETURN_NO_RESPONSE, "No Response" },
+ { RETURN_NO_MAPPING, "No mapping" },
+ { RETURN_TIMEOUT, "Time out" },
+ { RETURN_NOT_STARTED, "Not started" },
+ { RETURN_ALREADY_STARTED, "Already started" },
+ { RETURN_ABORTED, "Aborted" },
+ { RETURN_ICMP_ERROR, "ICMP Error" },
+ { RETURN_TFTP_ERROR, "TFTP Error" },
+ { RETURN_PROTOCOL_ERROR, "Protocol Error" },
+ { RETURN_WARN_UNKNOWN_GLYPH, "Warning Unknown Glyph" },
+ { RETURN_WARN_DELETE_FAILURE, "Warning Delete Failure" },
+ { RETURN_WARN_WRITE_FAILURE, "Warning Write Failure" },
+ { RETURN_WARN_BUFFER_TOO_SMALL, "Warning Buffer Too Small" },
+ { 0, NULL }
+};
+
+
+/**
+ VSPrint function to process format and place the results in Buffer. Since a
+ VA_LIST is used this rountine allows the nesting of Vararg routines. Thus
+ this is the main print working routine
+
+ @param StartOfBuffer Unicode buffer to print the results of the parsing of Format into.
+
+ @param BufferSize Maximum number of characters to put into buffer. Zero means
+ no limit.
+
+ @param Flags Intial flags value. Can only have FORMAT_UNICODE and OUTPUT_UNICODE set
+
+ @param FormatString Unicode format string see file header for more details.
+
+ @param Marker Vararg list consumed by processing Format.
+
+ @return Number of characters printed.
+
+**/
+UINTN
+BasePrintLibVSPrint (
+ OUT CHAR8 *Buffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST Marker
+ )
+{
+ CHAR8 *OriginalBuffer;
+ CHAR8 ValueBuffer[MAXIMUM_VALUE_CHARACTERS];
+ UINTN BytesPerOutputCharacter;
+ UINTN BytesPerFormatCharacter;
+ UINTN FormatMask;
+ UINTN FormatCharacter;
+ UINTN Width;
+ UINTN Precision;
+ INT64 Value;
+ CHAR8 *ArgumentString;
+ UINTN Character;
+ GUID *TmpGuid;
+ TIME *TmpTime;
+ UINTN Count;
+ UINTN ArgumentMask;
+ INTN BytesPerArgumentCharacter;
+ UINTN ArgumentCharacter;
+ BOOLEAN Done;
+ UINTN Index;
+ CHAR8 Prefix;
+ BOOLEAN ZeroPad;
+ BOOLEAN Comma;
+ UINTN Digits;
+ UINTN Radix;
+ RETURN_STATUS Status;
+
+ OriginalBuffer = Buffer;
+
+ if ((Flags & OUTPUT_UNICODE) != 0) {
+ BytesPerOutputCharacter = 2;
+ } else {
+ BytesPerOutputCharacter = 1;
+ }
+ if ((Flags & FORMAT_UNICODE) != 0) {
+ BytesPerFormatCharacter = 2;
+ FormatMask = 0xffff;
+ } else {
+ BytesPerFormatCharacter = 1;
+ FormatMask = 0xff;
+ }
+
+ //
+ // Reserve space for the Null terminator.
+ // If BufferSize is 0, this will set BufferSize to the max unsigned value
+ //
+ BufferSize--;
+
+ //
+ // Get the first character from the format string
+ //
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+
+ //
+ // Loop until the end of the format string is reached or the output buffer is full
+ //
+ while (FormatCharacter != 0 && BufferSize > 0) {
+ //
+ // Clear all the flag bits except those that may have been passed in
+ //
+ Flags &= (OUTPUT_UNICODE | FORMAT_UNICODE);
+
+ //
+ // Set the default width to zero, and the default precision to 1
+ //
+ Width = 0;
+ Precision = 1;
+ Prefix = 0;
+ Comma = FALSE;
+ ZeroPad = FALSE;
+ Count = 0;
+ Digits = 0;
+
+ switch (FormatCharacter) {
+ case '%':
+ //
+ // Parse Flags and Width
+ //
+ for (Done = FALSE; !Done; ) {
+ Format += BytesPerFormatCharacter;
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ switch (FormatCharacter) {
+ case '.':
+ Flags |= PRECISION;
+ break;
+ case '-':
+ Flags |= LEFT_JUSTIFY;
+ break;
+ case '+':
+ Flags |= PREFIX_SIGN;
+ break;
+ case ' ':
+ Flags |= PREFIX_BLANK;
+ break;
+ case ',':
+ Flags |= COMMA_TYPE;
+ break;
+ case 'L':
+ case 'l':
+ Flags |= LONG_TYPE;
+ break;
+ case '*':
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PAD_TO_WIDTH;
+ Width = VA_ARG (Marker, UINTN);
+ } else {
+ Precision = VA_ARG (Marker, UINTN);
+ }
+ break;
+ case '0':
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PREFIX_ZERO;
+ }
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ for (Count = 0; ((FormatCharacter >= '0') && (FormatCharacter <= '9')); ){
+ Count = (Count * 10) + FormatCharacter - '0';
+ Format += BytesPerFormatCharacter;
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ }
+ Format -= BytesPerFormatCharacter;
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PAD_TO_WIDTH;
+ Width = Count;
+ } else {
+ Precision = Count;
+ }
+ break;
+ default:
+ Done = TRUE;
+ break;
+ }
+ }
+
+ //
+ // Limit the maximum field width to the remaining characters in the output buffer
+ //
+ if (Width > BufferSize) {
+ Width = BufferSize;
+ }
+
+ //
+ // Handle each argument type
+ //
+ switch (FormatCharacter) {
+ case 'X':
+ Flags |= PREFIX_ZERO;
+ //
+ // break skiped on purpose
+ //
+ case 'x':
+ Flags |= RADIX_HEX;
+ //
+ // break skiped on purpose
+ //
+ case 'd':
+ if ((Flags & LONG_TYPE) == 0) {
+ Value = (VA_ARG (Marker, INTN));
+ } else {
+ Value = VA_ARG (Marker, INT64);
+ }
+ if ((Flags & PREFIX_BLANK) != 0) {
+ Prefix = ' ';
+ }
+ if ((Flags & PREFIX_SIGN) != 0) {
+ Prefix = '+';
+ }
+ if ((Flags & COMMA_TYPE) != 0) {
+ Comma = TRUE;
+ }
+ if ((Flags & RADIX_HEX) == 0) {
+ Radix = 10;
+ if (Comma) {
+ Flags &= (~PREFIX_ZERO);
+ Precision = 1;
+ }
+ if (Value < 0) {
+ Flags |= PREFIX_SIGN;
+ Prefix = '-';
+ Value = -Value;
+ }
+ } else {
+ Radix = 16;
+ Comma = FALSE;
+ if ((Flags & LONG_TYPE) == 0 && Value < 0) {
+ Value = (UINTN)Value;
+ }
+ }
+ //
+ // Convert Value to a reversed string
+ //
+ Count = BasePrintLibValueToString (ValueBuffer, Value, Radix);
+ if (Value == 0 && Precision == 0) {
+ Count = 0;
+ }
+ ArgumentString = (CHAR8 *)ValueBuffer + Count;
+ Digits = 3 - (Count % 3);
+ if (Comma && Count != 0) {
+ Count += ((Count - 1) / 3);
+ }
+ if (Prefix != 0) {
+ Count++;
+ }
+ Flags |= ARGUMENT_REVERSED;
+ ZeroPad = TRUE;
+ if ((Flags & PREFIX_ZERO) != 0) {
+ if ((Flags & PAD_TO_WIDTH) != 0) {
+ if ((Flags & PRECISION) == 0) {
+ Precision = Width;
+ }
+ }
+ }
+ break;
+
+ case 's':
+ case 'S':
+ Flags |= ARGUMENT_UNICODE;
+ //
+ // break skipped on purpose
+ //
+ case 'a':
+ ArgumentString = (CHAR8 *)VA_ARG (Marker, CHAR8 *);
+ if (ArgumentString == NULL) {
+ Flags &= (~ARGUMENT_UNICODE);
+ ArgumentString = "<null string>";
+ }
+ break;
+
+ case 'c':
+ Character = VA_ARG (Marker, UINTN) & 0xffff;
+ ArgumentString = (CHAR8 *)&Character;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+
+ case 'g':
+ TmpGuid = VA_ARG (Marker, GUID *);
+ if (TmpGuid == NULL) {
+ ArgumentString = "<null guid>";
+ } else {
+ BasePrintLibSPrint (
+ ValueBuffer,
+ 0,
+ 0,
+ "%08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x",
+ TmpGuid->Data1,
+ TmpGuid->Data2,
+ TmpGuid->Data3,
+ TmpGuid->Data4[0],
+ TmpGuid->Data4[1],
+ TmpGuid->Data4[2],
+ TmpGuid->Data4[3],
+ TmpGuid->Data4[4],
+ TmpGuid->Data4[5],
+ TmpGuid->Data4[6],
+ TmpGuid->Data4[7]
+ );
+ ArgumentString = ValueBuffer;
+ }
+ break;
+
+ case 't':
+ TmpTime = VA_ARG (Marker, TIME *);
+ if (TmpTime == NULL) {
+ ArgumentString = "<null time>";
+ } else {
+ BasePrintLibSPrint (
+ ValueBuffer,
+ 0,
+ 0,
+ "%02d/%02d/%04d %02d:%02d",
+ TmpTime->Month,
+ TmpTime->Day,
+ TmpTime->Year,
+ TmpTime->Hour,
+ TmpTime->Minute
+ );
+ ArgumentString = ValueBuffer;
+ }
+ break;
+
+ case 'r':
+ Status = VA_ARG (Marker, RETURN_STATUS);
+ ArgumentString = ValueBuffer;
+ for (Index = 0; StatusString[Index].String != NULL; Index++) {
+ if (Status == StatusString[Index].Status) {
+ ArgumentString = StatusString[Index].String;
+ }
+ }
+ if (ArgumentString == ValueBuffer) {
+ BasePrintLibSPrint ((CHAR8 *) ValueBuffer, 0, 0, "%08X", Status);
+ }
+ break;
+
+ case '%':
+ default:
+ //
+ // if the type is '%' or unknown, then print it to the screen
+ //
+ ArgumentString = (CHAR8 *)&FormatCharacter;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+ }
+ break;
+ case '\n':
+ ArgumentString = "\r\n";
+ break;
+ default:
+ ArgumentString = (CHAR8 *)&FormatCharacter;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+ }
+
+ //
+ // Retrieve the ArgumentString attriubutes
+ //
+ if ((Flags & ARGUMENT_UNICODE) != 0) {
+ ArgumentMask = 0xffff;
+ BytesPerArgumentCharacter = 2;
+ } else {
+ ArgumentMask = 0xff;
+ BytesPerArgumentCharacter = 1;
+ }
+ if ((Flags & ARGUMENT_REVERSED) != 0) {
+ BytesPerArgumentCharacter = -BytesPerArgumentCharacter;
+ } else {
+ //
+ // Compute the number of characters in ArgumentString and store it in Count
+ // ArgumentString is either null-terminated, or it contains Precision characters
+ //
+ for (Count = 0; Count < Precision || ((Flags & PRECISION) == 0); Count++) {
+ ArgumentCharacter = ((ArgumentString[Count * BytesPerArgumentCharacter] & 0xff) | ((ArgumentString[Count * BytesPerArgumentCharacter + 1]) << 8)) & ArgumentMask;
+ if (ArgumentCharacter == 0) {
+ break;
+ }
+ }
+ }
+
+ //
+ // Limit the length of the string to append to the remaining characters in the output buffer
+ //
+ if (Count > BufferSize) {
+ Count = BufferSize;
+ }
+ if (Precision < Count) {
+ Precision = Count;
+ }
+
+ //
+ // Pad before the string
+ //
+ if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH)) {
+ Buffer = BasePrintLibFillBuffer (Buffer, Width - Precision, ' ', BytesPerOutputCharacter);
+ }
+
+ if (ZeroPad) {
+ if (Prefix != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, Prefix, BytesPerOutputCharacter);
+ }
+ Buffer = BasePrintLibFillBuffer (Buffer, Precision - Count, '0', BytesPerOutputCharacter);
+ } else {
+ Buffer = BasePrintLibFillBuffer (Buffer, Precision - Count, ' ', BytesPerOutputCharacter);
+ if (Prefix != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, Prefix, BytesPerOutputCharacter);
+ }
+ }
+
+ //
+ // Output the Prefix character if it is present
+ //
+ Index = 0;
+ if (Prefix) {
+ Index++;
+ }
+
+ //
+ // Copy the string into the output buffer performing the required type conversions
+ //
+ while (Index < Count) {
+ ArgumentCharacter = ((*ArgumentString & 0xff) | (*(ArgumentString + 1) << 8)) & ArgumentMask;
+
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, ArgumentCharacter, BytesPerOutputCharacter);
+ ArgumentString += BytesPerArgumentCharacter;
+ Index++;
+ if (Comma) {
+ Digits++;
+ if (Digits == 3) {
+ Digits = 0;
+ Index++;
+ if (Index < Count) {
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, ',', BytesPerOutputCharacter);
+ }
+ }
+ }
+ }
+
+ //
+ // Pad after the string
+ //
+ if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH | LEFT_JUSTIFY)) {
+ Buffer = BasePrintLibFillBuffer (Buffer, Width - Precision, ' ', BytesPerOutputCharacter);
+ }
+
+ //
+ // Reduce the number of characters
+ //
+ BufferSize -= Count;
+
+ //
+ // Get the next character from the format string
+ //
+ Format += BytesPerFormatCharacter;
+
+ //
+ // Get the next character from the format string
+ //
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ }
+
+ //
+ // Null terminate the Unicode or ASCII string
+ //
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, 0, BytesPerOutputCharacter);
+
+ return ((Buffer - OriginalBuffer) / BytesPerOutputCharacter);
+}
+
+UINTN
+BasePrintLibSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, Flags, FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+UnicodeVSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, FORMAT_UNICODE | OUTPUT_UNICODE, (CHAR8 *)FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+UnicodeSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return UnicodeVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+UnicodeVSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, OUTPUT_UNICODE,FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+UnicodeSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return UnicodeVSPrintAsciiFormat (StartOfBuffer, BufferSize >> 1, FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+AsciiVSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, 0, FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+AsciiSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return AsciiVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+AsciiVSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, FORMAT_UNICODE, (CHAR8 *)FormatString, Marker);
+}
+
+UINTN
+EFIAPI
+AsciiSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return AsciiVSPrintUnicodeFormat (StartOfBuffer, BufferSize, FormatString, Marker);
+}
diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.c b/MdePkg/Library/BasePrintLib/PrintLibInternal.c new file mode 100644 index 0000000000..24d8b56598 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.c @@ -0,0 +1,153 @@ +/** @file
+ Print Library worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLibInternal.c
+
+**/
+
+#include "PrintLibInternal.h"
+
+static CONST CHAR8 mHexStr[] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
+
+CHAR8 *
+BasePrintLibFillBuffer (
+ CHAR8 *Buffer,
+ INTN Length,
+ UINTN Character,
+ INTN Increment
+ )
+{
+ INTN Index;
+
+ for (Index = 0; Index < Length; Index++) {
+ *Buffer = (CHAR8) Character;
+ *(Buffer + 1) = (CHAR8) (Character >> 8);
+ Buffer += Increment;
+ }
+ return Buffer;
+}
+
+/**
+ Print worker function that prints a Value as a decimal number in Buffer.
+
+ @param Buffer Location to place the Unicode or ASCII string of Value.
+
+ @param Value Value to convert to a Decimal or Hexidecimal string in Buffer.
+
+ @param Flags Flags to use in printing string, see file header for details.
+
+ @param Precision Minimum number of digits to return in the ASCII string
+
+ @return Number of characters printed.
+
+**/
+UINTN
+EFIAPI
+BasePrintLibValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN INT64 Value,
+ IN UINTN Radix
+ )
+{
+ UINTN Digits;
+ UINT32 Remainder;
+
+ //
+ // Loop to convert one digit at a time in reverse order
+ //
+ *(Buffer++) = 0;
+ Digits = 0;
+ do {
+ Value = (INT64)DivU64x32Remainder ((UINT64)Value, (UINT32)Radix, &Remainder);
+ *(Buffer++) = mHexStr[Remainder];
+ Digits++;
+ } while (Value != 0);
+ return Digits;
+}
+
+UINTN
+BasePrintLibConvertValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width,
+ IN UINTN Increment
+ )
+{
+ CHAR8 *OriginalBuffer;
+ CHAR8 ValueBuffer[MAXIMUM_VALUE_CHARACTERS];
+ UINTN Count;
+ UINTN Digits;
+ UINTN Index;
+
+ OriginalBuffer = Buffer;
+
+ if (Width == 0 || (Flags & COMMA_TYPE) != 0) {
+ Flags &= (~PREFIX_ZERO);
+ }
+
+ if (Width == 0 || Width > (MAXIMUM_VALUE_CHARACTERS - 1)) {
+ Width = MAXIMUM_VALUE_CHARACTERS - 1;
+ }
+
+ if (Value < 0) {
+ Value = -Value;
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, '-', Increment);
+ }
+
+ Count = BasePrintLibValueToString (ValueBuffer, Value, 10);
+
+ if ((Flags & PREFIX_ZERO) != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, Width - Count, '0', Increment);
+ }
+
+ Digits = 3 - (Count % 3);
+ for (Index = 0; Index < Count; Index++) {
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, ValueBuffer[Count - Index], Increment);
+ if ((Flags & COMMA_TYPE) != 0) {
+ Digits++;
+ if (Digits == 3) {
+ Digits = 0;
+ if ((Index + 1) < Count) {
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, ',', Increment);
+ }
+ }
+ }
+ }
+
+ Buffer = BasePrintLibFillBuffer (Buffer, 1, 0, Increment);
+
+ return ((Buffer - OriginalBuffer) / Increment);
+}
+
+
+UINTN
+UnicodeValueToString (
+ IN OUT CHAR16 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ )
+{
+ return BasePrintLibConvertValueToString ((CHAR8 *)Buffer, Flags, Value, Width, 2);
+}
+
+UINTN
+AsciiValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ )
+{
+ return BasePrintLibConvertValueToString ((CHAR8 *)Buffer, Flags, Value, Width, 1);
+}
diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.h b/MdePkg/Library/BasePrintLib/PrintLibInternal.h new file mode 100644 index 0000000000..de08f0edfc --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.h @@ -0,0 +1,87 @@ +/** @file
+ Print Library.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLibInternal.h
+
+**/
+
+
+
+//
+// Print primitives
+//
+//#define LEFT_JUSTIFY 0x01
+#define PREFIX_SIGN 0x02
+#define PREFIX_BLANK 0x04
+//#define COMMA_TYPE 0x08
+#define LONG_TYPE 0x10
+//#define PREFIX_ZERO 0x20
+#define OUTPUT_UNICODE 0x40
+#define RADIX_HEX 0x80
+#define FORMAT_UNICODE 0x100
+#define PAD_TO_WIDTH 0x200
+#define ARGUMENT_UNICODE 0x400
+#define PRECISION 0x800
+#define ARGUMENT_REVERSED 0x1000
+
+///
+/// Define the maximum number of characters that are required to encode
+/// a decimal, hexidecimal, GUID, or TIME value with a Nll terminator.
+/// Maximum Length Decimal String = 28 "-9,223,372,036,854,775,808"
+/// Maximum Length Hexidecimal String = 17 "FFFFFFFFFFFFFFFF"
+/// Maximum Length GUID = 37 "00000000-0000-0000-0000-000000000000"
+/// Maximum Length TIME = 17 "12/12/2006 12:12"
+///
+#define MAXIMUM_VALUE_CHARACTERS 38
+
+//
+//
+//
+typedef struct {
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Day;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
+ UINT8 Pad1;
+ UINT32 Nanosecond;
+ INT16 TimeZone;
+ UINT8 Daylight;
+ UINT8 Pad2;
+} TIME;
+
+UINTN
+BasePrintLibSPrint (
+ OUT CHAR8 *Buffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+CHAR8 *
+BasePrintLibFillBuffer (
+ CHAR8 *Buffer,
+ INTN Length,
+ UINTN Character,
+ INTN Increment
+ );
+
+UINTN
+EFIAPI
+BasePrintLibValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN INT64 Value,
+ IN UINTN Radix
+ );
+
diff --git a/MdePkg/Library/BasePrintLib/build.xml b/MdePkg/Library/BasePrintLib/build.xml new file mode 100644 index 0000000000..66f9c88641 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BasePrintLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BasePrintLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BasePrintLib">
+ <GenBuild baseName="BasePrintLib" mbdFilename="${MODULE_DIR}\BasePrintLib.mbd" msaFilename="${MODULE_DIR}\BasePrintLib.msa"/>
+ </target>
+ <target depends="BasePrintLib_clean" name="clean"/>
+ <target depends="BasePrintLib_cleanall" name="cleanall"/>
+ <target name="BasePrintLib_clean">
+ <OutputDirSetup baseName="BasePrintLib" mbdFilename="${MODULE_DIR}\BasePrintLib.mbd" msaFilename="${MODULE_DIR}\BasePrintLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePrintLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePrintLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BasePrintLib_cleanall">
+ <OutputDirSetup baseName="BasePrintLib" mbdFilename="${MODULE_DIR}\BasePrintLib.mbd" msaFilename="${MODULE_DIR}\BasePrintLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BasePrintLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BasePrintLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BasePrintLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.mbd b/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.mbd new file mode 100644 index 0000000000..abc965c519 --- /dev/null +++ b/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseReportStatusCodeLibNull</BaseName>
+ <Guid>55c61087-7367-4546-bc32-4937c5e6aff3</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.msa b/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.msa new file mode 100644 index 0000000000..dae4508335 --- /dev/null +++ b/MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.msa @@ -0,0 +1,61 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseReportStatusCodeLibNull</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>55c61087-7367-4546-bc32-4937c5e6aff3</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">ReportStatusCodeLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>ReportStatusCodeLib.c</Filename>
+ <Filename>PostCode.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeDataTypeDebug</C_Name>
+ </GuidEntry>
+ </Guids>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdReportStatusCodePropertyMask</C_Name>
+ <Token>0x00000007</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseReportStatusCodeLibNull/PostCode.c b/MdePkg/Library/BaseReportStatusCodeLibNull/PostCode.c new file mode 100644 index 0000000000..3d0ce7cb8f --- /dev/null +++ b/MdePkg/Library/BaseReportStatusCodeLibNull/PostCode.c @@ -0,0 +1,125 @@ +/** @file
+ Report Status Code Library Post Code functions for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x\n", Value));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x - %s\n", Value, Description));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the
+ REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeDescriptionEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BaseReportStatusCodeLibNull/ReportStatusCodeLib.c b/MdePkg/Library/BaseReportStatusCodeLibNull/ReportStatusCodeLib.c new file mode 100644 index 0000000000..752dc72c79 --- /dev/null +++ b/MdePkg/Library/BaseReportStatusCodeLibNull/ReportStatusCodeLib.c @@ -0,0 +1,439 @@ +/** @file
+ Report Status Code Library template for Base modules.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Converts a status code to an 8-bit POST code value.
+
+ Converts the status code specified by CodeType and Value to an 8-bit POST code
+ and returns the 8-bit POST code in PostCode. If CodeType is an
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned.
+
+ If PostCode is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param PostCode A pointer to the 8-bit POST code value to return.
+
+ @retval TRUE The status code specified by CodeType and Value was converted
+ to an 8-bit POST code and returned in PostCode.
+ @retval FALSE The status code specified by CodeType and Value could not be
+ converted to an 8-bit POST code value.
+
+**/
+BOOLEAN
+EFIAPI
+CodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ )
+{
+ //
+ // If PostCode is NULL, then ASSERT()
+ //
+ ASSERT (PostCode != NULL);
+
+ //
+ // Convert Value to an 8 bit post code
+ //
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ||
+ ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ) {
+ *PostCode = (UINT8) (((Value & EFI_STATUS_CODE_CLASS_MASK) >> 24) << 5);
+ *PostCode |= (UINT8) (((Value & EFI_STATUS_CODE_SUBCLASS_MASK) >> 16) & 0x1f);
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts ASSERT() information from a status code structure.
+
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()
+ arguments specified by Filename, Description, and LineNumber. If CodeType is
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract
+ Filename, Description, and LineNumber from the optional data area of the
+ status code buffer specified by Data. The optional data area of Data contains
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the
+ ASSERT() information could be extracted from Data, then return TRUE.
+ Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If Filename is NULL, then ASSERT().
+ If Description is NULL, then ASSERT().
+ If LineNumber is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param Data Pointer to status code data buffer.
+ @param Filename Pointer to the source file name that generated the ASSERT().
+ @param Description Pointer to the description of the ASSERT().
+ @param LineNumber Pointer to source line number that generated the ASSERT().
+
+ @retval TRUE The status code specified by CodeType, Value, and Data was
+ converted ASSERT() arguments specified by Filename, Description,
+ and LineNumber.
+ @retval FALSE The status code specified by CodeType, Value, and Data could
+ not be converted to ASSERT() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractAssertInfo (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT CHAR8 **Filename,
+ OUT CHAR8 **Description,
+ OUT UINT32 *LineNumber
+ )
+{
+ EFI_DEBUG_ASSERT_DATA *AssertData;
+
+ ASSERT (Data != NULL);
+ ASSERT (Filename != NULL);
+ ASSERT (Description != NULL);
+ ASSERT (LineNumber != NULL);
+
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) &&
+ ((CodeType & EFI_STATUS_CODE_SEVERITY_MASK) == EFI_ERROR_UNRECOVERED) &&
+ ((Value & EFI_STATUS_CODE_OPERATION_MASK) == EFI_SW_EC_ILLEGAL_SOFTWARE_STATE)) {
+ AssertData = (EFI_DEBUG_ASSERT_DATA *)(Data + 1);
+ *Filename = (CHAR8 *)(AssertData + 1);
+ *Description = *Filename + AsciiStrLen (*Filename) + 1;
+ *LineNumber = AssertData->LineNumber;
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts DEBUG() information from a status code structure.
+
+ Converts the status code specified by Data to the DEBUG() arguments specified
+ by ErrorLevel, Marker, and Format. If type GUID in Data is
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and
+ Format from the optional data area of the status code buffer specified by Data.
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for
+ the Format. If the DEBUG() information could be extracted from Data, then
+ return TRUE. Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If ErrorLevel is NULL, then ASSERT().
+ If Marker is NULL, then ASSERT().
+ If Format is NULL, then ASSERT().
+
+ @param Data Pointer to status code data buffer.
+ @param ErrorLevel Pointer to error level mask for a debug message.
+ @param Marker Pointer to the variable argument list associated with Format.
+ @param Format Pointer to a Null-terminated ASCII format string of a
+ debug message.
+
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments
+ specified by ErrorLevel, Marker, and Format.
+ @retval FALSE The status code specified by Data could not be converted to
+ DEBUG() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractDebugInfo (
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT UINT32 *ErrorLevel,
+ OUT VA_LIST *Marker,
+ OUT CHAR8 **Format
+ )
+{
+ EFI_DEBUG_INFO *DebugInfo;
+
+ ASSERT (Data != NULL);
+ ASSERT (ErrorLevel != NULL);
+ ASSERT (Marker != NULL);
+ ASSERT (Format != NULL);
+
+ //
+ // If the GUID type is not EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID then return FALSE
+ //
+ if (!CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeDebugGuid)) {
+ return FALSE;
+ }
+
+ //
+ // Retrieve the debug information from the status code record
+ //
+ DebugInfo = (EFI_DEBUG_INFO *)(Data + 1);
+
+ *ErrorLevel = DebugInfo->ErrorLevel;
+
+ //
+ // The first 12 * UINTN bytes of the string are really an
+ // argument stack to support varargs on the Format string.
+ //
+ *Marker = (VA_LIST) (DebugInfo + 1);
+ *Format = (CHAR8 *)(((UINT64 *)*Marker) + 12);
+
+ return TRUE;
+}
+
+
+/**
+ Reports a status code.
+
+ Reports the status code specified by the parameters Type and Value. Status
+ code also require an instance, caller ID, and extended data. This function
+ passed in a zero instance, NULL extended data, and a caller ID of
+ gEfiCallerIdGuid, which is the GUID for the module.
+
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCode() must return immediately.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a
+ device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data.
+
+ Allocates and fills in the extended data section of a status code with the
+ Device Path Protocol specified by DevicePath. This function is responsible
+ for allocating a buffer large enough for the standard header and the device
+ path. The standard header is filled in with a GUID of
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero
+ instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If
+ ReportStatusCodeWithDevicePath() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If DevicePath is NULL, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithDevicePath (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ ASSERT (DevicePath != NULL);
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ Reports a status code with an extended data buffer.
+
+ Allocates and fills in the extended data section of a status code with the
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData
+ is assumed to be one of the data structures specified in Related Definitions.
+ These data structure do not have the standard header, so this function is
+ responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported
+ with a zero instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If
+ ReportStatusCodeWithExtendedData() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL, then ASSERT().
+ If ExtendedDataSize is 0, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithExtendedData (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN VOID *ExtendedData,
+ IN UINTN ExtendedDataSize
+ )
+{
+ ASSERT (ExtendedData != NULL);
+ ASSERT (ExtendedDataSize != 0);
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ Reports a status code with full parameters.
+
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize
+ is 0, then an extended data buffer is not reported. If ExtendedData is not
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated.
+ ExtendedData is assumed not have the standard status code header, so this function
+ is responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled in
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with
+ an instance specified by Instance and a caller ID specified by CallerId. If
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.
+
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate
+ the extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeEx (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_GUID *ExtendedDataGuid OPTIONAL,
+ IN VOID *ExtendedData OPTIONAL,
+ IN UINTN ExtendedDataSize
+ )
+{
+ ASSERT (!((ExtendedData == NULL) && (ExtendedDataSize != 0)));
+ ASSERT (!((ExtendedData != NULL) && (ExtendedDataSize == 0)));
+ return EFI_UNSUPPORTED;
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportProgressCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportErrorCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportDebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BaseReportStatusCodeLibNull/build.xml b/MdePkg/Library/BaseReportStatusCodeLibNull/build.xml new file mode 100644 index 0000000000..1ef3f9766f --- /dev/null +++ b/MdePkg/Library/BaseReportStatusCodeLibNull/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseReportStatusCodeLibNull"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseReportStatusCodeLibNull"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseReportStatusCodeLibNull">
+ <GenBuild baseName="BaseReportStatusCodeLibNull" mbdFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.mbd" msaFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.msa"/>
+ </target>
+ <target depends="BaseReportStatusCodeLibNull_clean" name="clean"/>
+ <target depends="BaseReportStatusCodeLibNull_cleanall" name="cleanall"/>
+ <target name="BaseReportStatusCodeLibNull_clean">
+ <OutputDirSetup baseName="BaseReportStatusCodeLibNull" mbdFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.mbd" msaFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseReportStatusCodeLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseReportStatusCodeLibNull_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseReportStatusCodeLibNull_cleanall">
+ <OutputDirSetup baseName="BaseReportStatusCodeLibNull" mbdFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.mbd" msaFilename="${MODULE_DIR}\BaseReportStatusCodeLibNull.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseReportStatusCodeLibNull_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseReportStatusCodeLibNull_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseReportStatusCodeLibNull*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.mbd b/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.mbd new file mode 100644 index 0000000000..e548f14355 --- /dev/null +++ b/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.mbd @@ -0,0 +1,33 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseSmbusLib</BaseName>
+ <Guid>4c38a173-b317-4f29-a7bf-1cc7e10ccb10</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-17 09:00</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+ <BuildOptions ToolChain="MSFT">
+ <Option>C_PROJ_FLAGS = ${C_PROJ_FLAGS}</Option>
+ </BuildOptions>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.msa b/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.msa new file mode 100644 index 0000000000..00c2aa4a03 --- /dev/null +++ b/MdePkg/Library/BaseSmbusLib/BaseSmbusLib.msa @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseSmbusLib</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>4c38a173-b317-4f29-a7bf-1cc7e10ccb10</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-17 09:00</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">SmBusLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PciLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>SmbusLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseSmbusLib/SmbusLib.c b/MdePkg/Library/BaseSmbusLib/SmbusLib.c new file mode 100644 index 0000000000..5aad978836 --- /dev/null +++ b/MdePkg/Library/BaseSmbusLib/SmbusLib.c @@ -0,0 +1,557 @@ +/** @file
+ Base SMBUS library implementation built upon I/O library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmbusLib.h
+
+**/
+
+RETURN_STATUS
+EFIAPI
+BaseSmBusLibConstructor (
+ IN VOID *Param1,
+ IN VOID *Param2
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+//
+// BUGBUG: use PCD to retrieve BUS, DEV, FUNC & OFFSET for SMBUS host BAR
+//
+#define SMBUS_HOST_BUS 0
+#define SMBUS_HOST_DEV 31
+#define SMBUS_HOST_FUNC 3
+#define SMBUS_HOST_SMB_BASE 0x20
+
+//
+// Offsets of registers for SMBUS controller
+//
+#define R_HST_STS 0
+#define R_HST_CNT 2
+#define R_HST_CMD 3
+#define R_XMIT_SLVA 4
+#define R_HST_D0 5
+#define R_HST_D1 6
+#define R_HOST_BLOCK_DB 7
+#define R_PEC 8
+#define R_RCV_SLVA 9
+#define R_SLV_DATA 0x0a
+#define R_AUX_STS 0x0c
+#define R_AUX_CTL 0x0d
+#define R_SMLINK_PIN_CTL 0x0e
+#define R_SMBUS_PIN_CTL 0x0f
+#define R_SLV_STS 0x10
+#define R_SLV_CMD 0x11
+#define R_NOTIFY_DADDR 0x14
+#define R_NOTIFY_DLOW 0x16
+#define R_NOTIFY_DHIGH 0x17
+
+//
+// Bits in HST_STS
+//
+#define B_HST_STS_DS 0x80
+#define B_HST_STS_INUSE 0x40
+#define B_HST_STS_SMBALERT 0x20
+#define B_HST_STS_FAILED 0x10
+#define B_HST_STS_BUS_ERR 0x08
+#define B_HST_STS_DEV_ERR 0x04
+#define B_HST_STS_INTR 0x02
+#define B_HST_STS_BUSY 0x01
+#define B_HST_STS_ERR ( B_HST_STS_BUS_ERR | \
+ B_HST_STS_DEV_ERR | \
+ B_HST_STS_FAILED )
+#define B_HST_STS_ALL ( B_HST_STS_DS | \
+ B_HST_STS_INUSE | \
+ B_HST_STS_SMBALERT | \
+ B_HST_STS_ERR | \
+ B_HST_STS_INTR )
+
+//
+// Bits in HST_CNT
+//
+#define B_HST_CNT_PEC 0x80
+#define B_HST_CNT_START 0x40
+#define B_HST_CNT_LAST_BYTE 0x20
+#define B_HST_CNT_SMB_CMD 0x1c
+#define B_HST_CNT_KILL 0x02
+#define B_HST_CNT_INTREN 0x01
+
+//
+// SMBUS Protocols
+//
+#define B_SMB_CMD_QUICK 0
+#define B_SMB_CMD_BYTE 1
+#define B_SMB_CMD_BYTE_DATA 2
+#define B_SMB_CMD_WORD_DATA 3
+#define B_SMB_CMD_PROCESS_CALL 4
+#define B_SMB_CMD_BLOCK 5
+#define B_SMB_CMD_I2C 6
+#define B_SMB_CMD_BLOCK_PROCESS 7
+
+//
+// Bits in AUX_CTL
+//
+#define B_AUX_CTL_E32B 0x02
+#define B_AUX_CTL_AAC 0x01
+
+//
+// SMBUS Rd/Wr control
+//
+#define B_SMBUS_READ 1
+#define B_SMBUS_WRITE 0
+
+static
+UINT16
+EFIAPI
+GetSmBusIOBaseAddress (
+ VOID
+ )
+{
+ UINT32 SmbusBar;
+
+ SmbusBar = PciRead32 (
+ PCI_LIB_ADDRESS (
+ SMBUS_HOST_BUS,
+ SMBUS_HOST_DEV,
+ SMBUS_HOST_FUNC,
+ SMBUS_HOST_SMB_BASE
+ )
+ );
+ ASSERT ((SmbusBar & 0xffff001f) == 1);
+ return (UINT16)(SmbusBar & ~1);
+}
+
+static
+BOOLEAN
+EFIAPI
+SmBusAcquire (
+ IN UINT16 SmBusBase
+ )
+{
+ UINT8 HstSts;
+
+ HstSts = IoRead8 (SmBusBase + R_HST_STS);
+ if (HstSts & B_HST_STS_INUSE) {
+ return FALSE;
+ }
+
+ //
+ // BUGBUG: Dead loop may occur here
+ //
+ while (HstSts & B_HST_STS_BUSY) {
+ ASSERT (HstSts & B_HST_STS_INUSE);
+ HstSts = IoRead8 (SmBusBase + R_HST_STS);
+ }
+ return TRUE;
+}
+
+static
+VOID
+EFIAPI
+SmBusStart (
+ IN UINT16 SmBusBase,
+ IN UINT8 SmBusProtocol,
+ IN UINT8 SlaveAddress
+ )
+{
+ IoWrite8 (SmBusBase + R_XMIT_SLVA, SlaveAddress);
+ IoWrite8 (
+ SmBusBase + R_HST_CNT,
+ IoBitFieldWrite8 (SmBusBase + R_HST_CNT, 2, 4, SmBusProtocol) |
+ B_HST_CNT_START
+ );
+}
+
+static
+UINT8
+EFIAPI
+SmBusWait (
+ IN UINT16 SmBusBase
+ )
+{
+ UINT8 HstSts;
+
+ while (((HstSts = IoRead8 (SmBusBase + R_HST_STS)) & B_HST_STS_INTR) == 0);
+ return HstSts;
+}
+
+static
+VOID
+EFIAPI
+SmBusCleanup (
+ IN UINT16 SmBusBase
+ )
+{
+ IoWrite8 (SmBusBase + R_HST_STS, B_HST_STS_ALL);
+}
+
+static
+RETURN_STATUS
+EFIAPI
+SmBusQuick (
+ IN UINT8 SmBusAddress
+ )
+{
+ RETURN_STATUS Status;
+ UINT16 SmBusBase;
+
+ SmBusBase = GetSmBusIOBaseAddress ();
+ if (!SmBusAcquire (SmBusBase)) {
+ return RETURN_TIMEOUT;
+ }
+
+ SmBusStart (SmBusAddress, B_SMB_CMD_QUICK, SmBusAddress);
+ if (SmBusWait (SmBusAddress) & B_HST_STS_ERR) {
+ Status = RETURN_DEVICE_ERROR;
+ } else {
+ Status = RETURN_SUCCESS;
+ }
+
+ SmBusCleanup (SmBusAddress);
+ return Status;
+}
+
+VOID
+EFIAPI
+SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status
+ )
+{
+ RETURN_STATUS RetStatus;
+
+ ASSERT ((SmBusAddress & ~0xfe) == 0);
+ RetStatus = SmBusQuick ((UINT8)SmBusAddress | B_SMBUS_READ);
+ if (Status) {
+ *Status = RetStatus;
+ }
+}
+
+BOOLEAN
+EFIAPI
+SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status
+ )
+{
+ RETURN_STATUS RetStatus;
+
+ ASSERT ((SmBusAddress & ~0xfe) == 0);
+ RetStatus = SmBusQuick ((UINT8)SmBusAddress | B_SMBUS_WRITE);
+ if (Status) {
+ *Status = RetStatus;
+ }
+ return (BOOLEAN)!RETURN_ERROR (RetStatus);
+}
+
+static
+UINT16
+EFIAPI
+SmBusByteWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ IN UINT8 SmBusProtocol,
+ OUT RETURN_STATUS *Status
+ )
+{
+ RETURN_STATUS RetStatus;
+ UINT16 SmBusBase;
+
+ if (Status == NULL) {
+ Status = &RetStatus;
+ }
+
+ SmBusBase = GetSmBusIOBaseAddress ();
+ if (!SmBusAcquire (SmBusBase)) {
+ *Status = RETURN_TIMEOUT;
+ return Value;
+ }
+
+ IoWrite8 (SmBusBase + R_HST_CMD, (UINT8)(SmBusAddress >> 8));
+ IoWrite8 (SmBusBase + R_HST_D0, (UINT8)Value);
+ IoWrite8 (SmBusBase + R_HST_D1, (UINT8)(Value >> 8));
+ if ((INTN)SmBusAddress < 0) {
+ IoOr8 (SmBusBase + R_HST_CNT, B_HST_CNT_PEC);
+ IoOr8 (SmBusBase + R_AUX_CTL, B_AUX_CTL_AAC);
+ } else {
+ IoAnd8 (SmBusBase + R_HST_CNT, (UINT8)~B_HST_CNT_PEC);
+ IoAnd8 (SmBusBase + R_AUX_CTL, (UINT8)~B_AUX_CTL_AAC);
+ }
+
+ SmBusStart (SmBusBase, SmBusProtocol, (UINT8)SmBusAddress);
+
+ if (SmBusWait (SmBusBase) & B_HST_STS_ERR) {
+ *Status = RETURN_DEVICE_ERROR;
+ } else {
+ *Status = RETURN_SUCCESS;
+ Value = IoRead8 (SmBusBase + R_HST_D0);
+ Value |= (UINT16)IoRead8 (SmBusBase + R_HST_D1) << 8;
+ }
+
+ SmBusCleanup (SmBusBase);
+ return Value;
+}
+
+UINT8
+EFIAPI
+SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfe | MAX_BIT)) == 0);
+ return (UINT8)SmBusByteWord (
+ SmBusAddress | B_SMBUS_READ,
+ 0,
+ B_SMB_CMD_BYTE,
+ Status
+ );
+}
+
+UINT8
+EFIAPI
+SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfe | MAX_BIT)) == 0);
+ return (UINT8)SmBusByteWord (
+ SmBusAddress | B_SMBUS_WRITE,
+ Value,
+ B_SMB_CMD_BYTE,
+ Status
+ );
+}
+
+UINT8
+EFIAPI
+SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffe | MAX_BIT)) == 0);
+ return (UINT8)SmBusByteWord (
+ SmBusAddress | B_SMBUS_READ,
+ 0,
+ B_SMB_CMD_BYTE_DATA,
+ Status
+ );
+}
+
+UINT8
+EFIAPI
+SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT (((UINT32)SmBusAddress & ~(0xfffe | MAX_BIT)) == 0);
+ return (UINT8)SmBusByteWord (
+ SmBusAddress | B_SMBUS_WRITE,
+ Value,
+ B_SMB_CMD_BYTE_DATA,
+ Status
+ );
+}
+
+UINT16
+EFIAPI
+SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffe | MAX_BIT)) == 0);
+ return SmBusByteWord (
+ SmBusAddress | B_SMBUS_READ,
+ 0,
+ B_SMB_CMD_WORD_DATA,
+ Status
+ );
+}
+
+UINT16
+EFIAPI
+SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffe | MAX_BIT)) == 0);
+ return SmBusByteWord (
+ SmBusAddress | B_SMBUS_WRITE,
+ Value,
+ B_SMB_CMD_WORD_DATA,
+ Status
+ );
+}
+
+UINT16
+EFIAPI
+SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffe | MAX_BIT)) == 0);
+ return SmBusByteWord (
+ SmBusAddress | B_SMBUS_WRITE,
+ Value,
+ B_SMB_CMD_PROCESS_CALL,
+ Status
+ );
+}
+
+static
+UINTN
+EFIAPI
+SmBusBlock (
+ IN UINTN SmBusAddress,
+ IN UINT8 SmBusProtocol,
+ IN VOID *InBuffer,
+ OUT VOID *OutBuffer,
+ OUT RETURN_STATUS *Status
+ )
+{
+ RETURN_STATUS RetStatus;
+ UINT16 SmBusBase;
+ UINTN Index;
+ UINTN BytesCount;
+
+ BytesCount = (UINT8)(SmBusAddress >> 16);
+ ASSERT (BytesCount <= 32);
+
+ if (Status == NULL) {
+ Status = &RetStatus;
+ }
+
+ SmBusBase = GetSmBusIOBaseAddress ();
+ if (!SmBusAcquire (SmBusBase)) {
+ *Status = RETURN_TIMEOUT;
+ return 0;
+ }
+
+ IoWrite8 (SmBusBase + R_HST_CMD, (UINT8)(SmBusAddress >> 8));
+ IoWrite8 (SmBusBase + R_HST_D0, (UINT8)BytesCount);
+ if ((INTN)SmBusAddress < 0) {
+ IoOr8 (SmBusBase + R_HST_CNT, B_HST_CNT_PEC);
+ IoOr8 (SmBusBase + R_AUX_CTL, B_AUX_CTL_AAC);
+ } else {
+ IoAnd8 (SmBusBase + R_HST_CNT, (UINT8)~B_HST_CNT_PEC);
+ IoAnd8 (SmBusBase + R_AUX_CTL, (UINT8)~B_AUX_CTL_AAC);
+ }
+
+ //
+ // BUGBUG: E32B bit does not exist in ICH3 or earlier
+ //
+ IoOr8 (SmBusBase + R_AUX_CTL, B_AUX_CTL_E32B);
+ ASSERT (IoRead8 (SmBusBase + R_AUX_CTL) & B_AUX_CTL_E32B);
+ for (Index = 0; InBuffer != NULL && Index < BytesCount; Index++) {
+ IoWrite8 (SmBusBase + R_HOST_BLOCK_DB, ((UINT8*)InBuffer)[Index]);
+ }
+
+ SmBusStart (SmBusBase, SmBusProtocol, (UINT8)SmBusAddress);
+
+ if (SmBusWait (SmBusBase) & B_HST_STS_ERR) {
+ *Status = RETURN_DEVICE_ERROR;
+ } else {
+ *Status = RETURN_SUCCESS;
+ BytesCount = IoRead8 (SmBusBase + R_HST_D0);
+ for (Index = 0; OutBuffer != NULL && Index < BytesCount; Index++) {
+ ((UINT8*)OutBuffer)[Index] = IoRead8 (SmBusBase + R_HOST_BLOCK_DB);
+ }
+ }
+
+ SmBusCleanup (SmBusBase);
+ return BytesCount;
+}
+
+UINTN
+EFIAPI
+SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffffe | MAX_BIT)) == 0);
+ return SmBusBlock (
+ SmBusAddress | B_SMBUS_READ,
+ B_SMB_CMD_BLOCK,
+ NULL,
+ Buffer,
+ Status
+ );
+}
+
+UINTN
+EFIAPI
+SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffffe | MAX_BIT)) == 0);
+ return SmBusBlock (
+ SmBusAddress | B_SMBUS_WRITE,
+ B_SMB_CMD_BLOCK,
+ Buffer,
+ NULL,
+ Status
+ );
+}
+
+UINTN
+EFIAPI
+SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ IN VOID *OutBuffer,
+ OUT VOID *InBuffer,
+ OUT RETURN_STATUS *Status
+ )
+{
+ ASSERT ((SmBusAddress & ~(0xfffffe | MAX_BIT)) == 0);
+ return SmBusBlock (
+ SmBusAddress | B_SMBUS_WRITE,
+ B_SMB_CMD_BLOCK_PROCESS,
+ OutBuffer,
+ InBuffer,
+ Status
+ );
+}
+
+RETURN_STATUS
+EFIAPI
+SmBusArpAll (
+ IN UINTN SmBusAddress
+ );
+
+RETURN_STATUS
+EFIAPI
+SmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid
+ );
+
+RETURN_STATUS
+EFIAPI
+SmBusGetUuid (
+ IN UINTN SmBusAddress,
+ OUT GUID *Uuid
+ );
diff --git a/MdePkg/Library/BaseSmbusLib/build.xml b/MdePkg/Library/BaseSmbusLib/build.xml new file mode 100644 index 0000000000..95dfe52bd3 --- /dev/null +++ b/MdePkg/Library/BaseSmbusLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseSmbusLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseSmbusLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseSmbusLib">
+ <GenBuild baseName="BaseSmbusLib" mbdFilename="${MODULE_DIR}\BaseSmbusLib.mbd" msaFilename="${MODULE_DIR}\BaseSmbusLib.msa"/>
+ </target>
+ <target depends="BaseSmbusLib_clean" name="clean"/>
+ <target depends="BaseSmbusLib_cleanall" name="cleanall"/>
+ <target name="BaseSmbusLib_clean">
+ <OutputDirSetup baseName="BaseSmbusLib" mbdFilename="${MODULE_DIR}\BaseSmbusLib.mbd" msaFilename="${MODULE_DIR}\BaseSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseSmbusLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseSmbusLib_cleanall">
+ <OutputDirSetup baseName="BaseSmbusLib" mbdFilename="${MODULE_DIR}\BaseSmbusLib.mbd" msaFilename="${MODULE_DIR}\BaseSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseSmbusLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseSmbusLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.mbd b/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.mbd new file mode 100644 index 0000000000..d597fe0b13 --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseTimerLibLocalApic</BaseName>
+ <Guid>b5a05743-9b71-489b-a0ed-a0eb3950d23b</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-13 16:57</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.msa b/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.msa new file mode 100644 index 0000000000..7d83751219 --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/BaseTimerLibLocalApic.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseTimerLibLocalApic</BaseName>
+ <ModuleType>BASE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>b5a05743-9b71-489b-a0ed-a0eb3950d23b</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-13 16:57</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">TimerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Arch ArchType="IA32">
+ <Filename>x86TimerLib.c</Filename>
+ </Arch>
+ <Arch ArchType="X64">
+ <Filename>x86TimerLib.c</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>Ipf\CallPalProc.s</Filename>
+ <Filename>Ipf\ReadItc.s</Filename>
+ <Filename>Ipf\IpfTimerLib.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseTimerLibLocalApic/Ipf/CallPalProc.s b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/CallPalProc.s new file mode 100644 index 0000000000..18b0f5815a --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/CallPalProc.s @@ -0,0 +1,38 @@ +/// @file
+/// Contains an implementation of CallPalProcStatic on Itanium-based
+/// architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: CallPalProc.s
+///
+///
+
+.auto
+.text
+
+.proc CallPalProcStatic
+.type CallPalProcStatic, @function
+CallPalProcStatic::
+ mov r9 = ar.k5
+ mov r8 = ip
+ add r8 = (PalProcReturn - CallPalProcStatic), r8
+ mov r28 = r32
+ mov b7 = r9
+ mov r29 = r33
+ mov r30 = r34
+ mov r31 = r35
+ mov r32 = b0
+ mov b0 = r8
+ br.sptk b7
+PalProcReturn:
+ mov b0 = r32
+ br.ret.sptk.many b0
+.endp CallPalProcStatic
diff --git a/MdePkg/Library/BaseTimerLibLocalApic/Ipf/IpfTimerLib.c b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/IpfTimerLib.c new file mode 100644 index 0000000000..652cc7e6e4 --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/IpfTimerLib.c @@ -0,0 +1,155 @@ +/** @file
+ Timer Library functions built upon local APIC on IA32/x64.
+
+ @bug Should use PCD to retrieve all the constants including index of
+ the IA32_APIC_BASE MSR, the offsets of InitialCount, CorrentCount
+ and DivideConfiguration.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IpfTimerLib.c
+
+**/
+
+UINT64
+ReadItc (
+ VOID
+ );
+
+typedef struct {
+ UINT64 Status;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+} PAL_PROC_RETURN;
+
+PAL_PROC_RETURN
+CallPalProcStatic (
+ IN UINT64 Arg1,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4
+ );
+
+/**
+ Stalls the CPU for at least the given number of microseconds.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return The ticks delayed actually.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ )
+{
+ UINT64 Ticks;
+ UINT64 Delay;
+
+ Ticks = GetPerformanceCounter ();
+ Delay = GetPerformanceCounterProperties (NULL, NULL) * MicroSeconds / 1000000;
+ while (Ticks + Delay < GetPerformanceCounter ());
+ return (UINTN)Delay;
+}
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return The ticks delayed actually.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ )
+{
+ UINT64 Ticks;
+ UINT64 Delay;
+
+ Ticks = GetPerformanceCounter ();
+ Delay = GetPerformanceCounterProperties (NULL, NULL) * NanoSeconds / 1000000000;
+ while (Ticks + Delay < GetPerformanceCounter ());
+ return (UINTN)Delay;
+}
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ Retrieves the current value of a 64-bit free running performance counter. The
+ counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ )
+{
+ return ReadItc ();
+}
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ IN UINT64 *StartValue,
+ IN UINT64 *EndValue
+ )
+{
+ PAL_PROC_RETURN PalRet;
+ UINT64 BaseFrequence;
+
+ PalRet = CallPalProcStatic (13, 0, 0, 0);
+ ASSERT (PalRet.Status == 0);
+ BaseFrequence = PalRet.r9;
+
+ PalRet = CallPalProcStatic (14, 0, 0, 0);
+ ASSERT (PalRet.Status == 0);
+
+ *StartValue = 0;
+ *EndValue = (UINT64)(-1);
+ return BaseFrequence * (PalRet.r11 >> 32) / (UINT32)PalRet.r11;
+}
diff --git a/MdePkg/Library/BaseTimerLibLocalApic/Ipf/ReadItc.s b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/ReadItc.s new file mode 100644 index 0000000000..383bb242ba --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/Ipf/ReadItc.s @@ -0,0 +1,25 @@ +/// @file
+/// Contains an implementation of ReadItc on Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ReadItc.s
+///
+///
+
+.auto
+.text
+
+.proc ReadItc
+.type ReadItc, @function
+ReadItc::
+ mov r8 = ar.itc
+ br.ret.sptk.many b0
+.endp ReadItc
\ No newline at end of file diff --git a/MdePkg/Library/BaseTimerLibLocalApic/build.xml b/MdePkg/Library/BaseTimerLibLocalApic/build.xml new file mode 100644 index 0000000000..2d3be90bed --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseTimerLibLocalApic"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseTimerLibLocalApic"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseTimerLibLocalApic">
+ <GenBuild baseName="BaseTimerLibLocalApic" mbdFilename="${MODULE_DIR}\BaseTimerLibLocalApic.mbd" msaFilename="${MODULE_DIR}\BaseTimerLibLocalApic.msa"/>
+ </target>
+ <target depends="BaseTimerLibLocalApic_clean" name="clean"/>
+ <target depends="BaseTimerLibLocalApic_cleanall" name="cleanall"/>
+ <target name="BaseTimerLibLocalApic_clean">
+ <OutputDirSetup baseName="BaseTimerLibLocalApic" mbdFilename="${MODULE_DIR}\BaseTimerLibLocalApic.mbd" msaFilename="${MODULE_DIR}\BaseTimerLibLocalApic.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseTimerLibLocalApic_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseTimerLibLocalApic_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseTimerLibLocalApic_cleanall">
+ <OutputDirSetup baseName="BaseTimerLibLocalApic" mbdFilename="${MODULE_DIR}\BaseTimerLibLocalApic.mbd" msaFilename="${MODULE_DIR}\BaseTimerLibLocalApic.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseTimerLibLocalApic_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseTimerLibLocalApic_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseTimerLibLocalApic*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/BaseTimerLibLocalApic/x86TimerLib.c b/MdePkg/Library/BaseTimerLibLocalApic/x86TimerLib.c new file mode 100644 index 0000000000..6f78e4e4fd --- /dev/null +++ b/MdePkg/Library/BaseTimerLibLocalApic/x86TimerLib.c @@ -0,0 +1,168 @@ +/** @file
+ Timer Library functions built upon local APIC on IA32/x64.
+
+ @bug Should use PCD to retrieve all the constants including index of
+ the IA32_APIC_BASE MSR, the offsets of InitialCount, CorrentCount
+ and DivideConfiguration.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86TimerLib.c
+
+**/
+
+static
+UINTN
+EFIAPI
+DelayWorker (
+ IN UINT64 NDelay
+ )
+{
+ UINTN Ticks;
+
+ Ticks = (UINTN)GetPerformanceCounter ();
+ Ticks -= (UINTN)DivU64x32 (
+ MultU64x64 (
+ GetPerformanceCounterProperties (NULL, NULL),
+ NDelay
+ ),
+ 1000000000u
+ );
+ while (Ticks >= GetPerformanceCounter ());
+ return Ticks;
+}
+
+/**
+ Stalls the CPU for at least the given number of microseconds.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return Return value depends on implementation.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ )
+{
+ return DelayWorker (MicroSeconds * 1000ull);
+}
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return Return value depends on implementation.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ )
+{
+ return DelayWorker (NanoSeconds);
+}
+
+static
+UINTN
+EFIAPI
+GetApicBase (
+ VOID
+ )
+{
+ return (UINTN)AsmMsrBitFieldRead64 (27, 12, 35) << 12;
+}
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ Retrieves the current value of a 64-bit free running performance counter. The
+ counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ )
+{
+ return MmioRead32 (GetApicBase () + 0x390);
+}
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ IN UINT64 *StartValue,
+ IN UINT64 *EndValue
+ )
+{
+ static const UINT32 mFrequencies[] = {
+ 100000000,
+ 133000000,
+ 200000000,
+ 166000000
+ };
+ static const UINT8 mDivisor[] = {
+ 0x02, 0x04, 0x08, 0x10,
+ 0x02, 0x04, 0x08, 0x10,
+ 0x20, 0x40, 0x80, 0x01,
+ 0x20, 0x40, 0x80, 0x01
+ };
+
+ UINTN ApicBase;
+
+ ApicBase = GetApicBase ();
+
+ if (StartValue != NULL) {
+ *StartValue = MmioRead32 (ApicBase + 0x380);
+ }
+
+ if (EndValue != NULL) {
+ *EndValue = 0;
+ }
+
+ return mFrequencies[AsmMsrBitFieldRead32 (44, 16, 18)] /
+ mDivisor[MmioBitFieldRead32 (ApicBase + 0x3e0, 0, 3)];
+}
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c new file mode 100644 index 0000000000..ee832f0b2f --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c @@ -0,0 +1,712 @@ +/** @file
+ UEFI Decompress Library.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDecompressLib.c
+
+**/
+
+//
+// Decompression algorithm begins here
+//
+#define BITBUFSIZ 32
+#define MAXMATCH 256
+#define THRESHOLD 3
+#define CODE_BIT 16
+#define BAD_TABLE - 1
+
+//
+// C: Char&Len Set; P: Position Set; T: exTra Set
+//
+#define NC (0xff + MAXMATCH + 2 - THRESHOLD)
+#define CBIT 9
+#define MAXPBIT 5
+#define TBIT 5
+#define MAXNP ((1U << MAXPBIT) - 1)
+#define NT (CODE_BIT + 3)
+#if NT > MAXNP
+#define NPT NT
+#else
+#define NPT MAXNP
+#endif
+
+typedef struct {
+ UINT8 *mSrcBase; ///< Starting address of compressed data
+ UINT8 *mDstBase; ///< Starting address of decompressed data
+ UINT32 mOutBuf;
+ UINT32 mInBuf;
+
+ UINT16 mBitCount;
+ UINT32 mBitBuf;
+ UINT32 mSubBitBuf;
+ UINT16 mBlockSize;
+ UINT32 mCompSize;
+ UINT32 mOrigSize;
+
+ UINT16 mBadTableFlag;
+
+ UINT16 mLeft[2 * NC - 1];
+ UINT16 mRight[2 * NC - 1];
+ UINT8 mCLen[NC];
+ UINT8 mPTLen[NPT];
+ UINT16 mCTable[4096];
+ UINT16 mPTTable[256];
+
+ ///
+ /// The length of the field 'Position Set Code Length Array Size' in Block Header.
+ /// For EFI 1.1 de/compression algorithm, mPBit = 4
+ /// For Tiano de/compression algorithm, mPBit = 5
+ ///
+ UINT8 mPBit;
+} SCRATCH_DATA;
+
+/**
+ Shift mBitBuf NumOfBits left. Read in NumOfBits of bits from source.
+
+ @param Sd The global scratch data
+ @param NumOfBits The number of bits to shift and read.
+
+**/
+VOID
+FillBuf (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ )
+{
+ Sd->mBitBuf = (UINT32) (Sd->mBitBuf << NumOfBits);
+
+ while (NumOfBits > Sd->mBitCount) {
+
+ Sd->mBitBuf |= (UINT32) (Sd->mSubBitBuf << (NumOfBits = (UINT16) (NumOfBits - Sd->mBitCount)));
+
+ if (Sd->mCompSize > 0) {
+ //
+ // Get 1 byte into SubBitBuf
+ //
+ Sd->mCompSize--;
+ Sd->mSubBitBuf = 0;
+ Sd->mSubBitBuf = Sd->mSrcBase[Sd->mInBuf++];
+ Sd->mBitCount = 8;
+
+ } else {
+ //
+ // No more bits from the source, just pad zero bit.
+ //
+ Sd->mSubBitBuf = 0;
+ Sd->mBitCount = 8;
+
+ }
+ }
+
+ Sd->mBitCount = (UINT16) (Sd->mBitCount - NumOfBits);
+ Sd->mBitBuf |= Sd->mSubBitBuf >> Sd->mBitCount;
+}
+
+/**
+ Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent
+ NumOfBits of bits from source. Returns NumOfBits of bits that are
+ popped out.
+
+ @param Sd The global scratch data.
+ @param NumOfBits The number of bits to pop and read.
+
+ @return The bits that are popped out.
+
+**/
+UINT32
+GetBits (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ )
+{
+ UINT32 OutBits;
+
+ OutBits = (UINT32) (Sd->mBitBuf >> (BITBUFSIZ - NumOfBits));
+
+ FillBuf (Sd, NumOfBits);
+
+ return OutBits;
+}
+
+/**
+ Creates Huffman Code mapping table according to code length array.
+
+ @param Sd The global scratch data
+ @param NumOfChar Number of symbols in the symbol set
+ @param BitLen Code length array
+ @param TableBits The width of the mapping table
+ @param Table The table
+
+ @retval 0 OK.
+ @retval BAD_TABLE The table is corrupted.
+
+**/
+UINT16
+MakeTable (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfChar,
+ IN UINT8 *BitLen,
+ IN UINT16 TableBits,
+ OUT UINT16 *Table
+ )
+{
+ UINT16 Count[17];
+ UINT16 Weight[17];
+ UINT16 Start[18];
+ UINT16 *Pointer;
+ UINT16 Index3;
+ volatile UINT16 Index;
+ UINT16 Len;
+ UINT16 Char;
+ UINT16 JuBits;
+ UINT16 Avail;
+ UINT16 NextCode;
+ UINT16 Mask;
+
+ for (Index = 1; Index <= 16; Index++) {
+ Count[Index] = 0;
+ }
+
+ for (Index = 0; Index < NumOfChar; Index++) {
+ Count[BitLen[Index]]++;
+ }
+
+ Start[1] = 0;
+
+ for (Index = 1; Index <= 16; Index++) {
+ Start[Index + 1] = (UINT16) (Start[Index] + (Count[Index] << (16 - Index)));
+ }
+
+ if (Start[17] != 0) {
+ /*(1U << 16)*/
+ return (UINT16) BAD_TABLE;
+ }
+
+ JuBits = (UINT16) (16 - TableBits);
+
+ for (Index = 1; Index <= TableBits; Index++) {
+ Start[Index] >>= JuBits;
+ Weight[Index] = (UINT16) (1U << (TableBits - Index));
+ }
+
+ while (Index <= 16) {
+ Weight[Index] = (UINT16) (1U << (16 - Index));
+ Index++;
+ }
+
+ Index = (UINT16) (Start[TableBits + 1] >> JuBits);
+
+ if (Index != 0) {
+ Index3 = (UINT16) (1U << TableBits);
+ while (Index != Index3) {
+ Table[Index++] = 0;
+ }
+ }
+
+ Avail = NumOfChar;
+ Mask = (UINT16) (1U << (15 - TableBits));
+
+ for (Char = 0; Char < NumOfChar; Char++) {
+
+ Len = BitLen[Char];
+ if (Len == 0) {
+ continue;
+ }
+
+ NextCode = (UINT16) (Start[Len] + Weight[Len]);
+
+ if (Len <= TableBits) {
+
+ for (Index = Start[Len]; Index < NextCode; Index++) {
+ Table[Index] = Char;
+ }
+
+ } else {
+
+ Index3 = Start[Len];
+ Pointer = &Table[Index3 >> JuBits];
+ Index = (UINT16) (Len - TableBits);
+
+ while (Index != 0) {
+ if (*Pointer == 0) {
+ Sd->mRight[Avail] = Sd->mLeft[Avail] = 0;
+ *Pointer = Avail++;
+ }
+
+ if (Index3 & Mask) {
+ Pointer = &Sd->mRight[*Pointer];
+ } else {
+ Pointer = &Sd->mLeft[*Pointer];
+ }
+
+ Index3 <<= 1;
+ Index--;
+ }
+
+ *Pointer = Char;
+
+ }
+
+ Start[Len] = NextCode;
+ }
+ //
+ // Succeeds
+ //
+ return 0;
+}
+
+/**
+ Decodes a position value.
+
+ @param Sd the global scratch data
+
+ @return The position value decoded.
+
+**/
+UINT32
+DecodeP (
+ IN SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Val;
+ UINT32 Mask;
+ UINT32 Pos;
+
+ Val = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];
+
+ if (Val >= MAXNP) {
+ Mask = 1U << (BITBUFSIZ - 1 - 8);
+
+ do {
+
+ if (Sd->mBitBuf & Mask) {
+ Val = Sd->mRight[Val];
+ } else {
+ Val = Sd->mLeft[Val];
+ }
+
+ Mask >>= 1;
+ } while (Val >= MAXNP);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mPTLen[Val]);
+
+ Pos = Val;
+ if (Val > 1) {
+ Pos = (UINT32) ((1U << (Val - 1)) + GetBits (Sd, (UINT16) (Val - 1)));
+ }
+
+ return Pos;
+}
+
+/**
+ Reads code lengths for the Extra Set or the Position Set.
+
+ @param Sd The global scratch data.
+ @param nn Number of symbols.
+ @param nbit Number of bits needed to represent nn.
+ @param Special The special symbol that needs to be taken care of.
+
+ @retval 0 OK.
+ @retval BAD_TABLE Table is corrupted.
+
+**/
+UINT16
+ReadPTLen (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 nn,
+ IN UINT16 nbit,
+ IN UINT16 Special
+ )
+{
+ UINT16 Number;
+ UINT16 CharC;
+ volatile UINT16 Index;
+ UINT32 Mask;
+
+ Number = (UINT16) GetBits (Sd, nbit);
+
+ if (Number == 0) {
+ CharC = (UINT16) GetBits (Sd, nbit);
+
+ for (Index = 0; Index < 256; Index++) {
+ Sd->mPTTable[Index] = CharC;
+ }
+
+ for (Index = 0; Index < nn; Index++) {
+ Sd->mPTLen[Index] = 0;
+ }
+
+ return 0;
+ }
+
+ Index = 0;
+
+ while (Index < Number) {
+
+ CharC = (UINT16) (Sd->mBitBuf >> (BITBUFSIZ - 3));
+
+ if (CharC == 7) {
+ Mask = 1U << (BITBUFSIZ - 1 - 3);
+ while (Mask & Sd->mBitBuf) {
+ Mask >>= 1;
+ CharC += 1;
+ }
+ }
+
+ FillBuf (Sd, (UINT16) ((CharC < 7) ? 3 : CharC - 3));
+
+ Sd->mPTLen[Index++] = (UINT8) CharC;
+
+ if (Index == Special) {
+ CharC = (UINT16) GetBits (Sd, 2);
+ while ((INT16) (--CharC) >= 0) {
+ Sd->mPTLen[Index++] = 0;
+ }
+ }
+ }
+
+ while (Index < nn) {
+ Sd->mPTLen[Index++] = 0;
+ }
+
+ return MakeTable (Sd, nn, Sd->mPTLen, 8, Sd->mPTTable);
+}
+
+/**
+ Reads code lengths for Char&Len Set.
+
+ @param Sd the global scratch data
+
+**/
+VOID
+ReadCLen (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Number;
+ UINT16 CharC;
+ volatile UINT16 Index;
+ UINT32 Mask;
+
+ Number = (UINT16) GetBits (Sd, CBIT);
+
+ if (Number == 0) {
+ CharC = (UINT16) GetBits (Sd, CBIT);
+
+ for (Index = 0; Index < NC; Index++) {
+ Sd->mCLen[Index] = 0;
+ }
+
+ for (Index = 0; Index < 4096; Index++) {
+ Sd->mCTable[Index] = CharC;
+ }
+
+ return ;
+ }
+
+ Index = 0;
+ while (Index < Number) {
+
+ CharC = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];
+ if (CharC >= NT) {
+ Mask = 1U << (BITBUFSIZ - 1 - 8);
+
+ do {
+
+ if (Mask & Sd->mBitBuf) {
+ CharC = Sd->mRight[CharC];
+ } else {
+ CharC = Sd->mLeft[CharC];
+ }
+
+ Mask >>= 1;
+
+ } while (CharC >= NT);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mPTLen[CharC]);
+
+ if (CharC <= 2) {
+
+ if (CharC == 0) {
+ CharC = 1;
+ } else if (CharC == 1) {
+ CharC = (UINT16) (GetBits (Sd, 4) + 3);
+ } else if (CharC == 2) {
+ CharC = (UINT16) (GetBits (Sd, CBIT) + 20);
+ }
+
+ while ((INT16) (--CharC) >= 0) {
+ Sd->mCLen[Index++] = 0;
+ }
+
+ } else {
+
+ Sd->mCLen[Index++] = (UINT8) (CharC - 2);
+
+ }
+ }
+
+ while (Index < NC) {
+ Sd->mCLen[Index++] = 0;
+ }
+
+ MakeTable (Sd, NC, Sd->mCLen, 12, Sd->mCTable);
+
+ return ;
+}
+
+/**
+ Decode a character/length value.
+
+ @param Sd The global scratch data.
+
+ @return The value decoded.
+
+**/
+UINT16
+DecodeC (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Index2;
+ UINT32 Mask;
+
+ if (Sd->mBlockSize == 0) {
+ //
+ // Starting a new block
+ //
+ Sd->mBlockSize = (UINT16) GetBits (Sd, 16);
+ Sd->mBadTableFlag = ReadPTLen (Sd, NT, TBIT, 3);
+ if (Sd->mBadTableFlag != 0) {
+ return 0;
+ }
+
+ ReadCLen (Sd);
+
+ Sd->mBadTableFlag = ReadPTLen (Sd, MAXNP, Sd->mPBit, (UINT16) (-1));
+ if (Sd->mBadTableFlag != 0) {
+ return 0;
+ }
+ }
+
+ Sd->mBlockSize--;
+ Index2 = Sd->mCTable[Sd->mBitBuf >> (BITBUFSIZ - 12)];
+
+ if (Index2 >= NC) {
+ Mask = 1U << (BITBUFSIZ - 1 - 12);
+
+ do {
+ if (Sd->mBitBuf & Mask) {
+ Index2 = Sd->mRight[Index2];
+ } else {
+ Index2 = Sd->mLeft[Index2];
+ }
+
+ Mask >>= 1;
+ } while (Index2 >= NC);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mCLen[Index2]);
+
+ return Index2;
+}
+
+/**
+ Decode the source data and put the resulting data into the destination buffer.
+
+ @param Sd The global scratch data
+
+**/
+VOID
+Decode (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 BytesRemain;
+ UINT32 DataIdx;
+ UINT16 CharC;
+
+ BytesRemain = (UINT16) (-1);
+
+ DataIdx = 0;
+
+ for (;;) {
+ CharC = DecodeC (Sd);
+ if (Sd->mBadTableFlag != 0) {
+ return ;
+ }
+
+ if (CharC < 256) {
+ //
+ // Process an Original character
+ //
+ if (Sd->mOutBuf >= Sd->mOrigSize) {
+ return ;
+ } else {
+ Sd->mDstBase[Sd->mOutBuf++] = (UINT8) CharC;
+ }
+
+ } else {
+ //
+ // Process a Pointer
+ //
+ CharC = (UINT16) (CharC - (UINT8_MAX + 1 - THRESHOLD));
+
+ BytesRemain = CharC;
+
+ DataIdx = Sd->mOutBuf - DecodeP (Sd) - 1;
+
+ BytesRemain--;
+ while ((INT16) (BytesRemain) >= 0) {
+ Sd->mDstBase[Sd->mOutBuf++] = Sd->mDstBase[DataIdx++];
+ if (Sd->mOutBuf >= Sd->mOrigSize) {
+ return ;
+ }
+
+ BytesRemain--;
+ }
+ }
+ }
+
+ return ;
+}
+
+/**
+ The internal implementation of *_DECOMPRESS_PROTOCOL.GetInfo().
+
+ @param Source The source buffer containing the compressed data.
+ @param SourceSize The size of source buffer
+ @param DestinationSize The size of destination buffer.
+ @param ScratchSize The size of scratch buffer.
+
+ @retval RETURN_SUCCESS The size of destination buffer and the size of scratch buffer are successull retrieved.
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted
+
+**/
+RETURN_STATUS
+EFIAPI
+UefiDecompressGetInfo (
+ IN CONST VOID *Source,
+ IN UINT32 SourceSize,
+ OUT UINT32 *DestinationSize,
+ OUT UINT32 *ScratchSize
+ )
+{
+ UINT32 CompressedSize;
+
+ ASSERT (Source != NULL);
+ ASSERT (DestinationSize != NULL);
+ ASSERT (ScratchSize != NULL);
+
+ *ScratchSize = sizeof (SCRATCH_DATA);
+
+ if (SourceSize < 8) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ CopyMem (&CompressedSize, Source, sizeof (UINT32));
+ CopyMem (DestinationSize, (VOID *)((UINT8 *)Source + 4), sizeof (UINT32));
+
+ if (SourceSize < (CompressedSize + 8)) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ The internal implementation of *_DECOMPRESS_PROTOCOL.Decompress().
+
+ @param Source The source buffer containing the compressed data.
+ @param Destination The destination buffer to store the decompressed data
+ @param Scratch The buffer used internally by the decompress routine. This buffer is needed to store intermediate data.
+
+ @retval RETURN_SUCCESS Decompression is successfull
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted
+
+**/
+RETURN_STATUS
+EFIAPI
+UefiDecompress (
+ IN CONST VOID *Source,
+ IN OUT VOID *Destination,
+ IN OUT VOID *Scratch
+ )
+{
+ volatile UINT32 Index;
+ UINT32 CompSize;
+ UINT32 OrigSize;
+ SCRATCH_DATA *Sd;
+ CONST UINT8 *Src;
+ UINT8 *Dst;
+
+ ASSERT (Source != NULL);
+ ASSERT (Destination != NULL);
+ ASSERT (Scratch != NULL);
+
+ Src = Source;
+ Dst = Destination;
+
+ Sd = (SCRATCH_DATA *) Scratch;
+
+ CompSize = Src[0] + (Src[1] << 8) + (Src[2] << 16) + (Src[3] << 24);
+ OrigSize = Src[4] + (Src[5] << 8) + (Src[6] << 16) + (Src[7] << 24);
+
+ //
+ // If compressed file size is 0, return
+ //
+ if (OrigSize == 0) {
+ return RETURN_SUCCESS;
+ }
+
+ Src = Src + 8;
+
+ for (Index = 0; Index < sizeof (SCRATCH_DATA); Index++) {
+ ((UINT8 *) Sd)[Index] = 0;
+ }
+ //
+ // The length of the field 'Position Set Code Length Array Size' in Block Header.
+ // For EFI 1.1 de/compression algorithm(Version 1), mPBit = 4
+ // For Tiano de/compression algorithm(Version 2), mPBit = 5
+ //
+ Sd->mPBit = 4;
+ Sd->mSrcBase = (UINT8 *)Src;
+ Sd->mDstBase = Dst;
+ Sd->mCompSize = CompSize;
+ Sd->mOrigSize = OrigSize;
+
+ //
+ // Fill the first BITBUFSIZ bits
+ //
+ FillBuf (Sd, BITBUFSIZ);
+
+ //
+ // Decompress it
+ //
+ Decode (Sd);
+
+ if (Sd->mBadTableFlag != 0) {
+ //
+ // Something wrong with the source
+ //
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.mbd b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.mbd new file mode 100644 index 0000000000..7ed513e9ba --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>BaseUefiDecompressLib</BaseName>
+ <Guid>9ae5147d-b240-467f-a484-b024fdc42ee0</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa new file mode 100644 index 0000000000..f7f3f4f0d4 --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>BaseUefiDecompressLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>9ae5147d-b240-467f-a484-b024fdc42ee0</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiDecompressLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>BaseUefiDecompressLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseUefiDecompressLib/build.xml b/MdePkg/Library/BaseUefiDecompressLib/build.xml new file mode 100644 index 0000000000..e41fcf9114 --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="BaseUefiDecompressLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\BaseUefiDecompressLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="BaseUefiDecompressLib">
+ <GenBuild baseName="BaseUefiDecompressLib" mbdFilename="${MODULE_DIR}\BaseUefiDecompressLib.mbd" msaFilename="${MODULE_DIR}\BaseUefiDecompressLib.msa"/>
+ </target>
+ <target depends="BaseUefiDecompressLib_clean" name="clean"/>
+ <target depends="BaseUefiDecompressLib_cleanall" name="cleanall"/>
+ <target name="BaseUefiDecompressLib_clean">
+ <OutputDirSetup baseName="BaseUefiDecompressLib" mbdFilename="${MODULE_DIR}\BaseUefiDecompressLib.mbd" msaFilename="${MODULE_DIR}\BaseUefiDecompressLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseUefiDecompressLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseUefiDecompressLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="BaseUefiDecompressLib_cleanall">
+ <OutputDirSetup baseName="BaseUefiDecompressLib" mbdFilename="${MODULE_DIR}\BaseUefiDecompressLib.mbd" msaFilename="${MODULE_DIR}\BaseUefiDecompressLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\BaseUefiDecompressLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\BaseUefiDecompressLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**BaseUefiDecompressLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.c b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.c new file mode 100644 index 0000000000..a6f04dfe2f --- /dev/null +++ b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.c @@ -0,0 +1,63 @@ +/** @file
+ Entry point to the DXE Core.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Cache copy of HobList pointer.
+//
+VOID *gHobList = NULL;
+
+/**
+ Enrty point to DXE core.
+
+ @param HobStart Pointer of HobList.
+
+**/
+VOID
+EFIAPI
+_ModuleEntryPoint (
+ IN VOID *HobStart
+ )
+{
+ //
+ // Cache a pointer to the HobList
+ //
+ gHobList = HobStart;
+
+ //
+ // Call the DXE Core entry point
+ //
+ ProcessModuleEntryPointList (HobStart);
+
+ //
+ // Should never return
+ //
+ ASSERT(FALSE);
+ CpuDeadLoop ();
+}
+
+
+/**
+ Wrapper of enrty point to DXE CORE.
+
+ @param HobStart Pointer of HobList.
+
+**/
+VOID
+EFIAPI
+EfiMain (
+ IN VOID *HobStart
+ )
+{
+ _ModuleEntryPoint (HobStart);
+}
diff --git a/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.mbd b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.mbd new file mode 100644 index 0000000000..57a7d25ddd --- /dev/null +++ b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeCoreEntryPoint</BaseName>
+ <Guid>d258d6af-2fc0-4019-9c1f-1101c3dd19b5</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.msa b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.msa new file mode 100644 index 0000000000..5d0e73faf0 --- /dev/null +++ b/MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeCoreEntryPoint</BaseName>
+ <ModuleType>DXE_CORE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>d258d6af-2fc0-4019-9c1f-1101c3dd19b5</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to the DXE Core</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DxeCoreEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DxeCoreEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeCoreEntryPoint/build.xml b/MdePkg/Library/DxeCoreEntryPoint/build.xml new file mode 100644 index 0000000000..9980656298 --- /dev/null +++ b/MdePkg/Library/DxeCoreEntryPoint/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeCoreEntryPoint"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeCoreEntryPoint"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeCoreEntryPoint">
+ <GenBuild baseName="DxeCoreEntryPoint" mbdFilename="${MODULE_DIR}\DxeCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeCoreEntryPoint.msa"/>
+ </target>
+ <target depends="DxeCoreEntryPoint_clean" name="clean"/>
+ <target depends="DxeCoreEntryPoint_cleanall" name="cleanall"/>
+ <target name="DxeCoreEntryPoint_clean">
+ <OutputDirSetup baseName="DxeCoreEntryPoint" mbdFilename="${MODULE_DIR}\DxeCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeCoreEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeCoreEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeCoreEntryPoint_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeCoreEntryPoint_cleanall">
+ <OutputDirSetup baseName="DxeCoreEntryPoint" mbdFilename="${MODULE_DIR}\DxeCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeCoreEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeCoreEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeCoreEntryPoint_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeCoreEntryPoint*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.mbd b/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.mbd new file mode 100644 index 0000000000..6173b1c4e7 --- /dev/null +++ b/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeCoreHobLib</BaseName>
+ <Guid>882ee1a3-35b2-412c-b8a2-7a8d34a7c390</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.msa b/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.msa new file mode 100644 index 0000000000..22f0968980 --- /dev/null +++ b/MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeCoreHobLib</BaseName>
+ <ModuleType>DXE_CORE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>882ee1a3-35b2-412c-b8a2-7a8d34a7c390</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">HobLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DxeCoreEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>HobLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeCoreHobLib/HobLib.c b/MdePkg/Library/DxeCoreHobLib/HobLib.c new file mode 100644 index 0000000000..febd1e45b9 --- /dev/null +++ b/MdePkg/Library/DxeCoreHobLib/HobLib.c @@ -0,0 +1,365 @@ +/** @file
+ HOB Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HobLib.c
+
+**/
+
+
+
+extern VOID *gHobList;
+
+/**
+ Returns the pointer to the HOB list.
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ return gHobList;
+}
+
+/**
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ IN UINT16 Type,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ IN UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ IN CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
+
+/**
+ This function builds a HOB for a loaded PE32 module.
+
+ @param ModuleName The GUID File Name of the module.
+ @param MemoryAllocationModule The 64 bit physical address of the module.
+ @param ModuleLength The length of the module in bytes.
+ @param EntryPoint The 64 bit physical address of the module’s entry point.
+
+**/
+VOID
+EFIAPI
+BuildModuleHob (
+ IN CONST EFI_GUID *ModuleName,
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
+ IN UINT64 ModuleLength,
+ IN EFI_PHYSICAL_ADDRESS EntryPoint
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB that describes a chunk of system memory.
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification
+ and returns the start address of GUID HOB data so that caller can fill the customized data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN DataLength
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+ return NULL;
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification,
+ copies the input data to the HOB data field, and returns the start address of GUID HOB data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param Data The data to be copied into the data field of the GUID HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidDataHob (
+ IN CONST EFI_GUID *Guid,
+ IN VOID *Data,
+ IN UINTN DataLength
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+ return NULL;
+}
+
+/**
+ Builds a Firmware Volume HOB.
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildFvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a Capsule Volume HOB.
+
+ @param BaseAddress The base address of the Capsule Volume.
+ @param Length The size of the Capsule Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildCvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the CPU.
+
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.
+
+**/
+VOID
+EFIAPI
+BuildCpuHob (
+ IN UINT8 SizeOfMemorySpace,
+ IN UINT8 SizeOfIoSpace
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the Stack.
+
+ @param BaseAddress The 64 bit physical address of the Stack.
+ @param Length The length of the stack in bytes.
+
+**/
+VOID
+EFIAPI
+BuildStackHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the BSP store.
+
+ @param BaseAddress The 64 bit physical address of the BSP.
+ @param Length The length of the BSP store in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildBspStoreHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the memory allocation.
+
+ @param BaseAddress The 64 bit physical address of the memory.
+ @param Length The length of the memory allocation in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildMemoryAllocationHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/DxeCoreHobLib/build.xml b/MdePkg/Library/DxeCoreHobLib/build.xml new file mode 100644 index 0000000000..9ef95dc421 --- /dev/null +++ b/MdePkg/Library/DxeCoreHobLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeCoreHobLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeCoreHobLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeCoreHobLib">
+ <GenBuild baseName="DxeCoreHobLib" mbdFilename="${MODULE_DIR}\DxeCoreHobLib.mbd" msaFilename="${MODULE_DIR}\DxeCoreHobLib.msa"/>
+ </target>
+ <target depends="DxeCoreHobLib_clean" name="clean"/>
+ <target depends="DxeCoreHobLib_cleanall" name="cleanall"/>
+ <target name="DxeCoreHobLib_clean">
+ <OutputDirSetup baseName="DxeCoreHobLib" mbdFilename="${MODULE_DIR}\DxeCoreHobLib.mbd" msaFilename="${MODULE_DIR}\DxeCoreHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeCoreHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeCoreHobLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeCoreHobLib_cleanall">
+ <OutputDirSetup baseName="DxeCoreHobLib" mbdFilename="${MODULE_DIR}\DxeCoreHobLib.mbd" msaFilename="${MODULE_DIR}\DxeCoreHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeCoreHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeCoreHobLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeCoreHobLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeHobLib/DxeHobLib.mbd b/MdePkg/Library/DxeHobLib/DxeHobLib.mbd new file mode 100644 index 0000000000..9a314afdc0 --- /dev/null +++ b/MdePkg/Library/DxeHobLib/DxeHobLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeHobLib</BaseName>
+ <Guid>f12b59c9-76d0-4661-ad7c-f04d1bef0558</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeHobLib/DxeHobLib.msa b/MdePkg/Library/DxeHobLib/DxeHobLib.msa new file mode 100644 index 0000000000..a0ffa5e979 --- /dev/null +++ b/MdePkg/Library/DxeHobLib/DxeHobLib.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeHobLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>f12b59c9-76d0-4661-ad7c-f04d1bef0558</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">HobLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>HobLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>HobList</C_Name>
+ </GuidEntry>
+ </Guids>
+ <Externs>
+ <Extern>
+ <Constructor>HobLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeHobLib/HobLib.c b/MdePkg/Library/DxeHobLib/HobLib.c new file mode 100644 index 0000000000..a914dd7ba2 --- /dev/null +++ b/MdePkg/Library/DxeHobLib/HobLib.c @@ -0,0 +1,394 @@ +/** @file
+ HOB Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HobLib.c
+
+**/
+
+
+
+STATIC VOID *mHobList = NULL;
+
+/**
+ The constructor function caches the pointer to HOB list.
+
+ The constructor function gets the start address of HOB list from system configuration table.
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+HobLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, &mHobList);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (mHobList != NULL);
+ return Status;
+}
+
+/**
+ Returns the pointer to the HOB list.
+
+ None.
+
+ The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ return mHobList;
+}
+
+/**
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ IN UINT16 Type,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ IN UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ IN CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
+
+/**
+ This function builds a HOB for a loaded PE32 module.
+
+ @param ModuleName The GUID File Name of the module.
+ @param MemoryAllocationModule The 64 bit physical address of the module.
+ @param ModuleLength The length of the module in bytes.
+ @param EntryPoint The 64 bit physical address of the module’s entry point.
+
+**/
+VOID
+EFIAPI
+BuildModuleHob (
+ IN CONST EFI_GUID *ModuleName,
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
+ IN UINT64 ModuleLength,
+ IN EFI_PHYSICAL_ADDRESS EntryPoint
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB that describes a chunk of system memory.
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification
+ and returns the start address of GUID HOB data so that caller can fill the customized data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN DataLength
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+ return NULL;
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification,
+ copies the input data to the HOB data field, and returns the start address of GUID HOB data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param Data The data to be copied into the data field of the GUID HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidDataHob (
+ IN CONST EFI_GUID *Guid,
+ IN VOID *Data,
+ IN UINTN DataLength
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+ return NULL;
+}
+
+/**
+ Builds a Firmware Volume HOB.
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildFvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a Capsule Volume HOB.
+
+ @param BaseAddress The base address of the Capsule Volume.
+ @param Length The size of the Capsule Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildCvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the CPU.
+
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.
+
+**/
+VOID
+EFIAPI
+BuildCpuHob (
+ IN UINT8 SizeOfMemorySpace,
+ IN UINT8 SizeOfIoSpace
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the Stack.
+
+ @param BaseAddress The 64 bit physical address of the Stack.
+ @param Length The length of the stack in bytes.
+
+**/
+VOID
+EFIAPI
+BuildStackHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the BSP store.
+
+ @param BaseAddress The 64 bit physical address of the BSP.
+ @param Length The length of the BSP store in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildBspStoreHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Builds a HOB for the memory allocation.
+
+ @param BaseAddress The 64 bit physical address of the memory.
+ @param Length The length of the memory allocation in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildMemoryAllocationHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ //
+ // PEI HOB is read only for DXE phase
+ //
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/DxeHobLib/build.xml b/MdePkg/Library/DxeHobLib/build.xml new file mode 100644 index 0000000000..1def5e77b7 --- /dev/null +++ b/MdePkg/Library/DxeHobLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeHobLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeHobLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeHobLib">
+ <GenBuild baseName="DxeHobLib" mbdFilename="${MODULE_DIR}\DxeHobLib.mbd" msaFilename="${MODULE_DIR}\DxeHobLib.msa"/>
+ </target>
+ <target depends="DxeHobLib_clean" name="clean"/>
+ <target depends="DxeHobLib_cleanall" name="cleanall"/>
+ <target name="DxeHobLib_clean">
+ <OutputDirSetup baseName="DxeHobLib" mbdFilename="${MODULE_DIR}\DxeHobLib.mbd" msaFilename="${MODULE_DIR}\DxeHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeHobLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeHobLib_cleanall">
+ <OutputDirSetup baseName="DxeHobLib" mbdFilename="${MODULE_DIR}\DxeHobLib.mbd" msaFilename="${MODULE_DIR}\DxeHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeHobLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeHobLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.mbd b/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.mbd new file mode 100644 index 0000000000..1db8290353 --- /dev/null +++ b/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeIoLibCpuIo</BaseName>
+ <Guid>e94cd42a-3aad-4ea0-9b09-945891c60ccd</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-14 12:44</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa b/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa new file mode 100644 index 0000000000..93a0e6cb1f --- /dev/null +++ b/MdePkg/Library/DxeIoLibCpuIo/DxeIoLibCpuIo.msa @@ -0,0 +1,53 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeIoLibCpuIo</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>e94cd42a-3aad-4ea0-9b09-945891c60ccd</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>I/O Library implemented with Framework CPU I/O Protocol</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-14 12:44</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>IoLib.c</Filename>
+ <Filename>IoHighLevel.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">CpuIo</Protocol>
+ </Protocols>
+ <Externs>
+ <Extern>
+ <Constructor>IoLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeIoLibCpuIo/IoHighLevel.c b/MdePkg/Library/DxeIoLibCpuIo/IoHighLevel.c new file mode 100644 index 0000000000..48a7477d81 --- /dev/null +++ b/MdePkg/Library/DxeIoLibCpuIo/IoHighLevel.c @@ -0,0 +1,2272 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) | OrData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) & AndData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (IoRead8 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) | OrData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) & AndData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (IoRead16 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) | OrData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) & AndData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (MmioRead8 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) | OrData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) & AndData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (MmioRead16 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/MdePkg/Library/DxeIoLibCpuIo/IoLib.c b/MdePkg/Library/DxeIoLibCpuIo/IoLib.c new file mode 100644 index 0000000000..21b23dfe3b --- /dev/null +++ b/MdePkg/Library/DxeIoLibCpuIo/IoLib.c @@ -0,0 +1,460 @@ +/** @file
+ I/O Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+static EFI_CPU_IO_PROTOCOL *gCpuIo;
+
+EFI_STATUS
+IoLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = SystemTable->BootServices->LocateProtocol (
+ &gEfiCpuIoProtocolGuid,
+ NULL,
+ (VOID**)&gCpuIo
+ );
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+UINT64
+EFIAPI
+IoReadWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ UINT64 Data;
+
+ gCpuIo->Io.Read (gCpuIo, Width, Port, 1, &Data);
+ return Data;
+}
+
+UINT64
+EFIAPI
+IoWriteWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ gCpuIo->Io.Write (gCpuIo, Width, Port, 1, &Data);
+ return Data;
+}
+
+UINT64
+EFIAPI
+MmioReadWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ )
+{
+ UINT64 Data;
+
+ gCpuIo->Mem.Read (gCpuIo, Width, Address, 1, &Data);
+ return Data;
+}
+
+UINT64
+EFIAPI
+MmioWriteWorker (
+ IN UINTN Address,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ )
+{
+ gCpuIo->Mem.Write (gCpuIo, Width, Address, 1, &Data);
+ return Data;
+}
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ return IoReadWorker (Port, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
+}
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
+}
diff --git a/MdePkg/Library/DxeIoLibCpuIo/build.xml b/MdePkg/Library/DxeIoLibCpuIo/build.xml new file mode 100644 index 0000000000..94dbb4a139 --- /dev/null +++ b/MdePkg/Library/DxeIoLibCpuIo/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeIoLibCpuIo"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeIoLibCpuIo"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeIoLibCpuIo">
+ <GenBuild baseName="DxeIoLibCpuIo" mbdFilename="${MODULE_DIR}\DxeIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\DxeIoLibCpuIo.msa"/>
+ </target>
+ <target depends="DxeIoLibCpuIo_clean" name="clean"/>
+ <target depends="DxeIoLibCpuIo_cleanall" name="cleanall"/>
+ <target name="DxeIoLibCpuIo_clean">
+ <OutputDirSetup baseName="DxeIoLibCpuIo" mbdFilename="${MODULE_DIR}\DxeIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\DxeIoLibCpuIo.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeIoLibCpuIo_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeIoLibCpuIo_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeIoLibCpuIo_cleanall">
+ <OutputDirSetup baseName="DxeIoLibCpuIo" mbdFilename="${MODULE_DIR}\DxeIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\DxeIoLibCpuIo.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeIoLibCpuIo_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeIoLibCpuIo_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeIoLibCpuIo*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.mbd b/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.mbd new file mode 100644 index 0000000000..d1f11c90aa --- /dev/null +++ b/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeMemoryAllocationLib</BaseName>
+ <Guid>4674739d-3195-4fb2-8094-ac1d22d00194</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.msa b/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.msa new file mode 100644 index 0000000000..4bcf029b64 --- /dev/null +++ b/MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeMemoryAllocationLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>4674739d-3195-4fb2-8094-ac1d22d00194</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">MemoryAllocationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemoryAllocationLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeMemoryAllocationLib/MemoryAllocationLib.c b/MdePkg/Library/DxeMemoryAllocationLib/MemoryAllocationLib.c new file mode 100644 index 0000000000..a9bdf60aa1 --- /dev/null +++ b/MdePkg/Library/DxeMemoryAllocationLib/MemoryAllocationLib.c @@ -0,0 +1,886 @@ +/** @file
+ Support routines for memory allocation routines for use with drivers.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemoryAllocationLib.c
+
+**/
+
+
+
+/**
+ Allocates the number of 4KB pages specified by Pages of a certain memory type.
+
+ @param MemoryType The type of memory to allocate.
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocatePages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages
+ )
+{
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS Memory;
+
+ if (Pages == 0) {
+ return NULL;
+ }
+
+ Status = gBS->AllocatePages (AllocateAnyPages, MemoryType, Pages, &Memory);
+ if (EFI_ERROR (Status)) {
+ Memory = 0;
+ }
+ return (VOID *) (UINTN) Memory;
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiBootServicesData, Pages);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiRuntimeServicesData, Pages);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiReservedMemoryType, Pages);
+}
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+**/
+VOID
+EFIAPI
+FreePages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Pages != 0);
+ Status = gBS->FreePages ((EFI_PHYSICAL_ADDRESS) (UINTN) Buffer, Pages);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of a certian memory type
+ with an alignment specified by Alignment.
+
+ @param MemoryType The type of memory to allocate.
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedPages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS Memory;
+ UINTN AlignedMemory;
+ UINTN AlignmentMask;
+ UINTN UnalignedPages;
+ UINTN RealPages;
+
+ //
+ // Alignment must be a power of two or zero.
+ //
+ ASSERT ((Alignment & (Alignment - 1)) == 0);
+
+ if (Pages == 0) {
+ return NULL;
+ }
+ if (Alignment > EFI_PAGE_SIZE) {
+ //
+ // Caculate the total number of pages since alignment is larger than page size.
+ //
+ AlignmentMask = Alignment - 1;
+ RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment);
+ Status = gBS->AllocatePages (AllocateAnyPages, MemoryType, RealPages, &Memory);
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+ AlignedMemory = ((UINTN) Memory + AlignmentMask) & ~AlignmentMask;
+ UnalignedPages = EFI_SIZE_TO_PAGES ((UINTN) Memory - AlignedMemory);
+ if (UnalignedPages > 0) {
+ //
+ // Free first unaligned page(s).
+ //
+ Status = gBS->FreePages (Memory, UnalignedPages);
+ ASSERT_EFI_ERROR (Status);
+ }
+ Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
+ UnalignedPages = RealPages - Pages - UnalignedPages;
+ if (UnalignedPages > 0) {
+ //
+ // Free last unaligned page(s).
+ //
+ Status = gBS->FreePages (Memory, UnalignedPages);
+ ASSERT_EFI_ERROR (Status);
+ }
+ } else {
+ //
+ // Do not over-allocate pages in this case.
+ //
+ Status = gBS->AllocatePages (AllocateAnyPages, MemoryType, Pages, &Memory);
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+ AlignedMemory = (UINTN) Memory;
+ }
+ return (VOID *) AlignedMemory;
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData
+ with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned.<BR>
+ If Pages is 0, then NULL is returned.<BR>
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiBootServicesData, Pages, Alignment);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData
+ with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiRuntimeServicesData, Pages, Alignment);
+}
+
+/**
+ Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiReservedMemoryType, Pages, Alignment);
+}
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the aligned page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Pages != 0);
+ Status = gBS->FreePages ((EFI_PHYSICAL_ADDRESS) (UINTN) Buffer, Pages);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Allocates a buffer of a certain memory type.
+
+ @param MemoryType The type of memory to allocate.
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocatePool (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN AllocationSize
+ )
+{
+ EFI_STATUS Status;
+ VOID *Memory;
+
+ Status = gBS->AllocatePool (MemoryType, AllocationSize, &Memory);
+ if (EFI_ERROR (Status)) {
+ Memory = NULL;
+ }
+ return Memory;
+}
+
+/**
+ Allocates a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocatePool (EfiBootServicesData, AllocationSize);
+}
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocatePool (EfiRuntimeServicesData, AllocationSize);
+}
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocatePool (EfiReservedMemoryType, AllocationSize);
+}
+
+/**
+ Allocates and zeros a buffer of a certian pool type.
+
+ @param PoolType The type of memory to allocate.
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateZeroPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize
+ )
+{
+ VOID *Memory;
+ Memory = InternalAllocatePool (PoolType, AllocationSize);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocateZeroPool (EfiBootServicesData, AllocationSize);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocateZeroPool (EfiRuntimeServicesData, AllocationSize);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocateZeroPool (EfiReservedMemoryType, AllocationSize);
+}
+
+/**
+ Copies a buffer to an allocated buffer of a certian memory type.
+
+ @param MemoryType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate and zero.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateCopyPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocatePool (PoolType, AllocationSize);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ return InternalAllocateCopyPool (EfiBootServicesData, AllocationSize, Buffer);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ return InternalAllocateCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ return InternalAllocateCopyPool (EfiReservedMemoryType, AllocationSize, Buffer);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param Buffer Pointer to the buffer to free.
+
+**/
+VOID
+EFIAPI
+FreePool (
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->FreePool (Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Allocates a buffer of a certain pool type at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two. If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *RawAddress;
+ UINTN AlignedAddress;
+ UINTN AlignmentMask;
+ UINTN OverAllocationSize;
+ VOID **FreePointer;
+ EFI_STATUS Status;
+
+ //
+ // Alignment must be a power of two or zero.
+ //
+ ASSERT ((Alignment & (Alignment - 1)) == 0);
+
+ if (Alignment == 0) {
+ AlignmentMask = Alignment;
+ } else {
+ AlignmentMask = Alignment - 1;
+ }
+ //
+ // Calculate the extra memory size, over-allocate memory pool and get the aligned memory address.
+ //
+ OverAllocationSize = sizeof (RawAddress) + AlignmentMask;
+ Status = gBS->AllocatePool (PoolType, AllocationSize + OverAllocationSize, &RawAddress);
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+ AlignedAddress = ((UINTN) RawAddress + OverAllocationSize) & ~AlignmentMask;
+ //
+ // Save the original memory address just before the aligned address.
+ //
+ FreePointer = (VOID **)(AlignedAddress - sizeof (RawAddress));
+ *FreePointer = RawAddress;
+
+ return (VOID *) AlignedAddress;
+}
+
+/**
+ Allocates a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two. If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPool (EfiBootServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPool (EfiRuntimeServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPool (EfiReservedMemoryType, AllocationSize, Alignment);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedZeroPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+ Memory = InternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedZeroPool (EfiBootServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedZeroPool (EfiRuntimeServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedZeroPool (EfiReservedMemoryType, AllocationSize, Alignment);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedCopyPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedCopyPool (EfiBootServicesData, AllocationSize, Buffer, Alignment);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer, Alignment);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedCopyPool (EfiReservedMemoryType, AllocationSize, Buffer, Alignment);
+}
+
+/**
+ Frees a buffer that was previously allocated with one of the aligned pool allocation functions
+ in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer to free.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPool (
+ IN VOID *Buffer
+ )
+{
+ VOID *RawAddress;
+ VOID **FreePointer;
+ EFI_STATUS Status;
+
+ //
+ // Get the pre-saved original address in the over-allocate pool.
+ //
+ FreePointer = (VOID **)((UINTN) Buffer - sizeof (RawAddress));
+ RawAddress = *FreePointer;
+
+ Status = gBS->FreePool (RawAddress);
+ ASSERT_EFI_ERROR (Status);
+}
diff --git a/MdePkg/Library/DxeMemoryAllocationLib/build.xml b/MdePkg/Library/DxeMemoryAllocationLib/build.xml new file mode 100644 index 0000000000..cabeb3b28b --- /dev/null +++ b/MdePkg/Library/DxeMemoryAllocationLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeMemoryAllocationLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeMemoryAllocationLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeMemoryAllocationLib">
+ <GenBuild baseName="DxeMemoryAllocationLib" mbdFilename="${MODULE_DIR}\DxeMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\DxeMemoryAllocationLib.msa"/>
+ </target>
+ <target depends="DxeMemoryAllocationLib_clean" name="clean"/>
+ <target depends="DxeMemoryAllocationLib_cleanall" name="cleanall"/>
+ <target name="DxeMemoryAllocationLib_clean">
+ <OutputDirSetup baseName="DxeMemoryAllocationLib" mbdFilename="${MODULE_DIR}\DxeMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\DxeMemoryAllocationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeMemoryAllocationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeMemoryAllocationLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeMemoryAllocationLib_cleanall">
+ <OutputDirSetup baseName="DxeMemoryAllocationLib" mbdFilename="${MODULE_DIR}\DxeMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\DxeMemoryAllocationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeMemoryAllocationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeMemoryAllocationLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeMemoryAllocationLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxePcdLib/DxePcdLib.c b/MdePkg/Library/DxePcdLib/DxePcdLib.c new file mode 100644 index 0000000000..4773bf6c0c --- /dev/null +++ b/MdePkg/Library/DxePcdLib/DxePcdLib.c @@ -0,0 +1,852 @@ +/** @file
+Implementation of PcdLib class library for DXE phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: DxePcdLib.c
+
+**/
+
+static PCD_PROTOCOL *mPcd;
+
+/**
+ The constructor function caches the PCD_PROTOCOL pointer.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always return EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+PcdLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (&gPcdProtocolGuid, NULL, (VOID **)&mPcd);
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Sets the current SKU in the PCD database to the value specified by SkuId. SkuId is returned.
+
+ @param[in] SkuId The SKU value that will be used when the PCD service will retrieve and
+ set values associated with a PCD token.
+
+ @retval UINTN Return the SKU ID that just be set.
+
+**/
+UINTN
+EFIAPI
+LibPcdSetSku (
+ IN UINTN SkuId
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->SetSku (SkuId);
+ ASSERT_EFI_ERROR (Status);
+
+ return SkuId;
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Returns the 8-bit value for the token specified by TokenNumber.
+
+**/
+UINT8
+EFIAPI
+LibPcdGet8 (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->Get8 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Returns the 16-bit value for the token specified by TokenNumber.
+
+**/
+UINT16
+EFIAPI
+LibPcdGet16 (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->Get16 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Returns the 32-bit value for the token specified by TokenNumber.
+
+**/
+UINT32
+EFIAPI
+LibPcdGet32 (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->Get32 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Returns the 64-bit value for the token specified by TokenNumber.
+
+**/
+UINT64
+EFIAPI
+LibPcdGet64 (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->Get64 (TokenNumber);
+}
+
+
+
+/**
+ Returns the pointer to the buffer of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Returns the pointer to the token specified by TokenNumber.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetPtr (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->GetPtr (TokenNumber);
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Returns the Boolean value of the token specified by TokenNumber.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetBool (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->GetBool (TokenNumber);
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Returns the size of the token specified by TokenNumber.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetSize (
+ IN UINTN TokenNumber
+ )
+{
+ return mPcd->GetSize (TokenNumber);
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Return the UINT8.
+
+**/
+UINT8
+EFIAPI
+LibPcdGetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->Get8Ex (Guid, TokenNumber);
+}
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Return the UINT16.
+
+**/
+UINT16
+EFIAPI
+LibPcdGetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->Get16Ex (Guid, TokenNumber);
+}
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Return the UINT32.
+
+**/
+UINT32
+EFIAPI
+LibPcdGetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->Get32Ex (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Return the UINT64.
+
+**/
+UINT64
+EFIAPI
+LibPcdGetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->Get64Ex (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the pointer to the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Return the VOID* pointer.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->GetPtrEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Return the BOOLEAN.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->GetBoolEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Return the size.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetExSize (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ ASSERT (Guid != NULL);
+
+ return mPcd->GetSizeEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSet8 (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->Set8 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT16 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSet16 (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->Set16 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSet32 (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ EFI_STATUS Status;
+ Status = mPcd->Set32 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSet64 (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->Set64 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber to
+ the value specified by Value. Value is returned.
+ If Value is NULL, then ASSERT().
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value A pointer to the buffer to set.
+
+ @retval VOID* Return the pointer for the buffer been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetPtr (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Value != NULL);
+
+ Status = mPcd->SetPtr (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The boolean value to set.
+
+ @retval BOOLEAN Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetBool (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->SetBool (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+
+ Status = mPcd->Set8Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+
+ Status = mPcd->Set16Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+
+ Status = mPcd->Set32Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+
+ Status = mPcd->Set64Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+ If Value is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval VOID * Return the value been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+ ASSERT (Value != NULL);
+
+ Status = mPcd->SetPtrEx (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The Boolean value to set.
+
+ @retval Boolean Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (Guid != NULL);
+
+ Status = mPcd->SetBoolEx (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ When the token specified by TokenNumber and Guid is set,
+ then notification function specified by NotificationFunction is called.
+ If Guid is NULL, then the default token space is used.
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates which
+ namespace to set a value from. If NULL, then the default
+ token space is used.
+ @param[in] TokenNumber The PCD token number to monitor.
+ @param[in] NotificationFunction The function to call when the token
+ specified by Guid and TokenNumber is set.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCallbackOnSet (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (NotificationFunction != NULL);
+
+ Status = mPcd->CallbackOnSet (TokenNumber, Guid, NotificationFunction);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return;
+}
+
+
+
+/**
+ Disable a notification function that was established with LibPcdCallbackonSet().
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Specify the GUID token space.
+ @param[in] TokenNumber Specify the token number.
+ @param[in] NotificationFunction The callback function to be unregistered.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCancelCallback (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (NotificationFunction != NULL);
+
+ Status = mPcd->CancelCallback (TokenNumber, Guid, NotificationFunction);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return;
+}
+
+
+
+/**
+ Retrieves the next PCD token number from the token space specified by Guid.
+ If Guid is NULL, then the default token space is used. If TokenNumber is 0,
+ then the first token number is returned. Otherwise, the token number that
+ follows TokenNumber in the token space is returned. If TokenNumber is the last
+ token number in the token space, then 0 is returned. If TokenNumber is not 0 and
+ is not in the token space specified by Guid, then ASSERT().
+
+ @param[in] Pointer to a 128-bit unique value that designates which namespace
+ to set a value from. If NULL, then the default token space is used.
+ @param[in] The previous PCD token number. If 0, then retrieves the first PCD
+ token number.
+
+ @retval UINTN The next valid token number.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetNextToken (
+ IN CONST GUID *Guid, OPTIONAL
+ IN OUT UINTN *TokenNumber
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mPcd->GetNextToken (Guid, TokenNumber);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (*TokenNumber);
+}
+
diff --git a/MdePkg/Library/DxePcdLib/DxePcdLib.mbd b/MdePkg/Library/DxePcdLib/DxePcdLib.mbd new file mode 100644 index 0000000000..52fc7e3e72 --- /dev/null +++ b/MdePkg/Library/DxePcdLib/DxePcdLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxePcdLib</BaseName>
+ <Guid>af97eb89-4cc6-45f8-a514-ca025b346480</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxePcdLib/DxePcdLib.msa b/MdePkg/Library/DxePcdLib/DxePcdLib.msa new file mode 100644 index 0000000000..dd7cbcee09 --- /dev/null +++ b/MdePkg/Library/DxePcdLib/DxePcdLib.msa @@ -0,0 +1,50 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxePcdLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>af97eb89-4cc6-45f8-a514-ca025b346480</Guid>
+ <Version>0</Version>
+ <Abstract>IO Library implemented with Framework CPU IO Protocol</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DxePcdLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Externs>
+ <Extern>
+ <Constructor>PcdLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxePcdLib/build.xml b/MdePkg/Library/DxePcdLib/build.xml new file mode 100644 index 0000000000..1c5b401d63 --- /dev/null +++ b/MdePkg/Library/DxePcdLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxePcdLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxePcdLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxePcdLib">
+ <GenBuild baseName="DxePcdLib" mbdFilename="${MODULE_DIR}\DxePcdLib.mbd" msaFilename="${MODULE_DIR}\DxePcdLib.msa"/>
+ </target>
+ <target depends="DxePcdLib_clean" name="clean"/>
+ <target depends="DxePcdLib_cleanall" name="cleanall"/>
+ <target name="DxePcdLib_clean">
+ <OutputDirSetup baseName="DxePcdLib" mbdFilename="${MODULE_DIR}\DxePcdLib.mbd" msaFilename="${MODULE_DIR}\DxePcdLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxePcdLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxePcdLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxePcdLib_cleanall">
+ <OutputDirSetup baseName="DxePcdLib" mbdFilename="${MODULE_DIR}\DxePcdLib.mbd" msaFilename="${MODULE_DIR}\DxePcdLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxePcdLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxePcdLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxePcdLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.mbd b/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.mbd new file mode 100644 index 0000000000..5569ae901e --- /dev/null +++ b/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeReportStatusCodeLib</BaseName>
+ <Guid>3ddc3b12-99ea-4364-b315-6310a2050be5</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:16</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.msa b/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.msa new file mode 100644 index 0000000000..34b14497d8 --- /dev/null +++ b/MdePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.msa @@ -0,0 +1,71 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeReportStatusCodeLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>3ddc3b12-99ea-4364-b315-6310a2050be5</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:16</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">ReportStatusCodeLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>ReportStatusCodeLib.c</Filename>
+ <Filename>PostCode.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">StatusCode</Protocol>
+ </Protocols>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeDataTypeAssert</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeDataTypeDebug</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeSpecificData</C_Name>
+ </GuidEntry>
+ </Guids>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdReportStatusCodePropertyMask</C_Name>
+ <Token>0x00000007</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeReportStatusCodeLib/PostCode.c b/MdePkg/Library/DxeReportStatusCodeLib/PostCode.c new file mode 100644 index 0000000000..3d0ce7cb8f --- /dev/null +++ b/MdePkg/Library/DxeReportStatusCodeLib/PostCode.c @@ -0,0 +1,125 @@ +/** @file
+ Report Status Code Library Post Code functions for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x\n", Value));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x - %s\n", Value, Description));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the
+ REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeDescriptionEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/DxeReportStatusCodeLib/ReportStatusCodeLib.c b/MdePkg/Library/DxeReportStatusCodeLib/ReportStatusCodeLib.c new file mode 100644 index 0000000000..9edb753137 --- /dev/null +++ b/MdePkg/Library/DxeReportStatusCodeLib/ReportStatusCodeLib.c @@ -0,0 +1,585 @@ +/** @file
+ Report Status Code Library for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Global pointer to the Status Code Protocol
+//
+static EFI_STATUS_CODE_PROTOCOL *gStatusCode = NULL;
+
+/**
+ Internal worker function that reports a status code through the Status Code Protocol
+
+ This function checks to see if a Status Code Protocol is present in the handle
+ database. If a Status Code Protocol is not present, then EFI_UNSUPPORTED is
+ returned. If a Status Code Protocol is present, then it is cached in gStatusCode,
+ and the ReportStatusCode() service of the Status Code Protocol is called passing in
+ Type, Value, Instance, CallerId, and Data. The result of this call is returned.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. This is an optional parameter that may be
+ NULL.
+ @param Data Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to report the status code.
+ @retval EFI_UNSUPPORTED Status Code Protocol is not available.
+
+**/
+EFI_STATUS
+InternalReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // If gStatusCode is NULL, then see if a Status Code Protocol instance is present
+ // in the handle database.
+ //
+ if (gStatusCode == NULL) {
+ Status = gBS->LocateProtocol (&gEfiStatusCodeRuntimeProtocolGuid, NULL, (VOID **)&gStatusCode);
+ if (EFI_ERROR (Status) || gStatusCode == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+ }
+
+ //
+ // A Status Code Protocol is present in the handle database, so pass in all the
+ // parameters to the ReportStatusCode() service of the Status Code Protocol
+ //
+ return gStatusCode->ReportStatusCode (Type, Value, Instance, CallerId, Data);
+}
+
+
+/**
+ Computes and returns the size, in bytes, of a device path.
+
+ @param DevicePath A pointer to a device path.
+
+ @return The size, in bytes, of DevicePath.
+
+**/
+UINTN
+InternalReportStatusCodeDevicePathSize (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Subtract the start node from the end node and add in the size of the end node
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + DevicePathNodeLength (DevicePath);
+}
+
+
+/**
+ Converts a status code to an 8-bit POST code value.
+
+ Converts the status code specified by CodeType and Value to an 8-bit POST code
+ and returns the 8-bit POST code in PostCode. If CodeType is an
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned.
+
+ If PostCode is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param PostCode A pointer to the 8-bit POST code value to return.
+
+ @retval TRUE The status code specified by CodeType and Value was converted
+ to an 8-bit POST code and returned in PostCode.
+ @retval FALSE The status code specified by CodeType and Value could not be
+ converted to an 8-bit POST code value.
+
+**/
+BOOLEAN
+EFIAPI
+CodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ )
+{
+ //
+ // If PostCode is NULL, then ASSERT()
+ //
+ ASSERT (PostCode != NULL);
+
+ //
+ // Convert Value to an 8 bit post code
+ //
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ||
+ ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ) {
+ *PostCode = (UINT8) (((Value & EFI_STATUS_CODE_CLASS_MASK) >> 24) << 5);
+ *PostCode |= (UINT8) (((Value & EFI_STATUS_CODE_SUBCLASS_MASK) >> 16) & 0x1f);
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts ASSERT() information from a status code structure.
+
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()
+ arguments specified by Filename, Description, and LineNumber. If CodeType is
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract
+ Filename, Description, and LineNumber from the optional data area of the
+ status code buffer specified by Data. The optional data area of Data contains
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the
+ ASSERT() information could be extracted from Data, then return TRUE.
+ Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If Filename is NULL, then ASSERT().
+ If Description is NULL, then ASSERT().
+ If LineNumber is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param Data Pointer to status code data buffer.
+ @param Filename Pointer to the source file name that generated the ASSERT().
+ @param Description Pointer to the description of the ASSERT().
+ @param LineNumber Pointer to source line number that generated the ASSERT().
+
+ @retval TRUE The status code specified by CodeType, Value, and Data was
+ converted ASSERT() arguments specified by Filename, Description,
+ and LineNumber.
+ @retval FALSE The status code specified by CodeType, Value, and Data could
+ not be converted to ASSERT() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractAssertInfo (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT CHAR8 **Filename,
+ OUT CHAR8 **Description,
+ OUT UINT32 *LineNumber
+ )
+{
+ EFI_DEBUG_ASSERT_DATA *AssertData;
+
+ ASSERT (Data != NULL);
+ ASSERT (Filename != NULL);
+ ASSERT (Description != NULL);
+ ASSERT (LineNumber != NULL);
+
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) &&
+ ((CodeType & EFI_STATUS_CODE_SEVERITY_MASK) == EFI_ERROR_UNRECOVERED) &&
+ ((Value & EFI_STATUS_CODE_OPERATION_MASK) == EFI_SW_EC_ILLEGAL_SOFTWARE_STATE)) {
+ AssertData = (EFI_DEBUG_ASSERT_DATA *)(Data + 1);
+ *Filename = (CHAR8 *)(AssertData + 1);
+ *Description = *Filename + AsciiStrLen (*Filename) + 1;
+ *LineNumber = AssertData->LineNumber;
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts DEBUG() information from a status code structure.
+
+ Converts the status code specified by Data to the DEBUG() arguments specified
+ by ErrorLevel, Marker, and Format. If type GUID in Data is
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and
+ Format from the optional data area of the status code buffer specified by Data.
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for
+ the Format. If the DEBUG() information could be extracted from Data, then
+ return TRUE. Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If ErrorLevel is NULL, then ASSERT().
+ If Marker is NULL, then ASSERT().
+ If Format is NULL, then ASSERT().
+
+ @param Data Pointer to status code data buffer.
+ @param ErrorLevel Pointer to error level mask for a debug message.
+ @param Marker Pointer to the variable argument list associated with Format.
+ @param Format Pointer to a Null-terminated ASCII format string of a
+ debug message.
+
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments
+ specified by ErrorLevel, Marker, and Format.
+ @retval FALSE The status code specified by Data could not be converted to
+ DEBUG() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractDebugInfo (
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT UINT32 *ErrorLevel,
+ OUT VA_LIST *Marker,
+ OUT CHAR8 **Format
+ )
+{
+ EFI_DEBUG_INFO *DebugInfo;
+
+ ASSERT (Data != NULL);
+ ASSERT (ErrorLevel != NULL);
+ ASSERT (Marker != NULL);
+ ASSERT (Format != NULL);
+
+ //
+ // If the GUID type is not EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID then return FALSE
+ //
+ if (!CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeDebugGuid)) {
+ return FALSE;
+ }
+
+ //
+ // Retrieve the debug information from the status code record
+ //
+ DebugInfo = (EFI_DEBUG_INFO *)(Data + 1);
+
+ *ErrorLevel = DebugInfo->ErrorLevel;
+
+ //
+ // The first 12 * UINTN bytes of the string are really an
+ // argument stack to support varargs on the Format string.
+ //
+ *Marker = (VA_LIST) (DebugInfo + 1);
+ *Format = (CHAR8 *)(((UINT64 *)*Marker) + 12);
+
+ return TRUE;
+}
+
+
+/**
+ Reports a status code.
+
+ Reports the status code specified by the parameters Type and Value. Status
+ code also require an instance, caller ID, and extended data. This function
+ passed in a zero instance, NULL extended data, and a caller ID of
+ gEfiCallerIdGuid, which is the GUID for the module.
+
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCode() must return immediately.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a
+ device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ return InternalReportStatusCode (Type, Value, 0, &gEfiCallerIdGuid, NULL);
+}
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data.
+
+ Allocates and fills in the extended data section of a status code with the
+ Device Path Protocol specified by DevicePath. This function is responsible
+ for allocating a buffer large enough for the standard header and the device
+ path. The standard header is filled in with a GUID of
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero
+ instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If
+ ReportStatusCodeWithDevicePath() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If DevicePath is NULL, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithDevicePath (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ ASSERT (DevicePath != NULL);
+ return ReportStatusCodeWithExtendedData (
+ Type,
+ Value,
+ (VOID *)DevicePath,
+ InternalReportStatusCodeDevicePathSize (DevicePath)
+ );
+}
+
+
+/**
+ Reports a status code with an extended data buffer.
+
+ Allocates and fills in the extended data section of a status code with the
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData
+ is assumed to be one of the data structures specified in Related Definitions.
+ These data structure do not have the standard header, so this function is
+ responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported
+ with a zero instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If
+ ReportStatusCodeWithExtendedData() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL, then ASSERT().
+ If ExtendedDataSize is 0, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithExtendedData (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN VOID *ExtendedData,
+ IN UINTN ExtendedDataSize
+ )
+{
+ ASSERT (ExtendedData != NULL);
+ ASSERT (ExtendedDataSize != 0);
+ return ReportStatusCodeEx (
+ Type,
+ Value,
+ 0,
+ NULL,
+ NULL,
+ ExtendedData,
+ ExtendedDataSize
+ );
+}
+
+
+/**
+ Reports a status code with full parameters.
+
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize
+ is 0, then an extended data buffer is not reported. If ExtendedData is not
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated.
+ ExtendedData is assumed not have the standard status code header, so this function
+ is responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled in
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with
+ an instance specified by Instance and a caller ID specified by CallerId. If
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.
+
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate
+ the extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeEx (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_GUID *ExtendedDataGuid OPTIONAL,
+ IN VOID *ExtendedData OPTIONAL,
+ IN UINTN ExtendedDataSize
+ )
+{
+ EFI_STATUS Status;
+ EFI_STATUS_CODE_DATA *StatusCodeData;
+
+ ASSERT (!((ExtendedData == NULL) && (ExtendedDataSize != 0)));
+ ASSERT (!((ExtendedData != NULL) && (ExtendedDataSize == 0)));
+
+ //
+ // Allocate space for the Status Code Header and its buffer
+ //
+ StatusCodeData = NULL;
+ gBS->AllocatePool (EfiBootServicesData, sizeof (EFI_STATUS_CODE_DATA) + ExtendedDataSize, (VOID **)&StatusCodeData);
+ if (StatusCodeData == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Fill in the extended data header
+ //
+ StatusCodeData->HeaderSize = sizeof (EFI_STATUS_CODE_DATA);
+ StatusCodeData->Size = (UINT16)ExtendedDataSize;
+ if (ExtendedDataGuid == NULL) {
+ ExtendedDataGuid = &gEfiStatusCodeSpecificDataGuid;
+ }
+ CopyGuid (&StatusCodeData->Type, ExtendedDataGuid);
+
+ //
+ // Fill in the extended data buffer
+ //
+ CopyMem (StatusCodeData + 1, ExtendedData, ExtendedDataSize);
+
+ //
+ // Report the status code
+ //
+ if (CallerId == NULL) {
+ CallerId = &gEfiCallerIdGuid;
+ }
+ Status = InternalReportStatusCode (Type, Value, Instance, CallerId, StatusCodeData);
+
+ //
+ // Free the allocated buffer
+ //
+ gBS->FreePool (StatusCodeData);
+
+ return Status;
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportProgressCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportErrorCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportDebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/DxeReportStatusCodeLib/build.xml b/MdePkg/Library/DxeReportStatusCodeLib/build.xml new file mode 100644 index 0000000000..bc4f59fc1d --- /dev/null +++ b/MdePkg/Library/DxeReportStatusCodeLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeReportStatusCodeLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeReportStatusCodeLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeReportStatusCodeLib">
+ <GenBuild baseName="DxeReportStatusCodeLib" mbdFilename="${MODULE_DIR}\DxeReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\DxeReportStatusCodeLib.msa"/>
+ </target>
+ <target depends="DxeReportStatusCodeLib_clean" name="clean"/>
+ <target depends="DxeReportStatusCodeLib_cleanall" name="cleanall"/>
+ <target name="DxeReportStatusCodeLib_clean">
+ <OutputDirSetup baseName="DxeReportStatusCodeLib" mbdFilename="${MODULE_DIR}\DxeReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\DxeReportStatusCodeLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeReportStatusCodeLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeReportStatusCodeLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeReportStatusCodeLib_cleanall">
+ <OutputDirSetup baseName="DxeReportStatusCodeLib" mbdFilename="${MODULE_DIR}\DxeReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\DxeReportStatusCodeLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeReportStatusCodeLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeReportStatusCodeLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeReportStatusCodeLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.c b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.c new file mode 100644 index 0000000000..f130b207e5 --- /dev/null +++ b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.c @@ -0,0 +1,36 @@ +/** @file
+ DXE Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeServicesTableLib.c
+
+**/
+
+
+
+EFI_DXE_SERVICES *gDS = NULL;
+
+/**
+**/
+EFI_STATUS
+DxeServicesTableLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = EfiGetSystemConfigurationTable (&gEfiDxeServicesTableGuid, (VOID **) &gDS);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (gDS != NULL);
+
+ return Status;
+}
diff --git a/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.mbd b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.mbd new file mode 100644 index 0000000000..6f818e0e33 --- /dev/null +++ b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeServicesTableLib</BaseName>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-31 13:35</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.msa b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.msa new file mode 100644 index 0000000000..9912255c7b --- /dev/null +++ b/MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.msa @@ -0,0 +1,55 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeServicesTableLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-31 13:35</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DxeServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DxeServicesTableLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>DxeServicesTable</C_Name>
+ </GuidEntry>
+ </Guids>
+ <Externs>
+ <Extern>
+ <Constructor>DxeServicesTableLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeServicesTableLib/build.xml b/MdePkg/Library/DxeServicesTableLib/build.xml new file mode 100644 index 0000000000..bf830f631e --- /dev/null +++ b/MdePkg/Library/DxeServicesTableLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeServicesTableLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeServicesTableLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeServicesTableLib">
+ <GenBuild baseName="DxeServicesTableLib" mbdFilename="${MODULE_DIR}\DxeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\DxeServicesTableLib.msa"/>
+ </target>
+ <target depends="DxeServicesTableLib_clean" name="clean"/>
+ <target depends="DxeServicesTableLib_cleanall" name="cleanall"/>
+ <target name="DxeServicesTableLib_clean">
+ <OutputDirSetup baseName="DxeServicesTableLib" mbdFilename="${MODULE_DIR}\DxeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\DxeServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeServicesTableLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeServicesTableLib_cleanall">
+ <OutputDirSetup baseName="DxeServicesTableLib" mbdFilename="${MODULE_DIR}\DxeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\DxeServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeServicesTableLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeServicesTableLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.c b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.c new file mode 100644 index 0000000000..4c888370eb --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.c @@ -0,0 +1,168 @@ +/** @file
+Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: DxeSmbusLib.c
+
+**/
+
+#include "InternalSmbusLib.h"
+
+//
+// Globle varible to cache pointer to Smbus protocol.
+//
+STATIC EFI_SMBUS_HC_PROTOCOL *mSmbus = NULL;
+
+/**
+ The constructor function caches the pointer to Smbus protocol.
+
+ The constructor function locates Smbus protocol from protocol database.
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+SmbusLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gEfiCpuIoProtocolGuid,
+ NULL,
+ (VOID**) &mSmbus
+ );
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (mSmbus != NULL);
+
+ return Status;
+}
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation..
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ RETURN_STATUS ReturnStatus;
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+
+ SmbusDeviceAddress.SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+
+ ReturnStatus = mSmbus->Execute (
+ mSmbus,
+ SmbusDeviceAddress,
+ SMBUS_LIB_COMMAND (SmBusAddress),
+ SmbusOperation,
+ SMBUS_LIB_PEC (SmBusAddress),
+ &Length,
+ Buffer
+ );
+ if (Status != NULL) {
+ *Status = ReturnStatus;
+ }
+
+ return Length;
+}
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+ It will assign to all SMBUS slave devices if it is NULL.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalSmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid OPTIONAL
+ )
+{
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+
+ SmbusDeviceAddress.SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+ return (RETURN_STATUS) mSmbus->ArpDevice (
+ mSmbus,
+ (BOOLEAN) (Uuid == NULL),
+ (EFI_SMBUS_UDID *) Uuid,
+ &SmbusDeviceAddress
+ );
+}
+
+/**
+ Retrieves the mapping of all the SMBus devices.
+
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+ @param SmbusDeviceMap The pointer to the device map as enumerated by the SMBus controller driver.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalGetArpMap (
+ OUT UINTN *Length,
+ OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ )
+{
+ return (RETURN_STATUS) mSmbus->GetArpMap (mSmbus, Length, SmbusDeviceMap);
+}
diff --git a/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.mbd b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.mbd new file mode 100644 index 0000000000..6522eacc1a --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeSmbusLib</BaseName>
+ <Guid>91B68627-0B5D-4d32-8F1C-16CD242A8C2A</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-17 22:31</Created>
+ <Modified>2006-04-17 23:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.msa b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.msa new file mode 100644 index 0000000000..9507c070a2 --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/DxeSmbusLib.msa @@ -0,0 +1,54 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeSmbusLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>07720769-A7D0-4a8d-BE41-71CC18EB3338</Guid>
+ <Version>0</Version>
+ <Abstract>SmBus Library Instance implemented with SmBus Protocol.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-17 22:31</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">SmbusLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DxeSmbusLib.c</Filename>
+ <Filename>SmbusLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">Smbus</Protocol>
+ </Protocols>
+ <Externs>
+ <Extern>
+ <Constructor>SmbusLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeSmbusLib/InternalSmbusLib.h b/MdePkg/Library/DxeSmbusLib/InternalSmbusLib.h new file mode 100644 index 0000000000..3c0b597fc5 --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/InternalSmbusLib.h @@ -0,0 +1,112 @@ +/** @file
+Internal header file for Smbus library.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: SmbusLib.c
+
+**/
+
+#ifndef __INTERNAL_SMBUS_LIB_H
+#define __INTERNAL_SMBUS_LIB_H
+
+#define SMBUS_LIB_PEC(SmBusAddress) ((BOOLEAN) ((SmBusAddress) & 0x01))
+#define SMBUS_LIB_SLAVE_ADDRESS(SmBusAddress) (((SmBusAddress) >> 1) & 0x7f)
+#define SMBUS_LIB_COMMAND(SmBusAddress) (((SmBusAddress) >> 8) & 0xff)
+#define SMBUS_LIB_LENGTH(SmBusAddress) (((SmBusAddress) >> 16) & 0x1f)
+#define SMBUS_LIB_RESEARVED(SmBusAddress) (((SmBusAddress) >> 21))
+
+//
+// Declaration for internal functions
+//
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation..
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+ It will assign to all SMBUS slave devices if it is NULL.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalSmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid OPTIONAL
+ );
+
+/**
+ Retrieves the mapping of all the SMBus devices.
+
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+ @param SmbusDeviceMap The pointer to the device map as enumerated by the SMBus controller driver.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalGetArpMap (
+ OUT UINTN *Length,
+ OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+#endif
diff --git a/MdePkg/Library/DxeSmbusLib/SmbusLib.c b/MdePkg/Library/DxeSmbusLib/SmbusLib.c new file mode 100644 index 0000000000..da29fab5a3 --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/SmbusLib.c @@ -0,0 +1,597 @@ +/** @file
+Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: SmbusLib.c
+
+**/
+
+#include "InternalSmbusLib.h"
+
+/**
+ Executes an SMBUS quick read command.
+
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+VOID
+EFIAPI
+SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);
+}
+
+/**
+ Executes an SMBUS quick write command.
+
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+BOOLEAN
+EFIAPI
+SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);
+ //
+ // Bugbug: Undefined return value in spec
+ //
+ return TRUE;
+}
+
+/**
+ Executes an SMBUS receive byte command.
+
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ The byte received from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte received from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS send byte command.
+
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
+ The byte specified by Value is sent.
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to send.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data byte command.
+
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 8-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS write data byte command.
+
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
+ The 8-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data word command.
+
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT16
+EFIAPI
+SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);
+
+ return Word;
+}
+
+/**
+ Executes an SMBUS write data word command.
+
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Word = Value;
+ InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS process call command.
+
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value returned by the process call command is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The 16-bit value returned by the process call command.
+
+**/
+UINT16
+EFIAPI
+SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read block command.
+
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Bytes are read from the SMBUS and stored in Buffer.
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure Buffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes read.
+
+**/
+UINTN
+EFIAPI
+SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x1f, Buffer, Status);
+}
+
+/**
+ Executes an SMBUS write block command.
+
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from Buffer.
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), Buffer, Status);
+}
+
+/**
+ Executes an SMBUS block process call command.
+
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from OutBuffer. Bytes are then read from the SMBUS into InBuffer.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure InBuffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If OutBuffer is NULL, then ASSERT().
+ If InBuffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param OutBuffer Pointer to the buffer of bytes to write to the SMBUS.
+ @param InBuffer Pointer to the buffer of bytes to read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ OUT VOID *OutBuffer,
+ OUT VOID *InBuffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (InBuffer != NULL);
+ ASSERT (OutBuffer != NULL);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ //
+ // BugBug: Not sure whether it's all right.
+ //
+ InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), OutBuffer, Status);
+
+ return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 1, InBuffer, Status);
+}
+
+/**
+ Enumerates the SMBUS and assigns slave addresses.
+
+ Executes the SMBUS enumeration algorithm and assigns a valid address to all SMBUS slave devices.
+ The total number of SMBUS slave devices detected is returned.
+ The status of the executed command is returned.
+ If Slave Address in SmBusAddress is not zero, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpAll (
+ IN UINTN SmBusAddress
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress) == 0);
+
+ return InternalSmBusArpDevice (SmBusAddress, NULL);
+}
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+
+ return InternalSmBusArpDevice (SmBusAddress, Uuid);
+}
+
+/**
+ Retrieves the UUID associated with an SMBUS slave device.
+
+ Retrieves the UUID associated with the slave address specified
+ by SmBusAddress and returns the UUID in Uuid.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If Uuid is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID retrieved from the SMBUS slave device.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusGetUuid (
+ IN UINTN SmBusAddress,
+ OUT GUID *Uuid
+ )
+{
+ UINTN Length;
+ EFI_SMBUS_DEVICE_MAP *SmBusDeviceMap;
+ RETURN_STATUS ReturnStatus;
+ UINTN SmbusDeviceAddress;
+ UINTN Index;
+
+ ASSERT (Uuid != NULL);
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+
+ ReturnStatus = InternalGetArpMap (&Length, &SmBusDeviceMap);
+ if (!RETURN_ERROR (ReturnStatus)) {
+ SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+ for (Index = 0; Index < Length; Index++) {
+ if (SmBusDeviceMap[Index].SmbusDeviceAddress.SmbusDeviceAddress == SmbusDeviceAddress) {
+ CopyMem (Uuid, &SmBusDeviceMap[Index].SmbusDeviceUdid, sizeof (EFI_SMBUS_UDID));
+ break;
+ }
+ }
+ }
+
+ return ReturnStatus;
+}
diff --git a/MdePkg/Library/DxeSmbusLib/build.xml b/MdePkg/Library/DxeSmbusLib/build.xml new file mode 100644 index 0000000000..2d01f3c300 --- /dev/null +++ b/MdePkg/Library/DxeSmbusLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeSmbusLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeSmbusLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeSmbusLib">
+ <GenBuild baseName="DxeSmbusLib" mbdFilename="${MODULE_DIR}\DxeSmbusLib.mbd" msaFilename="${MODULE_DIR}\DxeSmbusLib.msa"/>
+ </target>
+ <target depends="DxeSmbusLib_clean" name="clean"/>
+ <target depends="DxeSmbusLib_cleanall" name="cleanall"/>
+ <target name="DxeSmbusLib_clean">
+ <OutputDirSetup baseName="DxeSmbusLib" mbdFilename="${MODULE_DIR}\DxeSmbusLib.mbd" msaFilename="${MODULE_DIR}\DxeSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeSmbusLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeSmbusLib_cleanall">
+ <OutputDirSetup baseName="DxeSmbusLib" mbdFilename="${MODULE_DIR}\DxeSmbusLib.mbd" msaFilename="${MODULE_DIR}\DxeSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeSmbusLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeSmbusLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c b/MdePkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c new file mode 100644 index 0000000000..3439d6da35 --- /dev/null +++ b/MdePkg/Library/DxeSmmDriverEntryPoint/DriverEntryPoint.c @@ -0,0 +1,274 @@ +/** @file
+ Entry point to a EFI/DXE driver.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+EFI_BOOT_SERVICES *mBS;
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+STATIC
+UINTN
+EFIAPI
+SmmGetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Compute the size and add back in the size of the end device path structure
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+}
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+SmmAppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ EFI_STATUS Status;
+ UINTN Size;
+ UINTN Size1;
+ UINTN Size2;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath2;
+
+ ASSERT (FirstDevicePath != NULL && SecondDevicePath != NULL);
+
+ //
+ // Allocate space for the combined device path. It only has one end node of
+ // length EFI_DEVICE_PATH_PROTOCOL
+ //
+ Size1 = SmmGetDevicePathSize (FirstDevicePath);
+ Size2 = SmmGetDevicePathSize (SecondDevicePath);
+ Size = Size1 + Size2 - sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ Status = mBS->AllocatePool (EfiBootServicesData, Size, (VOID **) &NewDevicePath);
+
+ if (EFI_SUCCESS == Status) {
+ mBS->CopyMem ((VOID *) NewDevicePath, (VOID *) FirstDevicePath, Size1);
+ //
+ // Over write Src1 EndNode and do the copy
+ //
+ DevicePath2 = (EFI_DEVICE_PATH_PROTOCOL *) ((CHAR8 *) NewDevicePath + (Size1 - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ mBS->CopyMem ((VOID *) DevicePath2, (VOID *) SecondDevicePath, Size2);
+ }
+
+ return NewDevicePath;
+}
+
+/**
+ Unload function that is registered in the LoadImage protocol. It un-installs
+ protocols produced and deallocates pool used by the driver. Called by the core
+ when unloading the driver.
+
+ @param ImageHandle ImageHandle of the unloaded driver
+
+ @return Status of the ProcessModuleUnloadList.
+
+**/
+EFI_STATUS
+EFIAPI
+_DriverUnloadHandler (
+ EFI_HANDLE ImageHandle
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Call the unload handlers for all the modules
+ //
+ Status = ProcessModuleUnloadList (ImageHandle);
+
+ //
+ // If the driver specific unload handler does not return an error, then call all of the
+ // library destructors. If the unload handler returned an error, then the driver can not be
+ // unloaded, and the library destructors should not be called
+ //
+ if (!EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, gST);
+ }
+
+ //
+ // Return the status from the driver specific unload handler
+ //
+ return Status;
+}
+
+/**
+ Enrty point to DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_SMM_BASE_PROTOCOL *SmmBase;
+ BOOLEAN InSmm;
+ EFI_DEVICE_PATH_PROTOCOL *CompleteFilePath;
+ EFI_DEVICE_PATH_PROTOCOL *ImageDevicePath;
+ EFI_HANDLE Handle;
+
+ //
+ // Cache a pointer to the Boot Services Table
+ //
+ mBS = SystemTable->BootServices;
+
+ //
+ // Retrieve the Loaded Image Protocol
+ //
+ Status = mBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID*)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Retrieve SMM Base Protocol
+ //
+ Status = mBS->LocateProtocol (
+ &gEfiSmmBaseProtocolGuid,
+ NULL,
+ (VOID **) &SmmBase
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Check to see if we are already in SMM
+ //
+ SmmBase->InSmm (SmmBase, &InSmm);
+
+ //
+ //
+ //
+ if (!InSmm) {
+ //
+ // Retrieve the Device Path Protocol from the DeviceHandle tha this driver was loaded from
+ //
+ Status = mBS->HandleProtocol (
+ LoadedImage->DeviceHandle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID*)&ImageDevicePath
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build the full device path to the currently execuing image
+ //
+ CompleteFilePath = SmmAppendDevicePath (ImageDevicePath, LoadedImage->FilePath);
+
+ //
+ // Load the image in memory to SMRAM; it will automatically generate the
+ // SMI.
+ //
+ Status = SmmBase->Register (SmmBase, CompleteFilePath, NULL, 0, &Handle, FALSE);
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ //
+ // Call constructor for all libraries
+ //
+ ProcessLibraryConstructorList (ImageHandle, SystemTable);
+
+ //
+ // Optionally install the unload handler
+ //
+ if (_gDriverUnloadImageCount > 0) {
+ Status = mBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+ LoadedImage->Unload = _DriverUnloadHandler;
+ }
+
+ //
+ // Call the list of driver entry points
+ //
+ Status = ProcessModuleEntryPointList (ImageHandle, SystemTable);
+ if (EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, SystemTable);
+ }
+
+ return Status;
+}
+
+/**
+ Enrty point wrapper of DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return _ModuleEntryPoint (ImageHandle, SystemTable);
+}
diff --git a/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.mbd b/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.mbd new file mode 100644 index 0000000000..b9d9ed2e39 --- /dev/null +++ b/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>DxeSmmDriverEntryPoint</BaseName>
+ <Guid>79C5C7B7-1083-42a6-AD15-2A4E7C4274D7</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-27 17:32</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa b/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa new file mode 100644 index 0000000000..ed4a9bed36 --- /dev/null +++ b/MdePkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.msa @@ -0,0 +1,50 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>DxeSmmDriverEntryPoint</BaseName>
+ <ModuleType>DXE_SMM_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>79C5C7B7-1083-42a6-AD15-2A4E7C4274D7</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Abstract>Component description file for the entry point to a EFI/DXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-03-27 17:32</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DxeSmmDriverEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DriverEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">DevicePath</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">SmmBase</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">LoadedImage</Protocol>
+ </Protocols>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/DxeSmmDriverEntryPoint/build.xml b/MdePkg/Library/DxeSmmDriverEntryPoint/build.xml new file mode 100644 index 0000000000..6105184eca --- /dev/null +++ b/MdePkg/Library/DxeSmmDriverEntryPoint/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DxeSmmDriverEntryPoint"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\DxeSmmDriverEntryPoint"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DxeSmmDriverEntryPoint">
+ <GenBuild baseName="DxeSmmDriverEntryPoint" mbdFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.msa"/>
+ </target>
+ <target depends="DxeSmmDriverEntryPoint_clean" name="clean"/>
+ <target depends="DxeSmmDriverEntryPoint_cleanall" name="cleanall"/>
+ <target name="DxeSmmDriverEntryPoint_clean">
+ <OutputDirSetup baseName="DxeSmmDriverEntryPoint" mbdFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeSmmDriverEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeSmmDriverEntryPoint_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DxeSmmDriverEntryPoint_cleanall">
+ <OutputDirSetup baseName="DxeSmmDriverEntryPoint" mbdFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\DxeSmmDriverEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DxeSmmDriverEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DxeSmmDriverEntryPoint_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DxeSmmDriverEntryPoint*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/HiiLib/HiiLib.c b/MdePkg/Library/HiiLib/HiiLib.c new file mode 100644 index 0000000000..d7fad9fd45 --- /dev/null +++ b/MdePkg/Library/HiiLib/HiiLib.c @@ -0,0 +1,62 @@ +/** @file
+ HII Library implementation that uses DXE protocols and services.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HiiLib.c
+
+**/
+
+/**
+ This function allocates pool for an EFI_HII_PACKAGES structure
+ with enough space for the variable argument list of package pointers.
+ The allocated structure is initialized using NumberOfPackages, Guid,
+ and the variable length argument list of package pointers.
+
+ @param NumberOfPackages The number of HII packages to prepare.
+ @param Guid Package GUID.
+
+ @return The allocated and initialized packages.
+
+**/
+EFI_HII_PACKAGES *
+EFIAPI
+PreparePackages (
+ IN UINTN NumberOfPackages,
+ IN CONST EFI_GUID *Guid OPTIONAL,
+ ...
+ )
+{
+ VA_LIST Args;
+ EFI_HII_PACKAGES *HiiPackages;
+ VOID **Package;
+ UINTN Index;
+
+ ASSERT (NumberOfPackages > 0);
+
+ HiiPackages = AllocateZeroPool (sizeof (EFI_HII_PACKAGES) + NumberOfPackages * sizeof (VOID *));
+ ASSERT (HiiPackages != NULL);
+
+ HiiPackages->GuidId = (EFI_GUID *) Guid;
+ HiiPackages->NumberOfPackages = NumberOfPackages;
+ Package = (VOID **) (((UINT8 *) HiiPackages) + sizeof (EFI_HII_PACKAGES));
+
+ VA_START (Args, Guid);
+
+ for (Index = 0; Index < NumberOfPackages; Index++) {
+ *Package = VA_ARG (Args, VOID *);
+ Package++;
+ }
+
+ VA_END (Args);
+
+ return HiiPackages;
+
+}
diff --git a/MdePkg/Library/HiiLib/HiiLib.mbd b/MdePkg/Library/HiiLib/HiiLib.mbd new file mode 100644 index 0000000000..4a681fbb7e --- /dev/null +++ b/MdePkg/Library/HiiLib/HiiLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>HiiLib</BaseName>
+ <Guid>1e2c4c2e-67e6-4e57-b3ae-cf5a5af72c2c</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-17 09:00</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/HiiLib/HiiLib.msa b/MdePkg/Library/HiiLib/HiiLib.msa new file mode 100644 index 0000000000..bcd76aab36 --- /dev/null +++ b/MdePkg/Library/HiiLib/HiiLib.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>HiiLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>1e2c4c2e-67e6-4e57-b3ae-cf5a5af72c2c</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-17 09:00</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">HiiLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">MemoryAllocationLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>HiiLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/HiiLib/build.xml b/MdePkg/Library/HiiLib/build.xml new file mode 100644 index 0000000000..d48a5576d8 --- /dev/null +++ b/MdePkg/Library/HiiLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="HiiLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\HiiLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="HiiLib">
+ <GenBuild baseName="HiiLib" mbdFilename="${MODULE_DIR}\HiiLib.mbd" msaFilename="${MODULE_DIR}\HiiLib.msa"/>
+ </target>
+ <target depends="HiiLib_clean" name="clean"/>
+ <target depends="HiiLib_cleanall" name="cleanall"/>
+ <target name="HiiLib_clean">
+ <OutputDirSetup baseName="HiiLib" mbdFilename="${MODULE_DIR}\HiiLib.mbd" msaFilename="${MODULE_DIR}\HiiLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\HiiLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\HiiLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="HiiLib_cleanall">
+ <OutputDirSetup baseName="HiiLib" mbdFilename="${MODULE_DIR}\HiiLib.mbd" msaFilename="${MODULE_DIR}\HiiLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\HiiLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\HiiLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**HiiLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c new file mode 100644 index 0000000000..d44725a728 --- /dev/null +++ b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c @@ -0,0 +1,51 @@ +/** @file
+ Entry point to a the PEI Core.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Enrty point to PEI core.
+
+ @param PeiStartupDescriptor Pointer of start up information.
+
+ @return Status returned by entry points of core and drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_PEI_STARTUP_DESCRIPTOR *PeiStartupDescriptor
+ )
+{
+ //
+ // Call the PEI Core entry point
+ //
+ return ProcessModuleEntryPointList (PeiStartupDescriptor, NULL);
+}
+
+
+/**
+ Wrapper of enrty point to PEI core.
+
+ @param PeiStartupDescriptor Pointer of start up information.
+
+ @return Status returned by entry points of core and drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_PEI_STARTUP_DESCRIPTOR *PeiStartupDescriptor
+ )
+{
+ return _ModuleEntryPoint (PeiStartupDescriptor);
+}
diff --git a/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.mbd b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.mbd new file mode 100644 index 0000000000..8739972296 --- /dev/null +++ b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiCoreEntryPoint</BaseName>
+ <Guid>b3b0654a-969d-4096-86cb-27e262a02083</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.msa b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.msa new file mode 100644 index 0000000000..83d6a18399 --- /dev/null +++ b/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.msa @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiCoreEntryPoint</BaseName>
+ <ModuleType>PEI_CORE</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>b3b0654a-969d-4096-86cb-27e262a02083</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to the PEI Core</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeiCoreEntryPoint</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiCoreEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiCoreEntryPoint/build.xml b/MdePkg/Library/PeiCoreEntryPoint/build.xml new file mode 100644 index 0000000000..da71288b5b --- /dev/null +++ b/MdePkg/Library/PeiCoreEntryPoint/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiCoreEntryPoint"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiCoreEntryPoint"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiCoreEntryPoint">
+ <GenBuild baseName="PeiCoreEntryPoint" mbdFilename="${MODULE_DIR}\PeiCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeiCoreEntryPoint.msa"/>
+ </target>
+ <target depends="PeiCoreEntryPoint_clean" name="clean"/>
+ <target depends="PeiCoreEntryPoint_cleanall" name="cleanall"/>
+ <target name="PeiCoreEntryPoint_clean">
+ <OutputDirSetup baseName="PeiCoreEntryPoint" mbdFilename="${MODULE_DIR}\PeiCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeiCoreEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiCoreEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiCoreEntryPoint_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiCoreEntryPoint_cleanall">
+ <OutputDirSetup baseName="PeiCoreEntryPoint" mbdFilename="${MODULE_DIR}\PeiCoreEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeiCoreEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiCoreEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiCoreEntryPoint_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiCoreEntryPoint*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiCoreLib/PeiCoreLib.c b/MdePkg/Library/PeiCoreLib/PeiCoreLib.c new file mode 100644 index 0000000000..70c4d64eb3 --- /dev/null +++ b/MdePkg/Library/PeiCoreLib/PeiCoreLib.c @@ -0,0 +1,376 @@ +/** @file
+ PEI Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiCoreLib.c
+
+**/
+
+/**
+ This service enables a given PEIM to register an interface into the PEI Foundation.
+
+ @param PpiList A pointer to the list of interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreInstallPpi (
+ IN EFI_PEI_PPI_DESCRIPTOR *PpiList
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->InstallPpi (PeiServices, PpiList);
+}
+
+/**
+ This service enables PEIMs to replace an entry in the PPI database with an alternate entry.
+
+ @param OldPpi Pointer to the old PEI PPI Descriptors.
+ @param NewPpi Pointer to the new PEI PPI Descriptors.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The OldPpi or NewPpi is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+ @retval EFI_NOT_FOUND The PPI for which the reinstallation was requested has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreReinstallPpi (
+ IN EFI_PEI_PPI_DESCRIPTOR *OldPpi,
+ IN EFI_PEI_PPI_DESCRIPTOR *NewPpi
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->ReInstallPpi (PeiServices, OldPpi, NewPpi);
+}
+
+/**
+ This service enables PEIMs to discover a given instance of an interface.
+
+ @param Guid A pointer to the GUID whose corresponding interface needs to be found.
+ @param Instance The N-th instance of the interface that is required.
+ @param PpiDescriptor A pointer to instance of the EFI_PEI_PPI_DESCRIPTOR.
+ @param Ppi A pointer to the instance of the interface.
+
+ @retval EFI_SUCCESS The interface was successfully returned.
+ @retval EFI_NOT_FOUND The PPI descriptor is not found in the database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreLocatePpi (
+ IN EFI_GUID *Guid,
+ IN UINTN Instance,
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor,
+ IN OUT VOID **Ppi
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->LocatePpi (PeiServices, Guid, Instance, PpiDescriptor, Ppi);
+}
+
+/**
+ This service enables PEIMs to register a given service to be invoked
+ when another service is installed or reinstalled.
+
+ @param NotifyList A pointer to the list of notification interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The NotifyList pointer is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI notify descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreNotifyPpi (
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->NotifyPpi (PeiServices, NotifyList);
+}
+
+/**
+ This service enables PEIMs to ascertain the present value of the boot mode.
+
+ @param BootMode A pointer to contain the value of the boot mode.
+
+ @retval EFI_SUCCESS The boot mode was returned successfully.
+ @retval EFI_INVALID_PARAMETER BootMode is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreGetBootMode (
+ IN OUT EFI_BOOT_MODE *BootMode
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->GetBootMode (PeiServices, BootMode);
+}
+
+/**
+ This service enables PEIMs to update the boot mode variable.
+
+ @param BootMode The value of the boot mode to set.
+
+ @retval EFI_SUCCESS The value was successfully updated
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreSetBootMode (
+ IN EFI_BOOT_MODE BootMode
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->SetBootMode (PeiServices, BootMode);
+}
+
+/**
+ This service enables a PEIM to ascertain the address of the list of HOBs in memory.
+
+ @param HobList A pointer to the list of HOBs that the PEI Foundation will initialize.
+
+ @retval EFI_SUCCESS The list was successfully returned.
+ @retval EFI_NOT_AVAILABLE_YET The HOB list is not yet published.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreGetHobList (
+ IN OUT VOID **HobList
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->GetHobList (PeiServices, HobList);
+}
+
+/**
+ This service enables PEIMs to create various types of HOBs.
+
+ @param Type The type of HOB to be installed.
+ @param Length The length of the HOB to be added.
+ @param Hob The address of a pointer that will contain the HOB header.
+
+ @retval EFI_SUCCESS The HOB was successfully created.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreCreateHob (
+ IN UINT16 Type,
+ IN UINT16 Length,
+ IN OUT VOID **Hob
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->CreateHob (PeiServices, Type, Length, Hob);
+}
+
+/**
+ This service enables PEIMs to discover additional firmware volumes.
+
+ @param Instance This instance of the firmware volume to find.
+ The value 0 is the Boot Firmware Volume (BFV).
+ @param FwVolHeader Pointer to the firmware volume header of the volume to return.
+
+ @retval EFI_SUCCESS The volume was found.
+ @retval EFI_NOT_FOUND The volume was not found.
+ @retval EFI_INVALID_PARAMETER FwVolHeader is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindNextVolume (
+ IN UINTN Instance,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->FfsFindNextVolume (PeiServices, Instance, FwVolHeader);
+}
+
+/**
+ This service enables PEIMs to discover additional firmware files.
+
+ @param SearchType A filter to find files only of this type.
+ @param FwVolHeader Pointer to the firmware volume header of the volume to search.
+ This parameter must point to a valid FFS volume.
+ @param FileHeader Pointer to the current file from which to begin searching.
+
+ @retval EFI_SUCCESS The file was found.
+ @retval EFI_NOT_FOUND The file was not found.
+ @retval EFI_NOT_FOUND The header checksum was not zero.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindNextFile (
+ IN EFI_FV_FILETYPE SearchType,
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
+ IN OUT EFI_FFS_FILE_HEADER **FileHeader
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->FfsFindNextFile (PeiServices, SearchType, FwVolHeader, FileHeader);
+}
+
+/**
+ This service enables PEIMs to discover sections of a given type within a valid FFS file.
+
+ @param SearchType The value of the section type to find.
+ @param FfsFileHeader A pointer to the file header that contains the set of sections to be searched.
+ @param SectionData A pointer to the discovered section, if successful.
+
+ @retval EFI_SUCCESS The section was found.
+ @retval EFI_NOT_FOUND The section was not found.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindSectionData (
+ IN EFI_SECTION_TYPE SectionType,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT VOID **SectionData
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->FfsFindSectionData (PeiServices, SectionType, FfsFileHeader, SectionData);
+}
+
+/**
+ This service enables PEIMs to register the permanent memory configuration
+ that has been initialized with the PEI Foundation.
+
+ @param MemoryBegin The value of a region of installed memory.
+ @param MemoryLength The corresponding length of a region of installed memory.
+
+ @retval EFI_SUCCESS The region was successfully installed in a HOB.
+ @retval EFI_INVALID_PARAMETER MemoryBegin and MemoryLength are illegal for this system.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreInstallPeiMemory (
+ IN EFI_PHYSICAL_ADDRESS MemoryBegin,
+ IN UINT64 MemoryLength
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->InstallPeiMemory (PeiServices, MemoryBegin, MemoryLength);
+}
+
+/**
+ This service enables PEIMs to allocate memory after the permanent memory has been installed by a PEIM.
+
+ @param MemoryType Type of memory to allocate.
+ @param Pages Number of pages to allocate.
+ @param Memory Pointer of memory allocated.
+
+ @retval EFI_SUCCESS The memory range was successfully allocated.
+ @retval EFI_INVALID_PARAMETER Type is not equal to AllocateAnyPages.
+ @retval EFI_NOT_AVAILABLE_YET Called with permanent memory not available.
+ @retval EFI_OUT_OF_RESOURCES The pages could not be allocated.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreAllocatePages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT EFI_PHYSICAL_ADDRESS *Memory
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->AllocatePages (PeiServices, MemoryType, Pages, Memory);
+}
+
+/**
+ This service allocates memory from the Hand-Off Block (HOB) heap.
+
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer If the call succeeds, a pointer to a pointer to the allocated buffer;
+ undefined otherwise.
+
+ @retval EFI_SUCCESS The allocation was successful
+ @retval EFI_OUT_OF_RESOURCES There is not enough heap to allocate the requested size.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreAllocatePool (
+ IN UINTN Size,
+ OUT VOID **Buffer
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->AllocatePool (PeiServices, Size, Buffer);
+}
+
+/**
+ This service resets the entire platform, including all processors and devices, and reboots the system.
+
+ @retval EFI_NOT_AVAILABLE_YET The service has not been installed yet.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreResetSystem (
+ VOID
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->PeiResetSystem (PeiServices);
+}
diff --git a/MdePkg/Library/PeiCoreLib/PeiCoreLib.mbd b/MdePkg/Library/PeiCoreLib/PeiCoreLib.mbd new file mode 100644 index 0000000000..441a418709 --- /dev/null +++ b/MdePkg/Library/PeiCoreLib/PeiCoreLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiCoreLib</BaseName>
+ <Guid>a804239b-4155-446f-acc8-f0825d74908c</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiCoreLib/PeiCoreLib.msa b/MdePkg/Library/PeiCoreLib/PeiCoreLib.msa new file mode 100644 index 0000000000..93a0876cf4 --- /dev/null +++ b/MdePkg/Library/PeiCoreLib/PeiCoreLib.msa @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiCoreLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>a804239b-4155-446f-acc8-f0825d74908c</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeiCoreLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiCoreLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiCoreLib/build.xml b/MdePkg/Library/PeiCoreLib/build.xml new file mode 100644 index 0000000000..8f5e86ee84 --- /dev/null +++ b/MdePkg/Library/PeiCoreLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiCoreLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiCoreLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiCoreLib">
+ <GenBuild baseName="PeiCoreLib" mbdFilename="${MODULE_DIR}\PeiCoreLib.mbd" msaFilename="${MODULE_DIR}\PeiCoreLib.msa"/>
+ </target>
+ <target depends="PeiCoreLib_clean" name="clean"/>
+ <target depends="PeiCoreLib_cleanall" name="cleanall"/>
+ <target name="PeiCoreLib_clean">
+ <OutputDirSetup baseName="PeiCoreLib" mbdFilename="${MODULE_DIR}\PeiCoreLib.mbd" msaFilename="${MODULE_DIR}\PeiCoreLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiCoreLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiCoreLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiCoreLib_cleanall">
+ <OutputDirSetup baseName="PeiCoreLib" mbdFilename="${MODULE_DIR}\PeiCoreLib.mbd" msaFilename="${MODULE_DIR}\PeiCoreLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiCoreLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiCoreLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiCoreLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiHobLib/HobLib.c b/MdePkg/Library/PeiHobLib/HobLib.c new file mode 100644 index 0000000000..a06f1690bf --- /dev/null +++ b/MdePkg/Library/PeiHobLib/HobLib.c @@ -0,0 +1,432 @@ +/** @file
+ HOB Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HobLib.c
+
+**/
+
+
+
+/**
+ Returns the pointer to the HOB list.
+
+ None.
+
+ The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ VOID *HobList;
+
+ Status = PeiCoreGetHobList (&HobList);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (HobList != NULL);
+
+ return HobList;
+}
+
+/**
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ IN UINT16 Type,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+
+ ASSERT (HobStart != NULL);
+
+ Hob.Raw = (UINT8 *) HobStart;
+ //
+ // Parse the HOB list, stop if end of list or matching type found.
+ //
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == Type) {
+ return Hob.Raw;
+ }
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+ return NULL;
+}
+
+/**
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ IN UINT16 Type
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextHob (Type, HobList);
+}
+
+/**
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN CONST VOID *HobStart
+ )
+{
+ EFI_PEI_HOB_POINTERS GuidHob;
+
+ GuidHob.Raw = (UINT8 *) HobStart;
+ while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
+ if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
+ break;
+ }
+ GuidHob.Raw = GET_NEXT_HOB (GuidHob);
+ }
+ return GuidHob.Raw;
+}
+
+/**
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ IN CONST EFI_GUID *Guid
+ )
+{
+ VOID *HobList;
+
+ HobList = GetHobList ();
+ return GetNextGuidHob (Guid, HobList);
+}
+
+/**
+ Add a new HOB to the HOB List.
+
+ @param Type Type of the new HOB.
+ @param Length Length of the new HOB to allocate.
+
+ @return The address of new HOB.
+
+**/
+VOID *
+InternalPeiCreateHob (
+ IN UINT16 Type,
+ IN UINT16 Length
+ )
+{
+ EFI_STATUS Status;
+ VOID *Hob;
+
+ Status = PeiCoreCreateHob (Type, Length, &Hob);
+ //
+ // Assume the process of HOB building is always successful.
+ //
+ ASSERT_EFI_ERROR (Status);
+ return Hob;
+}
+
+/**
+ This function builds a HOB for a loaded PE32 module.
+
+ @param ModuleName The GUID File Name of the module.
+ @param MemoryAllocationModule The 64 bit physical address of the module.
+ @param ModuleLength The length of the module in bytes.
+ @param EntryPoint The 64 bit physical address of the module’s entry point.
+
+**/
+VOID
+EFIAPI
+BuildModuleHob (
+ IN CONST EFI_GUID *ModuleName,
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
+ IN UINT64 ModuleLength,
+ IN EFI_PHYSICAL_ADDRESS EntryPoint
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE));
+
+ CopyGuid (&(Hob->MemoryAllocationHeader.Name), &gEfiHobMemoryAllocModuleGuid);
+ Hob->MemoryAllocationHeader.MemoryBaseAddress = MemoryAllocationModule;
+ Hob->MemoryAllocationHeader.MemoryLength = ModuleLength;
+ Hob->MemoryAllocationHeader.MemoryType = EfiBootServicesCode;
+
+ CopyGuid (&Hob->ModuleName, ModuleName);
+ Hob->EntryPoint = EntryPoint;
+}
+
+/**
+ Builds a HOB that describes a chunk of system memory.
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes
+ )
+{
+ EFI_HOB_RESOURCE_DESCRIPTOR *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, sizeof (EFI_HOB_RESOURCE_DESCRIPTOR));
+
+ Hob->ResourceType = ResourceType;
+ Hob->ResourceAttribute = ResourceAttribute;
+ Hob->PhysicalStart = PhysicalStart;
+ Hob->ResourceLength = NumberOfBytes;
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification
+ and returns the start address of GUID HOB data so that caller can fill the customized data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN DataLength
+ )
+{
+ EFI_HOB_GUID_TYPE *Hob;
+
+ //
+ // Make sure that data length is not too long.
+ //
+ ASSERT (DataLength <= (0xffff - sizeof (EFI_HOB_GUID_TYPE)));
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + DataLength));
+ CopyGuid (&Hob->Name, Guid);
+ return Hob + 1;
+}
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification,
+ copies the input data to the HOB data field, and returns the start address of GUID HOB data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param Data The data to be copied into the data field of the GUID HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidDataHob (
+ IN CONST EFI_GUID *Guid,
+ IN VOID *Data,
+ IN UINTN DataLength
+ )
+{
+ VOID *HobData;
+
+ HobData = BuildGuidHob (Guid, DataLength);
+
+ return CopyMem (HobData, Data, DataLength);
+}
+
+/**
+ Builds a Firmware Volume HOB.
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildFvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_FIRMWARE_VOLUME *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_FV, sizeof (EFI_HOB_FIRMWARE_VOLUME));
+
+ Hob->BaseAddress = BaseAddress;
+ Hob->Length = Length;
+}
+
+/**
+ Builds a Capsule Volume HOB.
+
+ @param BaseAddress The base address of the Capsule Volume.
+ @param Length The size of the Capsule Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildCvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_CAPSULE_VOLUME *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_CV, sizeof (EFI_HOB_CAPSULE_VOLUME));
+
+ Hob->BaseAddress = BaseAddress;
+ Hob->Length = Length;
+}
+
+/**
+ Builds a HOB for the CPU.
+
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.
+
+**/
+VOID
+EFIAPI
+BuildCpuHob (
+ IN UINT8 SizeOfMemorySpace,
+ IN UINT8 SizeOfIoSpace
+ )
+{
+ EFI_HOB_CPU *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_CPU, sizeof (EFI_HOB_CPU));
+
+ Hob->SizeOfMemorySpace = SizeOfMemorySpace;
+ Hob->SizeOfIoSpace = SizeOfIoSpace;
+}
+
+/**
+ Builds a HOB for the Stack.
+
+ @param BaseAddress The 64 bit physical address of the Stack.
+ @param Length The length of the stack in bytes.
+
+**/
+VOID
+EFIAPI
+BuildStackHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_STACK *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK));
+
+ CopyGuid (&(Hob->AllocDescriptor.Name), &gEfiHobMemoryAllocStackGuid);
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = EfiConventionalMemory;
+}
+
+/**
+ Builds a HOB for the BSP store.
+
+ @param BaseAddress The 64 bit physical address of the BSP.
+ @param Length The length of the BSP store in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildBspStoreHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_BSP_STORE));
+
+ CopyGuid (&(Hob->AllocDescriptor.Name), &gEfiHobMemoryAllocBspStoreGuid);
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = MemoryType;
+}
+
+/**
+ Builds a HOB for the memory allocation.
+
+ @param BaseAddress The 64 bit physical address of the memory.
+ @param Length The length of the memory allocation in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildMemoryAllocationHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+{
+ EFI_HOB_MEMORY_ALLOCATION *Hob;
+
+ Hob = InternalPeiCreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION));
+
+ ZeroMem (&(Hob->AllocDescriptor.Name), sizeof (EFI_GUID));
+ Hob->AllocDescriptor.MemoryBaseAddress = BaseAddress;
+ Hob->AllocDescriptor.MemoryLength = Length;
+ Hob->AllocDescriptor.MemoryType = MemoryType;
+}
diff --git a/MdePkg/Library/PeiHobLib/PeiHobLib.mbd b/MdePkg/Library/PeiHobLib/PeiHobLib.mbd new file mode 100644 index 0000000000..2d2f34a4ce --- /dev/null +++ b/MdePkg/Library/PeiHobLib/PeiHobLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiHobLib</BaseName>
+ <Guid>9643128f-ac24-4b3e-b6be-d8849a306153</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiHobLib/PeiHobLib.msa b/MdePkg/Library/PeiHobLib/PeiHobLib.msa new file mode 100644 index 0000000000..f3385c5f77 --- /dev/null +++ b/MdePkg/Library/PeiHobLib/PeiHobLib.msa @@ -0,0 +1,57 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiHobLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>9643128f-ac24-4b3e-b6be-d8849a306153</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">HobLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiCoreLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>HobLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>HobMemoryAllocModule</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>HobMemoryAllocBspStore</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>HobMemoryAllocStack</C_Name>
+ </GuidEntry>
+ </Guids>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiHobLib/build.xml b/MdePkg/Library/PeiHobLib/build.xml new file mode 100644 index 0000000000..b230593d28 --- /dev/null +++ b/MdePkg/Library/PeiHobLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiHobLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiHobLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiHobLib">
+ <GenBuild baseName="PeiHobLib" mbdFilename="${MODULE_DIR}\PeiHobLib.mbd" msaFilename="${MODULE_DIR}\PeiHobLib.msa"/>
+ </target>
+ <target depends="PeiHobLib_clean" name="clean"/>
+ <target depends="PeiHobLib_cleanall" name="cleanall"/>
+ <target name="PeiHobLib_clean">
+ <OutputDirSetup baseName="PeiHobLib" mbdFilename="${MODULE_DIR}\PeiHobLib.mbd" msaFilename="${MODULE_DIR}\PeiHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiHobLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiHobLib_cleanall">
+ <OutputDirSetup baseName="PeiHobLib" mbdFilename="${MODULE_DIR}\PeiHobLib.mbd" msaFilename="${MODULE_DIR}\PeiHobLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiHobLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiHobLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiHobLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiIoLibCpuIo/IoHighLevel.c b/MdePkg/Library/PeiIoLibCpuIo/IoHighLevel.c new file mode 100644 index 0000000000..48a7477d81 --- /dev/null +++ b/MdePkg/Library/PeiIoLibCpuIo/IoHighLevel.c @@ -0,0 +1,2272 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) | OrData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, IoRead8 (Port) & AndData);
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (IoRead8 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) | OrData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, IoRead16 (Port) & AndData);
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (IoRead16 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) | OrData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, MmioRead8 (Address) & AndData);
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (MmioRead8 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) | OrData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, MmioRead16 (Address) & AndData);
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (MmioRead16 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c new file mode 100644 index 0000000000..2156f6b480 --- /dev/null +++ b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c @@ -0,0 +1,530 @@ +/** @file
+ I/O Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64) Port);
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->IoWrite8 (PeiServices, CpuIo, (UINT64) Port, Value);
+ return Value;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->IoRead16 (PeiServices, CpuIo, (UINT64) Port);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->IoWrite16 (PeiServices, CpuIo, (UINT64) Port, Value);
+ return Value;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->IoRead32 (PeiServices, CpuIo, (UINT64) Port);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->IoWrite32 (PeiServices, CpuIo, (UINT64) Port, Value);
+ return Value;
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->IoRead64 (PeiServices, CpuIo, (UINT64) Port);
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->IoWrite64 (PeiServices, CpuIo, (UINT64) Port, Value);
+ return Value;;
+}
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->MemRead8 (PeiServices, CpuIo, (UINT64) Address);
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->MemWrite8 (PeiServices, CpuIo, (UINT64) Address, Value);
+ return Value;
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->MemRead16 (PeiServices, CpuIo, (UINT64) Address);
+
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->MemWrite16 (PeiServices, CpuIo, (UINT64) Address, Value);
+ return Value;
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->MemRead32 (PeiServices, CpuIo, (UINT64) Address);
+
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->MemWrite32 (PeiServices, CpuIo, (UINT64) Address, Value);
+ return Value;
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ return CpuIo->MemRead64 (PeiServices, CpuIo, (UINT64) Address);
+
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+
+ ASSERT (CpuIo != NULL);
+
+ CpuIo->MemWrite64 (PeiServices, CpuIo, (UINT64) Address, Value);
+ return Value;
+}
diff --git a/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.mbd b/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.mbd new file mode 100644 index 0000000000..a615d24b97 --- /dev/null +++ b/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiIoLibCpuIo</BaseName>
+ <Guid>b2585b69-fb63-4220-844a-8fbea8bf01af</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-14 12:42</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.msa b/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.msa new file mode 100644 index 0000000000..fb214ce932 --- /dev/null +++ b/MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiIoLibCpuIo</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>b2585b69-fb63-4220-844a-8fbea8bf01af</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>I/O Library implemented with Framework CPU I/O Protocol</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-14 12:42</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">IoLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>IoLib.c</Filename>
+ <Filename>IoHighLevel.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiIoLibCpuIo/build.xml b/MdePkg/Library/PeiIoLibCpuIo/build.xml new file mode 100644 index 0000000000..3a650ed6d4 --- /dev/null +++ b/MdePkg/Library/PeiIoLibCpuIo/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiIoLibCpuIo"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiIoLibCpuIo"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiIoLibCpuIo">
+ <GenBuild baseName="PeiIoLibCpuIo" mbdFilename="${MODULE_DIR}\PeiIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\PeiIoLibCpuIo.msa"/>
+ </target>
+ <target depends="PeiIoLibCpuIo_clean" name="clean"/>
+ <target depends="PeiIoLibCpuIo_cleanall" name="cleanall"/>
+ <target name="PeiIoLibCpuIo_clean">
+ <OutputDirSetup baseName="PeiIoLibCpuIo" mbdFilename="${MODULE_DIR}\PeiIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\PeiIoLibCpuIo.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiIoLibCpuIo_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiIoLibCpuIo_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiIoLibCpuIo_cleanall">
+ <OutputDirSetup baseName="PeiIoLibCpuIo" mbdFilename="${MODULE_DIR}\PeiIoLibCpuIo.mbd" msaFilename="${MODULE_DIR}\PeiIoLibCpuIo.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiIoLibCpuIo_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiIoLibCpuIo_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiIoLibCpuIo*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiMemoryAllocationLib/MemoryAllocationLib.c b/MdePkg/Library/PeiMemoryAllocationLib/MemoryAllocationLib.c new file mode 100644 index 0000000000..63641569ff --- /dev/null +++ b/MdePkg/Library/PeiMemoryAllocationLib/MemoryAllocationLib.c @@ -0,0 +1,879 @@ +/** @file
+ Support routines for memory allocation routines for use with drivers.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemoryAllocationLib.c
+
+**/
+
+
+
+/**
+ Allocates the number of 4KB pages specified by Pages of a certain memory type.
+
+ @param MemoryType The type of memory to allocate.
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocatePages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages
+ )
+{
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS Memory;
+ EFI_PEI_SERVICES **PeiServices;
+
+ if (Pages == 0) {
+ return NULL;
+ }
+
+ PeiServices = GetPeiServicesTablePointer ();
+ Status = (*PeiServices)->AllocatePages (PeiServices, MemoryType, Pages, &Memory);
+ if (EFI_ERROR (Status)) {
+ Memory = 0;
+ }
+ return (VOID *) (UINTN) Memory;
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiBootServicesData, Pages);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiRuntimeServicesData, Pages);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPages (
+ IN UINTN Pages
+ )
+{
+ return InternalAllocatePages (EfiReservedMemoryType, Pages);
+}
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+**/
+VOID
+EFIAPI
+FreePages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+{
+ //
+ // PEI phase does not support to free pages, so leave it as NOP.
+ //
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of a certian memory type
+ with an alignment specified by Alignment.
+
+ @param MemoryType The type of memory to allocate.
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedPages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+ UINTN AlignmentMask;
+
+ //
+ // Alignment must be a power of two or zero.
+ //
+ ASSERT ((Alignment & (Alignment - 1)) == 0);
+
+ if (Pages == 0) {
+ return NULL;
+ }
+ //
+ // We would rather waste some memory to save PEI code size.
+ //
+ Memory = InternalAllocatePages (MemoryType, Pages + EFI_SIZE_TO_PAGES (Alignment));
+ if (Alignment == 0) {
+ AlignmentMask = Alignment;
+ } else {
+ AlignmentMask = Alignment - 1;
+ }
+ return (VOID *) (UINTN) (((UINTN) Memory + AlignmentMask) & ~AlignmentMask);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData
+ with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiBootServicesData, Pages, Alignment);
+}
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData
+ with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiRuntimeServicesData, Pages, Alignment);
+}
+
+/**
+ Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPages (EfiReservedMemoryType, Pages, Alignment);
+}
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the aligned page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+{
+ //
+ // PEI phase does not support to free pages, so leave it as NOP.
+ //
+}
+
+/**
+ Allocates a buffer of a certain memory type.
+
+ @param MemoryType The type of memory to allocate.
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocatePool (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN AllocationSize
+ )
+{
+ //
+ // If we need lots of small runtime/reserved memory type from PEI in the future,
+ // we can consider providing a more complex algorithm that allocates runtime pages and
+ // provide pool allocations from those pages.
+ //
+ return InternalAllocatePages (MemoryType, EFI_SIZE_TO_PAGES (AllocationSize));
+}
+
+/**
+ Allocates a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePool (
+ IN UINTN AllocationSize
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_SERVICES **PeiServices;
+ VOID *Buffer;
+
+ PeiServices = GetPeiServicesTablePointer ();
+
+ Status = (*PeiServices)->AllocatePool (PeiServices, AllocationSize, &Buffer);
+ if (EFI_ERROR (Status)) {
+ Buffer = NULL;
+ }
+ return Buffer;
+}
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocatePool (EfiRuntimeServicesData, AllocationSize);
+}
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocatePool (EfiReservedMemoryType, AllocationSize);
+}
+
+/**
+ Allocates and zeros a buffer of a certian pool type.
+
+ @param PoolType The type of memory to allocate.
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateZeroPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocatePool (PoolType, AllocationSize);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ VOID *Memory;
+
+ Memory = AllocatePool (AllocationSize);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocateZeroPool (EfiRuntimeServicesData, AllocationSize);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedZeroPool (
+ IN UINTN AllocationSize
+ )
+{
+ return InternalAllocateZeroPool (EfiReservedMemoryType, AllocationSize);
+}
+
+/**
+ Copies a buffer to an allocated buffer of a certian memory type.
+
+ @param MemoryType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate and zero.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateCopyPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocatePool (PoolType, AllocationSize);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ VOID *Memory;
+
+ Memory = AllocatePool (AllocationSize);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ return InternalAllocateCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+{
+ return InternalAllocateCopyPool (EfiReservedMemoryType, AllocationSize, Buffer);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param Buffer Pointer to the buffer to free.
+
+**/
+VOID
+EFIAPI
+FreePool (
+ IN VOID *Buffer
+ )
+{
+ //
+ // PEI phase does not support to free pool, so leave it as NOP.
+ //
+}
+
+/**
+ Allocates a buffer of a certain pool type at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two. If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *RawAddress;
+ UINTN AlignedAddress;
+ UINTN AlignmentMask;
+
+ //
+ // Alignment must be a power of two or zero.
+ //
+ ASSERT ((Alignment & (Alignment - 1)) == 0);
+
+ if (Alignment == 0) {
+ AlignmentMask = Alignment;
+ } else {
+ AlignmentMask = Alignment - 1;
+ }
+
+ RawAddress = InternalAllocatePool (PoolType, AllocationSize + AlignmentMask);
+
+ AlignedAddress = ((UINTN) RawAddress + AlignmentMask) & ~AlignmentMask;
+
+ return (VOID *) AlignedAddress;
+}
+
+/**
+ Allocates a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two. If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *RawAddress;
+ UINTN AlignedAddress;
+ UINTN AlignmentMask;
+
+ //
+ // Alignment must be a power of two or zero.
+ //
+ ASSERT ((Alignment & (Alignment - 1)) == 0);
+
+ if (Alignment == 0) {
+ AlignmentMask = Alignment;
+ } else {
+ AlignmentMask = Alignment - 1;
+ }
+
+ RawAddress = AllocatePool (AllocationSize + AlignmentMask);
+
+ AlignedAddress = ((UINTN) RawAddress + AlignmentMask) & ~AlignmentMask;
+
+ return (VOID *) AlignedAddress;
+}
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPool (EfiRuntimeServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedPool (EfiReservedMemoryType, AllocationSize, Alignment);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedZeroPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+
+ Memory = AllocateAlignedPool (AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = ZeroMem (Memory, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedZeroPool (EfiRuntimeServicesData, AllocationSize, Alignment);
+}
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedZeroPool (EfiReservedMemoryType, AllocationSize, Alignment);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
+
+ @param PoolType The type of pool to allocate.
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+InternalAllocateAlignedCopyPool (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+
+ Memory = InternalAllocateAlignedPool (PoolType, AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ VOID *Memory;
+
+ Memory = AllocateAlignedPool (AllocationSize, Alignment);
+ if (Memory != NULL) {
+ Memory = CopyMem (Memory, Buffer, AllocationSize);
+ }
+ return Memory;
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedCopyPool (EfiRuntimeServicesData, AllocationSize, Buffer, Alignment);
+}
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+{
+ return InternalAllocateAlignedCopyPool (EfiReservedMemoryType, AllocationSize, Buffer, Alignment);
+}
+
+/**
+ Frees a buffer that was previously allocated with one of the aligned pool allocation functions
+ in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer to free.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPool (
+ IN VOID *Buffer
+ )
+{
+ //
+ // PEI phase does not support to free pool, so leave it as NOP.
+ //
+}
diff --git a/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.mbd b/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.mbd new file mode 100644 index 0000000000..94991603ac --- /dev/null +++ b/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiMemoryAllocationLib</BaseName>
+ <Guid>b694e0dc-cd4e-4b30-885b-9c164ed3e74a</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.msa b/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.msa new file mode 100644 index 0000000000..4555d7cfe8 --- /dev/null +++ b/MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiMemoryAllocationLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>b694e0dc-cd4e-4b30-885b-9c164ed3e74a</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">MemoryAllocationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemoryAllocationLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiMemoryAllocationLib/build.xml b/MdePkg/Library/PeiMemoryAllocationLib/build.xml new file mode 100644 index 0000000000..47eff363e2 --- /dev/null +++ b/MdePkg/Library/PeiMemoryAllocationLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiMemoryAllocationLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiMemoryAllocationLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiMemoryAllocationLib">
+ <GenBuild baseName="PeiMemoryAllocationLib" mbdFilename="${MODULE_DIR}\PeiMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryAllocationLib.msa"/>
+ </target>
+ <target depends="PeiMemoryAllocationLib_clean" name="clean"/>
+ <target depends="PeiMemoryAllocationLib_cleanall" name="cleanall"/>
+ <target name="PeiMemoryAllocationLib_clean">
+ <OutputDirSetup baseName="PeiMemoryAllocationLib" mbdFilename="${MODULE_DIR}\PeiMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryAllocationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiMemoryAllocationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiMemoryAllocationLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiMemoryAllocationLib_cleanall">
+ <OutputDirSetup baseName="PeiMemoryAllocationLib" mbdFilename="${MODULE_DIR}\PeiMemoryAllocationLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryAllocationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiMemoryAllocationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiMemoryAllocationLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiMemoryAllocationLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiMemoryLib/MemLib.c b/MdePkg/Library/PeiMemoryLib/MemLib.c new file mode 100644 index 0000000000..3a27ab2e83 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/MemLib.c @@ -0,0 +1,47 @@ +/** @file
+ Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLib.c
+
+**/
+
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ (*GetPeiServicesTablePointer ())->CopyMem (
+ Destination,
+ (VOID*)Source,
+ Length
+ );
+ return Destination;
+}
+
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ (*GetPeiServicesTablePointer ())->SetMem (
+ Buffer,
+ Size,
+ Value
+ );
+ return Buffer;
+}
diff --git a/MdePkg/Library/PeiMemoryLib/MemLibGeneric.c b/MdePkg/Library/PeiMemoryLib/MemLibGeneric.c new file mode 100644 index 0000000000..ef9f358a79 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/MemLibGeneric.c @@ -0,0 +1,282 @@ +/** @file
+ Architecture Independent Base Memory Library Implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGeneric.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ do {
+ ((UINT16*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ do {
+ ((UINT32*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ do {
+ ((UINT64*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ return InternalMemSetMem (Buffer, Length, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length > 0);
+ while ((--Length != 0) &&
+ (*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {
+ DestinationBuffer = (INT8*)DestinationBuffer + 1;
+ SourceBuffer = (INT8*)SourceBuffer + 1;
+ }
+ return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ CONST UINT8 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT8*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ CONST UINT16 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT16*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ CONST UINT32 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT32*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ CONST UINT64 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT64*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
diff --git a/MdePkg/Library/PeiMemoryLib/MemLibGuid.c b/MdePkg/Library/PeiMemoryLib/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/PeiMemoryLib/MemLibWrapper.c b/MdePkg/Library/PeiMemoryLib/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.mbd b/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.mbd new file mode 100644 index 0000000000..d78b59c500 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiMemoryLib</BaseName>
+ <Guid>3a9759d2-53bc-4eb2-abcd-c93099419063</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 13:39</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.msa b/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.msa new file mode 100644 index 0000000000..38a05fe7af --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/PeiMemoryLib.msa @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiMemoryLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>3a9759d2-53bc-4eb2-abcd-c93099419063</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 13:39</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemLib.c</Filename>
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibGeneric.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiMemoryLib/build.xml b/MdePkg/Library/PeiMemoryLib/build.xml new file mode 100644 index 0000000000..f8d7bd35a4 --- /dev/null +++ b/MdePkg/Library/PeiMemoryLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiMemoryLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiMemoryLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiMemoryLib">
+ <GenBuild baseName="PeiMemoryLib" mbdFilename="${MODULE_DIR}\PeiMemoryLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryLib.msa"/>
+ </target>
+ <target depends="PeiMemoryLib_clean" name="clean"/>
+ <target depends="PeiMemoryLib_cleanall" name="cleanall"/>
+ <target name="PeiMemoryLib_clean">
+ <OutputDirSetup baseName="PeiMemoryLib" mbdFilename="${MODULE_DIR}\PeiMemoryLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiMemoryLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiMemoryLib_cleanall">
+ <OutputDirSetup baseName="PeiMemoryLib" mbdFilename="${MODULE_DIR}\PeiMemoryLib.mbd" msaFilename="${MODULE_DIR}\PeiMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiMemoryLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiMemoryLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiPcdLib/PeiPcdLib.c b/MdePkg/Library/PeiPcdLib/PeiPcdLib.c new file mode 100644 index 0000000000..29fdeb0ee4 --- /dev/null +++ b/MdePkg/Library/PeiPcdLib/PeiPcdLib.c @@ -0,0 +1,951 @@ +/** @file
+Implementation of PcdLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: PeiPcdLib.c
+
+**/
+
+
+
+/**
+ The constructor function retrieve the PCD_PPI pointer.
+
+ @param[in] VOID
+
+ @retval PCD_PPI * The pointer to the PCD_PPI.
+
+**/
+PCD_PPI *
+GetPcdPpiPtr (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI *PcdPpi;
+ EFI_PEI_SERVICES **PeiServices;
+
+
+ PeiServices = GetPeiServicesTablePointer ();
+
+ Status = (**PeiServices).LocatePpi (
+ PeiServices,
+ &gPcdPpiGuid,
+ 0,
+ NULL,
+ (VOID **)&PcdPpi
+ );
+
+ ASSERT_EFI_ERROR (Status);
+
+ return PcdPpi;
+}
+
+
+
+/**
+ Sets the current SKU in the PCD database to the value specified by SkuId. SkuId is returned.
+
+ @param[in] SkuId The SKU value that will be used when the PCD service will retrieve and
+ set values associated with a PCD token.
+
+ @retval UINTN Return the SKU ID that just be set.
+
+**/
+UINTN
+EFIAPI
+LibPcdSetSku (
+ IN UINTN SkuId
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI *PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->SetSku (SkuId);
+ ASSERT_EFI_ERROR (Status);
+
+ return SkuId;
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Returns the 8-bit value for the token specified by TokenNumber.
+
+**/
+UINT8
+EFIAPI
+LibPcdGet8 (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get8 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Returns the 16-bit value for the token specified by TokenNumber.
+
+**/
+UINT16
+EFIAPI
+LibPcdGet16 (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI *PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get16 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Returns the 32-bit value for the token specified by TokenNumber.
+
+**/
+UINT32
+EFIAPI
+LibPcdGet32 (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get32 (TokenNumber);
+}
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Returns the 64-bit value for the token specified by TokenNumber.
+
+**/
+UINT64
+EFIAPI
+LibPcdGet64 (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get64 (TokenNumber);
+}
+
+
+
+/**
+ Returns the pointer to the buffer of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Returns the pointer to the token specified by TokenNumber.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetPtr (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetPtr (TokenNumber);
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Returns the Boolean value of the token specified by TokenNumber.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetBool (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetBool (TokenNumber);
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Returns the size of the token specified by TokenNumber.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetSize (
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetSize (TokenNumber);
+}
+
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Return the UINT8.
+
+**/
+UINT8
+EFIAPI
+LibPcdGetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get8Ex (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Return the UINT16.
+
+**/
+UINT16
+EFIAPI
+LibPcdGetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get16Ex (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Return the UINT32.
+
+**/
+UINT32
+EFIAPI
+LibPcdGetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get32Ex (Guid, TokenNumber);
+}
+
+
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Return the UINT64.
+
+**/
+UINT64
+EFIAPI
+LibPcdGetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->Get64Ex (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the pointer to the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Return the VOID* pointer.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetPtrEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Return the BOOLEAN.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetBoolEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Returns the size of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Return the size.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetExSize (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ )
+{
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ return PcdPpi->GetSizeEx (Guid, TokenNumber);
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSet8 (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set8 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT16 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSet16 (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set16 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSet32 (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+ Status = PcdPpi->Set32 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSet64 (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set64 (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber to
+ the value specified by Value. Value is returned.
+ If Value is NULL, then ASSERT().
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value A pointer to the buffer to set.
+
+ @retval VOID* Return the pointer for the buffer been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetPtr (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->SetPtr (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The boolean value to set.
+
+ @retval BOOLEAN Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetBool (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->SetBool (TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set8Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set16Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set32Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->Set64Ex (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+ If Value is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval VOID * Return the value been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->SetPtrEx (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (VOID *)Value;
+}
+
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The Boolean value to set.
+
+ @retval Boolean Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->SetBoolEx (Guid, TokenNumber, Value);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return Value;
+}
+
+
+
+/**
+ When the token specified by TokenNumber and Guid is set,
+ then notification function specified by NotificationFunction is called.
+ If Guid is NULL, then the default token space is used.
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates which
+ namespace to set a value from. If NULL, then the default
+ token space is used.
+ @param[in] TokenNumber The PCD token number to monitor.
+ @param[in] NotificationFunction The function to call when the token
+ specified by Guid and TokenNumber is set.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCallbackOnSet (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->CallbackOnSet (TokenNumber, Guid, NotificationFunction);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return;
+}
+
+
+
+/**
+ Disable a notification function that was established with LibPcdCallbackonSet().
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Specify the GUID token space.
+ @param[in] TokenNumber Specify the token number.
+ @param[in] NotificationFunction The callback function to be unregistered.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCancelCallback (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->CancelCallback (TokenNumber, Guid, NotificationFunction);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return;
+}
+
+
+
+/**
+ Retrieves the next PCD token number from the token space specified by Guid.
+ If Guid is NULL, then the default token space is used. If TokenNumber is 0,
+ then the first token number is returned. Otherwise, the token number that
+ follows TokenNumber in the token space is returned. If TokenNumber is the last
+ token number in the token space, then 0 is returned. If TokenNumber is not 0 and
+ is not in the token space specified by Guid, then ASSERT().
+
+ @param[in] Pointer to a 128-bit unique value that designates which namespace
+ to set a value from. If NULL, then the default token space is used.
+ @param[in] The previous PCD token number. If 0, then retrieves the first PCD
+ token number.
+
+ @retval UINTN The next valid token number.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetNextToken (
+ IN CONST GUID *Guid, OPTIONAL
+ IN OUT UINTN *TokenNumber
+ )
+{
+ EFI_STATUS Status;
+ PCD_PPI * PcdPpi;
+
+ PcdPpi = GetPcdPpiPtr ();
+
+
+ Status = PcdPpi->GetNextToken (Guid, TokenNumber);
+
+ ASSERT_EFI_ERROR (Status);
+
+ return (*TokenNumber);
+}
diff --git a/MdePkg/Library/PeiPcdLib/PeiPcdLib.mbd b/MdePkg/Library/PeiPcdLib/PeiPcdLib.mbd new file mode 100644 index 0000000000..bb90381ca0 --- /dev/null +++ b/MdePkg/Library/PeiPcdLib/PeiPcdLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiPcdLib</BaseName>
+ <Guid>9dbf6f25-0da2-4a1d-8e12-e78de6ab4d0e</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiPcdLib/PeiPcdLib.msa b/MdePkg/Library/PeiPcdLib/PeiPcdLib.msa new file mode 100644 index 0000000000..cc07e01f49 --- /dev/null +++ b/MdePkg/Library/PeiPcdLib/PeiPcdLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiPcdLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>9dbf6f25-0da2-4a1d-8e12-e78de6ab4d0e</Guid>
+ <Version>0</Version>
+ <Abstract>PCD Library Instance implemented with PCD PPI.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeimEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiPcdLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiPcdLib/build.xml b/MdePkg/Library/PeiPcdLib/build.xml new file mode 100644 index 0000000000..5e79dde43e --- /dev/null +++ b/MdePkg/Library/PeiPcdLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiPcdLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiPcdLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiPcdLib">
+ <GenBuild baseName="PeiPcdLib" mbdFilename="${MODULE_DIR}\PeiPcdLib.mbd" msaFilename="${MODULE_DIR}\PeiPcdLib.msa"/>
+ </target>
+ <target depends="PeiPcdLib_clean" name="clean"/>
+ <target depends="PeiPcdLib_cleanall" name="cleanall"/>
+ <target name="PeiPcdLib_clean">
+ <OutputDirSetup baseName="PeiPcdLib" mbdFilename="${MODULE_DIR}\PeiPcdLib.mbd" msaFilename="${MODULE_DIR}\PeiPcdLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiPcdLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiPcdLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiPcdLib_cleanall">
+ <OutputDirSetup baseName="PeiPcdLib" mbdFilename="${MODULE_DIR}\PeiPcdLib.mbd" msaFilename="${MODULE_DIR}\PeiPcdLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiPcdLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiPcdLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiPcdLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.mbd b/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.mbd new file mode 100644 index 0000000000..54cb661400 --- /dev/null +++ b/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiReportStatusCodeLib</BaseName>
+ <Guid>8c690838-7a22-45c4-aa58-a33e3e515cd4</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.msa b/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.msa new file mode 100644 index 0000000000..c8f457a3ed --- /dev/null +++ b/MdePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.msa @@ -0,0 +1,68 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiReportStatusCodeLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>8c690838-7a22-45c4-aa58-a33e3e515cd4</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">ReportStatusCodeLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">IoLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>ReportStatusCodeLib.c</Filename>
+ <Filename>PostCode.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeDataTypeDebug</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeDataTypeAssert</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>StatusCodeSpecificData</C_Name>
+ </GuidEntry>
+ </Guids>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdReportStatusCodePropertyMask</C_Name>
+ <Token>0x00000007</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiReportStatusCodeLib/PostCode.c b/MdePkg/Library/PeiReportStatusCodeLib/PostCode.c new file mode 100644 index 0000000000..c5d32e77fb --- /dev/null +++ b/MdePkg/Library/PeiReportStatusCodeLib/PostCode.c @@ -0,0 +1,125 @@ +/** @file
+ Report Status Code Library Post Code functions for PEI Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x\n", Value));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x - %s\n", Value, Description));
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the
+ REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeDescriptionEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/PeiReportStatusCodeLib/ReportStatusCodeLib.c b/MdePkg/Library/PeiReportStatusCodeLib/ReportStatusCodeLib.c new file mode 100644 index 0000000000..5c022d6adc --- /dev/null +++ b/MdePkg/Library/PeiReportStatusCodeLib/ReportStatusCodeLib.c @@ -0,0 +1,548 @@ +/** @file
+ Report Status Code Library for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Define the maximum extended data size that is supported in the PEI phase
+//
+#define MAX_EXTENDED_DATA_SIZE 0x200
+
+/**
+ Internal worker function that reports a status code through the Status Code Protocol
+
+ This function checks to see if a Status Code Protocol is present in the handle
+ database. If a Status Code Protocol is not present, then EFI_UNSUPPORTED is
+ returned. If a Status Code Protocol is present, then it is cached in gStatusCode,
+ and the ReportStatusCode() service of the Status Code Protocol is called passing in
+ Type, Value, Instance, CallerId, and Data. The result of this call is returned.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. This is an optional parameter that may be
+ NULL.
+ @param Data Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to report the status code.
+ @retval EFI_UNSUPPORTED Status Code Protocol is not available.
+
+**/
+EFI_STATUS
+InternalReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ return (*PeiServices)->PeiReportStatusCode (PeiServices, Type, Value, Instance, CallerId, Data);
+}
+
+
+/**
+ Computes and returns the size, in bytes, of a device path.
+
+ @param DevicePath A pointer to a device path.
+
+ @return The size, in bytes, of DevicePath.
+
+**/
+UINTN
+InternalReportStatusCodeDevicePathSize (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Subtract the start node from the end node and add in the size of the end node
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + DevicePathNodeLength (DevicePath);
+}
+
+
+/**
+ Converts a status code to an 8-bit POST code value.
+
+ Converts the status code specified by CodeType and Value to an 8-bit POST code
+ and returns the 8-bit POST code in PostCode. If CodeType is an
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned.
+
+ If PostCode is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param PostCode A pointer to the 8-bit POST code value to return.
+
+ @retval TRUE The status code specified by CodeType and Value was converted
+ to an 8-bit POST code and returned in PostCode.
+ @retval FALSE The status code specified by CodeType and Value could not be
+ converted to an 8-bit POST code value.
+
+**/
+BOOLEAN
+EFIAPI
+CodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ )
+{
+ //
+ // If PostCode is NULL, then ASSERT()
+ //
+ ASSERT (PostCode != NULL);
+
+ //
+ // Convert Value to an 8 bit post code
+ //
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ||
+ ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ) {
+ *PostCode = (UINT8) (((Value & EFI_STATUS_CODE_CLASS_MASK) >> 24) << 5);
+ *PostCode |= (UINT8) (((Value & EFI_STATUS_CODE_SUBCLASS_MASK) >> 16) & 0x1f);
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts ASSERT() information from a status code structure.
+
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()
+ arguments specified by Filename, Description, and LineNumber. If CodeType is
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract
+ Filename, Description, and LineNumber from the optional data area of the
+ status code buffer specified by Data. The optional data area of Data contains
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the
+ ASSERT() information could be extracted from Data, then return TRUE.
+ Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If Filename is NULL, then ASSERT().
+ If Description is NULL, then ASSERT().
+ If LineNumber is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param Data Pointer to status code data buffer.
+ @param Filename Pointer to the source file name that generated the ASSERT().
+ @param Description Pointer to the description of the ASSERT().
+ @param LineNumber Pointer to source line number that generated the ASSERT().
+
+ @retval TRUE The status code specified by CodeType, Value, and Data was
+ converted ASSERT() arguments specified by Filename, Description,
+ and LineNumber.
+ @retval FALSE The status code specified by CodeType, Value, and Data could
+ not be converted to ASSERT() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractAssertInfo (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT CHAR8 **Filename,
+ OUT CHAR8 **Description,
+ OUT UINT32 *LineNumber
+ )
+{
+ EFI_DEBUG_ASSERT_DATA *AssertData;
+
+ ASSERT (Data != NULL);
+ ASSERT (Filename != NULL);
+ ASSERT (Description != NULL);
+ ASSERT (LineNumber != NULL);
+
+ if (((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) &&
+ ((CodeType & EFI_STATUS_CODE_SEVERITY_MASK) == EFI_ERROR_UNRECOVERED) &&
+ ((Value & EFI_STATUS_CODE_OPERATION_MASK) == EFI_SW_EC_ILLEGAL_SOFTWARE_STATE)) {
+ AssertData = (EFI_DEBUG_ASSERT_DATA *)(Data + 1);
+ *Filename = (CHAR8 *)(AssertData + 1);
+ *Description = *Filename + AsciiStrLen (*Filename) + 1;
+ *LineNumber = AssertData->LineNumber;
+ return TRUE;
+ }
+ return FALSE;
+}
+
+
+/**
+ Extracts DEBUG() information from a status code structure.
+
+ Converts the status code specified by Data to the DEBUG() arguments specified
+ by ErrorLevel, Marker, and Format. If type GUID in Data is
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and
+ Format from the optional data area of the status code buffer specified by Data.
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for
+ the Format. If the DEBUG() information could be extracted from Data, then
+ return TRUE. Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If ErrorLevel is NULL, then ASSERT().
+ If Marker is NULL, then ASSERT().
+ If Format is NULL, then ASSERT().
+
+ @param Data Pointer to status code data buffer.
+ @param ErrorLevel Pointer to error level mask for a debug message.
+ @param Marker Pointer to the variable argument list associated with Format.
+ @param Format Pointer to a Null-terminated ASCII format string of a
+ debug message.
+
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments
+ specified by ErrorLevel, Marker, and Format.
+ @retval FALSE The status code specified by Data could not be converted to
+ DEBUG() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractDebugInfo (
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT UINT32 *ErrorLevel,
+ OUT VA_LIST *Marker,
+ OUT CHAR8 **Format
+ )
+{
+ EFI_DEBUG_INFO *DebugInfo;
+
+ ASSERT (Data != NULL);
+ ASSERT (ErrorLevel != NULL);
+ ASSERT (Marker != NULL);
+ ASSERT (Format != NULL);
+
+ //
+ // If the GUID type is not EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID then return FALSE
+ //
+ if (!CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeDebugGuid)) {
+ return FALSE;
+ }
+
+ //
+ // Retrieve the debug information from the status code record
+ //
+ DebugInfo = (EFI_DEBUG_INFO *)(Data + 1);
+
+ *ErrorLevel = DebugInfo->ErrorLevel;
+
+ //
+ // The first 12 * UINTN bytes of the string are really an
+ // argument stack to support varargs on the Format string.
+ //
+ *Marker = (VA_LIST) (DebugInfo + 1);
+ *Format = (CHAR8 *)(((UINT64 *)*Marker) + 12);
+
+ return TRUE;
+}
+
+
+/**
+ Reports a status code.
+
+ Reports the status code specified by the parameters Type and Value. Status
+ code also require an instance, caller ID, and extended data. This function
+ passed in a zero instance, NULL extended data, and a caller ID of
+ gEfiCallerIdGuid, which is the GUID for the module.
+
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCode() must return immediately.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a
+ device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ return InternalReportStatusCode (Type, Value, 0, &gEfiCallerIdGuid, NULL);
+}
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data.
+
+ Allocates and fills in the extended data section of a status code with the
+ Device Path Protocol specified by DevicePath. This function is responsible
+ for allocating a buffer large enough for the standard header and the device
+ path. The standard header is filled in with a GUID of
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero
+ instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If
+ ReportStatusCodeWithDevicePath() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If DevicePath is NULL, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithDevicePath (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ ASSERT (DevicePath != NULL);
+ return ReportStatusCodeWithExtendedData (
+ Type,
+ Value,
+ (VOID *)DevicePath,
+ InternalReportStatusCodeDevicePathSize (DevicePath)
+ );
+}
+
+
+/**
+ Reports a status code with an extended data buffer.
+
+ Allocates and fills in the extended data section of a status code with the
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData
+ is assumed to be one of the data structures specified in Related Definitions.
+ These data structure do not have the standard header, so this function is
+ responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported
+ with a zero instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If
+ ReportStatusCodeWithExtendedData() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL, then ASSERT().
+ If ExtendedDataSize is 0, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithExtendedData (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN VOID *ExtendedData,
+ IN UINTN ExtendedDataSize
+ )
+{
+ ASSERT (ExtendedData != NULL);
+ ASSERT (ExtendedDataSize != 0);
+ return ReportStatusCodeEx (
+ Type,
+ Value,
+ 0,
+ NULL,
+ NULL,
+ ExtendedData,
+ ExtendedDataSize
+ );
+}
+
+
+/**
+ Reports a status code with full parameters.
+
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize
+ is 0, then an extended data buffer is not reported. If ExtendedData is not
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated.
+ ExtendedData is assumed not have the standard status code header, so this function
+ is responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled in
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with
+ an instance specified by Instance and a caller ID specified by CallerId. If
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.
+
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate
+ the extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeEx (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_GUID *ExtendedDataGuid OPTIONAL,
+ IN VOID *ExtendedData OPTIONAL,
+ IN UINTN ExtendedDataSize
+ )
+{
+ EFI_STATUS_CODE_DATA *StatusCodeData;
+ UINT64 Buffer[MAX_EXTENDED_DATA_SIZE / sizeof (UINT64)];
+
+ ASSERT (!((ExtendedData == NULL) && (ExtendedDataSize != 0)));
+ ASSERT (!((ExtendedData != NULL) && (ExtendedDataSize == 0)));
+
+ if (ExtendedDataSize > (MAX_EXTENDED_DATA_SIZE - sizeof (EFI_STATUS_CODE_DATA))) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ StatusCodeData = (EFI_STATUS_CODE_DATA *)Buffer;
+ StatusCodeData->HeaderSize = sizeof (EFI_STATUS_CODE_DATA);
+ StatusCodeData->Size = (UINT16)ExtendedDataSize;
+ if (ExtendedDataGuid == NULL) {
+ ExtendedDataGuid = &gEfiStatusCodeSpecificDataGuid;
+ }
+ CopyGuid (&StatusCodeData->Type, ExtendedDataGuid);
+ CopyMem (StatusCodeData + 1, ExtendedData, ExtendedDataSize);
+ if (CallerId == NULL) {
+ CallerId = &gEfiCallerIdGuid;
+ }
+ return InternalReportStatusCode (Type, Value, Instance, CallerId, StatusCodeData);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportProgressCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportErrorCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportDebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdReportStatusCodePropertyMask) & REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/PeiReportStatusCodeLib/build.xml b/MdePkg/Library/PeiReportStatusCodeLib/build.xml new file mode 100644 index 0000000000..53f59b1e93 --- /dev/null +++ b/MdePkg/Library/PeiReportStatusCodeLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiReportStatusCodeLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiReportStatusCodeLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiReportStatusCodeLib">
+ <GenBuild baseName="PeiReportStatusCodeLib" mbdFilename="${MODULE_DIR}\PeiReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\PeiReportStatusCodeLib.msa"/>
+ </target>
+ <target depends="PeiReportStatusCodeLib_clean" name="clean"/>
+ <target depends="PeiReportStatusCodeLib_cleanall" name="cleanall"/>
+ <target name="PeiReportStatusCodeLib_clean">
+ <OutputDirSetup baseName="PeiReportStatusCodeLib" mbdFilename="${MODULE_DIR}\PeiReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\PeiReportStatusCodeLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiReportStatusCodeLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiReportStatusCodeLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiReportStatusCodeLib_cleanall">
+ <OutputDirSetup baseName="PeiReportStatusCodeLib" mbdFilename="${MODULE_DIR}\PeiReportStatusCodeLib.mbd" msaFilename="${MODULE_DIR}\PeiReportStatusCodeLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiReportStatusCodeLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiReportStatusCodeLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiReportStatusCodeLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.c b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.c new file mode 100644 index 0000000000..2726c53fc5 --- /dev/null +++ b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.c @@ -0,0 +1,50 @@ +/** @file
+ Resource Publication Library that uses PEI Core Services to publish system memory.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiResourcePublicationLib.c
+
+**/
+
+
+/**
+
+ Declares the presence of permanent system memory in the platform.
+
+ Declares that the system memory buffer specified by MemoryBegin and MemoryLength
+ as permanent memory that may be used for general purpose use by software.
+ The amount of memory available to software may be less than MemoryLength
+ if published memory has alignment restrictions.
+
+ @param MemoryBegin The start address of the memory being declared.
+ @param MemoryLength The number of bytes of memory being declared.
+
+ @retval RETURN_SUCCESS The memory buffer was published.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to publish the memory buffer
+
+**/
+RETURN_STATUS
+EFIAPI
+PublishSystemMemory (
+ IN PHYSICAL_ADDRESS MemoryBegin,
+ IN UINT64 MemoryLength
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (MemoryLength > 0);
+ ASSERT (MemoryLength <= (MAX_ADDRESS - MemoryBegin + 1));
+
+ Status = PeiCoreInstallPeiMemory (MemoryBegin, MemoryLength);
+
+ return (RETURN_STATUS) Status;
+}
+
diff --git a/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.mbd b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.mbd new file mode 100644 index 0000000000..4271c550ef --- /dev/null +++ b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiResourcePublicationLib</BaseName>
+ <Guid>e8d6390d-e190-4957-9ab6-d47d51b01336</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-17 09:00</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.msa b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.msa new file mode 100644 index 0000000000..c4c6109680 --- /dev/null +++ b/MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiResourcePublicationLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>e8d6390d-e190-4957-9ab6-d47d51b01336</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-17 09:00</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">ResourcePublicationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiCoreLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiResourcePublicationLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiResourcePublicationLib/build.xml b/MdePkg/Library/PeiResourcePublicationLib/build.xml new file mode 100644 index 0000000000..b5ad8581e9 --- /dev/null +++ b/MdePkg/Library/PeiResourcePublicationLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiResourcePublicationLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiResourcePublicationLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiResourcePublicationLib">
+ <GenBuild baseName="PeiResourcePublicationLib" mbdFilename="${MODULE_DIR}\PeiResourcePublicationLib.mbd" msaFilename="${MODULE_DIR}\PeiResourcePublicationLib.msa"/>
+ </target>
+ <target depends="PeiResourcePublicationLib_clean" name="clean"/>
+ <target depends="PeiResourcePublicationLib_cleanall" name="cleanall"/>
+ <target name="PeiResourcePublicationLib_clean">
+ <OutputDirSetup baseName="PeiResourcePublicationLib" mbdFilename="${MODULE_DIR}\PeiResourcePublicationLib.mbd" msaFilename="${MODULE_DIR}\PeiResourcePublicationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiResourcePublicationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiResourcePublicationLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiResourcePublicationLib_cleanall">
+ <OutputDirSetup baseName="PeiResourcePublicationLib" mbdFilename="${MODULE_DIR}\PeiResourcePublicationLib.mbd" msaFilename="${MODULE_DIR}\PeiResourcePublicationLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiResourcePublicationLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiResourcePublicationLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiResourcePublicationLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c new file mode 100644 index 0000000000..0240c38dbc --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c @@ -0,0 +1,39 @@ +/** @file
+ PEI Services Table Pointer Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiServicesTablePointer.c
+
+**/
+
+
+
+static EFI_PEI_SERVICES **gPeiServices;
+
+EFI_PEI_SERVICES **
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ return gPeiServices;
+}
+
+/**
+**/
+EFI_STATUS
+PeiServicesTablePointerLibConstructor (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ gPeiServices = PeiServices;
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.mbd b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.mbd new file mode 100644 index 0000000000..c45d77e39c --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiServicesTablePointerLib</BaseName>
+ <Guid>1c747f6b-0a58-49ae-8ea3-0327a4fa10e3</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.msa b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.msa new file mode 100644 index 0000000000..b1451eae1c --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.msa @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiServicesTablePointerLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>1c747f6b-0a58-49ae-8ea3-0327a4fa10e3</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeiServicesTablePointerLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiServicesTablePointer.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Externs>
+ <Extern>
+ <Constructor>PeiServicesTablePointerLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiServicesTablePointerLib/build.xml b/MdePkg/Library/PeiServicesTablePointerLib/build.xml new file mode 100644 index 0000000000..b3c94a87b2 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiServicesTablePointerLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiServicesTablePointerLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiServicesTablePointerLib">
+ <GenBuild baseName="PeiServicesTablePointerLib" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLib.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLib.msa"/>
+ </target>
+ <target depends="PeiServicesTablePointerLib_clean" name="clean"/>
+ <target depends="PeiServicesTablePointerLib_cleanall" name="cleanall"/>
+ <target name="PeiServicesTablePointerLib_clean">
+ <OutputDirSetup baseName="PeiServicesTablePointerLib" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLib.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiServicesTablePointerLib_cleanall">
+ <OutputDirSetup baseName="PeiServicesTablePointerLib" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLib.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiServicesTablePointerLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointer.c b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointer.c new file mode 100644 index 0000000000..285a5a05ad --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointer.c @@ -0,0 +1,37 @@ +/** @file
+ PEI Services Table Pointer Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiServicesTablePointer.c
+
+**/
+
+
+
+EFI_PEI_SERVICES **
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ return (EFI_PEI_SERVICES **)(UINTN)AsmReadMm7 ();
+}
+
+/**
+**/
+EFI_STATUS
+PeiServicesTablePointerLibConstructor (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ AsmWriteMm7 ((UINT64)(UINTN)PeiServices);
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.mbd b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.mbd new file mode 100644 index 0000000000..5023d92701 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiServicesTablePointerLibMm7</BaseName>
+ <Guid>e6e9c1f8-2c8a-4f4b-a27c-c382e4bb8e67</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.msa b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.msa new file mode 100644 index 0000000000..2afb2ed831 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibMm7/PeiServicesTablePointerLibMm7.msa @@ -0,0 +1,49 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiServicesTablePointerLibMm7</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>e6e9c1f8-2c8a-4f4b-a27c-c382e4bb8e67</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeiServicesTablePointerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiServicesTablePointer.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Externs>
+ <Extern>
+ <Constructor>PeiServicesTablePointerLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiServicesTablePointerLibMm7/build.xml b/MdePkg/Library/PeiServicesTablePointerLibMm7/build.xml new file mode 100644 index 0000000000..af443df77c --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibMm7/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiServicesTablePointerLibMm7"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiServicesTablePointerLibMm7"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiServicesTablePointerLibMm7">
+ <GenBuild baseName="PeiServicesTablePointerLibMm7" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.msa"/>
+ </target>
+ <target depends="PeiServicesTablePointerLibMm7_clean" name="clean"/>
+ <target depends="PeiServicesTablePointerLibMm7_cleanall" name="cleanall"/>
+ <target name="PeiServicesTablePointerLibMm7_clean">
+ <OutputDirSetup baseName="PeiServicesTablePointerLibMm7" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLibMm7_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLibMm7_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiServicesTablePointerLibMm7_cleanall">
+ <OutputDirSetup baseName="PeiServicesTablePointerLibMm7" mbdFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.mbd" msaFilename="${MODULE_DIR}\PeiServicesTablePointerLibMm7.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLibMm7_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiServicesTablePointerLibMm7_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiServicesTablePointerLibMm7*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeiSmbusLib/InternalSmbusLib.h b/MdePkg/Library/PeiSmbusLib/InternalSmbusLib.h new file mode 100644 index 0000000000..3c0b597fc5 --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/InternalSmbusLib.h @@ -0,0 +1,112 @@ +/** @file
+Internal header file for Smbus library.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: SmbusLib.c
+
+**/
+
+#ifndef __INTERNAL_SMBUS_LIB_H
+#define __INTERNAL_SMBUS_LIB_H
+
+#define SMBUS_LIB_PEC(SmBusAddress) ((BOOLEAN) ((SmBusAddress) & 0x01))
+#define SMBUS_LIB_SLAVE_ADDRESS(SmBusAddress) (((SmBusAddress) >> 1) & 0x7f)
+#define SMBUS_LIB_COMMAND(SmBusAddress) (((SmBusAddress) >> 8) & 0xff)
+#define SMBUS_LIB_LENGTH(SmBusAddress) (((SmBusAddress) >> 16) & 0x1f)
+#define SMBUS_LIB_RESEARVED(SmBusAddress) (((SmBusAddress) >> 21))
+
+//
+// Declaration for internal functions
+//
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation..
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+ It will assign to all SMBUS slave devices if it is NULL.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalSmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid OPTIONAL
+ );
+
+/**
+ Retrieves the mapping of all the SMBus devices.
+
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+ @param SmbusDeviceMap The pointer to the device map as enumerated by the SMBus controller driver.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalGetArpMap (
+ OUT UINTN *Length,
+ OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+#endif
diff --git a/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.c b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.c new file mode 100644 index 0000000000..3ada624f68 --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.c @@ -0,0 +1,177 @@ +/** @file
+Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: PeiSmbusLib.c
+
+**/
+
+#include "InternalSmbusLib.h"
+
+/**
+ Gets Smbus PPIs.
+
+ This internal function retrieves Smbus PPI from PPI database.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES published by the PEI Foundation.
+
+ @return The pointer to Smbus PPI.
+
+**/
+EFI_PEI_SMBUS_PPI *
+InternalGetSmbusPpi (
+ EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+
+ Status = (*PeiServices)->LocatePpi (PeiServices, &gEfiPeiSmbusPpiGuid, 0, NULL, (VOID **) &SmbusPpi);
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (SmbusPpi != NULL);
+
+ return SmbusPpi;
+}
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ This function provides a standard way to execute Smbus script
+ as defined in the SmBus Specification. The data can either be of
+ the Length byte, word, or a block of data.
+
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to
+ execute the SMBus transactions.
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of
+ bytes can be revision specific and operation specific.
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations
+ require this argument. The length of this buffer is identified by Length.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The actual number of bytes that are executed for this operation..
+
+**/
+UINTN
+InternalSmBusExec (
+ IN EFI_SMBUS_OPERATION SmbusOperation,
+ IN UINTN SmBusAddress,
+ IN UINTN Length,
+ IN VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+ EFI_PEI_SERVICES **PeiServices;
+ RETURN_STATUS ReturnStatus;
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ SmbusPpi = InternalGetSmbusPpi (PeiServices);
+ SmbusDeviceAddress.SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+
+ ReturnStatus = SmbusPpi->Execute (
+ PeiServices,
+ SmbusPpi,
+ SmbusDeviceAddress,
+ SMBUS_LIB_COMMAND (SmBusAddress),
+ SmbusOperation,
+ SMBUS_LIB_PEC (SmBusAddress),
+ &Length,
+ Buffer
+ );
+ if (Status != NULL) {
+ *Status = ReturnStatus;
+ }
+
+ return Length;
+}
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+ It will assign to all SMBUS slave devices if it is NULL.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalSmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid OPTIONAL
+ )
+{
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+ EFI_PEI_SERVICES **PeiServices;
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ SmbusPpi = InternalGetSmbusPpi (PeiServices);
+
+ SmbusDeviceAddress.SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+ return (RETURN_STATUS) SmbusPpi->ArpDevice (
+ PeiServices,
+ SmbusPpi,
+ (BOOLEAN) (Uuid == NULL),
+ (EFI_SMBUS_UDID *) Uuid,
+ &SmbusDeviceAddress
+ );
+}
+
+/**
+ Retrieves the mapping of all the SMBus devices.
+
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+ @param SmbusDeviceMap The pointer to the device map as enumerated by the SMBus controller driver.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+InternalGetArpMap (
+ OUT UINTN *Length,
+ OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ )
+{
+ EFI_PEI_SMBUS_PPI *SmbusPpi;
+ EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ SmbusPpi = InternalGetSmbusPpi (PeiServices);
+
+ return (RETURN_STATUS) SmbusPpi->GetArpMap (PeiServices, SmbusPpi, Length, SmbusDeviceMap);
+}
diff --git a/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.mbd b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.mbd new file mode 100644 index 0000000000..5b5bfdf8d7 --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeiSmbusLib</BaseName>
+ <Guid>56E800D9-7603-4e01-9581-1FFB9E98F5BE</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-17 22:30</Created>
+ <Modified>2006-04-17 22:30</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.msa b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.msa new file mode 100644 index 0000000000..f96ba746c7 --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/PeiSmbusLib.msa @@ -0,0 +1,51 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeiSmbusLib</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>51C4C059-67F0-4e3c-9A55-FF42A8291C8C</Guid>
+ <Version>0</Version>
+ <Abstract>SmBus Library Instance implemented with SmBus PPI.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-17 22:30</Created>
+ <Updated>2006-04-17 22:30</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">SmbusLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeimEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PeiServicesTablePointerLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeiSmbusLib.c</Filename>
+ <Filename>SmbusLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PPIs>
+ <Ppi Usage="ALWAYS_CONSUMED">Smbus</Ppi>
+ </PPIs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeiSmbusLib/SmbusLib.c b/MdePkg/Library/PeiSmbusLib/SmbusLib.c new file mode 100644 index 0000000000..da29fab5a3 --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/SmbusLib.c @@ -0,0 +1,597 @@ +/** @file
+Implementation of SmBusLib class library for PEI phase.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: SmbusLib.c
+
+**/
+
+#include "InternalSmbusLib.h"
+
+/**
+ Executes an SMBUS quick read command.
+
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+VOID
+EFIAPI
+SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);
+}
+
+/**
+ Executes an SMBUS quick write command.
+
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+BOOLEAN
+EFIAPI
+SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);
+ //
+ // Bugbug: Undefined return value in spec
+ //
+ return TRUE;
+}
+
+/**
+ Executes an SMBUS receive byte command.
+
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ The byte received from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte received from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS send byte command.
+
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
+ The byte specified by Value is sent.
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to send.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data byte command.
+
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 8-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);
+
+ return Byte;
+}
+
+/**
+ Executes an SMBUS write data byte command.
+
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
+ The 8-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT8 Byte;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Byte = Value;
+ InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read data word command.
+
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT16
+EFIAPI
+SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);
+
+ return Word;
+}
+
+/**
+ Executes an SMBUS write data word command.
+
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ UINT16 Word;
+
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ Word = Value;
+ InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS process call command.
+
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value returned by the process call command is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The 16-bit value returned by the process call command.
+
+**/
+UINT16
+EFIAPI
+SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);
+
+ return Value;
+}
+
+/**
+ Executes an SMBUS read block command.
+
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Bytes are read from the SMBUS and stored in Buffer.
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure Buffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes read.
+
+**/
+UINTN
+EFIAPI
+SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x1f, Buffer, Status);
+}
+
+/**
+ Executes an SMBUS write block command.
+
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from Buffer.
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), Buffer, Status);
+}
+
+/**
+ Executes an SMBUS block process call command.
+
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from OutBuffer. Bytes are then read from the SMBUS into InBuffer.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure InBuffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If OutBuffer is NULL, then ASSERT().
+ If InBuffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param OutBuffer Pointer to the buffer of bytes to write to the SMBUS.
+ @param InBuffer Pointer to the buffer of bytes to read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ OUT VOID *OutBuffer,
+ OUT VOID *InBuffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+{
+ ASSERT (InBuffer != NULL);
+ ASSERT (OutBuffer != NULL);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+
+ //
+ // BugBug: Not sure whether it's all right.
+ //
+ InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), OutBuffer, Status);
+
+ return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 1, InBuffer, Status);
+}
+
+/**
+ Enumerates the SMBUS and assigns slave addresses.
+
+ Executes the SMBUS enumeration algorithm and assigns a valid address to all SMBUS slave devices.
+ The total number of SMBUS slave devices detected is returned.
+ The status of the executed command is returned.
+ If Slave Address in SmBusAddress is not zero, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpAll (
+ IN UINTN SmBusAddress
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress) == 0);
+
+ return InternalSmBusArpDevice (SmBusAddress, NULL);
+}
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid
+ )
+{
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+
+ return InternalSmBusArpDevice (SmBusAddress, Uuid);
+}
+
+/**
+ Retrieves the UUID associated with an SMBUS slave device.
+
+ Retrieves the UUID associated with the slave address specified
+ by SmBusAddress and returns the UUID in Uuid.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If Uuid is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID retrieved from the SMBUS slave device.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusGetUuid (
+ IN UINTN SmBusAddress,
+ OUT GUID *Uuid
+ )
+{
+ UINTN Length;
+ EFI_SMBUS_DEVICE_MAP *SmBusDeviceMap;
+ RETURN_STATUS ReturnStatus;
+ UINTN SmbusDeviceAddress;
+ UINTN Index;
+
+ ASSERT (Uuid != NULL);
+ ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
+ ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_RESEARVED (SmBusAddress) == 0);
+ ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
+
+ ReturnStatus = InternalGetArpMap (&Length, &SmBusDeviceMap);
+ if (!RETURN_ERROR (ReturnStatus)) {
+ SmbusDeviceAddress = SMBUS_LIB_SLAVE_ADDRESS (SmBusAddress);
+ for (Index = 0; Index < Length; Index++) {
+ if (SmBusDeviceMap[Index].SmbusDeviceAddress.SmbusDeviceAddress == SmbusDeviceAddress) {
+ CopyMem (Uuid, &SmBusDeviceMap[Index].SmbusDeviceUdid, sizeof (EFI_SMBUS_UDID));
+ break;
+ }
+ }
+ }
+
+ return ReturnStatus;
+}
diff --git a/MdePkg/Library/PeiSmbusLib/build.xml b/MdePkg/Library/PeiSmbusLib/build.xml new file mode 100644 index 0000000000..9f1b89302d --- /dev/null +++ b/MdePkg/Library/PeiSmbusLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeiSmbusLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeiSmbusLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeiSmbusLib">
+ <GenBuild baseName="PeiSmbusLib" mbdFilename="${MODULE_DIR}\PeiSmbusLib.mbd" msaFilename="${MODULE_DIR}\PeiSmbusLib.msa"/>
+ </target>
+ <target depends="PeiSmbusLib_clean" name="clean"/>
+ <target depends="PeiSmbusLib_cleanall" name="cleanall"/>
+ <target name="PeiSmbusLib_clean">
+ <OutputDirSetup baseName="PeiSmbusLib" mbdFilename="${MODULE_DIR}\PeiSmbusLib.mbd" msaFilename="${MODULE_DIR}\PeiSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiSmbusLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeiSmbusLib_cleanall">
+ <OutputDirSetup baseName="PeiSmbusLib" mbdFilename="${MODULE_DIR}\PeiSmbusLib.mbd" msaFilename="${MODULE_DIR}\PeiSmbusLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeiSmbusLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeiSmbusLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeiSmbusLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.c b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.c new file mode 100644 index 0000000000..b661646083 --- /dev/null +++ b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.c @@ -0,0 +1,68 @@ +
+/** @file
+ Entry point to a PEIM.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Image entry point of Peim.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+ @return Status returned by entry points of Peims.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ if (_gPeimRevision != 0) {
+ //
+ // Make sure that the PEI spec revision of the platform is >= PEI spec revision of the driver
+ //
+ ASSERT ((*PeiServices)->Hdr.Revision >= _gPeimRevision);
+ }
+
+ //
+ // Call constructor for all libraries
+ //
+ ProcessLibraryConstructorList (FfsHeader, PeiServices);
+
+ //
+ // Call the driver entry point
+ //
+ return ProcessModuleEntryPointList (FfsHeader, PeiServices);
+}
+
+
+/**
+ Wrapper of Peim image entry point.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+ @return Status returned by entry points of Peims.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ return _ModuleEntryPoint (FfsHeader, PeiServices);
+}
diff --git a/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.mbd b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.mbd new file mode 100644 index 0000000000..1a41f73e69 --- /dev/null +++ b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>PeimEntryPoint</BaseName>
+ <Guid>fa177ff7-1fc7-458d-a358-d9d62ae61cec</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.msa b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.msa new file mode 100644 index 0000000000..73d4e60d2f --- /dev/null +++ b/MdePkg/Library/PeimEntryPoint/PeimEntryPoint.msa @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>PeimEntryPoint</BaseName>
+ <ModuleType>PEIM</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>fa177ff7-1fc7-458d-a358-d9d62ae61cec</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to the PEI Core</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">PeimEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeimEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/PeimEntryPoint/build.xml b/MdePkg/Library/PeimEntryPoint/build.xml new file mode 100644 index 0000000000..93a821692e --- /dev/null +++ b/MdePkg/Library/PeimEntryPoint/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="PeimEntryPoint"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\PeimEntryPoint"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="PeimEntryPoint">
+ <GenBuild baseName="PeimEntryPoint" mbdFilename="${MODULE_DIR}\PeimEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeimEntryPoint.msa"/>
+ </target>
+ <target depends="PeimEntryPoint_clean" name="clean"/>
+ <target depends="PeimEntryPoint_cleanall" name="cleanall"/>
+ <target name="PeimEntryPoint_clean">
+ <OutputDirSetup baseName="PeimEntryPoint" mbdFilename="${MODULE_DIR}\PeimEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeimEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeimEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeimEntryPoint_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="PeimEntryPoint_cleanall">
+ <OutputDirSetup baseName="PeimEntryPoint" mbdFilename="${MODULE_DIR}\PeimEntryPoint.mbd" msaFilename="${MODULE_DIR}\PeimEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\PeimEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\PeimEntryPoint_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**PeimEntryPoint*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.c b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.c new file mode 100644 index 0000000000..aa990f7fdf --- /dev/null +++ b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.c @@ -0,0 +1,47 @@ +/** @file
+ UEFI Boot Services Table Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiBootServicesTableLib.c
+
+**/
+
+EFI_HANDLE gImageHandle;
+EFI_SYSTEM_TABLE *gST;
+EFI_BOOT_SERVICES *gBS;
+
+/**
+**/
+EFI_STATUS
+UefiBootServicesTableLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ //
+ // Cache the Image Handle
+ //
+ gImageHandle = ImageHandle;
+
+ //
+ // Cache pointer to the EFI System Table
+ //
+ gST = SystemTable;
+ ASSERT (gST != NULL);
+
+ //
+ // Cache pointer to the EFI Boot Services Table
+ //
+ gBS = SystemTable->BootServices;
+ ASSERT (gBS != NULL);
+
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.mbd b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.mbd new file mode 100644 index 0000000000..dc6fda9ad3 --- /dev/null +++ b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiBootServicesTableLib</BaseName>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-17 15:49</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.msa b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.msa new file mode 100644 index 0000000000..90585bf722 --- /dev/null +++ b/MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.msa @@ -0,0 +1,49 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiBootServicesTableLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>0</Version>
+ <Abstract>UEFI Boot Services Table Library</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-17 15:49</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiBootServicesTableLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Externs>
+ <Extern>
+ <Constructor>UefiBootServicesTableLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiBootServicesTableLib/build.xml b/MdePkg/Library/UefiBootServicesTableLib/build.xml new file mode 100644 index 0000000000..c9f9fc980d --- /dev/null +++ b/MdePkg/Library/UefiBootServicesTableLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiBootServicesTableLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiBootServicesTableLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiBootServicesTableLib">
+ <GenBuild baseName="UefiBootServicesTableLib" mbdFilename="${MODULE_DIR}\UefiBootServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiBootServicesTableLib.msa"/>
+ </target>
+ <target depends="UefiBootServicesTableLib_clean" name="clean"/>
+ <target depends="UefiBootServicesTableLib_cleanall" name="cleanall"/>
+ <target name="UefiBootServicesTableLib_clean">
+ <OutputDirSetup baseName="UefiBootServicesTableLib" mbdFilename="${MODULE_DIR}\UefiBootServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiBootServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiBootServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiBootServicesTableLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiBootServicesTableLib_cleanall">
+ <OutputDirSetup baseName="UefiBootServicesTableLib" mbdFilename="${MODULE_DIR}\UefiBootServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiBootServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiBootServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiBootServicesTableLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiBootServicesTableLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDebugLibConOut/DebugLib.c b/MdePkg/Library/UefiDebugLibConOut/DebugLib.c new file mode 100644 index 0000000000..4c068087be --- /dev/null +++ b/MdePkg/Library/UefiDebugLibConOut/DebugLib.c @@ -0,0 +1,247 @@ +/** @file
+ UEFI Debug Library that uses PrintLib to send messages to CONOUT.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Define the maximum debug and assert message length that this library supports
+//
+#define MAX_DEBUG_MESSAGE_LENGTH 0x100
+
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CHAR8 *Format,
+ ...
+ )
+{
+ CHAR16 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+ VA_LIST Marker;
+
+ //
+ // If Format is NULL, then ASSERT().
+ //
+ ASSERT (Format != NULL);
+
+ //
+ // Check driver debug mask value and global mask
+ //
+ if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
+ return;
+ }
+
+ //
+ // Convert the DEBUG() message to a Unicode String
+ //
+ VA_START (Marker, Format);
+ UnicodeVSPrintAsciiFormat (Buffer, sizeof (Buffer), Format, Marker);
+ VA_END (Marker);
+
+ //
+ // Send the print string to the Console Output device
+ //
+ if (gST->ConOut != NULL) {
+ gST->ConOut->OutputString (gST->ConOut, Buffer);
+ }
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form “ASSERT <FileName>(<LineNumber>): <Description>\n”
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of “(NULL) Filename” is printed.
+
+ If Description is NULL, then a <Description> string of “(NULL) Description” is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CHAR8 *FileName,
+ IN INTN LineNumber,
+ IN CHAR8 *Description
+ )
+{
+ CHAR16 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+
+ //
+ // Generate the ASSERT() message in Unicode format
+ //
+ UnicodeSPrintAsciiFormat (Buffer, sizeof (Buffer), "ASSERT %s(%d): %s\n", FileName, LineNumber, Description);
+
+ //
+ // Send the print string to the Console Output device
+ //
+ if (gST->ConOut != NULL) {
+ gST->ConOut->OutputString (gST->ConOut, Buffer);
+ }
+
+ //
+ // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
+ //
+ if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+ CpuBreakpoint ();
+ } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+ CpuDeadLoop ();
+ }
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS – Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ //
+ // If Buffer is NULL, then ASSERT().
+ //
+ ASSERT (Buffer != NULL);
+
+ //
+ // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
+ //
+ return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.mbd b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.mbd new file mode 100644 index 0000000000..12032d4094 --- /dev/null +++ b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDebugLibConOut</BaseName>
+ <Guid>5cddfaf3-e9a7-4d16-bdce-1e002df475bb</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.msa b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.msa new file mode 100644 index 0000000000..6d41033d8d --- /dev/null +++ b/MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.msa @@ -0,0 +1,65 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDebugLibConOut</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>5cddfaf3-e9a7-4d16-bdce-1e002df475bb</Guid>
+ <Version>0</Version>
+ <Abstract>Debug Library for UEFI drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PrintLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugPropertyMask</C_Name>
+ <Token>0x00000005</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugClearMemoryValue</C_Name>
+ <Token>0x00000008</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="PATCHABLE_IN_MODULE">
+ <C_Name>PcdDebugPrintErrorLevel</C_Name>
+ <Token>0x00000006</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDebugLibConOut/build.xml b/MdePkg/Library/UefiDebugLibConOut/build.xml new file mode 100644 index 0000000000..b314b5fffe --- /dev/null +++ b/MdePkg/Library/UefiDebugLibConOut/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDebugLibConOut"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDebugLibConOut"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDebugLibConOut">
+ <GenBuild baseName="UefiDebugLibConOut" mbdFilename="${MODULE_DIR}\UefiDebugLibConOut.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibConOut.msa"/>
+ </target>
+ <target depends="UefiDebugLibConOut_clean" name="clean"/>
+ <target depends="UefiDebugLibConOut_cleanall" name="cleanall"/>
+ <target name="UefiDebugLibConOut_clean">
+ <OutputDirSetup baseName="UefiDebugLibConOut" mbdFilename="${MODULE_DIR}\UefiDebugLibConOut.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibConOut.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDebugLibConOut_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDebugLibConOut_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDebugLibConOut_cleanall">
+ <OutputDirSetup baseName="UefiDebugLibConOut" mbdFilename="${MODULE_DIR}\UefiDebugLibConOut.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibConOut.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDebugLibConOut_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDebugLibConOut_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDebugLibConOut*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDebugLibStdErr/DebugLib.c b/MdePkg/Library/UefiDebugLibStdErr/DebugLib.c new file mode 100644 index 0000000000..7acbee5900 --- /dev/null +++ b/MdePkg/Library/UefiDebugLibStdErr/DebugLib.c @@ -0,0 +1,247 @@ +/** @file
+ UEFI Debug Library that uses PrintLib to send messages to STDERR.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Define the maximum debug and assert message length that this library supports
+//
+#define MAX_DEBUG_MESSAGE_LENGTH 0x100
+
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CHAR8 *Format,
+ ...
+ )
+{
+ CHAR16 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+ VA_LIST Marker;
+
+ //
+ // If Format is NULL, then ASSERT().
+ //
+ ASSERT (Format != NULL);
+
+ //
+ // Check driver debug mask value and global mask
+ //
+ if ((ErrorLevel & PcdGet32(PcdDebugPrintErrorLevel)) == 0) {
+ return;
+ }
+
+ //
+ // Convert the DEBUG() message to a Unicode String
+ //
+ VA_START (Marker, Format);
+ UnicodeVSPrintAsciiFormat (Buffer, sizeof (Buffer), Format, Marker);
+ VA_END (Marker);
+
+ //
+ // Send the print string to the Standard Error device
+ //
+ if (gST->StdErr != NULL) {
+ gST->StdErr->OutputString (gST->StdErr, Buffer);
+ }
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form “ASSERT <FileName>(<LineNumber>): <Description>\n”
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of “(NULL) Filename” is printed.
+
+ If Description is NULL, then a <Description> string of “(NULL) Description” is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CHAR8 *FileName,
+ IN INTN LineNumber,
+ IN CHAR8 *Description
+ )
+{
+ CHAR16 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+
+ //
+ // Generate the ASSERT() message in Unicode format
+ //
+ UnicodeSPrintAsciiFormat (Buffer, sizeof (Buffer), "ASSERT %s(%d): %s\n", FileName, LineNumber, Description);
+
+ //
+ // Send the print string to the Standard Error device
+ //
+ if (gST->StdErr != NULL) {
+ gST->StdErr->OutputString (gST->StdErr, Buffer);
+ }
+
+ //
+ // Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
+ //
+ if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
+ CpuBreakpoint ();
+ } else if ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
+ CpuDeadLoop ();
+ }
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS – Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ //
+ // If Buffer is NULL, then ASSERT().
+ //
+ ASSERT (Buffer != NULL);
+
+ //
+ // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
+ //
+ return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.mbd b/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.mbd new file mode 100644 index 0000000000..ecec5af1cf --- /dev/null +++ b/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDebugLibStdErr</BaseName>
+ <Guid>b57a1df6-ffdb-4247-a3df-3a562176751a</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.msa b/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.msa new file mode 100644 index 0000000000..e8943dad5b --- /dev/null +++ b/MdePkg/Library/UefiDebugLibStdErr/UefiDebugLibStdErr.msa @@ -0,0 +1,65 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDebugLibStdErr</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>b57a1df6-ffdb-4247-a3df-3a562176751a</Guid>
+ <Version>0</Version>
+ <Abstract>Debug Library for UEFI drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PrintLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">PcdLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <PCDs>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugPropertyMask</C_Name>
+ <Token>0x00000005</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="FIXED_AT_BUILD">
+ <C_Name>PcdDebugClearMemoryValue</C_Name>
+ <Token>0x00000008</Token>
+ <DatumType>UINT8</DatumType>
+ </PcdData>
+ <PcdData ItemType="PATCHABLE_IN_MODULE">
+ <C_Name>PcdDebugPrintErrorLevel</C_Name>
+ <Token>0x00000006</Token>
+ <DatumType>UINT32</DatumType>
+ </PcdData>
+ </PCDs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDebugLibStdErr/build.xml b/MdePkg/Library/UefiDebugLibStdErr/build.xml new file mode 100644 index 0000000000..c7449e3d75 --- /dev/null +++ b/MdePkg/Library/UefiDebugLibStdErr/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDebugLibStdErr"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDebugLibStdErr"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDebugLibStdErr">
+ <GenBuild baseName="UefiDebugLibStdErr" mbdFilename="${MODULE_DIR}\UefiDebugLibStdErr.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibStdErr.msa"/>
+ </target>
+ <target depends="UefiDebugLibStdErr_clean" name="clean"/>
+ <target depends="UefiDebugLibStdErr_cleanall" name="cleanall"/>
+ <target name="UefiDebugLibStdErr_clean">
+ <OutputDirSetup baseName="UefiDebugLibStdErr" mbdFilename="${MODULE_DIR}\UefiDebugLibStdErr.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibStdErr.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDebugLibStdErr_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDebugLibStdErr_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDebugLibStdErr_cleanall">
+ <OutputDirSetup baseName="UefiDebugLibStdErr" mbdFilename="${MODULE_DIR}\UefiDebugLibStdErr.mbd" msaFilename="${MODULE_DIR}\UefiDebugLibStdErr.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDebugLibStdErr_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDebugLibStdErr_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDebugLibStdErr*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.c b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.c new file mode 100644 index 0000000000..8dc84f48b7 --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.c @@ -0,0 +1,434 @@ +/** @file
+ Device Path services. The thing to remember is device paths are built out of
+ nodes. The device path is terminated by an end node that is length
+ sizeof(EFI_DEVICE_PATH_PROTOCOL). That would be why there is sizeof(EFI_DEVICE_PATH_PROTOCOL)
+ all over this file.
+
+ The only place where multi-instance device paths are supported is in
+ environment varibles. Multi-instance device paths should never be placed
+ on a Handle.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDevicePathLib.c
+
+**/
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+UINTN
+EFIAPI
+GetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Start;
+
+ if (DevicePath == NULL) {
+ return 0;
+ }
+
+ //
+ // Search for the end of the device path structure
+ //
+ Start = DevicePath;
+ while (!EfiIsDevicePathEnd (DevicePath)) {
+ DevicePath = EfiNextDevicePathNode (DevicePath);
+ }
+
+ //
+ // Compute the size and add back in the size of the end device path structure
+ //
+ return ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+}
+
+/**
+ This function allocates space for a new copy of the device path
+ specified by DevicePath.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The duplicated device path.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DuplicateDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ UINTN Size;
+
+ //
+ // Compute the size
+ //
+ Size = GetDevicePathSize (DevicePath);
+ if (Size == 0) {
+ return NULL;
+ }
+
+ //
+ // Allocate space for duplicate device path
+ //
+ NewDevicePath = AllocateCopyPool (Size, DevicePath);
+
+ return NewDevicePath;
+}
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ UINTN Size;
+ UINTN Size1;
+ UINTN Size2;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath2;
+
+ //
+ // If there's only 1 path, just duplicate it
+ //
+ if (FirstDevicePath == NULL) {
+ return DuplicateDevicePath (SecondDevicePath);
+ }
+
+ if (SecondDevicePath == NULL) {
+ return DuplicateDevicePath (FirstDevicePath);
+ }
+
+ //
+ // Allocate space for the combined device path. It only has one end node of
+ // length EFI_DEVICE_PATH_PROTOCOL
+ //
+ Size1 = GetDevicePathSize (FirstDevicePath);
+ Size2 = GetDevicePathSize (SecondDevicePath);
+ Size = Size1 + Size2 - sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ NewDevicePath = AllocatePool (Size);
+
+ if (NewDevicePath != NULL) {
+ NewDevicePath = CopyMem (NewDevicePath, FirstDevicePath, Size1);
+ //
+ // Over write Src1 EndNode and do the copy
+ //
+ DevicePath2 = (EFI_DEVICE_PATH_PROTOCOL *) ((CHAR8 *) NewDevicePath + (Size1 - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ CopyMem (DevicePath2, SecondDevicePath, Size2);
+ }
+
+ return NewDevicePath;
+}
+
+/**
+ This function appends the device path node SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a single device path node.
+
+ @return A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathNode (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *NextNode;
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ UINTN NodeLength;
+ UINTN Size1;
+
+ //
+ // Build a Node that has a terminator on it
+ //
+ NodeLength = DevicePathNodeLength (SecondDevicePath);
+ Size1 = GetDevicePathSize (FirstDevicePath);
+
+ NewDevicePath = AllocatePool (NodeLength + Size1);
+ if (NewDevicePath != NULL) {
+ //
+ // Copy the first device path to the new device path
+ //
+ NewDevicePath = CopyMem (NewDevicePath, FirstDevicePath, Size1);
+
+ //
+ // Copy the device path node to the new device path
+ //
+ NextNode = (EFI_DEVICE_PATH_PROTOCOL *) ((CHAR8 *) NewDevicePath + (Size1 - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ NextNode = CopyMem (NextNode, SecondDevicePath, NodeLength);
+
+ //
+ // Terminate the whole device path
+ //
+ NextNode = NextDevicePathNode (NextNode);
+ SetDevicePathEndNode (NextNode);
+ }
+ return NewDevicePath;
+}
+
+/**
+ This function appends the device path instance Instance to the device path Source.
+ If Source is NULL, then a new device path with one instance is created.
+
+ @param Source A pointer to a device path data structure.
+ @param Instance A pointer to a device path instance.
+
+ @return A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Source,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Instance
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN SrcSize;
+ UINTN InstanceSize;
+
+ if (Source == NULL) {
+ return DuplicateDevicePath (Instance);
+ }
+
+ SrcSize = GetDevicePathSize (Source);
+ InstanceSize = GetDevicePathSize (Instance);
+
+ NewDevicePath = AllocatePool (SrcSize + InstanceSize);
+ if (NewDevicePath != NULL) {
+
+ DevicePath = CopyMem (NewDevicePath, Source, SrcSize);;
+
+ while (!IsDevicePathEnd (DevicePath)) {
+ DevicePath = NextDevicePathNode (DevicePath);
+ }
+
+ DevicePath->SubType = END_INSTANCE_DEVICE_PATH_SUBTYPE;
+
+ DevicePath = NextDevicePathNode (DevicePath);
+ CopyMem (DevicePath, Instance, InstanceSize);
+ }
+
+ return NewDevicePath;
+}
+
+/**
+ Function retrieves the next device path instance from a device path data structure.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @param Size A pointer to the size of a device path instance in bytes.
+
+ @return This function returns a pointer to the current device path instance.
+ In addition, it returns the size in bytes of the current device path instance in Size,
+ and a pointer to the next device path instance in DevicePath.
+ If there are no more device path instances in DevicePath, then DevicePath will be set to NULL.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+GetNextDevicePathInstance (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,
+ OUT UINTN *Size
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevPath;
+ EFI_DEVICE_PATH_PROTOCOL *ReturnValue;
+ UINT8 Temp;
+
+ ASSERT (DevicePath != NULL);
+ ASSERT (Size != NULL);
+ if (*DevicePath == NULL) {
+ *Size = 0;
+ return NULL;
+ }
+
+ //
+ // Find the end of the device path instance
+ //
+ DevPath = *DevicePath;
+ while (!IsDevicePathEndType (DevPath)) {
+ DevPath = NextDevicePathNode (DevPath);
+ }
+
+ //
+ // Compute the size of the device path instance
+ //
+ *Size = ((UINTN) DevPath - (UINTN) (*DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+
+ //
+ // Make a copy and return the device path instance
+ //
+ Temp = DevPath->SubType;
+ DevPath->SubType = END_ENTIRE_DEVICE_PATH_SUBTYPE;
+ ReturnValue = DuplicateDevicePath (*DevicePath);
+ DevPath->SubType = Temp;
+
+ //
+ // If DevPath is the end of an entire device path, then another instance
+ // does not follow, so *DevicePath is set to NULL.
+ //
+ if (DevicePathSubType (DevPath) == END_ENTIRE_DEVICE_PATH_SUBTYPE) {
+ *DevicePath = NULL;
+ } else {
+ *DevicePath = NextDevicePathNode (DevPath);
+ }
+
+ return ReturnValue;
+}
+
+/**
+ Return TRUE is this is a multi instance device path.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @retval TRUE If DevicePath is multi-instance.
+ @retval FALSE If DevicePath is not multi-instance or DevicePath is NULL.
+
+**/
+BOOLEAN
+EFIAPI
+IsDevicePathMultiInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CONST EFI_DEVICE_PATH_PROTOCOL *Node;
+
+ if (DevicePath == NULL) {
+ return FALSE;
+ }
+
+ Node = DevicePath;
+ while (!EfiIsDevicePathEnd (Node)) {
+ if (EfiIsDevicePathEndInstance (Node)) {
+ return TRUE;
+ }
+
+ Node = EfiNextDevicePathNode (Node);
+ }
+
+ return FALSE;
+}
+
+/**
+ This function retrieves the device path protocol from a handle.
+
+ @param Handle The handle from which to retrieve the device path protocol.
+
+ @return This function returns the device path protocol from the handle specified by Handle.
+ If Handle is NULL or Handle does not contain a device path protocol, then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DevicePathFromHandle (
+ IN EFI_HANDLE Handle
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID *) &DevicePath
+ );
+ if (EFI_ERROR (Status)) {
+ DevicePath = NULL;
+ }
+ return DevicePath;
+}
+
+/**
+ This function allocates a device path for a file and appends it to an existing device path.
+
+ @param Device A pointer to a device handle. This parameter is optional and may be NULL.
+ @param FileName A pointer to a Null-terminated Unicode string.
+
+ @return If Device is a valid device handle that contains a device path protocol,
+ then a device path for the file specified by FileName is allocated
+ and appended to the device path associated with the handle Device. The allocated device path is returned.
+ If Device is NULL or Device is a handle that does not support the device path protocol,
+ then a device path containing a single device path node for the file specified by FileName
+ is allocated and returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+FileDevicePath (
+ IN EFI_HANDLE Device, OPTIONAL
+ IN CONST CHAR16 *FileName
+ )
+{
+ UINTN FileNameSize;
+ UINTN FilePathNodeSize;
+ FILEPATH_DEVICE_PATH *FilePathNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ DevicePath = NULL;
+
+ FileNameSize = StrSize (FileName);
+ FilePathNodeSize = FileNameSize + SIZE_OF_FILEPATH_DEVICE_PATH;
+ FilePathNode = AllocatePool (FilePathNodeSize);
+ if (FilePathNode != NULL) {
+ //
+ // Build a file path node
+ //
+ FilePathNode->Header.Type = MEDIA_DEVICE_PATH;
+ FilePathNode->Header.SubType = MEDIA_FILEPATH_DP;
+ SetDevicePathNodeLength (&FilePathNode->Header, FilePathNodeSize);
+ CopyMem (FilePathNode->PathName, FileName, FileNameSize);
+
+ //
+ // Append file path node to device's device path
+ //
+ if (Device != NULL) {
+ DevicePath = DevicePathFromHandle (Device);
+ }
+ DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *) FilePathNode);
+ FreePool (FilePathNode);
+ }
+ return DevicePath;
+}
+
diff --git a/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.mbd b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.mbd new file mode 100644 index 0000000000..dc69382880 --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDevicePathLib</BaseName>
+ <Guid>91c1677a-e57f-4191-8b8e-eb7711a716e0</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-13 16:52</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.msa b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.msa new file mode 100644 index 0000000000..c5225d89c9 --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.msa @@ -0,0 +1,51 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDevicePathLib</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>91c1677a-e57f-4191-8b8e-eb7711a716e0</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification </Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-13 16:52</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DevicePathLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">MemoryAllocationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiDevicePathLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">DevicePath</Protocol>
+ </Protocols>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDevicePathLib/build.xml b/MdePkg/Library/UefiDevicePathLib/build.xml new file mode 100644 index 0000000000..2234ca485f --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDevicePathLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDevicePathLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDevicePathLib">
+ <GenBuild baseName="UefiDevicePathLib" mbdFilename="${MODULE_DIR}\UefiDevicePathLib.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLib.msa"/>
+ </target>
+ <target depends="UefiDevicePathLib_clean" name="clean"/>
+ <target depends="UefiDevicePathLib_cleanall" name="cleanall"/>
+ <target name="UefiDevicePathLib_clean">
+ <OutputDirSetup baseName="UefiDevicePathLib" mbdFilename="${MODULE_DIR}\UefiDevicePathLib.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDevicePathLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDevicePathLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDevicePathLib_cleanall">
+ <OutputDirSetup baseName="UefiDevicePathLib" mbdFilename="${MODULE_DIR}\UefiDevicePathLib.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDevicePathLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDevicePathLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDevicePathLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLib.c b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLib.c new file mode 100644 index 0000000000..aea75aa496 --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLib.c @@ -0,0 +1,274 @@ +/** @file
+ UEFI Device Path Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDevicePathLib.c
+
+**/
+
+STATIC EFI_DEVICE_PATH_UTILITIES_PROTOCOL *mDevicePathUtilities = NULL;
+
+/**
+ The constructor function caches the pointer to DevicePathUtilites protocol.
+
+ The constructor function locates DevicePathUtilities protocol from protocol database.
+ It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+DevicePathLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (
+ &gEfiDevicePathUtilitiesProtocolGuid,
+ NULL,
+ (VOID**) &mDevicePathUtilities
+ );
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (mDevicePathUtilities != NULL);
+
+ return Status;
+}
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+UINTN
+EFIAPI
+GetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ return mDevicePathUtilities->GetDevicePathSize (DevicePath);
+}
+
+/**
+ This function allocates space for a new copy of the device path
+ specified by DevicePath.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The duplicated device path.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DuplicateDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ return mDevicePathUtilities->DuplicateDevicePath (DevicePath);
+}
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ return mDevicePathUtilities->AppendDevicePath (FirstDevicePath, SecondDevicePath);
+}
+
+/**
+ This function appends the device path node SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a single device path node.
+
+ @return A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathNode (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+{
+ return mDevicePathUtilities->AppendDeviceNode (FirstDevicePath, SecondDevicePath);
+}
+
+/**
+ This function appends the device path instance Instance to the device path Source.
+ If Source is NULL, then a new device path with one instance is created.
+
+ @param Source A pointer to a device path data structure.
+ @param Instance A pointer to a device path instance.
+
+ @return A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Source,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Instance
+ )
+{
+ return mDevicePathUtilities->AppendDevicePathInstance (Source, Instance);
+}
+
+/**
+ Function retrieves the next device path instance from a device path data structure.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @param Size A pointer to the size of a device path instance in bytes.
+
+ @return This function returns a pointer to the current device path instance.
+ In addition, it returns the size in bytes of the current device path instance in Size,
+ and a pointer to the next device path instance in DevicePath.
+ If there are no more device path instances in DevicePath, then DevicePath will be set to NULL.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+GetNextDevicePathInstance (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,
+ OUT UINTN *Size
+ )
+{
+ ASSERT (DevicePath != NULL);
+ ASSERT (Size != NULL);
+ return mDevicePathUtilities->GetNextDevicePathInstance (DevicePath, Size);
+}
+
+/**
+ Return TRUE is this is a multi instance device path.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @retval TRUE If DevicePath is multi-instance.
+ @retval FALSE If DevicePath is not multi-instance or DevicePath is NULL.
+
+**/
+BOOLEAN
+EFIAPI
+IsDevicePathMultiInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ return mDevicePathUtilities->IsDevicePathMultiInstance (DevicePath);
+}
+
+/**
+ This function retrieves the device path protocol from a handle.
+
+ @param Handle The handle from which to retrieve the device path protocol.
+
+ @return This function returns the device path protocol from the handle specified by Handle.
+ If Handle is NULL or Handle does not contain a device path protocol, then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DevicePathFromHandle (
+ IN EFI_HANDLE Handle
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol (
+ Handle,
+ &gEfiDevicePathProtocolGuid,
+ (VOID *) &DevicePath
+ );
+ if (EFI_ERROR (Status)) {
+ DevicePath = NULL;
+ }
+ return DevicePath;
+}
+
+/**
+ This function allocates a device path for a file and appends it to an existing device path.
+
+ @param Device A pointer to a device handle. This parameter is optional and may be NULL.
+ @param FileName A pointer to a Null-terminated Unicode string.
+
+ @return If Device is a valid device handle that contains a device path protocol,
+ then a device path for the file specified by FileName is allocated
+ and appended to the device path associated with the handle Device. The allocated device path is returned.
+ If Device is NULL or Device is a handle that does not support the device path protocol,
+ then a device path containing a single device path node for the file specified by FileName
+ is allocated and returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+FileDevicePath (
+ IN EFI_HANDLE Device, OPTIONAL
+ IN CONST CHAR16 *FileName
+ )
+{
+ UINTN Size;
+ FILEPATH_DEVICE_PATH *FilePath;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *FileDevicePathNode;
+
+ DevicePath = NULL;
+
+ Size = StrSize (FileName);
+ FileDevicePathNode = mDevicePathUtilities->CreateDeviceNode (
+ MEDIA_DEVICE_PATH,
+ MEDIA_FILEPATH_DP,
+ (UINT16) (Size + SIZE_OF_FILEPATH_DEVICE_PATH)
+ );
+ if (FileDevicePathNode != NULL) {
+ FilePath = (FILEPATH_DEVICE_PATH *) FileDevicePathNode;
+ CopyMem (&FilePath->PathName, FileName, Size);
+ if (Device != NULL) {
+ DevicePath = DevicePathFromHandle (Device);
+ }
+ DevicePath = AppendDevicePathNode (DevicePath, FileDevicePathNode);
+ FreePool (FileDevicePathNode);
+ }
+ return DevicePath;
+}
+
diff --git a/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.mbd b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.mbd new file mode 100644 index 0000000000..f975a6c8fb --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDevicePathLibDevicePathProtocol</BaseName>
+ <Guid>050EB8C6-C12E-4b86-892B-40985E8B3137</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-30 10:05</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.msa b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.msa new file mode 100644 index 0000000000..ac2106209d --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.msa @@ -0,0 +1,55 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDevicePathLibDevicePathProtocol</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>050EB8C6-C12E-4b86-892B-40985E8B3137</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00020000</Version>
+ <Abstract>Device Path Library</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-03-30 10:05</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">DevicePathLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">MemoryAllocationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiDevicePathLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">DevicePathUtilities</Protocol>
+ </Protocols>
+ <Externs>
+ <Extern>
+ <Constructor>DevicePathLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/build.xml b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/build.xml new file mode 100644 index 0000000000..c7d82d624a --- /dev/null +++ b/MdePkg/Library/UefiDevicePathLibDevicePathProtocol/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDevicePathLibDevicePathProtocol"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDevicePathLibDevicePathProtocol"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDevicePathLibDevicePathProtocol">
+ <GenBuild baseName="UefiDevicePathLibDevicePathProtocol" mbdFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.msa"/>
+ </target>
+ <target depends="UefiDevicePathLibDevicePathProtocol_clean" name="clean"/>
+ <target depends="UefiDevicePathLibDevicePathProtocol_cleanall" name="cleanall"/>
+ <target name="UefiDevicePathLibDevicePathProtocol_clean">
+ <OutputDirSetup baseName="UefiDevicePathLibDevicePathProtocol" mbdFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDevicePathLibDevicePathProtocol_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDevicePathLibDevicePathProtocol_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDevicePathLibDevicePathProtocol_cleanall">
+ <OutputDirSetup baseName="UefiDevicePathLibDevicePathProtocol" mbdFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.mbd" msaFilename="${MODULE_DIR}\UefiDevicePathLibDevicePathProtocol.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDevicePathLibDevicePathProtocol_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDevicePathLibDevicePathProtocol_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDevicePathLibDevicePathProtocol*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDriverEntryPoint/DriverEntryPoint.c b/MdePkg/Library/UefiDriverEntryPoint/DriverEntryPoint.c new file mode 100644 index 0000000000..60177bc9c5 --- /dev/null +++ b/MdePkg/Library/UefiDriverEntryPoint/DriverEntryPoint.c @@ -0,0 +1,137 @@ +/** @file
+ Entry point to a EFI/DXE driver.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Unload function that is registered in the LoadImage protocol. It un-installs
+ protocols produced and deallocates pool used by the driver. Called by the core
+ when unloading the driver.
+
+ @param ImageHandle
+
+ @retval EFI_SUCCESS
+
+**/
+EFI_STATUS
+EFIAPI
+_DriverUnloadHandler (
+ EFI_HANDLE ImageHandle
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // If an UnloadImage() handler is specified, then call it
+ //
+ Status = ProcessModuleUnloadList (ImageHandle);
+
+ //
+ // If the driver specific unload handler does not return an error, then call all of the
+ // library destructors. If the unload handler returned an error, then the driver can not be
+ // unloaded, and the library destructors should not be called
+ //
+ if (!EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, gST);
+ }
+
+ //
+ // Return the status from the driver specific unload handler
+ //
+ return Status;
+}
+
+/**
+ Enrty point to DXE Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+
+ if (_gUefiDriverRevision != 0) {
+ //
+ // Make sure that the EFI/UEFI spec revision of the platform is >= EFI/UEFI spec revision of the driver
+ //
+ if (SystemTable->Hdr.Revision < _gUefiDriverRevision) {
+ return EFI_INCOMPATIBLE_VERSION;
+ }
+ }
+
+ //
+ // Call constructor for all libraries
+ //
+ ProcessLibraryConstructorList (ImageHandle, SystemTable);
+
+ //
+ // Install unload handler...
+ //
+ if (_gDriverUnloadImageCount != 0) {
+ Status = gBS->HandleProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+ LoadedImage->Unload = _DriverUnloadHandler;
+ }
+
+ //
+ // Call the driver entry point
+ //
+ Status = ProcessModuleEntryPointList (ImageHandle, SystemTable);
+
+ //
+ // If all of the drivers returned errors, then invoke all of the library destructors
+ //
+ if (EFI_ERROR (Status)) {
+ ProcessLibraryDestructorList (ImageHandle, SystemTable);
+ }
+
+ //
+ // Return the cummalative return status code from all of the driver entry points
+ //
+ return Status;
+}
+
+
+/**
+ Enrty point wrapper of DXE Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return _ModuleEntryPoint (ImageHandle, SystemTable);
+}
diff --git a/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.mbd b/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.mbd new file mode 100644 index 0000000000..d41abe2f6b --- /dev/null +++ b/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDriverEntryPoint</BaseName>
+ <Guid>331deb15-454b-48d8-9b74-70d01f3f3556</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.msa b/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.msa new file mode 100644 index 0000000000..d4029e6c1b --- /dev/null +++ b/MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.msa @@ -0,0 +1,50 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDriverEntryPoint</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>331deb15-454b-48d8-9b74-70d01f3f3556</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiDriverEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiRuntimeServicesTableLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DriverEntryPoint.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">LoadedImage</Protocol>
+ </Protocols>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDriverEntryPoint/build.xml b/MdePkg/Library/UefiDriverEntryPoint/build.xml new file mode 100644 index 0000000000..8fae304134 --- /dev/null +++ b/MdePkg/Library/UefiDriverEntryPoint/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDriverEntryPoint"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDriverEntryPoint"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDriverEntryPoint">
+ <GenBuild baseName="UefiDriverEntryPoint" mbdFilename="${MODULE_DIR}\UefiDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\UefiDriverEntryPoint.msa"/>
+ </target>
+ <target depends="UefiDriverEntryPoint_clean" name="clean"/>
+ <target depends="UefiDriverEntryPoint_cleanall" name="cleanall"/>
+ <target name="UefiDriverEntryPoint_clean">
+ <OutputDirSetup baseName="UefiDriverEntryPoint" mbdFilename="${MODULE_DIR}\UefiDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\UefiDriverEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDriverEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDriverEntryPoint_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDriverEntryPoint_cleanall">
+ <OutputDirSetup baseName="UefiDriverEntryPoint" mbdFilename="${MODULE_DIR}\UefiDriverEntryPoint.mbd" msaFilename="${MODULE_DIR}\UefiDriverEntryPoint.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDriverEntryPoint_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDriverEntryPoint_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDriverEntryPoint*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.c b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.c new file mode 100644 index 0000000000..9b96f28fb1 --- /dev/null +++ b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.c @@ -0,0 +1,405 @@ +/** @file
+ EFI Driver Model Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EfiDriverModelLib.c
+
+**/
+
+
+
+/**
+**/
+EFI_STATUS
+UefiDriverModelLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_HANDLE DriverBindingHandle;
+ EFI_DRIVER_BINDING_PROTOCOL *DriverBinding;
+
+ //
+ // If no Driver Binding Protocols are advertised by the driver then simply return
+ //
+ if (_gDriverModelProtocolListEntries == 0) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Install the first Driver Bindng Protocol onto ImageHandle
+ //
+ DriverBindingHandle = ImageHandle;
+
+ //
+ // See if onle one Driver Binding Protocol is advertised by the driver
+ //
+ if (_gDriverModelProtocolListEntries == 1) {
+ //
+ // The Driver Binding Protocol must never be NULL
+ //
+ ASSERT(_gDriverModelProtocolList[0].DriverBinding != NULL);
+
+ //
+ // Check for all 8 possible combinations of the ComponentName, DriverConfiguration, and DriverDiagnostics Protocol
+ // These are all checks against const pointers, so the optimizing compiler will only select one of the
+ // calls to InstallMultipleProtocolInterfaces()
+ //
+ if (_gDriverModelProtocolList[0].DriverDiagnostics == NULL) {
+ if (_gDriverModelProtocolList[0].DriverConfiguration == NULL) {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ NULL
+ );
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].DriverConfiguration == NULL) {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ }
+
+ //
+ // ASSERT if the call to InstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding = (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding;
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ } else {
+ for (Index = 0; Index < _gDriverModelProtocolListEntries; Index++) {
+ //
+ // The Driver Binding Protocol must never be NULL
+ //
+ ASSERT(_gDriverModelProtocolList[Index].DriverBinding != NULL);
+
+ //
+ // Install the Driver Binding Protocol and ASSERT() if the installation fails
+ //
+ Status = gBS->InstallProtocolInterface (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[Index].DriverBinding
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Update the ImageHandle and DriverBindingHandle fields of the Driver Binding Protocol
+ //
+ DriverBinding = (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[Index].DriverBinding;
+ DriverBinding->ImageHandle = ImageHandle;
+ DriverBinding->DriverBindingHandle = DriverBindingHandle;
+
+ //
+ // If Component Name Protocol is specified then install it and ASSERT() if the installation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_COMPONENT_NAME_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].ComponentName != NULL) {
+ Status = gBS->InstallProtocolInterface (
+ &DriverBindingHandle,
+ &gEfiComponentNameProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[Index].ComponentName
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+
+ //
+ // If Driver Configuration Protocol is specified then install it and ASSERT() if the installation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_DRIVER_CONFIGURATION_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].DriverConfiguration != NULL) {
+ Status = gBS->InstallProtocolInterface (
+ &DriverBindingHandle,
+ &gEfiDriverConfigurationProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[Index].DriverConfiguration
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+
+ //
+ // If Driver Diagnostics Protocol is specified then install it and ASSERT() if the installation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_DRIVER_DIAGNOSTICS_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].DriverDiagnostics != NULL) {
+ Status = gBS->InstallProtocolInterface (
+ &DriverBindingHandle,
+ &gEfiDriverDiagnosticsProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[Index].DriverDiagnostics
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+
+ //
+ // Install subsequent Driver Bindng Protocols onto new handles
+ //
+ DriverBindingHandle = NULL;
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+**/
+EFI_STATUS
+UefiDriverModelLibDestructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ EFI_HANDLE DriverBindingHandle;
+
+ //
+ // If no Driver Binding Protocols are advertised by the driver then simply return
+ //
+ if (_gDriverModelProtocolListEntries == 0) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // See if onle one Driver Binding Protocol is advertised by the driver
+ //
+ if (_gDriverModelProtocolListEntries == 1) {
+ //
+ // The Driver Binding Protocol must never be NULL
+ //
+ ASSERT(_gDriverModelProtocolList[0].DriverBinding != NULL);
+
+ //
+ // Retrieve the DriverBindingHandle from the Driver Binding Protocol
+ //
+ DriverBindingHandle = _gDriverModelProtocolList[0].DriverBinding->DriverBindingHandle;
+
+ //
+ // Check for all 8 possible combinations of the ComponentName, DriverConfiguration, and DriverDiagnostics Protocol
+ // These are all checks against const pointers, so the optimizing compiler will only select one of the
+ // calls to InstallMultipleProtocolInterfaces()
+ //
+ if (_gDriverModelProtocolList[0].DriverDiagnostics == NULL) {
+ if (_gDriverModelProtocolList[0].DriverConfiguration == NULL) {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ NULL
+ );
+ } else {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ NULL
+ );
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ NULL
+ );
+ } else {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ NULL
+ );
+ }
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].DriverConfiguration == NULL) {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ }
+ } else {
+ if (_gDriverModelProtocolList[0].ComponentName == NULL) {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ } else {
+ Status = gBS->UninstallMultipleProtocolInterfaces (
+ &DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid, (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[0].DriverBinding,
+ &gEfiComponentNameProtocolGuid, (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[0].ComponentName,
+ &gEfiDriverConfigurationProtocolGuid, (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[0].DriverConfiguration,
+ &gEfiDriverDiagnosticsProtocolGuid, (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[0].DriverDiagnostics,
+ NULL
+ );
+ }
+ }
+ }
+
+ //
+ // ASSERT if the call to UninstallMultipleProtocolInterfaces() failed
+ //
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ for (Index = 0; Index < _gDriverModelProtocolListEntries; Index++) {
+ //
+ // The Driver Binding Protocol must never be NULL
+ //
+ ASSERT(_gDriverModelProtocolList[Index].DriverBinding != NULL);
+
+ //
+ // Retrieve the DriverBindingHandle from the Driver Binding Protocol
+ //
+ DriverBindingHandle = _gDriverModelProtocolList[0].DriverBinding->DriverBindingHandle;
+
+ //
+ // Uninstall the Driver Binding Protocol and ASSERT() if the installation fails
+ //
+ Status = gBS->UninstallProtocolInterface (
+ DriverBindingHandle,
+ &gEfiDriverBindingProtocolGuid,
+ (EFI_DRIVER_BINDING_PROTOCOL *)_gDriverModelProtocolList[Index].DriverBinding
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // If Component Name Protocol is specified then uninstall it and ASSERT() if the uninstallation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_COMPONENT_NAME_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].ComponentName != NULL) {
+ Status = gBS->UninstallProtocolInterface (
+ DriverBindingHandle,
+ &gEfiComponentNameProtocolGuid,
+ (EFI_COMPONENT_NAME_PROTOCOL *)_gDriverModelProtocolList[Index].ComponentName
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+
+ //
+ // If Driver Configuration Protocol is specified then uninstall it and ASSERT() if the uninstallation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_DRIVER_CONFIGURATION_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].DriverConfiguration != NULL) {
+ Status = gBS->UninstallProtocolInterface (
+ DriverBindingHandle,
+ &gEfiDriverConfigurationProtocolGuid,
+ (EFI_DRIVER_CONFIGURATION_PROTOCOL *)_gDriverModelProtocolList[Index].DriverConfiguration
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+
+ //
+ // If Driver Diagnostics Protocol is specified then uninstall it and ASSERT() if the uninstallation fails
+ //
+ if ((_gDriverModelProtocolBitmask & UEFI_DRIVER_MODEL_LIBRARY_DRIVER_DIAGNOSTICS_PROTOCOL_ENABLED) != 0) {
+ if (_gDriverModelProtocolList[Index].DriverDiagnostics != NULL) {
+ Status = gBS->UninstallProtocolInterface (
+ DriverBindingHandle,
+ &gEfiDriverDiagnosticsProtocolGuid,
+ (EFI_DRIVER_DIAGNOSTICS_PROTOCOL *)_gDriverModelProtocolList[Index].DriverDiagnostics
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+ }
+ }
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.mbd b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.mbd new file mode 100644 index 0000000000..6de82c157c --- /dev/null +++ b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiDriverModelLib</BaseName>
+ <Guid>52af22ae-9901-4484-8cdc-622dd5838b09</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.msa b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.msa new file mode 100644 index 0000000000..935c4cca40 --- /dev/null +++ b/MdePkg/Library/UefiDriverModelLib/UefiDriverModelLib.msa @@ -0,0 +1,57 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiDriverModelLib</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>52af22ae-9901-4484-8cdc-622dd5838b09</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiDriverModelLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiDriverModelLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="ALWAYS_CONSUMED">DriverBinding</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">ComponentName</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">DriverConfiguration</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">DriverDiagnostics</Protocol>
+ </Protocols>
+ <Externs>
+ <Extern>
+ <Constructor>UefiDriverModelLibConstructor</Constructor>
+ <Destructor>UefiDriverModelLibDestructor</Destructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiDriverModelLib/build.xml b/MdePkg/Library/UefiDriverModelLib/build.xml new file mode 100644 index 0000000000..cb6b40c1a1 --- /dev/null +++ b/MdePkg/Library/UefiDriverModelLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiDriverModelLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiDriverModelLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiDriverModelLib">
+ <GenBuild baseName="UefiDriverModelLib" mbdFilename="${MODULE_DIR}\UefiDriverModelLib.mbd" msaFilename="${MODULE_DIR}\UefiDriverModelLib.msa"/>
+ </target>
+ <target depends="UefiDriverModelLib_clean" name="clean"/>
+ <target depends="UefiDriverModelLib_cleanall" name="cleanall"/>
+ <target name="UefiDriverModelLib_clean">
+ <OutputDirSetup baseName="UefiDriverModelLib" mbdFilename="${MODULE_DIR}\UefiDriverModelLib.mbd" msaFilename="${MODULE_DIR}\UefiDriverModelLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDriverModelLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDriverModelLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiDriverModelLib_cleanall">
+ <OutputDirSetup baseName="UefiDriverModelLib" mbdFilename="${MODULE_DIR}\UefiDriverModelLib.mbd" msaFilename="${MODULE_DIR}\UefiDriverModelLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiDriverModelLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiDriverModelLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiDriverModelLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiLib/Console.c b/MdePkg/Library/UefiLib/Console.c new file mode 100644 index 0000000000..d06b0a932d --- /dev/null +++ b/MdePkg/Library/UefiLib/Console.c @@ -0,0 +1,278 @@ +/** @file
+ Mde UEFI library functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Console.c
+
+**/
+
+
+
+typedef struct {
+ CHAR16 WChar;
+ UINT32 Width;
+} UNICODE_WIDTH_ENTRY;
+
+UNICODE_WIDTH_ENTRY mUnicodeWidthTable[] = {
+ //
+ // General script area
+ //
+ {(CHAR16)0x1FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x007F, 1}, // C0 controls and basic Latin. 0x0000-0x007F
+ {(CHAR16)0x00FF, 1}, // C1 controls and Latin-1 support. 0x0080-0x00FF
+ {(CHAR16)0x017F, 1}, // Latin extended-A. 0x0100-0x017F
+ {(CHAR16)0x024F, 1}, // Latin extended-B. 0x0180-0x024F
+ {(CHAR16)0x02AF, 1}, // IPA extensions. 0x0250-0x02AF
+ {(CHAR16)0x02FF, 1}, // Spacing modifier letters. 0x02B0-0x02FF
+ {(CHAR16)0x036F, 1}, // Combining diacritical marks. 0x0300-0x036F
+ {(CHAR16)0x03FF, 1}, // Greek. 0x0370-0x03FF
+ {(CHAR16)0x04FF, 1}, // Cyrillic. 0x0400-0x04FF
+ {(CHAR16)0x052F, 0}, // Unassigned. As Armenian in ver3.0. 0x0500-0x052F
+ {(CHAR16)0x058F, 1}, // Armenian. 0x0530-0x058F
+ {(CHAR16)0x05FF, 1}, // Hebrew. 0x0590-0x05FF
+ {(CHAR16)0x06FF, 1}, // Arabic. 0x0600-0x06FF
+ {(CHAR16)0x08FF, 0}, // Unassigned. 0x0700-0x08FF
+ {(CHAR16)0x097F, 1}, // Devanagari. 0x0900-0x097F
+ {(CHAR16)0x09FF, 1}, // Bengali. 0x0980-0x09FF
+ {(CHAR16)0x0A7F, 1}, // Gurmukhi. 0x0A00-0x0A7F
+ {(CHAR16)0x0AFF, 1}, // Gujarati. 0x0A80-0x0AFF
+ {(CHAR16)0x0B7F, 1}, // Oriya. 0x0B00-0x0B7F
+ {(CHAR16)0x0BFF, 1}, // Tamil. (See page 7-92). 0x0B80-0x0BFF
+ {(CHAR16)0x0C7F, 1}, // Telugu. 0x0C00-0x0C7F
+ {(CHAR16)0x0CFF, 1}, // Kannada. (See page 7-100). 0x0C80-0x0CFF
+ {(CHAR16)0x0D7F, 1}, // Malayalam (See page 7-104). 0x0D00-0x0D7F
+ {(CHAR16)0x0DFF, 0}, // Unassigned. 0x0D80-0x0DFF
+ {(CHAR16)0x0E7F, 1}, // Thai. 0x0E00-0x0E7F
+ {(CHAR16)0x0EFF, 1}, // Lao. 0x0E80-0x0EFF
+ {(CHAR16)0x0FBF, 1}, // Tibetan. 0x0F00-0x0FBF
+ {(CHAR16)0x109F, 0}, // Unassigned. 0x0FC0-0x109F
+ {(CHAR16)0x10FF, 1}, // Georgian. 0x10A0-0x10FF
+ {(CHAR16)0x11FF, 1}, // Hangul Jamo. 0x1100-0x11FF
+ {(CHAR16)0x1DFF, 0}, // Unassigned. 0x1200-0x1DFF
+ {(CHAR16)0x1EFF, 1}, // Latin extended additional. 0x1E00-0x1EFF
+ {(CHAR16)0x1FFF, 1}, // Greek extended. 0x1F00-0x1FFF
+ *
+ */
+
+ //
+ // Symbol area
+ //
+ {(CHAR16)0x2FFF, 1},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all narrow glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x206F, 1}, // General punctuation. (See page7-154). 0x200-0x206F
+ {(CHAR16)0x209F, 1}, // Superscripts and subscripts. 0x2070-0x209F
+ {(CHAR16)0x20CF, 1}, // Currency symbols. 0x20A0-0x20CF
+ {(CHAR16)0x20FF, 1}, // Combining diacritical marks for symbols. 0x20D0-0x20FF
+ {(CHAR16)0x214F, 1}, // Letterlike sympbols. 0x2100-0x214F
+ {(CHAR16)0x218F, 1}, // Number forms. 0x2150-0x218F
+ {(CHAR16)0x21FF, 1}, // Arrows. 0x2190-0x21FF
+ {(CHAR16)0x22FF, 1}, // Mathematical operators. 0x2200-0x22FF
+ {(CHAR16)0x23FF, 1}, // Miscellaneous technical. 0x2300-0x23FF
+ {(CHAR16)0x243F, 1}, // Control pictures. 0x2400-0x243F
+ {(CHAR16)0x245F, 1}, // Optical character recognition. 0x2440-0x245F
+ {(CHAR16)0x24FF, 1}, // Enclosed alphanumerics. 0x2460-0x24FF
+ {(CHAR16)0x257F, 1}, // Box drawing. 0x2500-0x257F
+ {(CHAR16)0x259F, 1}, // Block elements. 0x2580-0x259F
+ {(CHAR16)0x25FF, 1}, // Geometric shapes. 0x25A0-0x25FF
+ {(CHAR16)0x26FF, 1}, // Miscellaneous symbols. 0x2600-0x26FF
+ {(CHAR16)0x27BF, 1}, // Dingbats. 0x2700-0x27BF
+ {(CHAR16)0x2FFF, 0}, // Reserved. 0x27C0-0x2FFF
+ *
+ */
+
+ //
+ // CJK phonetics and symbol area
+ //
+ {(CHAR16)0x33FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x303F, 2}, // CJK symbols and punctuation. 0x3000-0x303F
+ {(CHAR16)0x309F, 2}, // Hiragana. 0x3040-0x309F
+ {(CHAR16)0x30FF, 2}, // Katakana. 0x30A0-0x30FF
+ {(CHAR16)0x312F, 2}, // Bopomofo. 0x3100-0x312F
+ {(CHAR16)0x318F, 2}, // Hangul compatibility jamo. 0x3130-0x318F
+ {(CHAR16)0x319F, 2}, // Kanbun. 0x3190-0x319F
+ {(CHAR16)0x31FF, 0}, // Reserved. As Bopomofo extended in ver3.0. 0x31A0-0x31FF
+ {(CHAR16)0x32FF, 2}, // Enclosed CJK letters and months. 0x3200-0x32FF
+ {(CHAR16)0x33FF, 2}, // CJK compatibility. 0x3300-0x33FF
+ *
+ */
+
+ //
+ // CJK ideograph area
+ //
+ {(CHAR16)0x9FFF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0x4DFF, 0}, // Reserved. 0x3400-0x4DBF as CJK unified ideographs
+ // extension A in ver3.0. 0x3400-0x4DFF
+ {(CHAR16)0x9FFF, 2}, // CJK unified ideographs. 0x4E00-0x9FFF
+ *
+ */
+
+ //
+ // Reserved
+ //
+ {(CHAR16)0xABFF, 0}, // Reserved. 0xA000-0xA490 as Yi syllables. 0xA490-0xA4D0
+ // as Yi radicals in ver3.0. 0xA000-0xABFF
+ //
+ // Hangul syllables
+ //
+ {(CHAR16)0xD7FF, 2},
+ /*
+ * Merge the blocks and replace them with the above entry as they fall to
+ * the same category and they are all wide glyph. This will reduce search
+ * time and table size. The merge will omit the reserved code.
+ *
+ * Remove the above item if below is un-commented.
+ *
+ {(CHAR16)0xD7A3, 2}, // Hangul syllables. 0xAC00-0xD7A3
+ {(CHAR16)0xD7FF, 0}, // Reserved. 0xD7A3-0xD7FF
+ *
+ */
+
+ //
+ // Surrogates area
+ //
+ {(CHAR16)0xDFFF, 0}, // Surrogates, not used now. 0xD800-0xDFFF
+
+ //
+ // Private use area
+ //
+ {(CHAR16)0xF8FF, 0}, // Private use area. 0xE000-0xF8FF
+
+ //
+ // Compatibility area and specials
+ //
+ {(CHAR16)0xFAFF, 2}, // CJK compatibility ideographs. 0xF900-0xFAFF
+ {(CHAR16)0xFB4F, 1}, // Alphabetic presentation forms. 0xFB00-0xFB4F
+ {(CHAR16)0xFDFF, 1}, // Arabic presentation forms-A. 0xFB50-0xFDFF
+ {(CHAR16)0xFE1F, 0}, // Reserved. As variation selectors in ver3.0. 0xFE00-0xFE1F
+ {(CHAR16)0xFE2F, 1}, // Combining half marks. 0xFE20-0xFE2F
+ {(CHAR16)0xFE4F, 2}, // CJK compatibility forms. 0xFE30-0xFE4F
+ {(CHAR16)0xFE6F, 1}, // Small Form Variants. 0xFE50-0xFE6F
+ {(CHAR16)0xFEFF, 1}, // Arabic presentation forms-B. 0xFE70-0xFEFF
+ {(CHAR16)0xFFEF, 1}, // Half width and full width forms. 0xFF00-0xFFEF
+ {(CHAR16)0xFFFF, 0}, // Speicials. 0xFFF0-0xFFFF
+};
+
+/**
+ This function computes and returns the width of the Unicode character
+ specified by UnicodeChar.
+
+ @param UnicodeChar A Unicode character.
+
+ @retval 0 The width if UnicodeChar could not be determined.
+ @retval 1 UnicodeChar is a narrow glyph.
+ @retval 2 UnicodeChar is a wide glyph.
+
+**/
+UINTN
+EFIAPI
+GetGlyphWidth (
+ IN CHAR16 UnicodeChar
+ )
+{
+ UINTN Index;
+ UINTN Low;
+ UINTN High;
+ UNICODE_WIDTH_ENTRY *Item;
+
+ Item = NULL;
+ Low = 0;
+ High = (sizeof (mUnicodeWidthTable)) / (sizeof (UNICODE_WIDTH_ENTRY)) - 1;
+ while (Low <= High) {
+ Index = (Low + High) >> 1;
+ Item = &(mUnicodeWidthTable[Index]);
+ if (Index == 0) {
+ if (UnicodeChar <= Item->WChar) {
+ break;
+ }
+
+ return 0;
+ }
+
+ if (UnicodeChar > Item->WChar) {
+ Low = Index + 1;
+ } else if (UnicodeChar <= mUnicodeWidthTable[Index - 1].WChar) {
+ High = Index - 1;
+ } else {
+ //
+ // Index - 1 < UnicodeChar <= Index. Found
+ //
+ break;
+ }
+ }
+
+ if (Low <= High) {
+ return Item->Width;
+ }
+
+ return 0;
+}
+
+/**
+ This function computes and returns the display length of
+ the Null-terminated Unicode string specified by String.
+ If String is NULL, then 0 is returned.
+ If any of the widths of the Unicode characters in String
+ can not be determined, then 0 is returned.
+
+ @param String A pointer to a Null-terminated Unicode string.
+
+ @return The display length of the Null-terminated Unicode string specified by String.
+
+**/
+UINTN
+EFIAPI
+UnicodeStringDisplayLength (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+ UINTN Width;
+
+ Length = 0;
+ while (*String != 0) {
+ Width = GetGlyphWidth (*String);
+ if (Width == 0) {
+ return 0;
+ }
+
+ Length += Width;
+ String++;
+ }
+
+ return Length;
+}
diff --git a/MdePkg/Library/UefiLib/UefiLib.c b/MdePkg/Library/UefiLib/UefiLib.c new file mode 100644 index 0000000000..5280d659ac --- /dev/null +++ b/MdePkg/Library/UefiLib/UefiLib.c @@ -0,0 +1,650 @@ +/** @file
+ Mde UEFI library functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiLib.c
+
+**/
+
+/**
+ Compare whether two names of languages are identical.
+
+ @param Language1 Name of language 1.
+ @param Language2 Name of language 2.
+
+ @retval TRUE Language 1 and language 2 are the same.
+ @retval FALSE Language 1 and language 2 are not the same.
+
+**/
+BOOLEAN
+CompareIso639LanguageCode (
+ IN CONST CHAR8 *Language1,
+ IN CONST CHAR8 *Language2
+ )
+{
+ return (BOOLEAN) (ReadUnaligned24 ((CONST UINT32 *) Language1) == ReadUnaligned24 ((CONST UINT32 *) Language2));
+}
+
+/**
+ This function searches the list of configuration tables stored in the EFI System
+ Table for a table with a GUID that matches TableGuid. If a match is found,
+ then a pointer to the configuration table is returned in Table, and EFI_SUCCESS
+ is returned. If a matching GUID is not found, then EFI_NOT_FOUND is returned.
+
+ @param TableGuid Pointer to table's GUID type..
+ @param Table Pointer to the table associated with TableGuid in the EFI System Table.
+
+ @retval EFI_SUCCESS A configuration table matching TableGuid was found.
+ @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetSystemConfigurationTable (
+ IN EFI_GUID *TableGuid,
+ OUT VOID **Table
+ )
+{
+ EFI_SYSTEM_TABLE *SystemTable;
+ UINTN Index;
+
+ ASSERT (TableGuid != NULL);
+ ASSERT (Table != NULL);
+
+ SystemTable = gST;
+ *Table = NULL;
+ for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {
+ if (CompareGuid (TableGuid, &(SystemTable->ConfigurationTable[Index].VendorGuid))) {
+ *Table = SystemTable->ConfigurationTable[Index].VendorTable;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ This function causes the notification function to be executed for every protocol
+ of type ProtocolGuid instance that exists in the system when this function is
+ invoked. In addition, every time a protocol of type ProtocolGuid instance is
+ installed or reinstalled, the notification function is also executed.
+
+ @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @return The notification event that was created.
+
+**/
+EFI_EVENT
+EFIAPI
+EfiCreateProtocolNotifyEvent(
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+
+ //
+ // Create the event
+ //
+
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Register for protocol notifactions on this event
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ ProtocolGuid,
+ Event,
+ Registration
+ );
+
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Kick the event so we will perform an initial pass of
+ // current installed drivers
+ //
+
+ gBS->SignalEvent (Event);
+ return Event;
+}
+
+/**
+ This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext.
+ This event is signaled with EfiNamedEventSignal(). This provide the ability for
+ one or more listeners on the same event named by the GUID specified by Name.
+
+ @param Name Supplies GUID name of the event.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @retval EFI_SUCCESS A named event was created.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventListen (
+ IN CONST EFI_GUID *Name,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN CONST VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+ VOID *RegistrationLocal;
+
+ //
+ // Create event
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_NOTIFY_SIGNAL,
+ NotifyTpl,
+ NotifyFunction,
+ (VOID *) NotifyContext,
+ &Event
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // The Registration is not optional to RegisterProtocolNotify().
+ // To make it optional to EfiNamedEventListen(), may need to substitute with a local.
+ //
+ if (Registration != NULL) {
+ RegistrationLocal = Registration;
+ } else {
+ RegistrationLocal = &RegistrationLocal;
+ }
+
+ //
+ // Register for an installation of protocol interface
+ //
+
+ Status = gBS->RegisterProtocolNotify (
+ (EFI_GUID *) Name,
+ Event,
+ RegistrationLocal
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function signals the named event specified by Name. The named event must
+ have been created with EfiNamedEventListen().
+
+ @param Name Supplies GUID name of the event.
+
+ @retval EFI_SUCCESS A named event was signaled.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventSignal (
+ IN CONST EFI_GUID *Name
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ (EFI_GUID *) Name,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->UninstallProtocolInterface (
+ Handle,
+ (EFI_GUID *) Name,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ This function initializes a basic mutual exclusion lock to the released state
+ and returns the lock. Each lock provides mutual exclusion access at its task
+ priority level. Since there is no preemption or multiprocessor support in EFI,
+ acquiring the lock only consists of raising to the locks TPL.
+
+ @param Lock A pointer to the lock data structure to initialize.
+ @param Priority EFI TPL associated with the lock.
+
+ @return The lock.
+
+**/
+EFI_LOCK *
+EFIAPI
+EfiInitializeLock (
+ IN OUT EFI_LOCK *Lock,
+ IN EFI_TPL Priority
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Priority <= EFI_TPL_HIGH_LEVEL);
+
+ Lock->Tpl = Priority;
+ Lock->OwnerTpl = EFI_TPL_APPLICATION;
+ Lock->Lock = EfiLockReleased ;
+ return Lock;
+}
+
+/**
+ This function raises the system¡¯s current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it places the lock in the
+ acquired state.
+
+ @param Priority The task priority level of the lock.
+
+**/
+VOID
+EFIAPI
+EfiAcquireLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockReleased);
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+ Lock->Lock = EfiLockAcquired;
+}
+
+/**
+ This function raises the system¡¯s current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it attempts to place the
+ lock in the acquired state.
+
+ @param Lock A pointer to the lock to acquire.
+
+ @retval EFI_SUCCESS The lock was acquired.
+ @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiAcquireLockOrFail (
+ IN EFI_LOCK *Lock
+ )
+{
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock != EfiLockUninitialized);
+
+ if (Lock->Lock == EfiLockAcquired) {
+ //
+ // Lock is already owned, so bail out
+ //
+ return EFI_ACCESS_DENIED;
+ }
+
+ Lock->OwnerTpl = gBS->RaiseTPL (Lock->Tpl);
+
+ Lock->Lock = EfiLockAcquired;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function transitions a mutual exclusion lock from the acquired state to
+ the released state, and restores the system¡¯s task priority level to its
+ previous level.
+
+ @param Lock A pointer to the lock to release.
+
+**/
+VOID
+EFIAPI
+EfiReleaseLock (
+ IN EFI_LOCK *Lock
+ )
+{
+ EFI_TPL Tpl;
+
+ ASSERT (Lock != NULL);
+ ASSERT (Lock->Lock == EfiLockAcquired);
+
+ Tpl = Lock->OwnerTpl;
+
+ Lock->Lock = EfiLockReleased;
+
+ gBS->RestoreTPL (Tpl);
+}
+
+/**
+ This function looks up a Unicode string in UnicodeStringTable. If Language is
+ a member of SupportedLanguages and a Unicode string is found in UnicodeStringTable
+ that matches the language code specified by Language, then it is returned in
+ UnicodeString.
+
+ @param Language A pointer to the ISO 639-2 language code for the
+ Unicode string to look up and return.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports. Language
+ must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string from UnicodeStringTable
+ that matches the language specified by Language.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found
+ in the table of Unicoide strings UnicodeStringTable,
+ and it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+ @retval EFI_UNSUPPORTED The language specified by Language is not
+ supported by UnicodeStringTable.
+
+**/
+EFI_STATUS
+EFIAPI
+LookupUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,
+ OUT CHAR16 **UnicodeString
+ )
+{
+ //
+ // Make sure the parameters are valid
+ //
+ if (Language == NULL || UnicodeString == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, or the Unicode String Table is empty, then the
+ // Unicode String specified by Language is not supported by this Unicode String Table
+ //
+ if (SupportedLanguages == NULL || UnicodeStringTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Make sure Language is in the set of Supported Languages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Search the Unicode String Table for the matching Language specifier
+ //
+ while (UnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, UnicodeStringTable->Language)) {
+
+ //
+ // A matching string was found, so return it
+ //
+ *UnicodeString = UnicodeStringTable->UnicodeString;
+ return EFI_SUCCESS;
+ }
+
+ UnicodeStringTable++;
+ }
+
+ return EFI_UNSUPPORTED;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ This function adds a Unicode string to UnicodeStringTable.
+ If Language is a member of SupportedLanguages then UnicodeString is added to
+ UnicodeStringTable. New buffers are allocated for both Language and
+ UnicodeString. The contents of Language and UnicodeString are copied into
+ these new buffers. These buffers are automatically freed when
+ FreeUnicodeStringTable() is called.
+
+ @param Language A pointer to the ISO 639-2 language code for the Unicode
+ string to add.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports.
+ Language must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string to add.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found in the table of
+ Unicode strings UnicodeStringTable, and it was
+ returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is
+ already present in UnicodeStringTable.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another
+ Unicode string to UnicodeStringTable.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+
+**/
+EFI_STATUS
+EFIAPI
+AddUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,
+ IN CONST CHAR16 *UnicodeString
+ )
+{
+ UINTN NumberOfEntries;
+ EFI_UNICODE_STRING_TABLE *OldUnicodeStringTable;
+ EFI_UNICODE_STRING_TABLE *NewUnicodeStringTable;
+ UINTN UnicodeStringLength;
+
+ //
+ // Make sure the parameter are valid
+ //
+ if (Language == NULL || UnicodeString == NULL || UnicodeStringTable == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // If there are no supported languages, then a Unicode String can not be added
+ //
+ if (SupportedLanguages == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // If the Unicode String is empty, then a Unicode String can not be added
+ //
+ if (UnicodeString[0] == 0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Make sure Language is a member of SupportedLanguages
+ //
+ while (*SupportedLanguages != 0) {
+ if (CompareIso639LanguageCode (Language, SupportedLanguages)) {
+
+ //
+ // Determine the size of the Unicode String Table by looking for a NULL Language entry
+ //
+ NumberOfEntries = 0;
+ if (*UnicodeStringTable != NULL) {
+ OldUnicodeStringTable = *UnicodeStringTable;
+ while (OldUnicodeStringTable->Language != NULL) {
+ if (CompareIso639LanguageCode (Language, OldUnicodeStringTable->Language)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ OldUnicodeStringTable++;
+ NumberOfEntries++;
+ }
+ }
+
+ //
+ // Allocate space for a new Unicode String Table. It must hold the current number of
+ // entries, plus 1 entry for the new Unicode String, plus 1 entry for the end of table
+ // marker
+ //
+ NewUnicodeStringTable = AllocatePool ((NumberOfEntries + 2) * sizeof (EFI_UNICODE_STRING_TABLE));
+ if (NewUnicodeStringTable == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // If the current Unicode String Table contains any entries, then copy them to the
+ // newly allocated Unicode String Table.
+ //
+ if (*UnicodeStringTable != NULL) {
+ CopyMem (
+ NewUnicodeStringTable,
+ *UnicodeStringTable,
+ NumberOfEntries * sizeof (EFI_UNICODE_STRING_TABLE)
+ );
+ }
+
+ //
+ // Allocate space for a copy of the Language specifier
+ //
+ NewUnicodeStringTable[NumberOfEntries].Language = AllocateCopyPool (3, Language);
+ if (NewUnicodeStringTable[NumberOfEntries].Language == NULL) {
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Compute the length of the Unicode String
+ //
+ for (UnicodeStringLength = 0; UnicodeString[UnicodeStringLength] != 0; UnicodeStringLength++)
+ ;
+
+ //
+ // Allocate space for a copy of the Unicode String
+ //
+ NewUnicodeStringTable[NumberOfEntries].UnicodeString = AllocateCopyPool (
+ (UnicodeStringLength + 1) * sizeof (CHAR16),
+ UnicodeString
+ );
+ if (NewUnicodeStringTable[NumberOfEntries].UnicodeString == NULL) {
+ gBS->FreePool (NewUnicodeStringTable[NumberOfEntries].Language);
+ gBS->FreePool (NewUnicodeStringTable);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ //
+ // Mark the end of the Unicode String Table
+ //
+ NewUnicodeStringTable[NumberOfEntries + 1].Language = NULL;
+ NewUnicodeStringTable[NumberOfEntries + 1].UnicodeString = NULL;
+
+ //
+ // Free the old Unicode String Table
+ //
+ if (*UnicodeStringTable != NULL) {
+ gBS->FreePool (*UnicodeStringTable);
+ }
+
+ //
+ // Point UnicodeStringTable at the newly allocated Unicode String Table
+ //
+ *UnicodeStringTable = NewUnicodeStringTable;
+
+ return EFI_SUCCESS;
+ }
+
+ SupportedLanguages += 3;
+ }
+
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ This function frees the table of Unicode strings in UnicodeStringTable.
+ If UnicodeStringTable is NULL, then EFI_SUCCESS is returned.
+ Otherwise, each language code, and each Unicode string in the Unicode string
+ table are freed, and EFI_SUCCESS is returned.
+
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+
+ @retval EFI_SUCCESS The Unicode string table was freed.
+
+**/
+EFI_STATUS
+EFIAPI
+FreeUnicodeStringTable (
+ IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable
+ )
+{
+ UINTN Index;
+
+ //
+ // If the Unicode String Table is NULL, then it is already freed
+ //
+ if (UnicodeStringTable == NULL) {
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Loop through the Unicode String Table until we reach the end of table marker
+ //
+ for (Index = 0; UnicodeStringTable[Index].Language != NULL; Index++) {
+
+ //
+ // Free the Language string from the Unicode String Table
+ //
+ gBS->FreePool (UnicodeStringTable[Index].Language);
+
+ //
+ // Free the Unicode String from the Unicode String Table
+ //
+ if (UnicodeStringTable[Index].UnicodeString != NULL) {
+ gBS->FreePool (UnicodeStringTable[Index].UnicodeString);
+ }
+ }
+
+ //
+ // Free the Unicode String Table itself
+ //
+ gBS->FreePool (UnicodeStringTable);
+
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/UefiLib/UefiLib.mbd b/MdePkg/Library/UefiLib/UefiLib.mbd new file mode 100644 index 0000000000..252e3b1e83 --- /dev/null +++ b/MdePkg/Library/UefiLib/UefiLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiLib</BaseName>
+ <Guid>3a004ba5-efe0-4a61-9f1a-267a46ae5ba9</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-09 23:12</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiLib/UefiLib.msa b/MdePkg/Library/UefiLib/UefiLib.msa new file mode 100644 index 0000000000..6b3ea17ef5 --- /dev/null +++ b/MdePkg/Library/UefiLib/UefiLib.msa @@ -0,0 +1,61 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiLib</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>3a004ba5-efe0-4a61-9f1a-267a46ae5ba9</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for the entry point to a EFIDXE Drivers</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-09 23:12</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">MemoryAllocationLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiLib.c</Filename>
+ <Filename>Console.c</Filename>
+ <Filename>UefiNotTiano.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Guids>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>EventLegacyBoot</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>EventReadyToBoot</C_Name>
+ </GuidEntry>
+ <GuidEntry Usage="ALWAYS_CONSUMED">
+ <C_Name>FrameworkDevicePath</C_Name>
+ </GuidEntry>
+ </Guids>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiLib/UefiNotTiano.c b/MdePkg/Library/UefiLib/UefiNotTiano.c new file mode 100644 index 0000000000..2ac12f1b3a --- /dev/null +++ b/MdePkg/Library/UefiLib/UefiNotTiano.c @@ -0,0 +1,285 @@ +/** @file
+ Library functions that abstract areas of conflict between Tiano an UEFI 2.0.
+
+ Help Port Framework/Tinao code that has conflicts with UEFI 2.0 by hiding the
+ oldconflicts with library functions and supporting implementations of the old
+ (R8.5/EFI 1.10) and new (R9/UEFI 2.0) way.
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+/**
+ Create a Legacy Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a legacy boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification by
+ declaring a GUID for the legacy boot event class. This library supports
+ the R8.5/EFI 1.10 form and R9/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBoot (
+ OUT EFI_EVENT *LegacyBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (LegacyBootEvent != NULL);
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_LEGACY_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ LegacyBootEvent
+ );
+#else
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &gEfiEventLegacyBootGuid,
+ LegacyBootEvent
+ );
+#endif
+ return Status;
+}
+
+
+
+/**
+ Create a Read to Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a ready to boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification and use
+ the ready to boot event class defined in UEFI 2.0. This library supports
+ the R8.5/EFI 1.10 form and R9/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBoot (
+ IN EFI_EVENT *ReadyToBootEvent
+ )
+{
+ EFI_STATUS Status;
+
+ ASSERT (ReadyToBootEvent != NULL);
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ //
+ // prior to UEFI 2.0 use Tiano extension to EFI
+ //
+ Status = gBS->CreateEvent (
+ EFI_EVENT_SIGNAL_READY_TO_BOOT | EFI_EVENT_NOTIFY_SIGNAL_ALL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ ReadyToBootEvent
+ );
+#else
+ //
+ // For UEFI 2.0 and the future use an Event Group
+ //
+ Status = gBS->CreateEventEx (
+ EVENT_NOTIFY_SIGNAL,
+ EFI_TPL_CALLBACK,
+ NULL,
+ NULL,
+ &gEfiEventReadyToBootGuid,
+ ReadyToBootEvent
+ );
+#endif
+
+ return Status;
+}
+
+
+/**
+ Signal a Ready to Boot Event.
+
+ Create a Ready to Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventReadyToBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+
+ Status = EfiCreateEventReadyToBoot (&ReadyToBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (ReadyToBootEvent);
+ gBS->CloseEvent (ReadyToBootEvent);
+ }
+}
+
+/**
+ Signal a Legacy Boot Event.
+
+ Create a legacy Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventLegacyBoot (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT LegacyBootEvent;
+
+ Status = EfiCreateEventLegacyBoot (&LegacyBootEvent);
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (LegacyBootEvent);
+ gBS->CloseEvent (LegacyBootEvent);
+ }
+}
+
+
+/**
+ Check to see if the Firmware Volume (FV) Media Device Path is valid
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for PIWG extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability. The return value to this
+ function points to a location in FvDevicePathNode and it does not allocate
+ new memory for the GUID pointer that is returned.
+
+ @param FvDevicePathNode Pointer to FV device path to check.
+
+ @retval NULL FvDevicePathNode is not valid.
+ @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.
+
+**/
+EFI_GUID *
+EFIAPI
+EfiGetNameGuidFromFwVolDevicePathNode (
+ IN MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ //
+ // Use old Device Path that conflicts with UEFI
+ //
+ if (DevicePathType (&FvDevicePathNode->Header) == MEDIA_DEVICE_PATH ||
+ DevicePathSubType (&FvDevicePathNode->Header) == MEDIA_FV_FILEPATH_DP) {
+ return &FvDevicePathNode->NameGuid;
+ }
+
+#else
+ //
+ // Use the new Device path that does not conflict with the UEFI
+ //
+ if (FvDevicePathNode->Piwg.Header.Type == MEDIA_DEVICE_PATH ||
+ FvDevicePathNode->Piwg.Header.SubType == MEDIA_VENDOR_DP) {
+ if (CompareGuid (&gEfiFrameworkDevicePathGuid, &FvDevicePathNode->Piwg.PiwgSpecificDevicePath)) {
+ if (FvDevicePathNode->Piwg.Type == PIWG_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE) {
+ return &FvDevicePathNode->NameGuid;
+ }
+ }
+ }
+#endif
+ return NULL;
+}
+
+
+/**
+ Initialize a Firmware Volume (FV) Media Device Path node.
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for PIWG extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability.
+
+ @param FvDevicePathNode Pointer to a FV device path node to initialize
+ @param NameGuid FV file name to use in FvDevicePathNode
+
+**/
+VOID
+EFIAPI
+EfiInitializeFwVolDevicepathNode (
+ IN MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode,
+ IN EFI_GUID *NameGuid
+ )
+{
+ ASSERT (FvDevicePathNode != NULL);
+ ASSERT (NameGuid != NULL);
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+ //
+ // Use old Device Path that conflicts with UEFI
+ //
+ FvDevicePathNode->Header.Type = MEDIA_DEVICE_PATH;
+ FvDevicePathNode->Header.SubType = MEDIA_FV_FILEPATH_DP;
+ SetDevicePathNodeLength (&FvDevicePathNode->Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+
+#else
+ //
+ // Use the new Device path that does not conflict with the UEFI
+ //
+ FvDevicePathNode->Piwg.Header.Type = MEDIA_DEVICE_PATH;
+ FvDevicePathNode->Piwg.Header.SubType = MEDIA_VENDOR_DP;
+ SetDevicePathNodeLength (&FvDevicePathNode->Piwg.Header, sizeof (MEDIA_FW_VOL_FILEPATH_DEVICE_PATH));
+
+ //
+ // Add the GUID for generic PIWG device paths
+ //
+ CopyGuid (&FvDevicePathNode->Piwg.PiwgSpecificDevicePath, &gEfiFrameworkDevicePathGuid);
+
+ //
+ // Add in the FW Vol File Path PIWG defined inforation
+ //
+ FvDevicePathNode->Piwg.Type = PIWG_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE;
+
+#endif
+
+ CopyGuid (&FvDevicePathNode->NameGuid, NameGuid);
+
+}
+
diff --git a/MdePkg/Library/UefiLib/build.xml b/MdePkg/Library/UefiLib/build.xml new file mode 100644 index 0000000000..27def12f4f --- /dev/null +++ b/MdePkg/Library/UefiLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiLib">
+ <GenBuild baseName="UefiLib" mbdFilename="${MODULE_DIR}\UefiLib.mbd" msaFilename="${MODULE_DIR}\UefiLib.msa"/>
+ </target>
+ <target depends="UefiLib_clean" name="clean"/>
+ <target depends="UefiLib_cleanall" name="cleanall"/>
+ <target name="UefiLib_clean">
+ <OutputDirSetup baseName="UefiLib" mbdFilename="${MODULE_DIR}\UefiLib.mbd" msaFilename="${MODULE_DIR}\UefiLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiLib_cleanall">
+ <OutputDirSetup baseName="UefiLib" mbdFilename="${MODULE_DIR}\UefiLib.mbd" msaFilename="${MODULE_DIR}\UefiLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiMemoryLib/MemLib.c b/MdePkg/Library/UefiMemoryLib/MemLib.c new file mode 100644 index 0000000000..f8f8e30d0a --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/MemLib.c @@ -0,0 +1,39 @@ +/** @file
+ Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLib.c
+
+**/
+
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ gBS->CopyMem (Destination, (VOID*)Source, Length);
+ return Destination;
+}
+
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ gBS->SetMem (Buffer, Size, Value);
+ return Buffer;
+}
diff --git a/MdePkg/Library/UefiMemoryLib/MemLibGeneric.c b/MdePkg/Library/UefiMemoryLib/MemLibGeneric.c new file mode 100644 index 0000000000..ef9f358a79 --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/MemLibGeneric.c @@ -0,0 +1,282 @@ +/** @file
+ Architecture Independent Base Memory Library Implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGeneric.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ do {
+ ((UINT16*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ do {
+ ((UINT32*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ do {
+ ((UINT64*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ return InternalMemSetMem (Buffer, Length, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length > 0);
+ while ((--Length != 0) &&
+ (*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {
+ DestinationBuffer = (INT8*)DestinationBuffer + 1;
+ SourceBuffer = (INT8*)SourceBuffer + 1;
+ }
+ return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ CONST UINT8 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT8*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ CONST UINT16 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT16*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ CONST UINT32 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT32*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ CONST UINT64 *Pointer;
+
+ ASSERT (Length > 0);
+ Pointer = (CONST UINT64*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
diff --git a/MdePkg/Library/UefiMemoryLib/MemLibGuid.c b/MdePkg/Library/UefiMemoryLib/MemLibGuid.c new file mode 100644 index 0000000000..06b2721c64 --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/MemLibGuid.c @@ -0,0 +1,131 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/UefiMemoryLib/MemLibWrapper.c b/MdePkg/Library/UefiMemoryLib/MemLibWrapper.c new file mode 100644 index 0000000000..2ef0766242 --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/MemLibWrapper.c @@ -0,0 +1,620 @@ +/** @file
+ Wrapper functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ UefiMemoryLib
+
+**/
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Destination + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Source + 1);
+ return InternalMemCopyMem (Destination, Source, Length);
+}
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Size <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ return InternalMemSetMem (Buffer, Size, Value);
+}
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem16 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem32 (Buffer, Length, Value);
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Buffer + 1);
+ ASSERT ((((UINTN)Buffer) & 1) != 0);
+ ASSERT ((Length & 1) != 0);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return Buffer;
+ }
+ return InternalMemSetMem64 (Buffer, Length, Value);
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ IN VOID *Buffer,
+ IN UINTN Size
+ )
+{
+ ASSERT (Buffer != NULL);
+ return InternalMemSetMem (Buffer, Size, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)DestinationBuffer + 1);
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)SourceBuffer + 1);
+ if (Length == 0) {
+ return 0;
+ }
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem16 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem32 (Buffer, Length, Value);
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT (Length <= MAX_ADDRESS + (UINTN)Buffer + 1);
+
+ if ((Length /= sizeof (Value)) == 0) {
+ return NULL;
+ }
+ return (VOID*)InternalMemScanMem64 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.mbd b/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.mbd new file mode 100644 index 0000000000..70fd110e1e --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.mbd @@ -0,0 +1,29 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiMemoryLib</BaseName>
+ <Guid>f1bbe03d-2f28-4dee-bec7-d98d7a30c36a</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-04-12 13:39</Created>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.msa b/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.msa new file mode 100644 index 0000000000..7ef511cb16 --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/UefiMemoryLib.msa @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiMemoryLib</BaseName>
+ <ModuleType>UEFI_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>f1bbe03d-2f28-4dee-bec7-d98d7a30c36a</Guid>
+ <Version>EDK_RELEASE_VERSION 0x00090000</Version>
+ <Abstract>Memory-only library functions with no library constructor/destructor</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00000000</Specification>
+ <Created>2006-04-12 13:39</Created>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemLib.c</Filename>
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibGeneric.c</Filename>
+ <Filename>MemLibWrapper.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiMemoryLib/build.xml b/MdePkg/Library/UefiMemoryLib/build.xml new file mode 100644 index 0000000000..02f67e706b --- /dev/null +++ b/MdePkg/Library/UefiMemoryLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiMemoryLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiMemoryLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiMemoryLib">
+ <GenBuild baseName="UefiMemoryLib" mbdFilename="${MODULE_DIR}\UefiMemoryLib.mbd" msaFilename="${MODULE_DIR}\UefiMemoryLib.msa"/>
+ </target>
+ <target depends="UefiMemoryLib_clean" name="clean"/>
+ <target depends="UefiMemoryLib_cleanall" name="cleanall"/>
+ <target name="UefiMemoryLib_clean">
+ <OutputDirSetup baseName="UefiMemoryLib" mbdFilename="${MODULE_DIR}\UefiMemoryLib.mbd" msaFilename="${MODULE_DIR}\UefiMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiMemoryLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiMemoryLib_cleanall">
+ <OutputDirSetup baseName="UefiMemoryLib" mbdFilename="${MODULE_DIR}\UefiMemoryLib.mbd" msaFilename="${MODULE_DIR}\UefiMemoryLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiMemoryLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiMemoryLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiMemoryLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.c b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.c new file mode 100644 index 0000000000..ac4b3ebfbf --- /dev/null +++ b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.c @@ -0,0 +1,36 @@ +/** @file
+ UEFI Runtime Services Table Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiRuntimeServicesTableLib.c
+
+**/
+
+//
+// Cached copy of the EFI Runtime Services Table
+//
+EFI_RUNTIME_SERVICES *gRT = NULL;
+
+/**
+**/
+EFI_STATUS
+UefiRuntimeServicesTableLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ //
+ // Cache pointer to the EFI Runtime Services Table
+ //
+ gRT = SystemTable->RuntimeServices;
+ ASSERT (gRT != NULL);
+ return EFI_SUCCESS;
+}
diff --git a/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.mbd b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.mbd new file mode 100644 index 0000000000..df9238a717 --- /dev/null +++ b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.mbd @@ -0,0 +1,30 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdLibHeader>
+ <BaseName>UefiRuntimeServicesTableLib</BaseName>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>0</Version>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-17 15:49</Created>
+ <Modified>2006-03-19 15:17</Modified>
+ </MbdLibHeader>
+</LibraryModuleBuildDescription>
diff --git a/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.msa b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.msa new file mode 100644 index 0000000000..e78c9cb9d0 --- /dev/null +++ b/MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.msa @@ -0,0 +1,49 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<LibraryModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaLibHeader>
+ <BaseName>UefiRuntimeServicesTableLib</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>LIBRARY</ComponentType>
+ <Guid>baa1baa3-0a8d-402c-8042-985115fae953</Guid>
+ <Version>0</Version>
+ <Abstract>UEFI Runtime Services Table Library</Abstract>
+ <Description>Library to abstract Framework extensions that conflict with UEFI 2.0 Specification</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-17 15:49</Created>
+ <Updated>2006-03-19 15:17</Updated>
+ </MsaLibHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">UefiRuntimeServicesTableLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>UefiRuntimeServicesTableLib.c</Filename>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ </Includes>
+ <Externs>
+ <Extern>
+ <Constructor>UefiRuntimeServicesTableLibConstructor</Constructor>
+ </Extern>
+ </Externs>
+</LibraryModuleSurfaceArea>
diff --git a/MdePkg/Library/UefiRuntimeServicesTableLib/build.xml b/MdePkg/Library/UefiRuntimeServicesTableLib/build.xml new file mode 100644 index 0000000000..37c0cacd25 --- /dev/null +++ b/MdePkg/Library/UefiRuntimeServicesTableLib/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="UefiRuntimeServicesTableLib"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Library\UefiRuntimeServicesTableLib"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="UefiRuntimeServicesTableLib">
+ <GenBuild baseName="UefiRuntimeServicesTableLib" mbdFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.msa"/>
+ </target>
+ <target depends="UefiRuntimeServicesTableLib_clean" name="clean"/>
+ <target depends="UefiRuntimeServicesTableLib_cleanall" name="cleanall"/>
+ <target name="UefiRuntimeServicesTableLib_clean">
+ <OutputDirSetup baseName="UefiRuntimeServicesTableLib" mbdFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiRuntimeServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiRuntimeServicesTableLib_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="UefiRuntimeServicesTableLib_cleanall">
+ <OutputDirSetup baseName="UefiRuntimeServicesTableLib" mbdFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.mbd" msaFilename="${MODULE_DIR}\UefiRuntimeServicesTableLib.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\UefiRuntimeServicesTableLib_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\UefiRuntimeServicesTableLib_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**UefiRuntimeServicesTableLib*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file |