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author | Hao Wu <hao.a.wu@intel.com> | 2018-12-21 09:50:39 +0800 |
---|---|---|
committer | Hao Wu <hao.a.wu@intel.com> | 2018-12-25 09:15:34 +0800 |
commit | d9f1cac51bd354507e880e614d11a1dc160d38a3 (patch) | |
tree | 2a16d515e3032102d3a48a7a4de6896b97e756c6 /MdePkg/Library | |
parent | a1b7461db369a013ce9d766583e2b11a0efc0787 (diff) | |
download | edk2-d9f1cac51bd354507e880e614d11a1dc160d38a3.tar.gz edk2-d9f1cac51bd354507e880e614d11a1dc160d38a3.tar.bz2 edk2-d9f1cac51bd354507e880e614d11a1dc160d38a3.zip |
MdePkg/BaseLib: Introduce new SpeculationBarrier API
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417
X86 specific BaseLib API AsmLfence() was introduced to address the Spectre
Variant 1 (CVE-2017-5753) issue. The purpose of this API is to insert
barriers to stop speculative execution. However, the API is highly
architecture (X86) specific, and thus should be avoided using across
generic code.
To address this issue, this patch will add a new BaseLib API called
SpeculationBarrier(). Different architectures will have different
implementations for this API.
For IA32 and x64, the implementation of SpeculationBarrier() will
directly call AsmLfence().
For ARM and AARCH64, this patch will add a temporary empty implementation
as a placeholder. We hope experts in ARM can help to contribute the actual
implementation.
For EBC, similar to the ARM and AARCH64 cases, a temporary empty
implementation is added.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library')
-rw-r--r-- | MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c | 30 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 5 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c | 30 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/X86SpeculationBarrier.c | 32 |
4 files changed, 97 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c b/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c new file mode 100644 index 0000000000..8a6165a102 --- /dev/null +++ b/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c @@ -0,0 +1,30 @@ +/** @file
+ SpeculationBarrier() function for ARM.
+
+ Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+ Uses as a barrier to stop speculative execution.
+
+ Ensures that no later instruction will execute speculatively, until all prior
+ instructions have completed.
+
+**/
+VOID
+EFIAPI
+SpeculationBarrier (
+ VOID
+ )
+{
+}
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index b84e58324c..d195c5417b 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -336,6 +336,7 @@ X86DisablePaging32.c
X86RdRand.c
X86PatchInstruction.c
+ X86SpeculationBarrier.c
[Sources.X64]
X64/Thunk16.nasm
@@ -515,6 +516,7 @@ X86DisablePaging32.c
X86RdRand.c
X86PatchInstruction.c
+ X86SpeculationBarrier.c
X64/GccInline.c | GCC
X64/Thunk16.S | XCODE
X64/SwitchStack.nasm| GCC
@@ -543,12 +545,14 @@ Ebc/CpuBreakpoint.c
Ebc/SetJumpLongJump.c
Ebc/SwitchStack.c
+ Ebc/SpeculationBarrier.c
Unaligned.c
Math64.c
[Sources.ARM]
Arm/InternalSwitchStack.c
Arm/Unaligned.c
+ Arm/SpeculationBarrier.c
Math64.c | RVCT
Math64.c | MSFT
@@ -582,6 +586,7 @@ [Sources.AARCH64]
Arm/InternalSwitchStack.c
Arm/Unaligned.c
+ Arm/SpeculationBarrier.c
Math64.c
AArch64/MemoryFence.S | GCC
diff --git a/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c b/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c new file mode 100644 index 0000000000..8fa4c204f8 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c @@ -0,0 +1,30 @@ +/** @file
+ SpeculationBarrier() function for EBC.
+
+ Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+/**
+ Uses as a barrier to stop speculative execution.
+
+ Ensures that no later instruction will execute speculatively, until all prior
+ instructions have completed.
+
+**/
+VOID
+EFIAPI
+SpeculationBarrier (
+ VOID
+ )
+{
+}
diff --git a/MdePkg/Library/BaseLib/X86SpeculationBarrier.c b/MdePkg/Library/BaseLib/X86SpeculationBarrier.c new file mode 100644 index 0000000000..03deca8489 --- /dev/null +++ b/MdePkg/Library/BaseLib/X86SpeculationBarrier.c @@ -0,0 +1,32 @@ +/** @file
+ SpeculationBarrier() function for IA32 and x64.
+
+ Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BaseLib.h>
+
+/**
+ Uses as a barrier to stop speculative execution.
+
+ Ensures that no later instruction will execute speculatively, until all prior
+ instructions have completed.
+
+**/
+VOID
+EFIAPI
+SpeculationBarrier (
+ VOID
+ )
+{
+ AsmLfence ();
+}
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