diff options
author | Jeff Fan <jeff.fan@intel.com> | 2016-07-12 11:10:27 +0800 |
---|---|---|
committer | Hao Wu <hao.a.wu@intel.com> | 2016-07-15 09:11:34 +0800 |
commit | 2edf38d6cd93e240f67185d0a0605cdb944aaf97 (patch) | |
tree | 92ed51be3b1c8ecfe4f08774d0a3721bcc3928ac /MdePkg | |
parent | b2c80543522ab3767776a4afd724a2db25f1fc39 (diff) | |
download | edk2-2edf38d6cd93e240f67185d0a0605cdb944aaf97.tar.gz edk2-2edf38d6cd93e240f67185d0a0605cdb944aaf97.tar.bz2 edk2-2edf38d6cd93e240f67185d0a0605cdb944aaf97.zip |
MdePkg/BaseSynchronizationLib: spin lock alignment is 32 at least
Some processor may return small cache line size, we should return 32 bytes at
least for spin lock alignment.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 52f5bd2669916c54845eda8829b2f129b6088896)
Diffstat (limited to 'MdePkg')
-rw-r--r-- | MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c index 49f05fb18a..60f5c7f36b 100644 --- a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c +++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c @@ -55,6 +55,10 @@ InternalGetSpinLockProperties ( }
}
+ if (CacheLineSize < 32) {
+ CacheLineSize = 32;
+ }
+
return CacheLineSize;
}
|