diff options
| author | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-22 03:21:45 +0000 |
|---|---|---|
| committer | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-22 03:21:45 +0000 |
| commit | e1f414b6a7d8a0424e0e01f655b09a4612b4d0e8 (patch) | |
| tree | 32d74f9463f0b5c6a28ff6aff73709219d437604 /MdePkg | |
| parent | e053747a04ad7b8d71c7593b93e1575ba0057a91 (diff) | |
| download | edk2-e1f414b6a7d8a0424e0e01f655b09a4612b4d0e8.tar.gz edk2-e1f414b6a7d8a0424e0e01f655b09a4612b4d0e8.tar.bz2 edk2-e1f414b6a7d8a0424e0e01f655b09a4612b4d0e8.zip | |
Import some basic libraries instances for Mde Packages.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2704 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg')
506 files changed, 45626 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf new file mode 100644 index 0000000000..2dcdd3e790 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf @@ -0,0 +1,101 @@ +#/** @file
+# Component description file for Base Cache Maintenance Library
+#
+# Cache Maintenance Library that uses Base Library services to maintain caches.
+# This library assumes there are no chipset dependencies required to maintain caches.
+# Copyright (c) 2007 - 2007, Intel Corporation
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseCacheMaintenanceLib
+ FILE_GUID = 123dd843-57c9-4158-8418-ce68b3944ce7
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = CacheMaintenanceLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ CommonHeader.h
+
+[Sources.Ia32]
+ x86Cache.c
+
+[Sources.X64]
+ x86Cache.c
+
+[Sources.IPF]
+ IpfCache.c
+
+[Sources.EBC]
+ EbcCache.c
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+
+[LibraryClasses.IA32]
+ BaseLib
+
+[LibraryClasses.X64]
+ BaseLib
+
+[LibraryClasses.IPF]
+ BaseLib
+
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa new file mode 100644 index 0000000000..cb156056be --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa @@ -0,0 +1,49 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BaseCacheMaintenanceLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>123dd843-57c9-4158-8418-ce68b3944ce7</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base Cache Maintenance Library</Abstract>
+ <Description>Cache Maintenance Library that uses Base Library services to maintain caches. + This library assumes there are no chipset dependencies required to maintain caches.</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseCacheMaintenanceLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>CacheMaintenanceLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED" SupArchList="IA32 X64 IPF">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename SupArchList="IA32">x86Cache.c</Filename>
+ <Filename SupArchList="X64">x86Cache.c</Filename>
+ <Filename SupArchList="EBC">EbcCache.c</Filename>
+ <Filename SupArchList="IPF">IpfCache.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h b/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h new file mode 100644 index 0000000000..d0df949fab --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/CacheMaintenanceLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c new file mode 100644 index 0000000000..45d44db067 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c @@ -0,0 +1,236 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+**/
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+}
+
+/**
+ Invalidates a range of instruction cache lines in the cache coherency domain
+ of the calling CPU.
+
+ Invalidates the instruction cache lines specified by Address and Length. If
+ Address is not aligned on a cache line boundary, then entire instruction
+ cache line containing Address is invalidated. If Address + Length is not
+ aligned on a cache line boundary, then the entire instruction cache line
+ containing Address + Length -1 is invalidated. This function may choose to
+ invalidate the entire instruction cache if that is more efficient than
+ invalidating the specified range. If Length is 0, the no instruction cache
+ lines are invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the instruction cache lines to
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+
+ @param Length The number of bytes to invalidate from the instruction cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+ return Address;
+}
+
+/**
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU.
+
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU. This function guarantees that all dirty cache lines are
+ written back to system memory, and also invalidates all the data cache lines
+ in the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+}
+
+/**
+ Writes Back and Invalidates a range of data cache lines in the cache
+ coherency domain of the calling CPU.
+
+ Writes Back and Invalidate the data cache lines specified by Address and
+ Length. If Address is not aligned on a cache line boundary, then entire data
+ cache line containing Address is written back and invalidated. If Address +
+ Length is not aligned on a cache line boundary, then the entire data cache
+ line containing Address + Length -1 is written back and invalidated. This
+ function may choose to write back and invalidate the entire data cache if
+ that is more efficient than writing back and invalidating the specified
+ range. If Length is 0, the no data cache lines are written back and
+ invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back and
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+ @param Length The number of bytes to write back and invalidate from the
+ data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+ return Address;
+}
+
+/**
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU. This function guarantees that all dirty cache lines are written back to
+ system memory. This function may also invalidate all the data cache lines in
+ the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+}
+
+/**
+ Writes Back a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Writes Back the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is written back. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is written back. This function may choose to write back the entire
+ data cache if that is more efficient than writing back the specified range.
+ If Length is 0, the no data cache lines are written back. This function may
+ also invalidate all the data cache lines in the specified range of the cache
+ coherency domain of the calling CPU. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing
+ mode, then Address is a virtual address.
+ @param Length The number of bytes to write back from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+ return Address;
+}
+
+/**
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU. This function must be used with care because dirty cache lines are not
+ written back to system memory. It is typically used for cache diagnostics. If
+ the CPU does not support invalidation of the entire data cache, then a write
+ back and invalidate operation should be performed on the entire data cache.
+
+**/
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+}
+
+/**
+ Invalidates a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Invalidates the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is invalidated. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is invalidated. This function must never invalidate any cache lines
+ outside the specified range. If Length is 0, the no data cache lines are
+ invalidated. Address is returned. This function must be used with care
+ because dirty cache lines are not written back to system memory. It is
+ typically used for cache diagnostics. If the CPU does not support
+ invalidation of a data cache range, then a write back and invalidate
+ operation should be performed on the data cache range.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to invalidate. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing mode,
+ then Address is a virtual address.
+ @param Length The number of bytes to invalidate from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+ return Address;
+}
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c new file mode 100644 index 0000000000..e714eae02b --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c @@ -0,0 +1,241 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+**/
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+ PalCallStatic (NULL, 1, 1, 1, 0);
+}
+
+/**
+ Invalidates a range of instruction cache lines in the cache coherency domain
+ of the calling CPU.
+
+ Invalidates the instruction cache lines specified by Address and Length. If
+ Address is not aligned on a cache line boundary, then entire instruction
+ cache line containing Address is invalidated. If Address + Length is not
+ aligned on a cache line boundary, then the entire instruction cache line
+ containing Address + Length -1 is invalidated. This function may choose to
+ invalidate the entire instruction cache if that is more efficient than
+ invalidating the specified range. If Length is 0, the no instruction cache
+ lines are invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the instruction cache lines to
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+
+ @param Length The number of bytes to invalidate from the instruction cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return IpfFlushCacheRange (Address, Length);
+}
+
+/**
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU.
+
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU. This function guarantees that all dirty cache lines are
+ written back to system memory, and also invalidates all the data cache lines
+ in the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ PalCallStatic (NULL, 1, 2, 1, 0);
+}
+
+/**
+ Writes Back and Invalidates a range of data cache lines in the cache
+ coherency domain of the calling CPU.
+
+ Writes Back and Invalidate the data cache lines specified by Address and
+ Length. If Address is not aligned on a cache line boundary, then entire data
+ cache line containing Address is written back and invalidated. If Address +
+ Length is not aligned on a cache line boundary, then the entire data cache
+ line containing Address + Length -1 is written back and invalidated. This
+ function may choose to write back and invalidate the entire data cache if
+ that is more efficient than writing back and invalidating the specified
+ range. If Length is 0, the no data cache lines are written back and
+ invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back and
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+ @param Length The number of bytes to write back and invalidate from the
+ data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+
+ return IpfFlushCacheRange (Address, Length);
+}
+
+/**
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU. This function guarantees that all dirty cache lines are written back to
+ system memory. This function may also invalidate all the data cache lines in
+ the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ PalCallStatic (NULL, 1, 2, 0, 0);
+}
+
+/**
+ Writes Back a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Writes Back the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is written back. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is written back. This function may choose to write back the entire
+ data cache if that is more efficient than writing back the specified range.
+ If Length is 0, the no data cache lines are written back. This function may
+ also invalidate all the data cache lines in the specified range of the cache
+ coherency domain of the calling CPU. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing
+ mode, then Address is a virtual address.
+ @param Length The number of bytes to write back from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+
+ return IpfFlushCacheRange (Address, Length);
+}
+
+/**
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU. This function must be used with care because dirty cache lines are not
+ written back to system memory. It is typically used for cache diagnostics. If
+ the CPU does not support invalidation of the entire data cache, then a write
+ back and invalidate operation should be performed on the entire data cache.
+
+**/
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+ WriteBackInvalidateDataCache ();
+}
+
+/**
+ Invalidates a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Invalidates the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is invalidated. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is invalidated. This function must never invalidate any cache lines
+ outside the specified range. If Length is 0, the no data cache lines are
+ invalidated. Address is returned. This function must be used with care
+ because dirty cache lines are not written back to system memory. It is
+ typically used for cache diagnostics. If the CPU does not support
+ invalidation of a data cache range, then a write back and invalidate
+ operation should be performed on the data cache range.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to invalidate. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing mode,
+ then Address is a virtual address.
+ @param Length The number of bytes to invalidate from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return IpfFlushCacheRange (Address, Length);
+}
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c new file mode 100644 index 0000000000..276e763309 --- /dev/null +++ b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c @@ -0,0 +1,259 @@ +/** @file
+ Cache Maintenance Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Cache.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// This size must be at or below the smallest cache size possible among all
+// supported processors
+//
+#define CACHE_LINE_SIZE 0x20
+
+/**
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+ Invalidates the entire instruction cache in cache coherency domain of the
+ calling CPU.
+
+**/
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+}
+
+/**
+ Invalidates a range of instruction cache lines in the cache coherency domain
+ of the calling CPU.
+
+ Invalidates the instruction cache lines specified by Address and Length. If
+ Address is not aligned on a cache line boundary, then entire instruction
+ cache line containing Address is invalidated. If Address + Length is not
+ aligned on a cache line boundary, then the entire instruction cache line
+ containing Address + Length -1 is invalidated. This function may choose to
+ invalidate the entire instruction cache if that is more efficient than
+ invalidating the specified range. If Length is 0, the no instruction cache
+ lines are invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the instruction cache lines to
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+
+ @param Length The number of bytes to invalidate from the instruction cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+ return Address;
+}
+
+/**
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU.
+
+ Writes Back and Invalidates the entire data cache in cache coherency domain
+ of the calling CPU. This function guarantees that all dirty cache lines are
+ written back to system memory, and also invalidates all the data cache lines
+ in the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ AsmWbinvd ();
+}
+
+/**
+ Writes Back and Invalidates a range of data cache lines in the cache
+ coherency domain of the calling CPU.
+
+ Writes Back and Invalidate the data cache lines specified by Address and
+ Length. If Address is not aligned on a cache line boundary, then entire data
+ cache line containing Address is written back and invalidated. If Address +
+ Length is not aligned on a cache line boundary, then the entire data cache
+ line containing Address + Length -1 is written back and invalidated. This
+ function may choose to write back and invalidate the entire data cache if
+ that is more efficient than writing back and invalidating the specified
+ range. If Length is 0, the no data cache lines are written back and
+ invalidated. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back and
+ invalidate. If the CPU is in a physical addressing mode, then
+ Address is a physical address. If the CPU is in a virtual
+ addressing mode, then Address is a virtual address.
+ @param Length The number of bytes to write back and invalidate from the
+ data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ UINTN Start, End;
+
+ ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
+
+ if (Length == 0) {
+ return Address;
+ }
+
+ Start = (UINTN)Address;
+ End = (Start + Length + (CACHE_LINE_SIZE - 1)) & ~(CACHE_LINE_SIZE - 1);
+ Start &= ~(CACHE_LINE_SIZE - 1);
+
+ do {
+ Start = (UINTN)AsmFlushCacheLine ((VOID*)Start) + CACHE_LINE_SIZE;
+ } while (Start != End);
+ return Address;
+}
+
+/**
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Writes Back the entire data cache in cache coherency domain of the calling
+ CPU. This function guarantees that all dirty cache lines are written back to
+ system memory. This function may also invalidate all the data cache lines in
+ the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ WriteBackInvalidateDataCache ();
+}
+
+/**
+ Writes Back a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Writes Back the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is written back. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is written back. This function may choose to write back the entire
+ data cache if that is more efficient than writing back the specified range.
+ If Length is 0, the no data cache lines are written back. This function may
+ also invalidate all the data cache lines in the specified range of the cache
+ coherency domain of the calling CPU. Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to write back. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing
+ mode, then Address is a virtual address.
+ @param Length The number of bytes to write back from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return WriteBackInvalidateDataCacheRange (Address, Length);
+}
+
+/**
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU.
+
+ Invalidates the entire data cache in cache coherency domain of the calling
+ CPU. This function must be used with care because dirty cache lines are not
+ written back to system memory. It is typically used for cache diagnostics. If
+ the CPU does not support invalidation of the entire data cache, then a write
+ back and invalidate operation should be performed on the entire data cache.
+
+**/
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+ AsmInvd ();
+}
+
+/**
+ Invalidates a range of data cache lines in the cache coherency domain of the
+ calling CPU.
+
+ Invalidates the data cache lines specified by Address and Length. If Address
+ is not aligned on a cache line boundary, then entire data cache line
+ containing Address is invalidated. If Address + Length is not aligned on a
+ cache line boundary, then the entire data cache line containing Address +
+ Length -1 is invalidated. This function must never invalidate any cache lines
+ outside the specified range. If Length is 0, the no data cache lines are
+ invalidated. Address is returned. This function must be used with care
+ because dirty cache lines are not written back to system memory. It is
+ typically used for cache diagnostics. If the CPU does not support
+ invalidation of a data cache range, then a write back and invalidate
+ operation should be performed on the data cache range.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the data cache lines to invalidate. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing mode,
+ then Address is a virtual address.
+ @param Length The number of bytes to invalidate from the data cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ return WriteBackInvalidateDataCacheRange (Address, Length);
+}
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf new file mode 100644 index 0000000000..bc939c270e --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf @@ -0,0 +1,68 @@ +#/** @file
+# Component description file for NULL Debug Library
+#
+# Debug Library with empty functions.
+# Copyright (c) 2007 - 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseDebugLibNull
+ FILE_GUID = 9ba1d976-0624-41a3-8650-28165e8d9ae8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DebugLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ DebugLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa new file mode 100644 index 0000000000..d482cf9021 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa @@ -0,0 +1,39 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BaseDebugLibNull</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>9ba1d976-0624-41a3-8650-28165e8d9ae8</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for NULL Debug Library</Abstract>
+ <Description>Debug Library with empty functions.</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseDebugLibNull</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseDebugLibNull/CommonHeader.h b/MdePkg/Library/BaseDebugLibNull/CommonHeader.h new file mode 100644 index 0000000000..27168bfa76 --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/CommonHeader.h @@ -0,0 +1,31 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseDebugLibNull/DebugLib.c b/MdePkg/Library/BaseDebugLibNull/DebugLib.c new file mode 100644 index 0000000000..1d3e719b0d --- /dev/null +++ b/MdePkg/Library/BaseDebugLibNull/DebugLib.c @@ -0,0 +1,188 @@ +/** @file
+ Base Debug Library that uses PrintLib to print messages to a memory buffer.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CONST CHAR8 *Format,
+ ...
+ )
+{
+}
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
+
+ If Description is NULL, then a <Description> string of "(NULL) Description" is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CONST CHAR8 *FileName,
+ IN UINTN LineNumber,
+ IN CONST CHAR8 *Description
+ )
+{
+}
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ return Buffer;
+}
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ )
+{
+ return FALSE;
+}
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ )
+{
+ return FALSE;
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ )
+{
+ return FALSE;
+}
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ )
+{
+ return FALSE;
+}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf new file mode 100644 index 0000000000..fb3e2d2bb6 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf @@ -0,0 +1,111 @@ +#/** @file
+# Component description file for Intrinsic Base Io Library
+#
+# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+# for IA-32 and x64. It also performs direct memory access for MMIO services.
+# Copyright (c) 2007 - 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseIoLibIntrinsic
+ FILE_GUID = 926c9cd0-4bb8-479b-9ac4-8a2a23f85307
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = IoLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ IoLibMmioBuffer.c
+ CommonHeader.h
+
+[Sources.Ia32]
+ IoHighLevel.c
+ IoLibGcc.c
+ IoLibMsc.c
+ IoLib.c
+
+[Sources.X64]
+ IoHighLevel.c
+ IoLibGcc.c
+ IoLibMsc.c
+ IoLib.c
+
+[Sources.IPF]
+ IoHighLevel.c
+ IoLibIpf.c
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
+[LibraryClasses.IPF]
+ PcdLib
+
+
+################################################################################
+#
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsFixedAtBuild.IPF]
+ PcdIoBlockBaseAddressForIpf|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa new file mode 100644 index 0000000000..e974647289 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa @@ -0,0 +1,67 @@ +<?xml version="1.0" encoding="UTF-8"?> +<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <MsaHeader> + <ModuleName>BaseIoLibIntrinsic</ModuleName> + <ModuleType>BASE</ModuleType> + <GuidValue>926c9cd0-4bb8-479b-9ac4-8a2a23f85307</GuidValue> + <Version>1.0</Version> + <Abstract>Component description file for Intrinsic Base Io Library</Abstract> + <Description>I/O Library that uses compiler intrinsics to perform IN and OUT instructions + for IA-32 and x64. It also performs direct memory access for MMIO services.</Description> + <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright> + <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License> + <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification> + </MsaHeader> + <ModuleDefinitions> + <SupportedArchitectures>IA32 X64 IPF</SupportedArchitectures> + <BinaryModule>false</BinaryModule> + <OutputFileBasename>BaseIoLibIntrinsic</OutputFileBasename> + </ModuleDefinitions> + <LibraryClassDefinitions> + <LibraryClass Usage="ALWAYS_PRODUCED"> + <Keyword>IoLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>BaseLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>DebugLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED" SupArchList="IPF"> + <Keyword>PcdLib</Keyword> + </LibraryClass> + </LibraryClassDefinitions> + <SourceFiles> + <Filename>IoLibMmioBuffer.c</Filename> + <Filename SupArchList="IA32">IoLib.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">IoLibMsc.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">IoLibGcc.c</Filename> + <Filename SupArchList="IA32">IoHighLevel.c</Filename> + <Filename SupArchList="X64">IoLib.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">IoLibMsc.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">IoLibGcc.c</Filename> + <Filename SupArchList="X64">IoHighLevel.c</Filename> + <Filename SupArchList="IPF">IoLibIpf.c</Filename> + <Filename SupArchList="IPF">IoHighLevel.c</Filename> + </SourceFiles> + <PackageDependencies> + <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/> + </PackageDependencies> + <Externs> + <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification> + <Specification>EDK_RELEASE_VERSION 0x00020000</Specification> + </Externs> + <PcdCoded> + <PcdEntry PcdItemType="FIXED_AT_BUILD" Usage="ALWAYS_CONSUMED" SupArchList="IPF"> + <C_Name>PcdIoBlockBaseAddressForIpf</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <DefaultValue>0x0ffffc000000</DefaultValue> + <HelpText>The base address of IPF IO Block</HelpText> + </PcdEntry> + </PcdCoded> +</ModuleSurfaceArea> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h b/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h new file mode 100644 index 0000000000..56858d1825 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h @@ -0,0 +1,34 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/IoLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c new file mode 100644 index 0000000000..d9702c9f57 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c @@ -0,0 +1,2277 @@ +/** @file
+ High-level Io/Mmio functions.
+
+ All assertions for bit field operations are handled bit field functions in the
+ Base Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoHighLevel.c
+
+ The following IoLib instances share the same version of this file:
+
+ BaseIoLibIntrinsic
+ DxeIoLibCpuIo
+ PeiIoLibCpuIo
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));
+}
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return IoWrite8 (
+ Port,
+ BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));
+}
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return IoWrite16 (
+ Port,
+ BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) | OrData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (Port, IoRead32 (Port) & AndData);
+}
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return IoWrite32 (
+ Port,
+ BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) | OrData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (Port, IoRead64 (Port) & AndData);
+}
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return IoWrite64 (
+ Port,
+ BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));
+}
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return MmioWrite8 (
+ Address,
+ BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));
+}
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return MmioWrite16 (
+ Address,
+ BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) | OrData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (Address, MmioRead32 (Address) & AndData);
+}
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return MmioWrite32 (
+ Address,
+ BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) | OrData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (Address, MmioRead64 (Address) & AndData);
+}
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return MmioWrite64 (
+ Address,
+ BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)
+ );
+}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c new file mode 100644 index 0000000000..bbd12959f6 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c @@ -0,0 +1,71 @@ +/** @file
+ Common I/O Library routines.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c new file mode 100644 index 0000000000..c6cf5f72cc --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c @@ -0,0 +1,388 @@ +/** @file
+ I/O Library. This file has compiler specifics for GCC as there is no
+ ANSI C standard for doing IO.
+
+ GCC - uses EFIAPI assembler. __asm__ calls GAS. __volatile__ makes sure the
+ compiler puts the assembler in this exact location. The complex GNUC
+ operations are not optimzed. It would be possible to also write these
+ with EFIAPI assembler.
+
+ We don't advocate putting compiler specifics in libraries or drivers but there
+ is no other way to make this work.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibGcc.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ return *(volatile UINT8*)Address;
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return *(volatile UINT8*)Address = Value;
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 1) == 0);
+ return *(volatile UINT16*)Address;
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Address & 1) == 0);
+ return *(volatile UINT16*)Address = Value;
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 3) == 0);
+ return *(volatile UINT32*)Address;
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Address & 3) == 0);
+ return *(volatile UINT32*)Address = Value;
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ ASSERT ((Address & 7) == 0);
+ return *(volatile UINT64*)Address;
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ ASSERT ((Address & 7) == 0);
+ return *(volatile UINT64*)Address = Value;
+}
+
+
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ UINT8 Data;
+
+ __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ UINT16 Data;
+
+ ASSERT ((Port & 1) == 0);
+ __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Port & 1) == 0);
+ __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+__inline__
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ UINT32 Data;
+
+ ASSERT ((Port & 3) == 0);
+ __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port));
+ return Data;
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+__inline__
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Port & 3) == 0);
+ __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port));
+ return Value;
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c new file mode 100644 index 0000000000..27d21c1879 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c @@ -0,0 +1,486 @@ +/** @file
+ Common I/O Library routines.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibIpf.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#define MAP_PORT_BASE_TO_MEM(_Port) \
+ ((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))
+
+/**
+ Reads a 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINT64 Port
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioRead8 (Address);
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINT64 Port
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioRead16 (Address);
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINT64 Port
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioRead32 (Address);
+}
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Writes a 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINT64 Port,
+ IN UINT8 Data
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioWrite8 (Address, Data);
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINT64 Port,
+ IN UINT16 Data
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioWrite16 (Address, Data);
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINT64 Port,
+ IN UINT32 Data
+ )
+{
+ UINT64 Address;
+
+ //
+ // Add the 64MB aligned IO Port space to the IO address
+ //
+ Address = MAP_PORT_BASE_TO_MEM (Port);
+ Address += PcdGet64(PcdIoBlockBaseAddressForIpf);
+
+ return MmioWrite32 (Address, Data);
+}
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Reads a 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINT64 Address
+ )
+{
+ UINT8 Data;
+
+ Address |= BIT63;
+
+ MemoryFence ();
+ Data = *((volatile UINT8 *) Address);
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINT64 Address
+ )
+{
+ UINT16 Data;
+
+ Address |= BIT63;
+
+ MemoryFence ();
+ Data = *((volatile UINT16 *) Address);
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINT64 Address
+ )
+{
+ UINT32 Data;
+
+ Address |= BIT63;
+
+ MemoryFence ();
+ Data = *((volatile UINT32 *) Address);
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINT64 Address
+ )
+{
+ UINT64 Data;
+
+ Address |= BIT63;
+
+ MemoryFence ();
+ Data = *((volatile UINT64 *) Address);
+ MemoryFence ();
+
+ return Data;
+
+}
+
+/**
+ Writes a 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Data The value to write to the MMIO register.
+
+ @return The value written the memory address.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINT64 Address,
+ IN UINT8 Data
+ )
+{
+ Address |= BIT63;
+
+ MemoryFence ();
+ *((volatile UINT8 *) Address) = Data;
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Data The value to write to the MMIO register.
+
+ @return The value written the memory address.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINT64 Address,
+ IN UINT16 Data
+ )
+{
+ Address |= BIT63;
+
+ MemoryFence ();
+ *((volatile UINT16 *) Address) = Data;
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Data The value to write to the MMIO register.
+
+ @return The value written the memory address.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINT64 Address,
+ IN UINT32 Data
+ )
+{
+ Address |= BIT63;
+
+ MemoryFence ();
+ *((volatile UINT32 *) Address) = Data;
+ MemoryFence ();
+
+ return Data;
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ @param Address The MMIO register to write.
+ @param Data The value to write to the MMIO register.
+
+ @return The value written the memory address.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINT64 Address,
+ IN UINT64 Data
+ )
+{
+ Address |= BIT63;
+
+ MemoryFence ();
+ *((volatile UINT64 *) Address) = Data;
+ MemoryFence ();
+
+ return Data;
+}
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c new file mode 100644 index 0000000000..8befbf8d17 --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c @@ -0,0 +1,414 @@ +/** @file
+ I/O Library MMIO Buffer Functions.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copy data from MMIO region to system memory by using 8-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioReadBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT8 *Buffer
+ )
+{
+ UINT8 *ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = Buffer;
+
+ while (Length--) {
+ *(Buffer++) = MmioRead8 (StartAddress++);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 16-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioReadBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 32-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioReadBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from MMIO region to system memory by using 64-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioReadBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = Buffer;
+
+ while (Length) {
+ *(Buffer++) = MmioRead64 (StartAddress);
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 8-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT8 *
+EFIAPI
+MmioWriteBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT8 *Buffer
+ )
+{
+ VOID* ReturnBuffer;
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ReturnBuffer = (UINT8 *) Buffer;
+
+ while (Length--) {
+ MmioWrite8 (StartAddress++, *(Buffer++));
+ }
+
+ return ReturnBuffer;
+
+}
+
+/**
+ Copy data from system memory to MMIO region by using 16-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT16 *
+EFIAPI
+MmioWriteBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT16 *Buffer
+ )
+{
+ UINT16 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);
+
+ ReturnBuffer = (UINT16 *) Buffer;
+
+ while (Length) {
+ MmioWrite16 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT16);
+ Length -= sizeof (UINT16);
+ }
+
+ return ReturnBuffer;
+}
+
+
+/**
+ Copy data from system memory to MMIO region by using 32-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT32 *
+EFIAPI
+MmioWriteBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT32 *Buffer
+ )
+{
+ UINT32 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);
+
+ ReturnBuffer = (UINT32 *) Buffer;
+
+ while (Length) {
+ MmioWrite32 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT32);
+ Length -= sizeof (UINT32);
+ }
+
+ return ReturnBuffer;
+}
+
+/**
+ Copy data from system memory to MMIO region by using 64-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT64 *
+EFIAPI
+MmioWriteBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT64 *Buffer
+ )
+{
+ UINT64 *ReturnBuffer;
+
+ ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - StartAddress));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN) Buffer));
+
+ ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);
+ ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);
+
+ ReturnBuffer = (UINT64 *) Buffer;
+
+ while (Length) {
+ MmioWrite64 (StartAddress, *(Buffer++));
+
+ StartAddress += sizeof (UINT64);
+ Length -= sizeof (UINT64);
+ }
+
+ return ReturnBuffer;
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c new file mode 100644 index 0000000000..35854c6ccd --- /dev/null +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c @@ -0,0 +1,431 @@ +/** @file
+ I/O Library. This file has compiler specifics for Microsft C as there is no
+ ANSI C standard for doing IO.
+
+ MSC - uses intrinsic functions and the optimize will remove the function call
+ overhead.
+
+ We don't advocate putting compiler specifics in libraries or drivers but there
+ is no other way to make this work.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLibMsc.c
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+int _inp (unsigned short port);
+unsigned short _inpw (unsigned short port);
+unsigned long _inpd (unsigned short port);
+int _outp (unsigned short port, int databyte );
+unsigned short _outpw (unsigned short port, unsigned short dataword );
+unsigned long _outpd (unsigned short port, unsigned long dataword );
+void _ReadWriteBarrier (void);
+
+#pragma intrinsic(_inp)
+#pragma intrinsic(_inpw)
+#pragma intrinsic(_inpd)
+#pragma intrinsic(_outp)
+#pragma intrinsic(_outpw)
+#pragma intrinsic(_outpd)
+#pragma intrinsic(_ReadWriteBarrier)
+
+//
+// _ReadWriteBarrier() forces memory reads and writes to complete at the point
+// in the call. This is only a hint to the compiler and does emit code.
+// In past versions of the compiler, _ReadWriteBarrier was enforced only
+// locally and did not affect functions up the call tree. In Visual C++
+// 2005, _ReadWriteBarrier is enforced all the way up the call tree.
+//
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ )
+{
+ UINT8 Value;
+
+ _ReadWriteBarrier ();
+ Value = (UINT8)_inp ((UINT16)Port);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ )
+{
+ _ReadWriteBarrier ();
+ (UINT8)_outp ((UINT16)Port, Value);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ )
+{
+ UINT16 Value;
+
+ ASSERT ((Port & 1) == 0);
+ _ReadWriteBarrier ();
+ Value = _inpw ((UINT16)Port);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Port & 1) == 0);
+ _ReadWriteBarrier ();
+ _outpw ((UINT16)Port, Value);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ )
+{
+ UINT32 Value;
+
+ ASSERT ((Port & 3) == 0);
+ _ReadWriteBarrier ();
+ Value = _inpd ((UINT16)Port);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Port & 3) == 0);
+ _ReadWriteBarrier ();
+ _outpd ((UINT16)Port, Value);
+ _ReadWriteBarrier ();
+ return Value;
+}
+
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ )
+{
+ UINT8 Value;
+
+ Value = *(volatile UINT8*)Address;
+ return Value;
+}
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ return *(volatile UINT8*)Address = Value;
+}
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ )
+{
+ UINT16 Value;
+
+ ASSERT ((Address & 1) == 0);
+ Value = *(volatile UINT16*)Address;
+ return Value;
+}
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT ((Address & 1) == 0);
+ return *(volatile UINT16*)Address = Value;
+}
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ )
+{
+ UINT32 Value;
+
+ ASSERT ((Address & 3) == 0);
+ Value = *(volatile UINT32*)Address;
+ return Value;
+}
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT ((Address & 3) == 0);
+ return *(volatile UINT32*)Address = Value;
+}
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ )
+{
+ UINT64 Value;
+
+ ASSERT ((Address & 7) == 0);
+ Value = *(volatile UINT64*)Address;
+ return Value;
+}
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ )
+{
+ ASSERT ((Address & 7) == 0);
+ return *(volatile UINT64*)Address = Value;
+}
+
diff --git a/MdePkg/Library/BaseLib/ARShiftU64.c b/MdePkg/Library/BaseLib/ARShiftU64.c new file mode 100644 index 0000000000..d9105c67fb --- /dev/null +++ b/MdePkg/Library/BaseLib/ARShiftU64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathARShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf new file mode 100644 index 0000000000..a974588eee --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -0,0 +1,575 @@ +#/** @file
+# Component description file for Base Library
+#
+# Base Library implementation.
+# Copyright (c) 2007 - 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseLib
+ FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BaseLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ CheckSum.c
+ SwitchStack.c
+ SwapBytes64.c
+ SwapBytes32.c
+ SwapBytes16.c
+ LongJump.c
+ SetJump.c
+ RShiftU64.c
+ RRotU64.c
+ RRotU32.c
+ MultU64x64.c
+ MultU64x32.c
+ MultS64x64.c
+ ModU64x32.c
+ LShiftU64.c
+ LRotU64.c
+ LRotU32.c
+ LowBitSet64.c
+ LowBitSet32.c
+ HighBitSet64.c
+ HighBitSet32.c
+ GetPowerOfTwo64.c
+ GetPowerOfTwo32.c
+ DivU64x64Remainder.c
+ DivU64x32Remainder.c
+ DivU64x32.c
+ DivS64x64Remainder.c
+ ARShiftU64.c
+ BitField.c
+ CpuDeadLoop.c
+ Cpu.c
+ LinkedList.c
+ String.c
+ BaseLibInternals.h
+ CommonHeader.h
+
+[Sources.Ia32]
+ Ia32/Wbinvd.c
+ Ia32/WriteMm7.c
+ Ia32/WriteMm6.c
+ Ia32/WriteMm5.c
+ Ia32/WriteMm4.c
+ Ia32/WriteMm3.c
+ Ia32/WriteMm2.c
+ Ia32/WriteMm1.c
+ Ia32/WriteMm0.c
+ Ia32/WriteLdtr.c
+ Ia32/WriteIdtr.c
+ Ia32/WriteGdtr.c
+ Ia32/WriteDr7.c
+ Ia32/WriteDr6.c
+ Ia32/WriteDr5.c
+ Ia32/WriteDr4.c
+ Ia32/WriteDr3.c
+ Ia32/WriteDr2.c
+ Ia32/WriteDr1.c
+ Ia32/WriteDr0.c
+ Ia32/WriteCr4.c
+ Ia32/WriteCr3.c
+ Ia32/WriteCr2.c
+ Ia32/WriteCr0.c
+ Ia32/WriteMsr64.c
+ Ia32/Thunk16.asm
+ Ia32/SwapBytes64.c
+ Ia32/SetJump.c
+ Ia32/RRotU64.c
+ Ia32/RShiftU64.c
+ Ia32/ReadPmc.c
+ Ia32/ReadTsc.c
+ Ia32/ReadLdtr.c
+ Ia32/ReadIdtr.c
+ Ia32/ReadGdtr.c
+ Ia32/ReadTr.c
+ Ia32/ReadSs.c
+ Ia32/ReadGs.c
+ Ia32/ReadFs.c
+ Ia32/ReadEs.c
+ Ia32/ReadDs.c
+ Ia32/ReadCs.c
+ Ia32/ReadMsr64.c
+ Ia32/ReadMm7.c
+ Ia32/ReadMm6.c
+ Ia32/ReadMm5.c
+ Ia32/ReadMm4.c
+ Ia32/ReadMm3.c
+ Ia32/ReadMm2.c
+ Ia32/ReadMm1.c
+ Ia32/ReadMm0.c
+ Ia32/ReadEflags.c
+ Ia32/ReadDr7.c
+ Ia32/ReadDr6.c
+ Ia32/ReadDr5.c
+ Ia32/ReadDr4.c
+ Ia32/ReadDr3.c
+ Ia32/ReadDr2.c
+ Ia32/ReadDr1.c
+ Ia32/ReadDr0.c
+ Ia32/ReadCr4.c
+ Ia32/ReadCr3.c
+ Ia32/ReadCr2.c
+ Ia32/ReadCr0.c
+ Ia32/Mwait.c
+ Ia32/Monitor.c
+ Ia32/ModU64x32.c
+ Ia32/MultU64x64.c
+ Ia32/MultU64x32.c
+ Ia32/LShiftU64.c
+ Ia32/LRotU64.c
+ Ia32/LongJump.c
+ Ia32/Invd.c
+ Ia32/InterlockedCompareExchange64.c
+ Ia32/InterlockedCompareExchange32.c
+ Ia32/InterlockedDecrement.c
+ Ia32/InterlockedIncrement.c
+ Ia32/FxRestore.c
+ Ia32/FxSave.c
+ Ia32/FlushCacheLine.c
+ Ia32/EnablePaging64.asm
+ Ia32/EnablePaging32.c
+ Ia32/EnableInterrupts.c
+ Ia32/EnableDisableInterrupts.c
+ Ia32/DivU64x64Remainder.c
+ Ia32/DivU64x32Remainder.c
+ Ia32/DivU64x32.c
+ Ia32/DisablePaging32.c
+ Ia32/DisableInterrupts.c
+ Ia32/CpuPause.c
+ Ia32/CpuIdEx.c
+ Ia32/CpuId.c
+ Ia32/CpuSleep.c
+ Ia32/CpuFlushTlb.c
+ Ia32/CpuBreakpoint.c
+ Ia32/ARShiftU64.c
+ Ia32/Thunk16.S
+ Ia32/CpuFlushTlb.S
+ Ia32/CpuBreakpoint.S
+ Ia32/CpuPause.S
+ Ia32/CpuSleep.S
+ Ia32/EnableDisableInterrupts.S
+ Ia32/DisableInterrupts.S
+ Ia32/EnableInterrupts.S
+ Ia32/InterlockedCompareExchange64.S
+ Ia32/InterlockedCompareExchange32.S
+ Ia32/InterlockedDecrement.S
+ Ia32/InterlockedIncrement.S
+ Ia32/FlushCacheLine.S
+ Ia32/Invd.S
+ Ia32/Wbinvd.S
+ Ia32/EnablePaging64.S
+ Ia32/DisablePaging32.S
+ Ia32/EnablePaging32.S
+ Ia32/Mwait.S
+ Ia32/Monitor.S
+ Ia32/ReadPmc.S
+ Ia32/ReadTsc.S
+ Ia32/WriteMm7.S
+ Ia32/WriteMm6.S
+ Ia32/WriteMm5.S
+ Ia32/WriteMm4.S
+ Ia32/WriteMm3.S
+ Ia32/WriteMm2.S
+ Ia32/WriteMm1.S
+ Ia32/WriteMm0.S
+ Ia32/ReadMm7.S
+ Ia32/ReadMm6.S
+ Ia32/ReadMm5.S
+ Ia32/ReadMm4.S
+ Ia32/ReadMm3.S
+ Ia32/ReadMm2.S
+ Ia32/ReadMm1.S
+ Ia32/ReadMm0.S
+ Ia32/FxRestore.S
+ Ia32/FxSave.S
+ Ia32/WriteLdtr.S
+ Ia32/ReadLdtr.S
+ Ia32/WriteIdtr.S
+ Ia32/ReadIdtr.S
+ Ia32/WriteGdtr.S
+ Ia32/ReadGdtr.S
+ Ia32/ReadTr.S
+ Ia32/ReadSs.S
+ Ia32/ReadGs.S
+ Ia32/ReadFs.S
+ Ia32/ReadEs.S
+ Ia32/ReadDs.S
+ Ia32/ReadCs.S
+ Ia32/WriteDr7.S
+ Ia32/WriteDr6.S
+ Ia32/WriteDr5.S
+ Ia32/WriteDr4.S
+ Ia32/WriteDr3.S
+ Ia32/WriteDr2.S
+ Ia32/WriteDr1.S
+ Ia32/WriteDr0.S
+ Ia32/ReadDr7.S
+ Ia32/ReadDr6.S
+ Ia32/ReadDr5.S
+ Ia32/ReadDr4.S
+ Ia32/ReadDr3.S
+ Ia32/ReadDr2.S
+ Ia32/ReadDr1.S
+ Ia32/ReadDr0.S
+ Ia32/WriteCr4.S
+ Ia32/WriteCr3.S
+ Ia32/WriteCr2.S
+ Ia32/WriteCr0.S
+ Ia32/ReadCr4.S
+ Ia32/ReadCr3.S
+ Ia32/ReadCr2.S
+ Ia32/ReadCr0.S
+ Ia32/WriteMsr64.S
+ Ia32/ReadMsr64.S
+ Ia32/ReadEflags.S
+ Ia32/CpuIdEx.S
+ Ia32/CpuId.S
+ Ia32/LongJump.S
+ Ia32/SetJump.S
+ Ia32/SwapBytes64.S
+ Ia32/DivU64x64Remainder.S
+ Ia32/DivU64x32Remainder.S
+ Ia32/ModU64x32.S
+ Ia32/DivU64x32.S
+ Ia32/MultU64x64.S
+ Ia32/MultU64x32.S
+ Ia32/RRotU64.S
+ Ia32/LRotU64.S
+ Ia32/ARShiftU64.S
+ Ia32/RShiftU64.S
+ Ia32/LShiftU64.S
+ Ia32/DivS64x64Remainder.c
+ Ia32/InternalSwitchStack.c
+ Ia32/Non-existing.c
+ Unaligned.c
+ x86WriteIdtr.c
+ x86WriteGdtr.c
+ x86Thunk.c
+ x86ReadIdtr.c
+ x86ReadGdtr.c
+ x86Msr.c
+ x86MemoryFence.c
+ x86GetInterruptState.c
+ x86FxSave.c
+ x86FxRestore.c
+ x86EnablePaging64.c
+ x86EnablePaging32.c
+ x86DisablePaging64.c
+ x86DisablePaging32.c
+ Synchronization.c
+ SynchronizationMsc.c
+ SynchronizationGcc.c
+
+[Sources.X64]
+ X64/Thunk16.asm
+ X64/CpuFlushTlb.asm
+ X64/CpuBreakpoint.c
+ X64/CpuPause.asm
+ X64/CpuSleep.asm
+ X64/EnableDisableInterrupts.asm
+ X64/DisableInterrupts.asm
+ X64/EnableInterrupts.asm
+ X64/InterlockedCompareExchange64.asm
+ X64/InterlockedCompareExchange32.asm
+ X64/InterlockedDecrement.c
+ X64/InterlockedIncrement.c
+ X64/FlushCacheLine.asm
+ X64/Invd.asm
+ X64/Wbinvd.asm
+ X64/DisablePaging64.asm
+ X64/EnablePaging64.asm
+ X64/Mwait.asm
+ X64/Monitor.asm
+ X64/ReadPmc.asm
+ X64/ReadTsc.asm
+ X64/WriteMm7.asm
+ X64/WriteMm6.asm
+ X64/WriteMm5.asm
+ X64/WriteMm4.asm
+ X64/WriteMm3.asm
+ X64/WriteMm2.asm
+ X64/WriteMm1.asm
+ X64/WriteMm0.asm
+ X64/ReadMm7.asm
+ X64/ReadMm6.asm
+ X64/ReadMm5.asm
+ X64/ReadMm4.asm
+ X64/ReadMm3.asm
+ X64/ReadMm2.asm
+ X64/ReadMm1.asm
+ X64/ReadMm0.asm
+ X64/FxRestore.asm
+ X64/FxSave.asm
+ X64/WriteLdtr.asm
+ X64/ReadLdtr.asm
+ X64/WriteIdtr.asm
+ X64/ReadIdtr.asm
+ X64/WriteGdtr.asm
+ X64/ReadGdtr.asm
+ X64/ReadTr.asm
+ X64/ReadSs.asm
+ X64/ReadGs.asm
+ X64/ReadFs.asm
+ X64/ReadEs.asm
+ X64/ReadDs.asm
+ X64/ReadCs.asm
+ X64/WriteDr7.asm
+ X64/WriteDr6.asm
+ X64/WriteDr5.asm
+ X64/WriteDr4.asm
+ X64/WriteDr3.asm
+ X64/WriteDr2.asm
+ X64/WriteDr1.asm
+ X64/WriteDr0.asm
+ X64/ReadDr7.asm
+ X64/ReadDr6.asm
+ X64/ReadDr5.asm
+ X64/ReadDr4.asm
+ X64/ReadDr3.asm
+ X64/ReadDr2.asm
+ X64/ReadDr1.asm
+ X64/ReadDr0.asm
+ X64/WriteCr4.asm
+ X64/WriteCr3.asm
+ X64/WriteCr2.asm
+ X64/WriteCr0.asm
+ X64/ReadCr4.asm
+ X64/ReadCr3.asm
+ X64/ReadCr2.asm
+ X64/ReadCr0.asm
+ X64/WriteMsr64.c
+ X64/ReadMsr64.c
+ X64/ReadEflags.asm
+ X64/CpuIdEx.asm
+ X64/CpuId.asm
+ X64/LongJump.asm
+ X64/SetJump.asm
+ X64/SwitchStack.asm
+ X64/Non-existing.c
+ Math64.c
+ Unaligned.c
+ x86WriteIdtr.c
+ x86WriteGdtr.c
+ x86Thunk.c
+ x86ReadIdtr.c
+ x86ReadGdtr.c
+ x86Msr.c
+ x86MemoryFence.c
+ x86GetInterruptState.c
+ x86FxSave.c
+ x86FxRestore.c
+ x86EnablePaging64.c
+ x86EnablePaging32.c
+ x86DisablePaging64.c
+ x86DisablePaging32.c
+ X64/WriteMsr64.S
+ X64/WriteMm7.S
+ X64/WriteMm6.S
+ X64/WriteMm5.S
+ X64/WriteMm4.S
+ X64/WriteMm3.S
+ X64/WriteMm2.S
+ X64/WriteMm1.S
+ X64/WriteMm0.S
+ X64/WriteLdtr.S
+ X64/WriteIdtr.S
+ X64/WriteGdtr.S
+ X64/WriteDr7.S
+ X64/WriteDr6.S
+ X64/WriteDr5.S
+ X64/WriteDr4.S
+ X64/WriteDr3.S
+ X64/WriteDr2.S
+ X64/WriteDr1.S
+ X64/WriteDr0.S
+ X64/WriteCr4.S
+ X64/WriteCr3.S
+ X64/WriteCr2.S
+ X64/WriteCr0.S
+ X64/Wbinvd.S
+ X64/Thunk16.S
+ X64/SwitchStack.S
+ X64/SetJump.S
+ X64/ReadTsc.S
+ X64/ReadTr.S
+ X64/ReadSs.S
+ X64/ReadPmc.S
+ X64/ReadMsr64.S
+ X64/ReadMm7.S
+ X64/ReadMm6.S
+ X64/ReadMm5.S
+ X64/ReadMm4.S
+ X64/ReadMm3.S
+ X64/ReadMm2.S
+ X64/ReadMm1.S
+ X64/ReadMm0.S
+ X64/ReadLdtr.S
+ X64/ReadIdtr.S
+ X64/ReadGs.S
+ X64/ReadGdtr.S
+ X64/ReadFs.S
+ X64/ReadEs.S
+ X64/ReadEflags.S
+ X64/ReadDs.S
+ X64/ReadDr7.S
+ X64/ReadDr6.S
+ X64/ReadDr5.S
+ X64/ReadDr4.S
+ X64/ReadDr3.S
+ X64/ReadDr2.S
+ X64/ReadDr1.S
+ X64/ReadDr0.S
+ X64/ReadCs.S
+ X64/ReadCr4.S
+ X64/ReadCr3.S
+ X64/ReadCr2.S
+ X64/ReadCr0.S
+ X64/Mwait.S
+ X64/Monitor.S
+ X64/LongJump.S
+ X64/Invd.S
+ X64/InterlockedIncrement.S
+ X64/InterlockedDecrement.S
+ X64/InterlockedCompareExchange64.S
+ X64/InterlockedCompareExchange32.S
+ X64/FxSave.S
+ X64/FxRestore.S
+ X64/FlushCacheLine.S
+ X64/EnablePaging64.S
+ X64/EnableInterrupts.S
+ X64/EnableDisableInterrupts.S
+ X64/DisablePaging64.S
+ X64/DisableInterrupts.S
+ X64/CpuSleep.S
+ X64/CpuPause.S
+ X64/CpuId.S
+ X64/CpuIdEx.S
+ X64/CpuFlushTlb.S
+ X64/CpuBreakpoint.S
+ Synchronization.c
+ SynchronizationMsc.c
+ SynchronizationGcc.c
+
+[Sources.IPF]
+ Ipf/AccessGp.s
+ Ipf/ReadCpuid.s
+ Ipf/ExecFc.s
+ Ipf/AsmPalCall.s
+ Ipf/AccessPsr.s
+ Ipf/AccessPmr.s
+ Ipf/AccessKr.s
+ Ipf/AccessGcr.s
+ Ipf/AccessEicr.s
+ Ipf/AccessDbr.s
+ Ipf/FlushCacheRange.s
+ Ipf/InternalSwitchStack.c
+ Ipf/GetInterruptState.s
+ Ipf/CpuFlushTlb.s
+ Ipf/CpuPause.s
+ Ipf/Synchronization.c
+ Ipf/InterlockedCompareExchange64.s
+ Ipf/InterlockedCompareExchange32.s
+ Ipf/CpuBreakpoint.c
+ Ipf/Unaligned.c
+ Ipf/SwitchStack.s
+ Ipf/longjmp.s
+ Ipf/setjmp.s
+ Ipf/PalCallStatic.s
+ Ipf/ia_64gen.h
+ Ipf/asm.h
+ Math64.c
+ Synchronization.c
+ SynchronizationMsc.c
+ SynchronizationGcc.c
+
+[Sources.EBC]
+ Synchronization.c
+ Ebc/Synchronization.c
+ Ebc/CpuBreakpoint.c
+ Ebc/SetJumpLongJump.c
+ Ebc/SwitchStack.c
+ Unaligned.c
+ Math64.c
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PcdLib
+ TimerLib
+ DebugLib
+ BaseMemoryLib
+
+
+################################################################################
+#
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ PcdSpinLockTimeout|gEfiMdePkgTokenSpaceGuid
+ PcdMaximumLinkedListLength|gEfiMdePkgTokenSpaceGuid
+ PcdMaximumAsciiStringLength|gEfiMdePkgTokenSpaceGuid
+ PcdMaximumUnicodeStringLength|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BaseLib/BaseLib.msa b/MdePkg/Library/BaseLib/BaseLib.msa new file mode 100644 index 0000000000..96b303c8a4 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLib.msa @@ -0,0 +1,660 @@ +<?xml version="1.0" encoding="UTF-8"?> +<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0"> + <MsaHeader> + <ModuleName>BaseLib</ModuleName> + <ModuleType>BASE</ModuleType> + <GuidValue>27d67720-ea68-48ae-93da-a3a074c90e30</GuidValue> + <Version>1.0</Version> + <Abstract>Component description file for Base Library</Abstract> + <Description>Base Library implementation.</Description> + <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright> + <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License> + <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification> + </MsaHeader> + <ModuleDefinitions> + <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures> + <BinaryModule>false</BinaryModule> + <OutputFileBasename>BaseLib</OutputFileBasename> + </ModuleDefinitions> + <LibraryClassDefinitions> + <LibraryClass Usage="ALWAYS_PRODUCED"> + <Keyword>BaseLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>BaseMemoryLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>DebugLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>TimerLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>PcdLib</Keyword> + </LibraryClass> + </LibraryClassDefinitions> + <SourceFiles> + <Filename>BaseLibInternals.h</Filename> + <Filename>String.c</Filename> + <Filename>LinkedList.c</Filename> + <Filename>Cpu.c</Filename> + <Filename>CpuDeadLoop.c</Filename> + <Filename>BitField.c</Filename> + <Filename>ARShiftU64.c</Filename> + <Filename>DivS64x64Remainder.c</Filename> + <Filename>DivU64x32.c</Filename> + <Filename>DivU64x32Remainder.c</Filename> + <Filename>DivU64x64Remainder.c</Filename> + <Filename>GetPowerOfTwo32.c</Filename> + <Filename>GetPowerOfTwo64.c</Filename> + <Filename>HighBitSet32.c</Filename> + <Filename>HighBitSet64.c</Filename> + <Filename>LowBitSet32.c</Filename> + <Filename>LowBitSet64.c</Filename> + <Filename>LRotU32.c</Filename> + <Filename>LRotU64.c</Filename> + <Filename>LShiftU64.c</Filename> + <Filename>ModU64x32.c</Filename> + <Filename>MultS64x64.c</Filename> + <Filename>MultU64x32.c</Filename> + <Filename>MultU64x64.c</Filename> + <Filename>RRotU32.c</Filename> + <Filename>RRotU64.c</Filename> + <Filename>RShiftU64.c</Filename> + <Filename>SetJump.c</Filename> + <Filename>LongJump.c</Filename> + <Filename>SwapBytes16.c</Filename> + <Filename>SwapBytes32.c</Filename> + <Filename>SwapBytes64.c</Filename> + <Filename>SwitchStack.c</Filename> + <Filename>CheckSum.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="GCC">SynchronizationGcc.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="MSFT">SynchronizationMsc.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="INTEL">Synchronization.c</Filename> + + <Filename SupArchList="IA32">x86DisablePaging32.c</Filename> + <Filename SupArchList="IA32">x86DisablePaging64.c</Filename> + <Filename SupArchList="IA32">x86EnablePaging32.c</Filename> + <Filename SupArchList="IA32">x86EnablePaging64.c</Filename> + <Filename SupArchList="IA32">x86FxRestore.c</Filename> + <Filename SupArchList="IA32">x86FxSave.c</Filename> + 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ToolChainFamily="MSFT">X64/ReadMsr64.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/WriteMsr64.c</Filename> + <Filename SupArchList="X64">X64/ReadCr0.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr2.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr3.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr4.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr0.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr2.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr3.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr4.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr0.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr1.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr2.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr3.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr4.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr5.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr6.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr7.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr0.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr1.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr2.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr3.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr4.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr5.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr6.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr7.asm</Filename> + <Filename SupArchList="X64">X64/ReadCs.asm</Filename> + <Filename SupArchList="X64">X64/ReadDs.asm</Filename> + <Filename SupArchList="X64">X64/ReadEs.asm</Filename> + <Filename SupArchList="X64">X64/ReadFs.asm</Filename> + <Filename SupArchList="X64">X64/ReadGs.asm</Filename> + <Filename SupArchList="X64">X64/ReadSs.asm</Filename> + <Filename SupArchList="X64">X64/ReadTr.asm</Filename> + <Filename SupArchList="X64">X64/ReadGdtr.asm</Filename> + <Filename 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SupArchList="IPF">Ipf/PalCallStatic.s</Filename> + <Filename SupArchList="IPF">Ipf/setjmp.s</Filename> + <Filename SupArchList="IPF">Ipf/longjmp.s</Filename> + <Filename SupArchList="IPF">Ipf/SwitchStack.s</Filename> + <Filename SupArchList="IPF">Ipf/Unaligned.c</Filename> + <Filename SupArchList="IPF">Ipf/CpuBreakpoint.c</Filename> + <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange32.s</Filename> + <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange64.s</Filename> + <Filename SupArchList="IPF">Ipf/Synchronization.c</Filename> + <Filename SupArchList="IPF">Ipf/CpuPause.s</Filename> + <Filename SupArchList="IPF">Ipf/CpuFlushTlb.s</Filename> + <Filename SupArchList="IPF">Ipf/GetInterruptState.s</Filename> + <Filename SupArchList="IPF">Ipf/InternalSwitchStack.c</Filename> + <Filename SupArchList="IPF">Ipf/FlushCacheRange.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessDbr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessEicr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessGcr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessKr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessPmr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessPsr.s</Filename> + <Filename SupArchList="IPF">Ipf/AsmPalCall.s</Filename> + <Filename SupArchList="IPF">Ipf/ExecFc.s</Filename> + <Filename SupArchList="IPF">Ipf/ReadCpuid.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessGp.s</Filename> + + <Filename SupArchList="EBC">Math64.c</Filename> + <Filename SupArchList="EBC">Unaligned.c</Filename> + <Filename SupArchList="EBC">Ebc/SwitchStack.c</Filename> + <Filename SupArchList="EBC">Ebc/SetJumpLongJump.c</Filename> + <Filename SupArchList="EBC">Ebc/CpuBreakpoint.c</Filename> + <Filename SupArchList="EBC">Ebc/Synchronization.c</Filename> + <Filename SupArchList="EBC">Synchronization.c</Filename> + </SourceFiles> + <NonProcessedFiles> + <Filename>Ia32/ARShiftU64.asm</Filename> + <Filename>Ia32/CpuBreakpoint.asm</Filename> + <Filename>Ia32/CpuFlushTlb.asm</Filename> + <Filename>Ia32/CpuId.asm</Filename> + <Filename>Ia32/CpuIdEx.asm</Filename> + <Filename>Ia32/CpuPause.asm</Filename> + <Filename>Ia32/CpuSleep.asm</Filename> + <Filename>Ia32/DisableInterrupts.asm</Filename> + <Filename>Ia32/DisablePaging32.asm</Filename> + <Filename>Ia32/DivU64x32.asm</Filename> + <Filename>Ia32/DivU64x32Remainder.asm</Filename> + <Filename>Ia32/DivU64x64Remainder.asm</Filename> + <Filename>Ia32/EnableDisableInterrupts.asm</Filename> + <Filename>Ia32/EnableInterrupts.asm</Filename> + <Filename>Ia32/EnablePaging32.asm</Filename> + <Filename>Ia32/EnablePaging64.asm</Filename> + <Filename>Ia32/FlushCacheLine.asm</Filename> + <Filename>Ia32/FxRestore.asm</Filename> + <Filename>Ia32/FxSave.asm</Filename> + <Filename>Ia32/InterlockedCompareExchange32.asm</Filename> + <Filename>Ia32/InterlockedCompareExchange64.asm</Filename> + <Filename>Ia32/InterlockedDecrement.asm</Filename> + <Filename>Ia32/InterlockedIncrement.asm</Filename> + <Filename>Ia32/Invd.asm</Filename> + <Filename>Ia32/LongJump.asm</Filename> + <Filename>Ia32/LRotU64.asm</Filename> + <Filename>Ia32/LShiftU64.asm</Filename> + <Filename>Ia32/ModU64x32.asm</Filename> + <Filename>Ia32/Monitor.asm</Filename> + <Filename>Ia32/MultU64x32.asm</Filename> + <Filename>Ia32/MultU64x64.asm</Filename> + <Filename>Ia32/Mwait.asm</Filename> + <Filename>Ia32/ReadCr0.asm</Filename> + <Filename>Ia32/ReadCr2.asm</Filename> + <Filename>Ia32/ReadCr3.asm</Filename> + <Filename>Ia32/ReadCr4.asm</Filename> + <Filename>Ia32/ReadCs.asm</Filename> + <Filename>Ia32/ReadDr0.asm</Filename> + <Filename>Ia32/ReadDr1.asm</Filename> + <Filename>Ia32/ReadDr2.asm</Filename> + <Filename>Ia32/ReadDr3.asm</Filename> + <Filename>Ia32/ReadDr4.asm</Filename> + <Filename>Ia32/ReadDr5.asm</Filename> + <Filename>Ia32/ReadDr6.asm</Filename> + <Filename>Ia32/ReadDr7.asm</Filename> + <Filename>Ia32/ReadDs.asm</Filename> + <Filename>Ia32/ReadEflags.asm</Filename> + <Filename>Ia32/ReadEs.asm</Filename> + <Filename>Ia32/ReadFs.asm</Filename> + <Filename>Ia32/ReadGdtr.asm</Filename> + <Filename>Ia32/ReadGs.asm</Filename> + <Filename>Ia32/ReadIdtr.asm</Filename> + <Filename>Ia32/ReadLdtr.asm</Filename> + <Filename>Ia32/ReadMm0.asm</Filename> + <Filename>Ia32/ReadMm1.asm</Filename> + <Filename>Ia32/ReadMm2.asm</Filename> + <Filename>Ia32/ReadMm3.asm</Filename> + <Filename>Ia32/ReadMm4.asm</Filename> + <Filename>Ia32/ReadMm5.asm</Filename> + <Filename>Ia32/ReadMm6.asm</Filename> + <Filename>Ia32/ReadMm7.asm</Filename> + <Filename>Ia32/ReadMsr64.asm</Filename> + <Filename>Ia32/ReadPmc.asm</Filename> + <Filename>Ia32/ReadSs.asm</Filename> + <Filename>Ia32/ReadTr.asm</Filename> + <Filename>Ia32/ReadTsc.asm</Filename> + <Filename>Ia32/RRotU64.asm</Filename> + <Filename>Ia32/RShiftU64.asm</Filename> + <Filename>Ia32/SetJump.asm</Filename> + <Filename>Ia32/SwapBytes64.asm</Filename> + <Filename>Ia32/Thunk16.asm</Filename> + <Filename>Ia32/Wbinvd.asm</Filename> + <Filename>Ia32/WriteCr0.asm</Filename> + <Filename>Ia32/WriteCr2.asm</Filename> + <Filename>Ia32/WriteCr3.asm</Filename> + <Filename>Ia32/WriteCr4.asm</Filename> + <Filename>Ia32/WriteDr0.asm</Filename> + <Filename>Ia32/WriteDr1.asm</Filename> + <Filename>Ia32/WriteDr2.asm</Filename> + <Filename>Ia32/WriteDr3.asm</Filename> + <Filename>Ia32/WriteDr4.asm</Filename> + <Filename>Ia32/WriteDr5.asm</Filename> + <Filename>Ia32/WriteDr6.asm</Filename> + <Filename>Ia32/WriteDr7.asm</Filename> + <Filename>Ia32/WriteGdtr.asm</Filename> + <Filename>Ia32/WriteIdtr.asm</Filename> + <Filename>Ia32/WriteLdtr.asm</Filename> + <Filename>Ia32/WriteMm0.asm</Filename> + <Filename>Ia32/WriteMm1.asm</Filename> + <Filename>Ia32/WriteMm2.asm</Filename> + <Filename>Ia32/WriteMm3.asm</Filename> + <Filename>Ia32/WriteMm4.asm</Filename> + <Filename>Ia32/WriteMm5.asm</Filename> + <Filename>Ia32/WriteMm6.asm</Filename> + <Filename>Ia32/WriteMm7.asm</Filename> + <Filename>Ia32/WriteMsr64.asm</Filename> + </NonProcessedFiles> + <PackageDependencies> + <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/> + </PackageDependencies> + <Externs> + <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification> + <Specification>EDK_RELEASE_VERSION 0x00020000</Specification> + </Externs> + <PcdCoded> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumUnicodeStringLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumUnicodeStringLength is not zero, the maximum + number of characters (not counting the NULL-terminator) in a + Unicode string cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumAsciiStringLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumAsciiStringLength is not zero, the maximum number + of characters (not counting the NULL-terminator) in an ASCII + string cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumLinkedListLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumLinkedListLength is not zero, the maximum number + of nodes (not counting the list header) in a linked list + cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdSpinLockTimeout</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdSpinLockTimeout is not zero, it stands for the timeout + value (unit: millisecond) for spin lock.</HelpText> + </PcdEntry> + </PcdCoded> +</ModuleSurfaceArea> diff --git a/MdePkg/Library/BaseLib/BaseLibInternals.h b/MdePkg/Library/BaseLib/BaseLibInternals.h new file mode 100644 index 0000000000..7b397e3721 --- /dev/null +++ b/MdePkg/Library/BaseLib/BaseLibInternals.h @@ -0,0 +1,872 @@ +/** @file
+ Declaration of internal functions in BaseLib.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseLibInternals.h
+
+**/
+
+#ifndef __BASE_LIB_INTERNALS__
+#define __BASE_LIB_INTERNALS__
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#define QUIENT_MAX_UINTN_DIVIDED_BY_10 ((UINTN) -1 / 10)
+#define REMINDER_MAX_UINTN_DIVIDED_BY_10 ((UINTN) -1 % 10)
+
+#define QUIENT_MAX_UINTN_DIVIDED_BY_16 ((UINTN) -1 / 16)
+#define REMINDER_MAX_UINTN_DIVIDED_BY_16 ((UINTN) -1 % 16)
+
+#define QUIENT_MAX_UINT64_DIVIDED_BY_10 ((UINT64) -1 / 10)
+#define REMINDER_MAX_UINT64_DIVIDED_BY_10 ((UINT64) -1 % 10)
+
+#define QUIENT_MAX_UINT64_DIVIDED_BY_16 ((UINT64) -1 / 16)
+#define REMINDER_MAX_UINT64_DIVIDED_BY_16 ((UINT64) -1 % 16)
+
+//
+// Math functions
+//
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits
+ are filled with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling
+ the low bits with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling
+ the high bits with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ );
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ );
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder
+ );
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ );
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return.
+ Marker will be ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param Marker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+InternalSwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VA_LIST Marker
+ );
+
+
+/**
+ Worker function that locates the Node in the List
+
+ By searching the List, finds the location of the Node in List. At the same time,
+ verifies the validity of this list.
+
+ If List is NULL, then ASSERT().
+ If List->ForwardLink is NULL, then ASSERT().
+ If List->backLink is NULL, then ASSERT().
+ If Node is NULL, then ASSERT();
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to a node in a linked list.
+ @param Node A pointer to one nod.
+
+ @retval TRUE Node is in List
+ @retval FALSE Node isn't in List, or List is invalid
+
+**/
+BOOLEAN
+IsNodeInList (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ );
+
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ );
+
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ );
+
+
+/**
+ Worker function that returns a bit field from Operand
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+
+ @return The bit field read.
+
+**/
+unsigned int
+BitFieldReadUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise OR,
+ and returns the result.
+
+ Performs a bitwise OR between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldOrUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int OrData
+ );
+
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise AND,
+ and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param AndData The value to And with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldAndUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int AndData
+ );
+
+
+/**
+ Worker function that checks ASSERT condition for JumpBuffer
+
+ Checks ASSERT condition for JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+VOID
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer.
+ This function never returns to the caller.
+ Instead is resumes execution based on the state of JumpBuffer.
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is restored.
+
+**/
+VOID
+EFIAPI
+InternalLongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ );
+
+
+//
+// Ia32 and x64 specific functions
+//
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ );
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ );
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ );
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ );
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ );
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ );
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+InternalX86EnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ );
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ );
+
+
+#elif defined (MDE_CPU_IPF)
+//
+//
+// IPF specific functions
+//
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param NewBsp A pointer to the new memory location for RSE backing
+ store.
+
+**/
+VOID
+EFIAPI
+AsmSwitchStackAndBackingStore (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VOID *NewBsp
+ );
+#else
+
+#endif
+
+#endif
diff --git a/MdePkg/Library/BaseLib/BitField.c b/MdePkg/Library/BaseLib/BitField.c new file mode 100644 index 0000000000..9c9981e314 --- /dev/null +++ b/MdePkg/Library/BaseLib/BitField.c @@ -0,0 +1,872 @@ +/** @file
+ Bit field functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BitField.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that returns a bit field from Operand
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+
+ @return The bit field read.
+
+**/
+unsigned int
+BitFieldReadUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return (Operand & ~((unsigned int)-2 << EndBit)) >> StartBit;
+}
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise OR,
+ and returns the result.
+
+ Performs a bitwise OR between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldOrUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int OrData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand | ((OrData << StartBit) & ~((unsigned int) -2 << EndBit));
+}
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise AND,
+ and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param AndData The value to And with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldAndUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int AndData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand & ~((~AndData << StartBit) & ~((unsigned int) -2 << EndBit));
+}
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr8 (
+ BitFieldAnd8 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr16 (
+ BitFieldAnd16 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr32 (
+ BitFieldAnd32 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);
+}
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ UINT64 Value1;
+ UINT64 Value2;
+
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+
+ Value1 = LShiftU64 (OrData, StartBit);
+ Value2 = LShiftU64 ((UINT64) - 2, EndBit);
+
+ return Operand | (Value1 & ~Value2);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ UINT64 Value1;
+ UINT64 Value2;
+
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+
+ Value1 = LShiftU64 (~AndData, StartBit);
+ Value2 = LShiftU64 ((UINT64)-2, EndBit);
+
+ return Operand & ~(Value1 & ~Value2);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr64 (
+ BitFieldAnd64 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
diff --git a/MdePkg/Library/BaseLib/CheckSum.c b/MdePkg/Library/BaseLib/CheckSum.c new file mode 100644 index 0000000000..61d74a41bb --- /dev/null +++ b/MdePkg/Library/BaseLib/CheckSum.c @@ -0,0 +1,339 @@ +/** @file
+ Utility functions to generate checksum based on 2's complement
+ algorithm.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CheckSum.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Calculate the sum of all elements in a buffer in unit of UINT8.
+ During calculation, the carry bits are dropped.
+
+ This function calculates the sum of all elements in a buffer
+ in unit of UINT8. The carry bits in result of addition are dropped.
+ The result is returned as UINT8. If Length is Zero, then Zero is
+ returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer .
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT8
+EFIAPI
+CalculateSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT8 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = (UINT8) (Sum + *(Buffer + Count));
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer
+ of 8-bit values.
+
+ This function first calculates the sum of the 8-bit values in the
+ buffer specified by Buffer and Length. The carry bits in the result
+ of addition are dropped. Then, the two's complement of the sum is
+ returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT8
+EFIAPI
+CalculateCheckSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT8 CheckSum;
+
+ CheckSum = CalculateSum8 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT8) (0x100 - CheckSum);
+}
+
+/**
+ Returns the sum of all elements in a buffer of 16-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 16-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT16
+EFIAPI
+CalculateSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT16 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x1) == 0);
+ ASSERT ((Length & 0x1) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = (UINT16) (Sum + *(Buffer + Count));
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 16-bit values.
+
+ This function first calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT16
+EFIAPI
+CalculateCheckSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT16 CheckSum;
+
+ CheckSum = CalculateSum16 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT16) (0x10000 - CheckSum);
+}
+
+
+/**
+ Returns the sum of all elements in a buffer of 32-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 32-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT32
+EFIAPI
+CalculateSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT32 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x3) == 0);
+ ASSERT ((Length & 0x3) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = Sum + *(Buffer + Count);
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 32-bit values.
+
+ This function first calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT32
+EFIAPI
+CalculateCheckSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT32 CheckSum;
+
+ CheckSum = CalculateSum32 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT32) ((UINT32)(-1) - CheckSum + 1);
+}
+
+
+/**
+ Returns the sum of all elements in a buffer of 64-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 64-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT64
+EFIAPI
+CalculateSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT64 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x7) == 0);
+ ASSERT ((Length & 0x7) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = Sum + *(Buffer + Count);
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 64-bit values.
+
+ This function first calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT64
+EFIAPI
+CalculateCheckSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT64 CheckSum;
+
+ CheckSum = CalculateSum64 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT64) ((UINT64)(-1) - CheckSum + 1);
+}
+
+
diff --git a/MdePkg/Library/BaseLib/CommonHeader.h b/MdePkg/Library/BaseLib/CommonHeader.h new file mode 100644 index 0000000000..07c57bd27e --- /dev/null +++ b/MdePkg/Library/BaseLib/CommonHeader.h @@ -0,0 +1,35 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/TimerLib.h>
+#include <Library/PcdLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseLib/Cpu.c b/MdePkg/Library/BaseLib/Cpu.c new file mode 100644 index 0000000000..d8564c04d4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Cpu.c @@ -0,0 +1,72 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Cpu.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ )
+{
+ BOOLEAN InterruptState;
+
+ InterruptState = GetInterruptState ();
+ DisableInterrupts ();
+ return InterruptState;
+}
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ )
+{
+ if (InterruptState) {
+ EnableInterrupts ();
+ } else {
+ DisableInterrupts ();
+ }
+ return InterruptState;
+}
diff --git a/MdePkg/Library/BaseLib/CpuDeadLoop.c b/MdePkg/Library/BaseLib/CpuDeadLoop.c new file mode 100644 index 0000000000..01810d1713 --- /dev/null +++ b/MdePkg/Library/BaseLib/CpuDeadLoop.c @@ -0,0 +1,38 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ )
+{
+ volatile UINTN Index;
+
+ for (Index = 0; Index == 0;);
+}
diff --git a/MdePkg/Library/BaseLib/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/DivS64x64Remainder.c new file mode 100644 index 0000000000..d8e2a81e4c --- /dev/null +++ b/MdePkg/Library/BaseLib/DivS64x64Remainder.c @@ -0,0 +1,51 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32.c b/MdePkg/Library/BaseLib/DivU64x32.c new file mode 100644 index 0000000000..a599b87816 --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/DivU64x32Remainder.c new file mode 100644 index 0000000000..524a800fdf --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x32Remainder.c @@ -0,0 +1,51 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/DivU64x64Remainder.c new file mode 100644 index 0000000000..49e80b4e11 --- /dev/null +++ b/MdePkg/Library/BaseLib/DivU64x64Remainder.c @@ -0,0 +1,51 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo32.c b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c new file mode 100644 index 0000000000..dcfdc4bdd4 --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ )
+{
+ if (Operand == 0) {
+ return 0;
+ }
+
+ return 1ul << HighBitSet32 (Operand);
+}
diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo64.c b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c new file mode 100644 index 0000000000..57d9c0a00b --- /dev/null +++ b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ )
+{
+ if (Operand == 0) {
+ return 0;
+ }
+
+ return LShiftU64 (1, HighBitSet64 (Operand));
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet32.c b/MdePkg/Library/BaseLib/HighBitSet32.c new file mode 100644 index 0000000000..46811fb840 --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet32.c @@ -0,0 +1,49 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return - 1;
+ }
+ for (BitIndex = 31; (INT32)Operand > 0; BitIndex--, Operand <<= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/HighBitSet64.c b/MdePkg/Library/BaseLib/HighBitSet64.c new file mode 100644 index 0000000000..e9319877cb --- /dev/null +++ b/MdePkg/Library/BaseLib/HighBitSet64.c @@ -0,0 +1,57 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ if (Operand == (UINT32)Operand) {
+ //
+ // Operand is just a 32-bit integer
+ //
+ return HighBitSet32 ((UINT32)Operand);
+ }
+
+ //
+ // Operand is really a 64-bit integer
+ //
+ if (sizeof (UINTN) == sizeof (UINT32)) {
+ return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;
+ } else {
+ return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S new file mode 100644 index 0000000000..84762082ba --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ARShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit arithmetic right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathARShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathARShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathARShiftU64):
+ movb 12(%esp), %cl
+ movl 8(%esp), %eax
+ cltd
+ testb $32, %cl
+ cmovz %eax, %edx
+ cmovz 4(%esp), %eax
+ shrdl %cl, %edx, %eax
+ sar %cl, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm new file mode 100644 index 0000000000..17f07bb66c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathARShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathARShiftU64 PROC
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+InternalMathARShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c new file mode 100644 index 0000000000..4e1f715ab2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c @@ -0,0 +1,38 @@ +/** @file
+ 64-bit arithmetic right shift function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 4]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, dword ptr [Operand + 0]
+ shrd eax, edx, cl
+ sar edx, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S new file mode 100644 index 0000000000..59a1143259 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuBreakpoint.s
+#
+# Abstract:
+#
+# CpuBreakpoint function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuBreakpoint)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuBreakpoint (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuBreakpoint):
+ int $3
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm new file mode 100644 index 0000000000..a4d397874d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuBreakpoint PROC
+ int 3
+ ret
+_CpuBreakpoint ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c new file mode 100644 index 0000000000..71bb896c82 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c @@ -0,0 +1,35 @@ +/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+void __debugbreak ();
+
+#pragma intrinsic(__debugbreak)
+
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __debugbreak ();
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S new file mode 100644 index 0000000000..07550ff412 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuFlushTlb.Asm
+#
+# Abstract:
+#
+# CpuFlushTlb function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuFlushTlb)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuFlushTlb (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuFlushTlb):
+ movl %cr3, %eax
+ movl %eax, %cr3
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm new file mode 100644 index 0000000000..4f0c4f9944 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuFlushTlb PROC
+ mov eax, cr3
+ mov cr3, eax ; moving to CR3 flushes TLB
+ ret
+CpuFlushTlb ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c new file mode 100644 index 0000000000..2660deb096 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c @@ -0,0 +1,31 @@ +/** @file
+ CpuFlushTlb function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+CpuFlushTlb (
+ VOID
+ )
+{
+ _asm {
+ mov eax, cr3
+ mov cr3, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.S b/MdePkg/Library/BaseLib/Ia32/CpuId.S new file mode 100644 index 0000000000..2373ad1a8e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuId.S @@ -0,0 +1,68 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.Asm
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmCpuid)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmCpuid (
+# IN UINT32 RegisterInEax,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+ASM_PFX(AsmCpuid):
+ push %ebx
+ push %ebp
+ movl %esp, %ebp
+ movl 12(%ebp), %eax
+ cpuid
+ push %ecx
+ movl 16(%ebp), %ecx
+ jecxz L1
+ movl %eax, (%ecx)
+L1:
+ movl 20(%ebp), %ecx
+ jecxz L2
+ movl %ebx, (%ecx)
+L2:
+ movl 24(%ebp), %ecx
+ jecxz L3
+ popl (%ecx)
+L3:
+ movl 28(%ebp), %ecx
+ jecxz L4
+ movl %edx, (%ecx)
+L4:
+ movl 12(%ebp), %eax
+ leave
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.asm b/MdePkg/Library/BaseLib/Ia32/CpuId.asm new file mode 100644 index 0000000000..5c0eb1ffc8 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuId.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; );
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.c b/MdePkg/Library/BaseLib/Ia32/CpuId.c new file mode 100644 index 0000000000..d1893aebbe --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuId.c @@ -0,0 +1,54 @@ +/** @file
+ AsmCpuid function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+AsmCpuid (
+ IN UINT32 Index,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S new file mode 100644 index 0000000000..2d7ec493cf --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S @@ -0,0 +1,72 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuIdEx.Asm
+#
+# Abstract:
+#
+# AsmCpuidEx function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ .686:
+ .code:
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# AsmCpuidEx (
+# IN UINT32 RegisterInEax,
+# IN UINT32 RegisterInEcx,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmCpuidEx)
+ASM_PFX(AsmCpuidEx):
+ push %ebx
+ push %ebp
+ movl %esp, %ebp
+ movl 12(%ebp), %eax
+ movl 16(%ebp), %ecx
+ cpuid
+ push %ecx
+ movl 20(%ebp), %ecx
+ jecxz L1
+ movl %eax, (%ecx)
+L1:
+ movl 24(%ebp), %ecx
+ jecxz L2
+ movl %ebx, (%ecx)
+L2:
+ movl 28(%ebp), %ecx
+ jecxz L3
+ popl (%ecx)
+L3:
+ movl 32(%ebp), %edx
+ jecxz L4
+ movl %edx, (%ecx)
+L4:
+ movl 12(%ebp), %eax
+ leave
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm new file mode 100644 index 0000000000..cdebec2114 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm @@ -0,0 +1,68 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuIdEx.Asm
+; +; Abstract: +; +; AsmCpuidEx function
+; +; Notes: +; +;------------------------------------------------------------------------------ + + .686
+ .model flat,C
+ .code + +;------------------------------------------------------------------------------ +; UINT32 +; EFIAPI +; AsmCpuidEx (
+; IN UINT32 RegisterInEax, +; IN UINT32 RegisterInEcx, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuidEx PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ mov ecx, [ebp + 16]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov edx, [ebp + 32]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuidEx ENDP
+ + END diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c new file mode 100644 index 0000000000..99e2edb428 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c @@ -0,0 +1,55 @@ +/** @file
+ AsmCpuidEx function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+AsmCpuidEx (
+ IN UINT32 Index,
+ IN UINT32 SubIndex,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ mov ecx, SubIndex
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.S b/MdePkg/Library/BaseLib/Ia32/CpuPause.S new file mode 100644 index 0000000000..3661b1ff86 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuPause.Asm
+#
+# Abstract:
+#
+# CpuPause function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuPause)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuPause (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuPause):
+ pause
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.asm b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm new file mode 100644 index 0000000000..4c7135fc9c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.c b/MdePkg/Library/BaseLib/Ia32/CpuPause.c new file mode 100644 index 0000000000..7750ee417e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.c @@ -0,0 +1,30 @@ +/** @file
+ CpuPause function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ )
+{
+ _asm {
+ pause
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.S b/MdePkg/Library/BaseLib/Ia32/CpuSleep.S new file mode 100644 index 0000000000..8bf9d55ba7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuSleep.Asm
+#
+# Abstract:
+#
+# CpuSleep function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuSleep)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuSleep (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuSleep):
+ hlt
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm b/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm new file mode 100644 index 0000000000..8a779f7017 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuSleep PROC
+ hlt
+ ret
+CpuSleep ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.c b/MdePkg/Library/BaseLib/Ia32/CpuSleep.c new file mode 100644 index 0000000000..59753747ee --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.c @@ -0,0 +1,30 @@ +/** @file
+ CpuSleep function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ )
+{
+ _asm {
+ hlt
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S new file mode 100644 index 0000000000..3a7a81d1b6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableInterrupts.Asm
+#
+# Abstract:
+#
+# DisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(DisableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# DisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(DisableInterrupts):
+ cli
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm new file mode 100644 index 0000000000..35209ff0d4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c new file mode 100644 index 0000000000..f1ef0f1706 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c @@ -0,0 +1,30 @@ +/** @file
+ DisableInterrupts function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ cli
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S new file mode 100644 index 0000000000..f950b058b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S @@ -0,0 +1,57 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisablePaging32.Asm
+#
+# Abstract:
+#
+# InternalX86DisablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86DisablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86DisablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86DisablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi
+ cli
+ movl %cr0, %eax
+ btrl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm new file mode 100644 index 0000000000..d2949773b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ ; EntryPoint() should not return
+InternalX86DisablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c new file mode 100644 index 0000000000..d3c77183eb --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c @@ -0,0 +1,51 @@ +/** @file
+ AsmDisablePaging32 function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi // save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd // restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ // EntryPoint() should not return
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c new file mode 100644 index 0000000000..da3afbf95c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c @@ -0,0 +1,59 @@ +/** @file
+ Integer division worker functions for Ia32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DivS64x64Remainder.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "../BaseLibInternals.h"
+
+/**
+ Worker function that Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ INT64 Quot;
+
+ Quot = InternalMathDivRemU64x64 (
+ Dividend >= 0 ? Dividend : -Dividend,
+ Divisor >= 0 ? Divisor : -Divisor,
+ (UINT64 *) Remainder
+ );
+ if (Remainder != NULL && Dividend < 0) {
+ *Remainder = -*Remainder;
+ }
+ return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S new file mode 100644 index 0000000000..170819858e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathDivU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivU64x32):
+ movl 8(%esp), %eax
+ movl 12(%esp), %ecx
+ xorl %edx, %edx
+ divl %ecx
+ push %eax
+ movl 8(%esp), %eax
+ divl %ecx
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm new file mode 100644 index 0000000000..25ca074ad9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathDivU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, [esp + 8]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ ret
+InternalMathDivU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c new file mode 100644 index 0000000000..d680c29c41 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c @@ -0,0 +1,38 @@ +/** @file
+ Calculate the quotient of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, dword ptr [Dividend]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S new file mode 100644 index 0000000000..987e0ead89 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S @@ -0,0 +1,51 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivError.asm
+#
+# Abstract:
+#
+# Set error flag for all division functions
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathDivRemU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor,
+# OUT UINT32 *Remainder
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x32):
+ movl 12(%esp), %ecx
+ movl 8(%esp), %eax
+ xorl %edx, %edx
+ divl %ecx
+ push %eax
+ movl 8(%esp), %eax
+ divl %ecx
+ movl 20(%esp), %ecx
+ jecxz L1
+ movl %edx, (%ecx)
+L1:
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm new file mode 100644 index 0000000000..e025b22c2d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm @@ -0,0 +1,51 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor,
+; OUT UINT32 *Remainder
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x32 PROC
+ mov ecx, [esp + 12] ; ecx <- divisor
+ mov eax, [esp + 8] ; eax <- dividend[32..63]
+ xor edx, edx
+ div ecx ; eax <- quotient[32..63], edx <- remainder
+ push eax
+ mov eax, [esp + 8] ; eax <- dividend[0..31]
+ div ecx ; eax <- quotient[0..31]
+ mov ecx, [esp + 20] ; ecx <- Remainder
+ jecxz @F ; abandon remainder if Remainder == NULL
+ mov [ecx], edx
+@@:
+ pop edx ; edx <- quotient[32..63]
+ ret
+InternalMathDivRemU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c new file mode 100644 index 0000000000..a9c54a7e19 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c @@ -0,0 +1,43 @@ +/** @file
+ Set error flag for all division functions
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ _asm {
+ mov ecx, Divisor
+ mov eax, dword ptr [Dividend + 4]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov ecx, Remainder
+ jecxz RemainderNull // abandon remainder if Remainder == NULL
+ mov [ecx], edx
+RemainderNull:
+ pop edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S new file mode 100644 index 0000000000..36008bf567 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S @@ -0,0 +1,94 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x64Remainder.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+# both the quotient and the remainder
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x64 (
+# IN UINT64 Dividend,
+# IN UINT64 Divisor,
+# OUT UINT64 *Remainder OPTIONAL
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x64):
+ movl 16(%esp), %ecx
+ testl %ecx, %ecx
+ jnz Hard
+ movl 20(%esp), %ecx
+ jecxz L1
+ and $0, 4(%ecx)
+ movl %ecx, 16(%esp)
+L1:
+ jmp ASM_PFX(InternalMathDivRemU64x32)
+Hard:
+ push %ebx
+ push %esi
+ push %edi
+ mov 20(%esp), %edx
+ mov 16(%esp), %eax
+ movl %edx, %edi
+ movl %eax, %esi
+ mov 24(%esp), %ebx
+L2:
+ shrl %edx
+ rcrl $1, %eax
+ shrdl $1, %ecx, %ebx
+ shrl %ecx
+ jnz L2
+ divl %ebx
+ movl %eax, %ebx
+ movl 28(%esp), %ecx
+ mull 24(%esp)
+ imull %ebx, %ecx
+ addl %ecx, %edx
+ mov 32(%esp), %ecx
+ jc TooLarge
+ cmpl %edx, %edi
+ ja Correct
+ jb TooLarge
+ cmpl %eax, %esi
+ jae Correct
+TooLarge:
+ decl %ebx
+ jecxz Return
+ sub 24(%esp), %eax
+ sbb 28(%esp), %edx
+Correct:
+ jecxz Return
+ subl %eax, %esi
+ sbbl %edx, %edi
+ movl %esi, (%ecx)
+ movl %edi, 4(%ecx)
+Return:
+ movl %ebx, %eax
+ xorl %edx, %edx
+ pop %edi
+ pop %esi
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm new file mode 100644 index 0000000000..95e57efac1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm @@ -0,0 +1,92 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+EXTERN InternalMathDivRemU64x32:PROC
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x64 (
+; IN UINT64 Dividend,
+; IN UINT64 Divisor,
+; OUT UINT64 *Remainder OPTIONAL
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x64 PROC
+ mov ecx, [esp + 16] ; ecx <- divisor[32..63]
+ test ecx, ecx
+ jnz _@DivRemU64x64 ; call _@DivRemU64x64 if Divisor > 2^32
+ mov ecx, [esp + 20]
+ jecxz @F
+ and dword ptr [ecx + 4], 0 ; zero high dword of remainder
+ mov [esp + 16], ecx ; set up stack frame to match DivRemU64x32
+@@:
+ jmp InternalMathDivRemU64x32
+InternalMathDivRemU64x64 ENDP
+
+_@DivRemU64x64 PROC USES ebx esi edi
+ mov edx, dword ptr [esp + 20]
+ mov eax, dword ptr [esp + 16] ; edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax ; edi:esi <- dividend
+ mov ebx, dword ptr [esp + 24] ; ecx:ebx <- divisor
+@@:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz @B
+ div ebx
+ mov ebx, eax ; ebx <- quotient
+ mov ecx, [esp + 28] ; ecx <- high dword of divisor
+ mul dword ptr [esp + 24] ; edx:eax <- quotient * divisor[0..31]
+ imul ecx, ebx ; ecx <- quotient * divisor[32..63]
+ add edx, ecx ; edx <- (quotient * divisor)[32..63]
+ mov ecx, dword ptr [esp + 32] ; ecx <- addr for Remainder
+ jc @TooLarge ; product > 2^64
+ cmp edi, edx ; compare high 32 bits
+ ja @Correct
+ jb @TooLarge ; product > dividend
+ cmp esi, eax
+ jae @Correct ; product <= dividend
+@TooLarge:
+ dec ebx ; adjust quotient by -1
+ jecxz @Return ; return if Remainder == NULL
+ sub eax, dword ptr [esp + 24]
+ sbb edx, dword ptr [esp + 28] ; edx:eax <- (quotient - 1) * divisor
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx ; edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx ; eax <- quotient
+ xor edx, edx ; quotient is 32 bits long
+ ret
+_@DivRemU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c new file mode 100644 index 0000000000..29413b25b2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c @@ -0,0 +1,71 @@ +/** @file
+ Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+ both the quotient and the remainderSet error flag for all division functions
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ _asm {
+ mov edx, dword ptr [Dividend + 4]
+ mov eax, dword ptr [Dividend + 0] // edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax // edi:esi <- dividend
+ mov ecx, dword ptr [Divisor + 4]
+ mov ebx, dword ptr [Divisor + 0] // ecx:ebx <- divisor
+BitLoop:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz BitLoop
+ div ebx
+ mov ebx, eax // ebx <- quotient
+ mov ecx, dword ptr [Divisor + 4]
+ mul dword ptr [Divisor]
+ imul ecx, ebx
+ add edx, ecx
+ mov ecx, Remainder
+ jc TooLarge // product > 2^64
+ cmp edi, edx // compare high 32 bits
+ ja Correct
+ jb TooLarge // product > dividend
+ cmp esi, eax
+ jae Correct // product <= dividend
+TooLarge:
+ dec ebx // adjust quotient by -1
+ jecxz Return // return if Remainder == NULL
+ sub eax, dword ptr [Divisor + 0]
+ sbb edx, dword ptr [Divisor + 4]
+Correct:
+ jecxz Return
+ sub esi, eax
+ sbb edi, edx // edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+Return:
+ mov eax, ebx // eax <- quotient
+ xor edx, edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S new file mode 100644 index 0000000000..2799832d24 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableDisableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableDisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(EnableDisableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableDisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(EnableDisableInterrupts):
+ sti
+ cli
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..fe2016da87 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+_EnableDisableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c new file mode 100644 index 0000000000..7194ca2536 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c @@ -0,0 +1,33 @@ +/** @file
+ EnableDisableInterrupts function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ nop
+ nop
+ cli
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S new file mode 100644 index 0000000000..2c83e261a4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(EnableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(EnableInterrupts):
+ sti
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm new file mode 100644 index 0000000000..194dd8f935 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableInterrupts PROC
+ sti
+ ret
+_EnableInterrupts ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c new file mode 100644 index 0000000000..ada4100cf6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c @@ -0,0 +1,30 @@ +/** @file
+ EnableInterrupts function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S new file mode 100644 index 0000000000..054a5c9d06 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S @@ -0,0 +1,57 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging32.Asm
+#
+# Abstract:
+#
+# InternalX86EnablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86EnablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi
+ cli
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm new file mode 100644 index 0000000000..ae98b93285 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save flags in edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore flags
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86EnablePaging32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c new file mode 100644 index 0000000000..e4765a7f28 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c @@ -0,0 +1,51 @@ +/** @file
+ AsmEnablePaging32 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S new file mode 100644 index 0000000000..44b7e16558 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S @@ -0,0 +1,68 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging64.Asm
+#
+# Abstract:
+#
+# InternalX86EnablePaging64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86EnablePaging64)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging64 (
+# IN UINT16 CodeSelector,
+# IN UINT64 EntryPoint,
+# IN UINT64 Context1, OPTIONAL
+# IN UINT64 Context2, OPTIONAL
+# IN UINT64 NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging64):
+ cli
+ movl $LongStart, (%esp)
+ movl %cr4, %eax
+ orb $0x20, %al
+ movl %eax, %cr4 # enable PAE
+ movl $0xc0000080, %ecx
+ rdmsr
+ orb $1, %ah # set LME
+ wrmsr
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl %eax, %cr0 # enable paging
+ lret
+LongStart: # long mode starts here
+ .byte 0x67, 0x48
+ movl (%esp), %ebx # mov rbx, [esp]
+ .byte 0x67, 0x48
+ movl 8(%esp), %ecx # mov rcx, [esp + 8]
+ .byte 0x67, 0x48
+ movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
+ .byte 0x67, 0x48
+ movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
+ .byte 0x48
+ addl $0x-20, %esp # add rsp, -20h
+ call *%ebx # call rbx
+ jmp .
diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm new file mode 100644 index 0000000000..d54c27e719 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm @@ -0,0 +1,73 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging64 (
+; IN UINT16 Cs,
+; IN UINT64 EntryPoint,
+; IN UINT64 Context1, OPTIONAL
+; IN UINT64 Context2, OPTIONAL
+; IN UINT64 NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging64 PROC
+ cli
+ mov [esp], @F ; offset for far retf, seg is the 1st arg
+ mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31 ; set PG
+ mov cr0, eax ; enable paging
+ retf ; topmost 2 dwords hold the address
+@@: ; long mode starts here
+ DB 67h, 48h ; 32-bit address size, 64-bit operand size
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 67h, 48h
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 67h, 48h
+ mov edx, [esp + 10h] ; mov rdx, [esp + 10h]
+ DB 67h, 48h
+ mov esp, [esp + 18h] ; mov rsp, [esp + 18h]
+ DB 48h
+ add esp, -20h ; add rsp, -20h
+ call ebx ; call rbx
+ hlt ; no one should get here
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S new file mode 100644 index 0000000000..b8c87c23c1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FlushCacheLine.Asm
+#
+# Abstract:
+#
+# AsmFlushCacheLine function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmFlushCacheLine)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFlushCacheLine (
+# IN VOID *LinearAddress
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmFlushCacheLine):
+ movl 4(%esp), %eax
+ clflush (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm new file mode 100644 index 0000000000..f4ad87de7b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ mov eax, [esp + 4]
+ clflush [eax]
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c new file mode 100644 index 0000000000..5071a39bb2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c @@ -0,0 +1,31 @@ +/** @file
+ AsmFlushCacheLine function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ )
+{
+ _asm {
+ mov eax, LinearAddress
+ clflush [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.S b/MdePkg/Library/BaseLib/Ia32/FxRestore.S new file mode 100644 index 0000000000..4560751c62 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxRestore.Asm
+#
+# Abstract:
+#
+# InternalX86FxRestore function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86FxRestore)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86FxRestore (
+# IN CONST IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86FxRestore):
+ movl 4(%esp), %eax
+ fxrstor (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.asm b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm new file mode 100644 index 0000000000..5def311700 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxrstor [eax]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.c b/MdePkg/Library/BaseLib/Ia32/FxRestore.c new file mode 100644 index 0000000000..e95fb67b43 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.c @@ -0,0 +1,31 @@ +/** @file
+ AsmFxRestore function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxrstor [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.S b/MdePkg/Library/BaseLib/Ia32/FxSave.S new file mode 100644 index 0000000000..343db36a9f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxSave.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxSave.Asm
+#
+# Abstract:
+#
+# InternalX86FxSave function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86FxSave)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86FxSave (
+# OUT IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86FxSave):
+ movl 4(%esp), %eax
+ fxsave (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.asm b/MdePkg/Library/BaseLib/Ia32/FxSave.asm new file mode 100644 index 0000000000..d3a9f9cd48 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxSave.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxsave [eax]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.c b/MdePkg/Library/BaseLib/Ia32/FxSave.c new file mode 100644 index 0000000000..721de5368b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/FxSave.c @@ -0,0 +1,31 @@ +/** @file
+ AsmFxSave function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxsave [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S new file mode 100644 index 0000000000..0abb605aa3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange32.Asm
+#
+# Abstract:
+#
+# InternalSyncCompareExchange32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncCompareExchange32)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncCompareExchange32 (
+# IN UINT32 *Value,
+# IN UINT32 CompareValue,
+# IN UINT32 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncCompareExchange32):
+ movl 4(%esp), %ecx
+ movl 8(%esp), %eax
+ movl 12(%esp), %edx
+ lock
+ cmpxchgl %edx, (%ecx)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..47d959fa6a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov ecx, [esp + 4]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ lock cmpxchg [ecx], edx
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c new file mode 100644 index 0000000000..d584a900d3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c @@ -0,0 +1,35 @@ +/** @file
+ InterlockedCompareExchange32 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ _asm {
+ mov ecx, Value
+ mov eax, CompareValue
+ mov edx, ExchangeValue
+ lock cmpxchg [ecx], edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S new file mode 100644 index 0000000000..ee3278ca09 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S @@ -0,0 +1,52 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange64.Asm
+#
+# Abstract:
+#
+# InternalSyncCompareExchange64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncCompareExchange64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalSyncCompareExchange64 (
+# IN UINT64 *Value,
+# IN UINT64 CompareValue,
+# IN UINT64 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncCompareExchange64):
+ push %esi
+ push %ebx
+ movl 12(%esp), %esi
+ movl 16(%esp), %eax
+ movl 20(%esp), %edx
+ movl 24(%esp), %ebx
+ movl 28(%esp), %ecx
+ lock
+ cmpxchg8b (%esi)
+ pop %ebx
+ pop %esi
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..18311e77d3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalSyncCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC USES esi ebx
+ mov esi, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov ebx, [esp + 24]
+ mov ecx, [esp + 28]
+ lock cmpxchg8b qword ptr [esi]
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c new file mode 100644 index 0000000000..a0d0ba89e1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c @@ -0,0 +1,36 @@ +/** @file
+ InterlockedCompareExchange64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ _asm {
+ mov esi, Value
+ mov eax, dword ptr [CompareValue + 0]
+ mov edx, dword ptr [CompareValue + 4]
+ mov ebx, dword ptr [ExchangeValue + 0]
+ mov ecx, dword ptr [ExchangeValue + 4]
+ lock cmpxchg8b qword ptr [esi]
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S new file mode 100644 index 0000000000..a92ea6ba37 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S @@ -0,0 +1,43 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedDecrement.Asm
+#
+# Abstract:
+#
+# InternalSyncDecrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncDecrement)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncDecrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncDecrement):
+ movl 4(%esp), %eax
+ lock
+ decl (%eax)
+ movl (%eax), %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm new file mode 100644 index 0000000000..082429e520 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ mov eax, [esp + 4]
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c new file mode 100644 index 0000000000..afa9a15f60 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c @@ -0,0 +1,31 @@ +/** @file
+ InterlockedDecrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S new file mode 100644 index 0000000000..88c35d5c0c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S @@ -0,0 +1,43 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedIncrement.Asm
+#
+# Abstract:
+#
+# InternalSyncIncrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncIncrement)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncIncrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncIncrement):
+ movl 4(%esp), %eax
+ lock
+ incl (%eax)
+ movl (%eax), %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm new file mode 100644 index 0000000000..ea27e666ca --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ mov eax, [esp + 4]
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c new file mode 100644 index 0000000000..82fa86f0cd --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c @@ -0,0 +1,32 @@ +/** @file
+ InterLockedIncrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c new file mode 100644 index 0000000000..2fb0710cc6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c @@ -0,0 +1,70 @@ +/** @file
+ SwitchStack() function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: InternalSwitchStack.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return.
+ Marker will be ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param Marker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+InternalSwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VA_LIST Marker
+ )
+{
+ BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
+
+ //
+ // Stack should be aligned with CPU_STACK_ALIGNMENT
+ //
+ ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
+
+ JumpBuffer.Eip = (UINTN)EntryPoint;
+ JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);
+ JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);
+ ((VOID**)JumpBuffer.Esp)[1] = Context1;
+ ((VOID**)JumpBuffer.Esp)[2] = Context2;
+
+ LongJump (&JumpBuffer, (UINTN)-1);
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.S b/MdePkg/Library/BaseLib/Ia32/Invd.S new file mode 100644 index 0000000000..4e85d2935f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Invd.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Invd.Asm
+#
+# Abstract:
+#
+# AsmInvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmInvd)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmInvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmInvd):
+ invd
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.asm b/MdePkg/Library/BaseLib/Ia32/Invd.asm new file mode 100644 index 0000000000..5767f54848 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Invd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmInvd PROC
+ invd
+ ret
+_AsmInvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.c b/MdePkg/Library/BaseLib/Ia32/Invd.c new file mode 100644 index 0000000000..47f651342d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Invd.c @@ -0,0 +1,30 @@ +/** @file
+ AsmInvd function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ )
+{
+ _asm {
+ invd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.S b/MdePkg/Library/BaseLib/Ia32/LRotU64.S new file mode 100644 index 0000000000..fe3ab60af6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.S @@ -0,0 +1,51 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LRotU64.asm
+#
+# Abstract:
+#
+# 64-bit left rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathLRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathLRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathLRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 12(%esp), %edx
+ movl 8(%esp), %eax
+ shldl %cl, %edx, %ebx
+ shldl %cl, %eax, %edx
+ rorl %cl, %ebx
+ shldl %cl, %ebx, %eax
+ testb $32, %cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.asm b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm new file mode 100644 index 0000000000..a6437d868f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm @@ -0,0 +1,49 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.asm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathLRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.c b/MdePkg/Library/BaseLib/Ia32/LRotU64.c new file mode 100644 index 0000000000..48a6a6bb68 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.c @@ -0,0 +1,41 @@ +/** @file
+ 64-bit left rotation for Ia32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov edx, dword ptr [Operand + 4]
+ mov eax, dword ptr [Operand + 0]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.S b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S new file mode 100644 index 0000000000..9c93242bd4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit left shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathLShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathLShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathLShiftU64):
+ movb 12(%esp), %cl
+ xorl %eax, %eax
+ movl 4(%esp), %edx
+ testb $32, %cl
+ cmovz %edx, %eax
+ cmovz 0x8(%esp), %edx
+ shld %cl, %eax, %edx
+ shl %cl, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm new file mode 100644 index 0000000000..6c3d9a4ee6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLShiftU64 PROC
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32 ; Count >= 32?
+ cmovz eax, edx
+ cmovz edx, [esp + 8]
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+InternalMathLShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.c b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c new file mode 100644 index 0000000000..766b33b097 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c @@ -0,0 +1,38 @@ +/** @file
+ 64-bit left shift function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor eax, eax
+ mov edx, dword ptr [Operand + 0]
+ test cl, 32 // Count >= 32?
+ cmovz eax, edx
+ cmovz edx, dword ptr [Operand + 4]
+ shld edx, eax, cl
+ shl eax, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.S b/MdePkg/Library/BaseLib/Ia32/LongJump.S new file mode 100644 index 0000000000..95dd444913 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LongJump.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LongJump.Asm
+#
+# Abstract:
+#
+# Implementation of _LongJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalLongJump)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalLongJump (
+# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalLongJump):
+ pop %eax
+ pop %edx
+ pop %eax
+ movl (%edx), %ebx
+ movl 4(%edx), %esi
+ movl 8(%edx), %edi
+ movl 12(%edx), %ebp
+ movl 16(%edx), %esp
+ jmp *20(%edx)
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.asm b/MdePkg/Library/BaseLib/Ia32/LongJump.asm new file mode 100644 index 0000000000..0309f6ae71 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LongJump.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of _LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalLongJump (
+; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+InternalLongJump PROC
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20] ; restore "eip"
+InternalLongJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.c b/MdePkg/Library/BaseLib/Ia32/LongJump.c new file mode 100644 index 0000000000..3186da522f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/LongJump.c @@ -0,0 +1,40 @@ +/** @file
+ Implementation of _LongJump() on IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalLongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ _asm {
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.S b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S new file mode 100644 index 0000000000..decfeaac3b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S @@ -0,0 +1,45 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.S
+#
+# Abstract:
+#
+# Calculate the remainder of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathModU64x32)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalMathModU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathModU64x32):
+ movl 8(%esp), %eax
+ movl 12(%esp), %ecx
+ xorl %edx, %edx
+ divl %ecx
+ movl 4(%esp), %eax
+ divl %ecx
+ movl %edx, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm new file mode 100644 index 0000000000..9e5f9aeda9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalMathModU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathModU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+InternalMathModU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.c b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c new file mode 100644 index 0000000000..4337f8cbbb --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c @@ -0,0 +1,36 @@ +/** @file
+ Calculate the remainder of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov eax, edx
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.S b/MdePkg/Library/BaseLib/Ia32/Monitor.S new file mode 100644 index 0000000000..2651124ea3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Monitor.S @@ -0,0 +1,45 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Monitor.Asm
+#
+# Abstract:
+#
+# AsmMonitor function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmMonitor)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMonitor (
+# IN UINTN Eax,
+# IN UINTN Ecx,
+# IN UINTN Edx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMonitor):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ monitor %eax, %ecx, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.asm b/MdePkg/Library/BaseLib/Ia32/Monitor.asm new file mode 100644 index 0000000000..174bd7665f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Monitor.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0fh, 1, 0c8h ; monitor
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.c b/MdePkg/Library/BaseLib/Ia32/Monitor.c new file mode 100644 index 0000000000..a1b3f7b2df --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Monitor.c @@ -0,0 +1,37 @@ +/** @file
+ AsmMonitor function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmMonitor (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx,
+ IN UINTN RegisterEdx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ mov edx, RegisterEdx
+ _emit 0x0f // monitor
+ _emit 0x01
+ _emit 0xc8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.S b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S new file mode 100644 index 0000000000..5c44957838 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S @@ -0,0 +1,46 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x32.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+ .386:
+ .code:
+
+.globl ASM_PFX(InternalMathMultU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathMultU64x32 (
+# IN UINT64 Multiplicand,
+# IN UINT32 Multiplier
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathMultU64x32):
+ movl 12(%esp), %ecx
+ movl %ecx, %eax
+ imull 8(%esp), %ecx
+ mull 0x4(%esp)
+ addl %ecx, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm new file mode 100644 index 0000000000..9c9ef06996 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x32 (
+; IN UINT64 Multiplicand,
+; IN UINT32 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8] ; overflow not detectable
+ mul dword ptr [esp + 4]
+ add edx, ecx
+ ret
+InternalMathMultU64x32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.c b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c new file mode 100644 index 0000000000..8eecb14b8c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c @@ -0,0 +1,35 @@ +/** @file
+ Calculate the product of a 64-bit integer and a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ _asm {
+ mov ecx, Multiplier
+ mov eax, ecx
+ imul ecx, dword ptr [Multiplicand + 4] // overflow not detectable
+ mul dword ptr [Multiplicand + 0]
+ add edx, ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.S b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S new file mode 100644 index 0000000000..40dda6f1a4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S @@ -0,0 +1,49 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x64.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and another 64-bit integer
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathMultU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathMultU64x64 (
+# IN UINT64 Multiplicand,
+# IN UINT64 Multiplier
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathMultU64x64):
+ push %ebx
+ movl 8(%esp), %ebx
+ movl 16(%esp), %edx
+ movl %ebx, %ecx
+ movl %edx, %eax
+ imull 20(%esp), %ebx
+ imull 12(%esp), %edx
+ addl %edx, %ebx
+ mull %ecx
+ addl %ebx, %edx
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm new file mode 100644 index 0000000000..f3679548f1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x64 (
+; IN UINT64 Multiplicand,
+; IN UINT64 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x64 PROC USES ebx
+ mov ebx, [esp + 8] ; ebx <- M1[0..31]
+ mov edx, [esp + 16] ; edx <- M2[0..31]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20] ; ebx <- M1[0..31] * M2[32..63]
+ imul edx, [esp + 12] ; edx <- M1[32..63] * M2[0..31]
+ add ebx, edx ; carries are abandoned
+ mul ecx ; edx:eax <- M1[0..31] * M2[0..31]
+ add edx, ebx ; carries are abandoned
+ ret
+InternalMathMultU64x64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.c b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c new file mode 100644 index 0000000000..52e553de1a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c @@ -0,0 +1,39 @@ +/** @file
+ Calculate the product of a 64-bit integer and another 64-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ _asm {
+ mov ebx, dword ptr [Multiplicand + 0]
+ mov edx, dword ptr [Multiplier + 0]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, dword ptr [Multiplier + 4]
+ imul edx, dword ptr [Multiplicand + 4]
+ add ebx, edx
+ mul ecx
+ add edx, ebx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.S b/MdePkg/Library/BaseLib/Ia32/Mwait.S new file mode 100644 index 0000000000..80782b7f84 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Mwait.S @@ -0,0 +1,43 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Mwait.Asm
+#
+# Abstract:
+#
+# AsmMwait function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmMwait)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMwait (
+# IN UINTN Eax,
+# IN UINTN Ecx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMwait):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ mwait %eax, %ecx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.asm b/MdePkg/Library/BaseLib/Ia32/Mwait.asm new file mode 100644 index 0000000000..3e5f48c280 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Mwait.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0fh, 1, 0c9h ; mwait
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.c b/MdePkg/Library/BaseLib/Ia32/Mwait.c new file mode 100644 index 0000000000..9ced4c9297 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Mwait.c @@ -0,0 +1,35 @@ +/** @file
+ AsmMwait function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmMwait (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ _emit 0x0f // mwait
+ _emit 0x01
+ _emit 0xC9
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Non-existing.c b/MdePkg/Library/BaseLib/Ia32/Non-existing.c new file mode 100644 index 0000000000..0343455b47 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Non-existing.c @@ -0,0 +1,65 @@ +/** @file
+ Non-existing BaseLib functions on Ia32
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "../BaseLibInternals.h"
+
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ //
+ // This function cannot work on IA32 platform
+ //
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.S b/MdePkg/Library/BaseLib/Ia32/RRotU64.S new file mode 100644 index 0000000000..7e8984287a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.S @@ -0,0 +1,51 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RRotU64.asm
+#
+# Abstract:
+#
+# 64-bit right rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathRRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathRRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathRRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 8(%esp), %eax
+ movl 12(%esp), %edx
+ shrdl %cl, %eax, %ebx
+ shrdl %cl, %edx, %eax
+ roll %cl, %ebx
+ shrdl %cl, %ebx, %edx
+ testb $32, %cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.asm b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm new file mode 100644 index 0000000000..fe13abc0d5 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm @@ -0,0 +1,49 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.asm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax ; switch eax & edx if Count >= 32
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathRRotU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.c b/MdePkg/Library/BaseLib/Ia32/RRotU64.c new file mode 100644 index 0000000000..6b48222c57 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.c @@ -0,0 +1,41 @@ +/** @file
+ 64-bit right rotation for Ia32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 0]
+ mov edx, dword ptr [Operand + 4]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 // Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.S b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S new file mode 100644 index 0000000000..7d58fd6c47 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S @@ -0,0 +1,49 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit logical right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+ .686:
+ .code:
+
+.globl ASM_PFX(InternalMathRShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathRShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathRShiftU64):
+ movb 12(%esp), %cl
+ xorl %edx, %edx
+ movl 8(%esp), %eax
+ testb $32, %cl
+ cmovz %eax, %edx
+ cmovz 0x4(%esp), %eax
+ shrdl %cl, %edx, %eax
+ shr %cl, %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm new file mode 100644 index 0000000000..faa4e96771 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRShiftU64 PROC
+ mov cl, [esp + 12] ; cl <- Count
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32 ; Count >= 32?
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+InternalMathRShiftU64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.c b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c new file mode 100644 index 0000000000..7480ebd639 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c @@ -0,0 +1,38 @@ +/** @file
+ 64-bit logical right shift function for IA-32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor edx, edx
+ mov eax, dword ptr [Operand + 4]
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, dword ptr [Operand + 0]
+ shrd eax, edx, cl
+ shr edx, cl
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.S b/MdePkg/Library/BaseLib/Ia32/ReadCr0.S new file mode 100644 index 0000000000..b08c7d75a7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr0.Asm
+#
+# Abstract:
+#
+# AsmReadCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr0):
+ movl %cr0, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm new file mode 100644 index 0000000000..a8fe4a7e89 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov eax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.c b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c new file mode 100644 index 0000000000..d220e8ed5d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c @@ -0,0 +1,29 @@ +/** @file
+ AsmReadCr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr0
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.S b/MdePkg/Library/BaseLib/Ia32/ReadCr2.S new file mode 100644 index 0000000000..0b82a25906 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr2.Asm
+#
+# Abstract:
+#
+# AsmReadCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr2):
+ movl %cr2, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm new file mode 100644 index 0000000000..a6a9b8c08f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov eax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.c b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c new file mode 100644 index 0000000000..9ef4d44c6e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadCr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr2
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.S b/MdePkg/Library/BaseLib/Ia32/ReadCr3.S new file mode 100644 index 0000000000..f973dbef23 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr3.Asm
+#
+# Abstract:
+#
+# AsmReadCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr3):
+ movl %cr3, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm new file mode 100644 index 0000000000..97b9ee4b99 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov eax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.c b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c new file mode 100644 index 0000000000..04efb497e6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadCr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr3
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.S b/MdePkg/Library/BaseLib/Ia32/ReadCr4.S new file mode 100644 index 0000000000..ee94991e8c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr4.Asm
+#
+# Abstract:
+#
+# AsmReadCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr4):
+ movl %cr4, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm new file mode 100644 index 0000000000..a454903387 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov eax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.c b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c new file mode 100644 index 0000000000..9f24fce50d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c @@ -0,0 +1,32 @@ +/** @file
+ AsmReadCr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f // mov eax, cr4
+ _emit 0x20
+ _emit 0xE0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.S b/MdePkg/Library/BaseLib/Ia32/ReadCs.S new file mode 100644 index 0000000000..7406cfba3a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCs.Asm
+#
+# Abstract:
+#
+# AsmReadCs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadCs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCs):
+ movl %cs, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.asm b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm new file mode 100644 index 0000000000..68497e21fe --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov eax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.c b/MdePkg/Library/BaseLib/Ia32/ReadCs.c new file mode 100644 index 0000000000..52b9a7ffa0 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadCs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, cs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.S b/MdePkg/Library/BaseLib/Ia32/ReadDr0.S new file mode 100644 index 0000000000..1ba42d9e65 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr0.Asm
+#
+# Abstract:
+#
+# AsmReadDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr0):
+ movl %dr0, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm new file mode 100644 index 0000000000..8792ce40b9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov eax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.c b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c new file mode 100644 index 0000000000..b8ba6535a2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.S b/MdePkg/Library/BaseLib/Ia32/ReadDr1.S new file mode 100644 index 0000000000..4fe89da5d7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr1.Asm
+#
+# Abstract:
+#
+# AsmReadDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr1)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr1):
+ movl %dr1, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm new file mode 100644 index 0000000000..e924407d57 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov eax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.c b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c new file mode 100644 index 0000000000..8820256e08 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr1
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.S b/MdePkg/Library/BaseLib/Ia32/ReadDr2.S new file mode 100644 index 0000000000..916fad740d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr2.Asm
+#
+# Abstract:
+#
+# AsmReadDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr2):
+ movl %dr2, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm new file mode 100644 index 0000000000..bbbef7e2fa --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov eax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.c b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c new file mode 100644 index 0000000000..30f8da6911 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr2
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.S b/MdePkg/Library/BaseLib/Ia32/ReadDr3.S new file mode 100644 index 0000000000..3505589441 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr3.Asm
+#
+# Abstract:
+#
+# AsmReadDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr3):
+ movl %dr3, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm new file mode 100644 index 0000000000..af2e7a2689 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov eax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.c b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c new file mode 100644 index 0000000000..5858419512 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr3
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.S b/MdePkg/Library/BaseLib/Ia32/ReadDr4.S new file mode 100644 index 0000000000..44c56aa624 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr4.Asm
+#
+# Abstract:
+#
+# AsmReadDr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr4):
+ movl %dr4, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm new file mode 100644 index 0000000000..606f26fe2a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.c b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c new file mode 100644 index 0000000000..df081aaf65 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c @@ -0,0 +1,32 @@ +/** @file
+ AsmReadDr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.S b/MdePkg/Library/BaseLib/Ia32/ReadDr5.S new file mode 100644 index 0000000000..3a012256ef --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr5.Asm
+#
+# Abstract:
+#
+# AsmReadDr5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr5)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr5):
+ movl %dr5, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm new file mode 100644 index 0000000000..091792dab9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.c b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c new file mode 100644 index 0000000000..d26d1eab41 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c @@ -0,0 +1,32 @@ +/** @file
+ AsmReadDr5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.S b/MdePkg/Library/BaseLib/Ia32/ReadDr6.S new file mode 100644 index 0000000000..e5857b055a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr6.Asm
+#
+# Abstract:
+#
+# AsmReadDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr6)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr6):
+ movl %dr6, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm new file mode 100644 index 0000000000..479414b3e6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov eax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.c b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c new file mode 100644 index 0000000000..732334d24f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr6
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.S b/MdePkg/Library/BaseLib/Ia32/ReadDr7.S new file mode 100644 index 0000000000..8054b968f1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr7.Asm
+#
+# Abstract:
+#
+# AsmReadDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr7)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr7):
+ movl %dr7, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm new file mode 100644 index 0000000000..7dee98121c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov eax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.c b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c new file mode 100644 index 0000000000..b61d674da2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadDr7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr7
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.S b/MdePkg/Library/BaseLib/Ia32/ReadDs.S new file mode 100644 index 0000000000..41e6bd4d92 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDs.Asm
+#
+# Abstract:
+#
+# AsmReadDs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadDs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDs):
+ movl %ds, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.asm b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm new file mode 100644 index 0000000000..b8edcb6996 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov eax, ds
+ ret
+AsmReadDs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.c b/MdePkg/Library/BaseLib/Ia32/ReadDs.c new file mode 100644 index 0000000000..ce12d0c940 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadDs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ds
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.S b/MdePkg/Library/BaseLib/Ia32/ReadEflags.S new file mode 100644 index 0000000000..95b219159f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEflags.Asm
+#
+# Abstract:
+#
+# AsmReadEflags function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadEflags)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadEflags (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadEflags):
+ pushfl
+ pop %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm new file mode 100644 index 0000000000..32d55b35b9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfd
+ pop eax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.c b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c new file mode 100644 index 0000000000..0600c66b25 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadEflags function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ )
+{
+ __asm {
+ pushfd
+ pop eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.S b/MdePkg/Library/BaseLib/Ia32/ReadEs.S new file mode 100644 index 0000000000..ed60065fa2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEs.Asm
+#
+# Abstract:
+#
+# AsmReadEs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadEs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadEs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadEs):
+ movl %es, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.asm b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm new file mode 100644 index 0000000000..48f141748e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov eax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.c b/MdePkg/Library/BaseLib/Ia32/ReadEs.c new file mode 100644 index 0000000000..d7780b7771 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadEs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, es
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.S b/MdePkg/Library/BaseLib/Ia32/ReadFs.S new file mode 100644 index 0000000000..19d89ef7b3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadFs.Asm
+#
+# Abstract:
+#
+# AsmReadFs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadFs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadFs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadFs):
+ movl %fs, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.asm b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm new file mode 100644 index 0000000000..ae87107599 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov eax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.c b/MdePkg/Library/BaseLib/Ia32/ReadFs.c new file mode 100644 index 0000000000..193e9078bc --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadFs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, fs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S new file mode 100644 index 0000000000..ba6564c38a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGdtr.Asm
+#
+# Abstract:
+#
+# InternalX86ReadGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86ReadGdtr)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86ReadGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86ReadGdtr):
+ movl 4(%esp), %eax
+ sgdt (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm new file mode 100644 index 0000000000..beacb62b0d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ mov eax, [esp + 4]
+ sgdt fword ptr [eax]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c new file mode 100644 index 0000000000..3b35d26297 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadGdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ sgdt fword ptr [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.S b/MdePkg/Library/BaseLib/Ia32/ReadGs.S new file mode 100644 index 0000000000..1862596288 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGs.Asm
+#
+# Abstract:
+#
+# AsmReadGs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadGs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadGs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadGs):
+ movl %gs, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.asm b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm new file mode 100644 index 0000000000..93313b8998 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov eax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.c b/MdePkg/Library/BaseLib/Ia32/ReadGs.c new file mode 100644 index 0000000000..01c191d504 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadGs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, gs
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S new file mode 100644 index 0000000000..7880e7a8af --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadIdtr.Asm
+#
+# Abstract:
+#
+# InternalX86ReadIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86ReadIdtr)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86ReadIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86ReadIdtr):
+ movl 4(%esp), %eax
+ sidt (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm new file mode 100644 index 0000000000..dc7d473507 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadIdtr (
+; OUT IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadIdtr PROC
+ mov eax, [esp + 4]
+ sidt fword ptr [eax]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c new file mode 100644 index 0000000000..0e3c25ab62 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadIdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ sidt fword ptr [eax]
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S new file mode 100644 index 0000000000..301edbdced --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadLdtr.Asm
+#
+# Abstract:
+#
+# AsmReadLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadLdtr)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadLdtr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadLdtr):
+ sldt %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm new file mode 100644 index 0000000000..449b7cfe99 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt ax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c new file mode 100644 index 0000000000..df9a2b97cf --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadLdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ )
+{
+ _asm {
+ sldt ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.S b/MdePkg/Library/BaseLib/Ia32/ReadMm0.S new file mode 100644 index 0000000000..c6434fcc79 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm0.Asm
+#
+# Abstract:
+#
+# AsmReadMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm0):
+ push %eax
+ push %eax
+ movq %mm0, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm new file mode 100644 index 0000000000..e43c45fab4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.c b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c new file mode 100644 index 0000000000..8c74545e2a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.S b/MdePkg/Library/BaseLib/Ia32/ReadMm1.S new file mode 100644 index 0000000000..775a517219 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm1.Asm
+#
+# Abstract:
+#
+# AsmReadMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm1)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm1):
+ push %eax
+ push %eax
+ movq %mm1, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm new file mode 100644 index 0000000000..9f92a44aa0 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.c b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c new file mode 100644 index 0000000000..c6721c8d35 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.S b/MdePkg/Library/BaseLib/Ia32/ReadMm2.S new file mode 100644 index 0000000000..7c23a67f68 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm2.Asm
+#
+# Abstract:
+#
+# AsmReadMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm2):
+ push %eax
+ push %eax
+ movq %mm2, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm new file mode 100644 index 0000000000..38e4cb0047 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.c b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c new file mode 100644 index 0000000000..35c0a2ade1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.S b/MdePkg/Library/BaseLib/Ia32/ReadMm3.S new file mode 100644 index 0000000000..ad888b1be1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm3.Asm
+#
+# Abstract:
+#
+# AsmReadMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm3):
+ push %eax
+ push %eax
+ movq %mm3, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm new file mode 100644 index 0000000000..e646762bf3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.c b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c new file mode 100644 index 0000000000..fabc524c4b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.S b/MdePkg/Library/BaseLib/Ia32/ReadMm4.S new file mode 100644 index 0000000000..a69e914957 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm4.Asm
+#
+# Abstract:
+#
+# AsmReadMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm4):
+ push %eax
+ push %eax
+ movq %mm4, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm new file mode 100644 index 0000000000..8da079d82c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.c b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c new file mode 100644 index 0000000000..42fa902e00 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.S b/MdePkg/Library/BaseLib/Ia32/ReadMm5.S new file mode 100644 index 0000000000..bc047a157f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm5.Asm
+#
+# Abstract:
+#
+# AsmReadMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm5)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm5):
+ push %eax
+ push %eax
+ movq %mm5, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm new file mode 100644 index 0000000000..9d6b4746a6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.c b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c new file mode 100644 index 0000000000..c6b35f109e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.S b/MdePkg/Library/BaseLib/Ia32/ReadMm6.S new file mode 100644 index 0000000000..a16871779f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm6.Asm
+#
+# Abstract:
+#
+# AsmReadMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm6)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm6):
+ push %eax
+ push %eax
+ movq %mm6, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm new file mode 100644 index 0000000000..95c73f601b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.c b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c new file mode 100644 index 0000000000..123a0def3d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.S b/MdePkg/Library/BaseLib/Ia32/ReadMm7.S new file mode 100644 index 0000000000..c273279171 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.S @@ -0,0 +1,44 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm7.Asm
+#
+# Abstract:
+#
+# AsmReadMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm7)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm7):
+ push %eax
+ push %eax
+ movq %mm7, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm new file mode 100644 index 0000000000..0bd3b9b61f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.c b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c new file mode 100644 index 0000000000..5c8d87f49b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c @@ -0,0 +1,35 @@ +/** @file
+ AsmReadMm7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S new file mode 100644 index 0000000000..e0655b2077 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMsr64.Asm
+#
+# Abstract:
+#
+# AsmReadMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMsr64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadMsr64 (
+# IN UINT32 Index
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMsr64):
+ movl 4(%esp), %ecx
+ rdmsr
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm new file mode 100644 index 0000000000..9a3e11ccca --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c new file mode 100644 index 0000000000..94aa2c8e80 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadMsr64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ )
+{
+ _asm {
+ mov ecx, Index
+ rdmsr
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.S b/MdePkg/Library/BaseLib/Ia32/ReadPmc.S new file mode 100644 index 0000000000..fd75ef486e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.S @@ -0,0 +1,41 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadPmc.Asm
+#
+# Abstract:
+#
+# AsmReadPmc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadPmc)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadPmc (
+# IN UINT32 PmcIndex
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadPmc):
+ movl 4(%esp), %ecx
+ rdpmc
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm new file mode 100644 index 0000000000..17156d4652 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.c b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c new file mode 100644 index 0000000000..2bba18815f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadPmc function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 PmcIndex
+ )
+{
+ _asm {
+ mov ecx, PmcIndex
+ rdpmc
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.S b/MdePkg/Library/BaseLib/Ia32/ReadSs.S new file mode 100644 index 0000000000..752cb26081 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadSs.Asm
+#
+# Abstract:
+#
+# AsmReadSs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadSs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadSs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadSs):
+ movl %ss, %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.asm b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm new file mode 100644 index 0000000000..414353755f --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov eax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.c b/MdePkg/Library/BaseLib/Ia32/ReadSs.c new file mode 100644 index 0000000000..b65e1acefe --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.c @@ -0,0 +1,31 @@ +/** @file
+ AsmReadSs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ss
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.S b/MdePkg/Library/BaseLib/Ia32/ReadTr.S new file mode 100644 index 0000000000..8b095bedd4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTr.Asm
+#
+# Abstract:
+#
+# AsmReadTr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadTr)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadTr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadTr):
+ str %eax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.asm b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm new file mode 100644 index 0000000000..4f4e64b186 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str ax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.c b/MdePkg/Library/BaseLib/Ia32/ReadTr.c new file mode 100644 index 0000000000..ce192bcd3a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadTr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ )
+{
+ _asm {
+ str ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.S b/MdePkg/Library/BaseLib/Ia32/ReadTsc.S new file mode 100644 index 0000000000..a4436dd278 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTsc.Asm
+#
+# Abstract:
+#
+# AsmReadTsc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadTsc)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadTsc (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadTsc):
+ rdtsc
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm new file mode 100644 index 0000000000..fff38292ef --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.c b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c new file mode 100644 index 0000000000..2e169317a1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadTsc function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ )
+{
+ _asm {
+ rdtsc
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.S b/MdePkg/Library/BaseLib/Ia32/SetJump.S new file mode 100644 index 0000000000..a3a70b6cf1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SetJump.S @@ -0,0 +1,49 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetJump.Asm
+#
+# Abstract:
+#
+# Implementation of SetJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# SetJump (
+# OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(SetJump):
+ pushl 0x4(%esp)
+ call ASM_PFX(InternalAssertJumpBuffer)
+ pop %ecx
+ pop %ecx
+ movl (%esp), %edx
+ movl %ebx, (%edx)
+ movl %esi, 4(%edx)
+ movl %edi, 8(%edx)
+ movl %ebp, 12(%edx)
+ movl %esp, 16(%edx)
+ movl %ecx, 20(%edx)
+ xorl %eax, %eax
+ jmp *%ecx
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.asm b/MdePkg/Library/BaseLib/Ia32/SetJump.asm new file mode 100644 index 0000000000..4b7b40c47a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SetJump.asm @@ -0,0 +1,51 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalAssertJumpBuffer PROTO C
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; SetJump (
+; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+; );
+;------------------------------------------------------------------------------
+SetJump PROC
+ push [esp + 4]
+ call InternalAssertJumpBuffer ; To validate JumpBuffer
+ pop ecx
+ pop ecx ; ecx <- return address
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx ; eip value to restore in LongJump
+ xor eax, eax
+ jmp ecx
+SetJump ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.c b/MdePkg/Library/BaseLib/Ia32/SetJump.c new file mode 100644 index 0000000000..b96ec3a8ff --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SetJump.c @@ -0,0 +1,49 @@ +/** @file
+ Implementation of SetJump() on IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+_declspec (naked)
+UINTN
+EFIAPI
+SetJump (
+ OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ _asm {
+ push [esp + 4]
+ call InternalAssertJumpBuffer
+ pop ecx
+ pop ecx
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx
+ xor eax, eax
+ jmp ecx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S new file mode 100644 index 0000000000..313f4164fa --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S @@ -0,0 +1,43 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.Asm
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathSwapBytes64 (
+# IN UINT64 Operand
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(InternalMathSwapBytes64)
+ASM_PFX(InternalMathSwapBytes64):
+ movl 8(%esp), %eax
+ movl 4(%esp), %edx
+ bswapl %eax
+ bswapl %edx
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm new file mode 100644 index 0000000000..7647880202 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathSwapBytes64 (
+; IN UINT64 Operand
+; );
+;------------------------------------------------------------------------------
+InternalMathSwapBytes64 PROC
+ mov eax, [esp + 8] ; eax <- upper 32 bits
+ mov edx, [esp + 4] ; edx <- lower 32 bits
+ bswap eax
+ bswap edx
+ ret
+InternalMathSwapBytes64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c new file mode 100644 index 0000000000..9979b684f1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c @@ -0,0 +1,33 @@ +/** @file
+ Implementation of 64-bit swap bytes
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ _asm {
+ mov eax, dword ptr [Operand + 4]
+ mov edx, dword ptr [Operand + 0]
+ bswap eax
+ bswap edx
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S new file mode 100644 index 0000000000..ca72d0b544 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S @@ -0,0 +1,205 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Thunk16.S
+#
+# Abstract:
+#
+# Real mode thunk
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
+.globl ASM_PFX(InternalAsmThunk16)
+
+ASM_PFX(m16Start):
+
+SavedGdt: .space 6
+
+ASM_PFX(BackFromUserCode):
+ push %ss
+ push %cs
+ .byte 0x66
+ call L_Base1 # push eip
+L_Base1:
+ pushfw # pushfd actually
+ cli # disable interrupts
+ push %gs
+ push %fs
+ push %es
+ push %ds
+ pushaw # pushad actually
+ .byte 0x66, 0xba # mov edx, imm32
+ASM_PFX(ThunkAttr): .space 4
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
+ jz 1f
+ movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
+ cli # disable interrupts
+ jnc 2f
+1:
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
+ jz 2f
+ inb $0x92, %al
+ orb $2, %al
+ outb %al, $0x92 # deactivate A20M#
+2:
+ movl %ss, %eax
+ .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
+ mov %ebp, 0xffffffd8(%esi)
+ mov 0xfffffff8(%esi), %ebx
+ shlw $4, %ax # shl eax, 4
+ addw %ax, %bp # add ebp, eax
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr4: .space 4
+ movl %eax, %cr4
+ lgdtw %cs:0xfffffff2(%edi)
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr0: .space 4
+ movl %eax, %cr0
+ .byte 0xb8 # mov ax, imm16
+SavedSs: .space 2
+ movl %eax, %ss
+ .byte 0x66, 0xbc # mov esp, imm32
+SavedEsp: .space 4
+ .byte 0x66
+ lret # return to protected mode
+
+_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
+ .word 0x8
+_16Idtr: .word 0x3ff
+ .long 0
+_16Gdtr: .word GdtEnd - _NullSegDesc - 1
+_16GdtrBase: .long _NullSegDesc
+
+ASM_PFX(ToUserCode):
+ movl %ss, %edx
+ movl %ecx, %ss # set new segment selectors
+ movl %ecx, %ds
+ movl %ecx, %es
+ movl %ecx, %fs
+ movl %ecx, %gs
+ movl %eax, %cr0
+ movl %ebp, %cr4 # real mode starts at next instruction
+ movl %esi, %ss # set up 16-bit stack segment
+ xchgw %bx, %sp # set up 16-bit stack pointer
+ .byte 0x66
+ call L_Base # push eip
+L_Base:
+ popw %bp # ebp <- offset L_Base
+ addr16 pushl 36(%si)
+ .byte 0x36
+ lea 0xc(%esi), %eax
+ push %eax
+ lret
+
+L_RealMode:
+ mov %edx, %cs:0xffffffc5(%esi)
+ mov %bx, %cs:0xffffffcb(%esi)
+ lidtw %cs:0xffffffd7(%esi)
+ popaw # popad actually
+ pop %ds
+ pop %es
+ pop %fs
+ pop %gs
+ popfw # popfd
+ lretw # transfer control to user code
+
+_NullSegDesc: .quad 0
+_16CsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x9b
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+_16DsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x93
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+GdtEnd:
+
+#
+# @param RegSet Pointer to a IA32_DWORD_REGS structure
+# @param Transition Pointer to the transition code
+# @return The address of the 16-bit stack after returning from user code
+#
+ASM_PFX(InternalAsmThunk16):
+ push %ebp
+ push %ebx
+ push %esi
+ push %edi
+ push %ds
+ push %es
+ push %fs
+ push %gs
+ movl 36(%esp), %esi # esi <- RegSet
+ movzwl 0x32(%esi), %edx
+ mov 0xc(%esi), %edi
+ add $0xffffffc8, %edi
+ movl %edi, %ebx # ebx <- stack offset
+ imul $0x10, %edx, %eax
+ push $0xd
+ addl %eax, %edi # edi <- linear address of 16-bit stack
+ pop %ecx
+ rep
+ movsl # copy RegSet
+ movl 40(%esp), %eax # eax <- address of transition code
+ movl %edx, %esi # esi <- 16-bit stack segment
+ lea 0x5e(%eax), %edx
+ movl %eax, %ecx
+ andl $0xf, %ecx
+ shll $12, %eax
+ lea 0x6(%ecx), %ecx
+ movw %cx, %ax
+ stosl # [edi] <- return address of user code
+ sgdtl 0xffffffa2(%edx)
+ sidtl 0x24(%esp)
+ movl %cr0, %eax
+ movl %eax, (%edx) # save CR0 in SavedCr0
+ andl $0x7ffffffe, %eax # clear PE, PG bits
+ movl %cr4, %ebp
+ mov %ebp, 0xfffffff1(%edx)
+ andl $0x300, %ebp # clear all but PCE and OSFXSR bits
+ pushl $0x10
+ pop %ecx # ecx <- selector for data segments
+ lgdtl 0x20(%edx)
+ pushfl
+ lcall *0x14(%edx)
+ popfl
+ lidtl 0x24(%esp)
+ lea 0xffffffcc(%ebp), %eax
+ pop %gs
+ pop %fs
+ pop %es
+ pop %ds
+ pop %edi
+ pop %esi
+ pop %ebx
+ pop %ebp
+ ret
+
+ .const:
+
+ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)
+ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
+ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
+ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
+ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.asm b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm new file mode 100644 index 0000000000..13ff466550 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm @@ -0,0 +1,253 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+
+EXTERNDEF C m16Start:BYTE
+EXTERNDEF C m16Size:WORD
+EXTERNDEF C mThunk16Attr:WORD
+EXTERNDEF C m16Gdt:WORD
+EXTERNDEF C m16GdtrBase:WORD
+EXTERNDEF C mTransition:WORD
+
+;
+; Here is the layout of the real mode stack. _ToUserCode() is responsible for
+; loading all these registers from real mode stack.
+;
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DD ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+ .const
+
+;
+; These are global constant to convey information to C code.
+;
+m16Size DW InternalAsmThunk16 - m16Start
+mThunk16Attr DW _ThunkAttr - m16Start
+m16Gdt DW _NullSegDesc - m16Start
+m16GdtrBase DW _16GdtrBase - m16Start
+mTransition DW _EntryPoint - m16Start
+
+ .code
+
+m16Start LABEL BYTE
+
+SavedGdt LABEL FWORD
+ DW ?
+ DD ?
+;------------------------------------------------------------------------------
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed
+; by user code. It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_BackFromUserCode PROC
+ ;
+ ; The order of saved registers on the stack matches the order they appears
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them
+ ; into that structure.
+ ;
+ push ss
+ push cs
+ DB 66h
+ call @Base ; push eip
+@Base:
+ pushf ; pushfd actually
+ cli ; disable interrupts
+ push gs
+ push fs
+ push es
+ push ds
+ pushaw ; pushad actually
+ DB 66h, 0bah ; mov edx, imm32
+_ThunkAttr DD ?
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
+ jz @1
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h
+ cli ; disable interrupts
+ jnc @2
+@1:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
+ jz @2
+ in al, 92h
+ or al, 2
+ out 92h, al ; deactivate A20M#
+@2:
+ mov eax, ss
+ DB 67h
+ lea bp, [esp + sizeof (IA32_REGS)]
+ ;
+ ; esi's in the following 2 instructions are indeed bp in 16-bit code. Fact
+ ; is "esi" in 32-bit addressing mode has the same encoding of "bp" in 16-
+ ; bit addressing mode.
+ ;
+ mov word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp
+ mov ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP
+ shl ax, 4 ; shl eax, 4
+ add bp, ax ; add ebp, eax
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr4 DD ?
+ mov cr4, eax
+ DB 66h
+ lgdt fword ptr cs:[edi + (SavedGdt - @Base)]
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr0 DD ?
+ mov cr0, eax
+ DB 0b8h ; mov ax, imm16
+SavedSs DW ?
+ mov ss, eax
+ DB 66h, 0bch ; mov esp, imm32
+SavedEsp DD ?
+ DB 66h
+ retf ; return to protected mode
+_BackFromUserCode ENDP
+
+_EntryPoint DD _ToUserCode - m16Start
+ DW 8h
+_16Idtr FWORD (1 SHL 10) - 1
+_16Gdtr LABEL FWORD
+ DW GdtEnd - _NullSegDesc - 1
+_16GdtrBase DD _NullSegDesc
+
+;------------------------------------------------------------------------------
+; _ToUserCode() takes control in real mode before passing control to user code.
+; It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_ToUserCode PROC
+ mov edx, ss
+ mov ss, ecx ; set new segment selectors
+ mov ds, ecx
+ mov es, ecx
+ mov fs, ecx
+ mov gs, ecx
+ mov cr0, eax
+ mov cr4, ebp ; real mode starts at next instruction
+ mov ss, esi ; set up 16-bit stack segment
+ xchg sp, bx ; set up 16-bit stack pointer
+ DB 66h
+ call @Base ; push eip
+@Base:
+ pop bp ; ebp <- address of @Base
+ DB 67h ; address size override
+ push [esp + sizeof (IA32_REGS) + 2]
+ lea eax, [esi + (@RealMode - @Base)]
+ push eax
+ retf
+@RealMode:
+ mov cs:[esi + (SavedSs - @Base)], edx
+ mov cs:[esi + (SavedEsp - @Base)], bx
+ DB 66h
+ lidt fword ptr cs:[esi + (_16Idtr - @Base)]
+ popaw ; popad actually
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ popf ; popfd
+ DB 66h ; Use 32-bit addressing for "retf" below
+ retf ; transfer control to user code
+_ToUserCode ENDP
+
+_NullSegDesc DQ 0
+_16CsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_16DsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+GdtEnd LABEL QWORD
+
+;------------------------------------------------------------------------------
+; IA32_REGISTER_SET *
+; EFIAPI
+; InternalAsmThunk16 (
+; IN IA32_REGISTER_SET *RegisterSet,
+; IN OUT VOID *Transition
+; );
+;------------------------------------------------------------------------------
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
+ mov esi, [esp + 36] ; esi <- RegSet, the 1st parameter
+ movzx edx, (IA32_REGS ptr [esi])._SS
+ mov edi, (IA32_REGS ptr [esi])._ESP
+ add edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space
+ mov ebx, edi ; ebx <- stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ push sizeof (IA32_REGS) / 4
+ add edi, eax ; edi <- linear address of 16-bit stack
+ pop ecx
+ rep movsd ; copy RegSet
+ mov eax, [esp + 40] ; eax <- address of transition code
+ mov esi, edx ; esi <- 16-bit stack segment
+ lea edx, [eax + (SavedCr0 - m16Start)]
+ mov ecx, eax
+ and ecx, 0fh
+ shl eax, 12
+ lea ecx, [ecx + (_BackFromUserCode - m16Start)]
+ mov ax, cx
+ stosd ; [edi] <- return address of user code
+ sgdt fword ptr [edx + (SavedGdt - SavedCr0)]
+ sidt fword ptr [esp + 36] ; save IDT stack in argument space
+ mov eax, cr0
+ mov [edx], eax ; save CR0 in SavedCr0
+ and eax, 7ffffffeh ; clear PE, PG bits
+ mov ebp, cr4
+ mov [edx + (SavedCr4 - SavedCr0)], ebp
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ push 10h
+ pop ecx ; ecx <- selector for data segments
+ lgdt fword ptr [edx + (_16Gdtr - SavedCr0)]
+ pushfd ; Save df/if indeed
+ call fword ptr [edx + (_EntryPoint - SavedCr0)]
+ popfd
+ lidt fword ptr [esp + 36] ; restore protected mode IDTR
+ lea eax, [ebp - sizeof (IA32_REGS)] ; eax <- the address of IA32_REGS
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.S b/MdePkg/Library/BaseLib/Ia32/Wbinvd.S new file mode 100644 index 0000000000..9c31adc589 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Wbinvd.Asm
+#
+# Abstract:
+#
+# AsmWbinvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWbinvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWbinvd)
+ASM_PFX(AsmWbinvd):
+ wbinvd
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm new file mode 100644 index 0000000000..1230c89c20 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.c b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c new file mode 100644 index 0000000000..60e72139f5 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c @@ -0,0 +1,30 @@ +/** @file
+ AsmWbinvd function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ )
+{
+ _asm {
+ wbinvd
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.S b/MdePkg/Library/BaseLib/Ia32/WriteCr0.S new file mode 100644 index 0000000000..5cd75cf33d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr0.Asm
+#
+# Abstract:
+#
+# AsmWriteCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr0 (
+# IN UINTN Cr0
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr0)
+ASM_PFX(AsmWriteCr0):
+ movl 4(%esp), %eax
+ movl %eax, %cr0
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm new file mode 100644 index 0000000000..5eab67f819 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.c b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c new file mode 100644 index 0000000000..9993d47de6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteCr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr0, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.S b/MdePkg/Library/BaseLib/Ia32/WriteCr2.S new file mode 100644 index 0000000000..8128e8363d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr2.Asm
+#
+# Abstract:
+#
+# AsmWriteCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr2 (
+# IN UINTN Cr2
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr2)
+ASM_PFX(AsmWriteCr2):
+ movl 4(%esp), %eax
+ movl %eax, %cr2
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm new file mode 100644 index 0000000000..0df84412bf --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; UINTN Cr2
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.c b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c new file mode 100644 index 0000000000..dcbd3458fc --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteCr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr2, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.S b/MdePkg/Library/BaseLib/Ia32/WriteCr3.S new file mode 100644 index 0000000000..06f7208297 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr3.Asm
+#
+# Abstract:
+#
+# AsmWriteCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr3 (
+# IN UINTN Cr3
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr3)
+ASM_PFX(AsmWriteCr3):
+ movl 4(%esp), %eax
+ movl %eax, %cr3
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm new file mode 100644 index 0000000000..32b05fdf35 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; UINTN Cr3
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.c b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c new file mode 100644 index 0000000000..0a1d21e100 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteCr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr3, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.S b/MdePkg/Library/BaseLib/Ia32/WriteCr4.S new file mode 100644 index 0000000000..f748c1884a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr4.Asm
+#
+# Abstract:
+#
+# AsmWriteCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr4 (
+# IN UINTN Cr4
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr4)
+ASM_PFX(AsmWriteCr4):
+ movl 4(%esp), %eax
+ movl %eax, %cr4
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm new file mode 100644 index 0000000000..4ed7f61030 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; UINTN Cr4
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.c b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c new file mode 100644 index 0000000000..dcd557712e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c @@ -0,0 +1,33 @@ +/** @file
+ AsmWriteCr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov cr4, eax
+ _emit 0x22
+ _emit 0xE0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.S b/MdePkg/Library/BaseLib/Ia32/WriteDr0.S new file mode 100644 index 0000000000..f1fd87858d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr0.Asm
+#
+# Abstract:
+#
+# AsmWriteDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr0 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr0)
+ASM_PFX(AsmWriteDr0):
+ movl 4(%esp), %eax
+ movl %eax, %dr0
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm new file mode 100644 index 0000000000..1bd39d50e4 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.c b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c new file mode 100644 index 0000000000..0de464765a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr0, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.S b/MdePkg/Library/BaseLib/Ia32/WriteDr1.S new file mode 100644 index 0000000000..291e63736a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr1.Asm
+#
+# Abstract:
+#
+# AsmWriteDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr1 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr1)
+ASM_PFX(AsmWriteDr1):
+ movl 4(%esp), %eax
+ movl %eax, %dr1
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm new file mode 100644 index 0000000000..542125ba55 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.c b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c new file mode 100644 index 0000000000..b6634e20b2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr1, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.S b/MdePkg/Library/BaseLib/Ia32/WriteDr2.S new file mode 100644 index 0000000000..6b6a50a198 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr2.Asm
+#
+# Abstract:
+#
+# AsmWriteDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr2 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr2)
+ASM_PFX(AsmWriteDr2):
+ movl 4(%esp), %eax
+ movl %eax, %dr2
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm new file mode 100644 index 0000000000..7638babc73 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.c b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c new file mode 100644 index 0000000000..2d366497f7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr2, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.S b/MdePkg/Library/BaseLib/Ia32/WriteDr3.S new file mode 100644 index 0000000000..4201c4a1de --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr3.Asm
+#
+# Abstract:
+#
+# AsmWriteDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr3 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr3)
+ASM_PFX(AsmWriteDr3):
+ movl 4(%esp), %eax
+ movl %eax, %dr3
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm new file mode 100644 index 0000000000..69a17b4ad3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.c b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c new file mode 100644 index 0000000000..ffba939e16 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr3, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.S b/MdePkg/Library/BaseLib/Ia32/WriteDr4.S new file mode 100644 index 0000000000..ef76bddd16 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr4.Asm
+#
+# Abstract:
+#
+# AsmWriteDr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr4 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr4)
+ASM_PFX(AsmWriteDr4):
+ movl 4(%esp), %eax
+ movl %eax, %dr4
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm new file mode 100644 index 0000000000..9c10305b4d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm @@ -0,0 +1,48 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e0h
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.c b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c new file mode 100644 index 0000000000..adc9005eac --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c @@ -0,0 +1,33 @@ +/** @file
+ AsmWriteDr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr4, eax
+ _emit 0x23
+ _emit 0xe0
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.S b/MdePkg/Library/BaseLib/Ia32/WriteDr5.S new file mode 100644 index 0000000000..f10b56e8ee --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr5.Asm
+#
+# Abstract:
+#
+# AsmWriteDr5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr5 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr5)
+ASM_PFX(AsmWriteDr5):
+ movl 4(%esp), %eax
+ movl %eax, %dr5
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm new file mode 100644 index 0000000000..e10434ef3d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm @@ -0,0 +1,48 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e8h
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.c b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c new file mode 100644 index 0000000000..0798d25265 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c @@ -0,0 +1,33 @@ +/** @file
+ AsmWriteDr5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr5, eax
+ _emit 0x23
+ _emit 0xe8
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.S b/MdePkg/Library/BaseLib/Ia32/WriteDr6.S new file mode 100644 index 0000000000..1cdd8160c1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr6.Asm
+#
+# Abstract:
+#
+# AsmWriteDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr6 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr6)
+ASM_PFX(AsmWriteDr6):
+ movl 4(%esp), %eax
+ movl %eax, %dr6
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm new file mode 100644 index 0000000000..4e5acf58b0 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.c b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c new file mode 100644 index 0000000000..dcf5e3a9bf --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr6, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.S b/MdePkg/Library/BaseLib/Ia32/WriteDr7.S new file mode 100644 index 0000000000..ce1e29b09c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr7.Asm
+#
+# Abstract:
+#
+# AsmWriteDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr7 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr7)
+ASM_PFX(AsmWriteDr7):
+ movl 4(%esp), %eax
+ movl %eax, %dr7
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm new file mode 100644 index 0000000000..10e83d6fe7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.c b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c new file mode 100644 index 0000000000..e53eccb3e9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteDr7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr7, eax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S new file mode 100644 index 0000000000..07ec92e44c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteGdtr.Asm
+#
+# Abstract:
+#
+# InternalX86WriteGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86WriteGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(InternalX86WriteGdtr)
+ASM_PFX(InternalX86WriteGdtr):
+ movl 4(%esp), %eax
+ lgdt (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm new file mode 100644 index 0000000000..f1c7a92e3b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteGdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteGdtr PROC
+ mov eax, [esp + 4]
+ lgdt fword ptr [eax]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c new file mode 100644 index 0000000000..0664908e16 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteGdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ lgdt fword ptr [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S new file mode 100644 index 0000000000..739edde618 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteIdtr.Asm
+#
+# Abstract:
+#
+# InternalX86WriteIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86WriteIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(InternalX86WriteIdtr)
+ASM_PFX(InternalX86WriteIdtr):
+ movl 4(%esp), %eax
+ lidt (%eax)
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm new file mode 100644 index 0000000000..65fca407f2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteIdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteIdtr PROC
+ mov eax, [esp + 4]
+ lidt fword ptr [eax]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c new file mode 100644 index 0000000000..f6422412c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteIdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ lidt fword ptr [eax]
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S new file mode 100644 index 0000000000..1bb4678337 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S @@ -0,0 +1,40 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteLdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteLdtr (
+# IN UINT16 Ldtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteLdtr)
+ASM_PFX(AsmWriteLdtr):
+ movl 4(%esp), %eax
+ lldtw %ax
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm new file mode 100644 index 0000000000..39f8b2ed5e --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+_AsmWriteLdtr PROC
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+_AsmWriteLdtr ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c new file mode 100644 index 0000000000..e8ca5756b6 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c @@ -0,0 +1,32 @@ +/** @file
+ AsmWriteLdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ )
+{
+ _asm {
+ xor eax, eax
+ mov ax, Ldtr
+ lldt ax
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.S b/MdePkg/Library/BaseLib/Ia32/WriteMm0.S new file mode 100644 index 0000000000..87a28165bc --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm0.Asm
+#
+# Abstract:
+#
+# AsmWriteMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm0 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm0)
+ASM_PFX(AsmWriteMm0):
+ movq 4(%esp), %mm0
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm new file mode 100644 index 0000000000..15912f6c4a --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ movq mm0, [esp + 4]
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.c b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c new file mode 100644 index 0000000000..b59335e42d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm0, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.S b/MdePkg/Library/BaseLib/Ia32/WriteMm1.S new file mode 100644 index 0000000000..05182fb0fc --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm1.Asm
+#
+# Abstract:
+#
+# AsmWriteMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm1 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm1)
+ASM_PFX(AsmWriteMm1):
+ movq 4(%esp), %mm1
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm new file mode 100644 index 0000000000..097e760e8c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ movq mm1, [esp + 4]
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.c b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c new file mode 100644 index 0000000000..39bfa6d4b9 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm1, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.S b/MdePkg/Library/BaseLib/Ia32/WriteMm2.S new file mode 100644 index 0000000000..c34ceccf1b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm2.Asm
+#
+# Abstract:
+#
+# AsmWriteMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm2 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm2)
+ASM_PFX(AsmWriteMm2):
+ movq 4(%esp), %mm2
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm new file mode 100644 index 0000000000..fea7081d28 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ movq mm2, [esp + 4]
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.c b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c new file mode 100644 index 0000000000..f9972076b1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm2, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.S b/MdePkg/Library/BaseLib/Ia32/WriteMm3.S new file mode 100644 index 0000000000..01250e8f44 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm3.Asm
+#
+# Abstract:
+#
+# AsmWriteMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm3 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm3)
+ASM_PFX(AsmWriteMm3):
+ movq 4(%esp), %mm3
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm new file mode 100644 index 0000000000..1af24908f7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ movq mm3, [esp + 4]
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.c b/MdePkg/Library/BaseLib/Ia32/WriteMm3.c new file mode 100644 index 0000000000..39a401fd3b --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm3 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm3, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.S b/MdePkg/Library/BaseLib/Ia32/WriteMm4.S new file mode 100644 index 0000000000..cc6ec7d173 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm4.Asm
+#
+# Abstract:
+#
+# AsmWriteMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm4 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm4)
+ASM_PFX(AsmWriteMm4):
+ movq 4(%esp), %mm4
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm new file mode 100644 index 0000000000..2cf9da095c --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm4 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm4 PROC
+ movq mm4, [esp + 4]
+ ret
+AsmWriteMm4 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.c b/MdePkg/Library/BaseLib/Ia32/WriteMm4.c new file mode 100644 index 0000000000..1c31d6beb7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.c @@ -0,0 +1,30 @@ +/** @file
+ AsmWriteMm4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm4 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm4, qword ptr [Value]
+ emms
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.S b/MdePkg/Library/BaseLib/Ia32/WriteMm5.S new file mode 100644 index 0000000000..b0909614b5 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm5.Asm
+#
+# Abstract:
+#
+# AsmWriteMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm5 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm5)
+ASM_PFX(AsmWriteMm5):
+ movq 4(%esp), %mm5
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm new file mode 100644 index 0000000000..9c9882ef10 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm5 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm5 PROC
+ movq mm5, [esp + 4]
+ ret
+AsmWriteMm5 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.c b/MdePkg/Library/BaseLib/Ia32/WriteMm5.c new file mode 100644 index 0000000000..48e2eb29c7 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.c @@ -0,0 +1,30 @@ +/** @file
+ AsmWriteMm5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm5 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm5, qword ptr [Value]
+ emms
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.S b/MdePkg/Library/BaseLib/Ia32/WriteMm6.S new file mode 100644 index 0000000000..6d657c6673 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm6.Asm
+#
+# Abstract:
+#
+# AsmWriteMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm6 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm6)
+ASM_PFX(AsmWriteMm6):
+ movq 4(%esp), %mm6
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm new file mode 100644 index 0000000000..5e0cfad563 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm6 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm6 PROC
+ movq mm6, [esp + 4]
+ ret
+AsmWriteMm6 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.c b/MdePkg/Library/BaseLib/Ia32/WriteMm6.c new file mode 100644 index 0000000000..7a038a47db --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm6 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm6, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.S b/MdePkg/Library/BaseLib/Ia32/WriteMm7.S new file mode 100644 index 0000000000..52c599c0fd --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.S @@ -0,0 +1,39 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm7.Asm
+#
+# Abstract:
+#
+# AsmWriteMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm7 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm7)
+ASM_PFX(AsmWriteMm7):
+ movq 4(%esp), %mm7
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm new file mode 100644 index 0000000000..faaa23bfd2 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm7 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm7 PROC
+ movq mm7, [esp + 4]
+ ret
+AsmWriteMm7 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.c b/MdePkg/Library/BaseLib/Ia32/WriteMm7.c new file mode 100644 index 0000000000..044f68cec1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.c @@ -0,0 +1,31 @@ +/** @file
+ AsmWriteMm7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+VOID
+EFIAPI
+AsmWriteMm7 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm7, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S new file mode 100644 index 0000000000..f310e887ab --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S @@ -0,0 +1,43 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr64.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMsr64 (
+# IN UINT32 Index,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMsr64)
+ASM_PFX(AsmWriteMsr64):
+ movl 12(%esp), %edx
+ movl 8(%esp), %eax
+ movl 4(%esp), %ecx
+ wrmsr
+ ret
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm new file mode 100644 index 0000000000..14edba60c1 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr64 PROC
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+AsmWriteMsr64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c new file mode 100644 index 0000000000..1e909d1f72 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c @@ -0,0 +1,34 @@ +/** @file
+ AsmWriteMsr64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+{
+ _asm {
+ mov edx, dword ptr [Value + 4]
+ mov eax, dword ptr [Value + 0]
+ mov ecx, Index
+ wrmsr
+ }
+}
+
diff --git a/MdePkg/Library/BaseLib/LRotU32.c b/MdePkg/Library/BaseLib/LRotU32.c new file mode 100644 index 0000000000..ad1714d51e --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU32.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand << Count) | (Operand >> (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/LRotU64.c b/MdePkg/Library/BaseLib/LRotU64.c new file mode 100644 index 0000000000..65269a973b --- /dev/null +++ b/MdePkg/Library/BaseLib/LRotU64.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LShiftU64.c b/MdePkg/Library/BaseLib/LShiftU64.c new file mode 100644 index 0000000000..8142cafe25 --- /dev/null +++ b/MdePkg/Library/BaseLib/LShiftU64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/LinkedList.c b/MdePkg/Library/BaseLib/LinkedList.c new file mode 100644 index 0000000000..3cbc0447a0 --- /dev/null +++ b/MdePkg/Library/BaseLib/LinkedList.c @@ -0,0 +1,470 @@ +/** @file
+ Linked List Library Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LinkedList.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that locates the Node in the List
+
+ By searching the List, finds the location of the Node in List. At the same time,
+ verifies the validity of this list.
+
+ If List is NULL, then ASSERT().
+ If List->ForwardLink is NULL, then ASSERT().
+ If List->backLink is NULL, then ASSERT().
+ If Node is NULL, then ASSERT();
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to a node in a linked list.
+ @param Node A pointer to one nod.
+
+ @retval TRUE Node is in List
+ @retval FALSE Node isn't in List, or List is invalid
+
+**/
+BOOLEAN
+IsNodeInList (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ UINTN Count;
+ CONST LIST_ENTRY *Ptr;
+ BOOLEAN Found;
+
+ //
+ // Test the validity of List and Node
+ //
+ ASSERT (List != NULL);
+ ASSERT (List->ForwardLink != NULL);
+ ASSERT (List->BackLink != NULL);
+ ASSERT (Node != NULL);
+
+ Count = PcdGet32 (PcdMaximumLinkedListLength);
+
+ Ptr = List;
+ do {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ } while ((Ptr != List) && (Ptr != Node) && (Count > 0));
+ Found = (BOOLEAN)(Ptr == Node);
+
+ if (PcdGet32 (PcdMaximumLinkedListLength) > 0) {
+ while ((Count > 0) && (Ptr != List)) {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ }
+ ASSERT (Count > 0);
+ }
+
+ return Found;
+}
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN OUT LIST_ENTRY *List
+ )
+
+{
+ ASSERT (List != NULL);
+
+ List->ForwardLink = List;
+ List->BackLink = List;
+ return List;
+}
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List->ForwardLink;
+ Entry->BackLink = List;
+ Entry->ForwardLink->BackLink = Entry;
+ List->ForwardLink = Entry;
+ return List;
+}
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List;
+ Entry->BackLink = List->BackLink;
+ Entry->BackLink->ForwardLink = Entry;
+ List->BackLink = Entry;
+ return List;
+}
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return List->ForwardLink;
+}
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return Node->ForwardLink;
+}
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return (BOOLEAN)(List->ForwardLink == List);
+}
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(Node == List);
+}
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
+}
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing the FirstEntry and SecondEntry nodes, including
+ the FirstEntry and SecondEntry nodes, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN OUT LIST_ENTRY *FirstEntry,
+ IN OUT LIST_ENTRY *SecondEntry
+ )
+{
+ LIST_ENTRY *Ptr;
+
+ if (FirstEntry == SecondEntry) {
+ return SecondEntry;
+ }
+
+ //
+ // ASSERT Entry1 and Entry2 are in the same linked list
+ //
+ ASSERT (IsNodeInList (FirstEntry, SecondEntry));
+
+ //
+ // Ptr is the node pointed to by FirstEntry->ForwardLink
+ //
+ Ptr = RemoveEntryList (FirstEntry);
+
+ //
+ // If FirstEntry immediately follows SecondEntry, FirstEntry willl be placed
+ // immediately in front of SecondEntry
+ //
+ if (Ptr->BackLink == SecondEntry) {
+ return InsertTailList (SecondEntry, FirstEntry);
+ }
+
+ //
+ // Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,
+ // then there are no further steps necessary
+ //
+ if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {
+ return Ptr;
+ }
+
+ //
+ // Move SecondEntry to the front of Ptr
+ //
+ RemoveEntryList (SecondEntry);
+ InsertTailList (Ptr, SecondEntry);
+ return SecondEntry;
+}
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing Entry, including the Entry node, is greater than
+ or equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ )
+{
+ ASSERT (!IsListEmpty (Entry));
+
+ Entry->ForwardLink->BackLink = Entry->BackLink;
+ Entry->BackLink->ForwardLink = Entry->ForwardLink;
+ return Entry->ForwardLink;
+}
diff --git a/MdePkg/Library/BaseLib/LongJump.c b/MdePkg/Library/BaseLib/LongJump.c new file mode 100644 index 0000000000..e39bc32a3c --- /dev/null +++ b/MdePkg/Library/BaseLib/LongJump.c @@ -0,0 +1,50 @@ +/** @file
+ Long Jump functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LongJump.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer.
+ This function never returns to the caller.
+ Instead is resumes execution based on the state of JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Value is 0, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is restored.
+
+**/
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ InternalAssertJumpBuffer (JumpBuffer);
+ ASSERT (Value != 0);
+
+ InternalLongJump (JumpBuffer, Value);
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet32.c b/MdePkg/Library/BaseLib/LowBitSet32.c new file mode 100644 index 0000000000..dde3ad1860 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet32.c @@ -0,0 +1,49 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0; (Operand & 1) == 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/LowBitSet64.c b/MdePkg/Library/BaseLib/LowBitSet64.c new file mode 100644 index 0000000000..bef8390d74 --- /dev/null +++ b/MdePkg/Library/BaseLib/LowBitSet64.c @@ -0,0 +1,51 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0;
+ (Operand & 1) == 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/MdePkg/Library/BaseLib/Math64.c b/MdePkg/Library/BaseLib/Math64.c new file mode 100644 index 0000000000..60f363ec1e --- /dev/null +++ b/MdePkg/Library/BaseLib/Math64.c @@ -0,0 +1,376 @@ +/** @file
+ Leaf math worker functions that require 64-bit arithmetic support from the
+ compiler.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Math64.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand << Count;
+}
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand >> Count;
+}
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits
+ are filled with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ INTN TestValue;
+
+ //
+ // Test if this compiler supports arithmetic shift
+ //
+ TestValue = (((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1));
+ if (TestValue == -1) {
+ //
+ // Arithmetic shift is supported
+ //
+ return (UINT64)((INT64)Operand >> Count);
+ }
+
+ //
+ // Arithmetic is not supported
+ //
+ return (Operand >> Count) |
+ ((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);
+}
+
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling
+ the low bits with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand << Count) | (Operand >> (64 - Count));
+}
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling
+ the high bits with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand >> Count) | (Operand << (64 - Count));
+}
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ UINT64 LowerBytes;
+ UINT64 HigherBytes;
+
+ LowerBytes = (UINT64) SwapBytes32 ((UINT32) Operand);
+ HigherBytes = (UINT64) SwapBytes32 ((UINT32) (Operand >> 32));
+
+ return (LowerBytes << 32 | HigherBytes);
+}
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return (UINT32)(Dividend % Divisor);
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = (UINT32)(Dividend % Divisor);
+ }
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
diff --git a/MdePkg/Library/BaseLib/ModU64x32.c b/MdePkg/Library/BaseLib/ModU64x32.c new file mode 100644 index 0000000000..e6c05707be --- /dev/null +++ b/MdePkg/Library/BaseLib/ModU64x32.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathModU64x32 (Dividend, Divisor);
+}
diff --git a/MdePkg/Library/BaseLib/MultS64x64.c b/MdePkg/Library/BaseLib/MultS64x64.c new file mode 100644 index 0000000000..33d2570568 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultS64x64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ )
+{
+ return (INT64)MultU64x64 (Multiplicand, Multiplier);
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x32.c b/MdePkg/Library/BaseLib/MultU64x32.c new file mode 100644 index 0000000000..947d4d2276 --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x32.c @@ -0,0 +1,48 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x32 (Multiplicand, Multiplier);
+
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/MultU64x64.c b/MdePkg/Library/BaseLib/MultU64x64.c new file mode 100644 index 0000000000..7f6ece12ea --- /dev/null +++ b/MdePkg/Library/BaseLib/MultU64x64.c @@ -0,0 +1,48 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x64 (Multiplicand, Multiplier);
+
+ return Result;
+}
diff --git a/MdePkg/Library/BaseLib/RRotU32.c b/MdePkg/Library/BaseLib/RRotU32.c new file mode 100644 index 0000000000..ba66b3540c --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU32.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand >> Count) | (Operand << (32 - Count));
+}
diff --git a/MdePkg/Library/BaseLib/RRotU64.c b/MdePkg/Library/BaseLib/RRotU64.c new file mode 100644 index 0000000000..b144c18d4a --- /dev/null +++ b/MdePkg/Library/BaseLib/RRotU64.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRRotU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/RShiftU64.c b/MdePkg/Library/BaseLib/RShiftU64.c new file mode 100644 index 0000000000..3320acf275 --- /dev/null +++ b/MdePkg/Library/BaseLib/RShiftU64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRShiftU64 (Operand, Count);
+}
diff --git a/MdePkg/Library/BaseLib/SetJump.c b/MdePkg/Library/BaseLib/SetJump.c new file mode 100644 index 0000000000..92208f60c7 --- /dev/null +++ b/MdePkg/Library/BaseLib/SetJump.c @@ -0,0 +1,45 @@ +/** @file
+ Internal ASSERT () functions for SetJump.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetJump.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that checks ASSERT condition for JumpBuffer
+
+ Checks ASSERT condition for JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ If JumpBuffer is not aligned on a BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT
+ boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+VOID
+EFIAPI
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+
+ ASSERT (((UINTN)JumpBuffer & ((BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT - 1) >> 8)) == 0);
+}
diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c new file mode 100644 index 0000000000..a0d7fac8c3 --- /dev/null +++ b/MdePkg/Library/BaseLib/String.c @@ -0,0 +1,2076 @@ +/** @file
+ Unicode and ASCII string primatives.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: String.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Copies one Null-terminated Unicode string to another Null-terminated Unicode
+ string and returns the new Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destiantion
+
+**/
+CHAR16 *
+EFIAPI
+StrCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ CHAR16 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+ ASSERT (((UINTN) Destination & 0x01) == 0);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > StrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated Unicode string with a maximum length to another
+ Null-terminated Unicode string with a maximum length and returns the new
+ Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. At most, Length Unicode
+ characters are copied from Source to Destination. If Length is 0, then
+ Destination is returned unmodified. If Length is greater that the number of
+ Unicode characters in Source, then Destination is padded with Null Unicode
+ characters. If Source and Destination overlap, then the results are
+ undefined.
+
+ If Length > 0 and Destination is NULL, then ASSERT().
+ If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to copy.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR16 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL if Length is not zero
+ //
+ ASSERT (Destination != NULL);
+ ASSERT (((UINTN) Destination & 0x01) == 0);
+
+ //
+ // Destination and source cannot overlap
+ // Q: Does Source have to be NULL-terminated?
+ //
+ ASSERT ((UINTN)(Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while ((*Source != L'\0') && (Length > 0)) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated Unicode string.
+
+ This function returns the number of Unicode characters in the Null-terminated
+ Unicode string specified by String.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+StrLen (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+
+ for (Length = 0; *String != L'\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (Length < PcdGet32 (PcdMaximumUnicodeStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated Unicode string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated Unicode
+ string specified by String.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+StrSize (
+ IN CONST CHAR16 *String
+ )
+{
+ return (StrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated Unicode strings, and returns the difference
+ between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched Unicode character in SecondString subtracted from the first
+ mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If FirstString is not aligned on a 16-bit boundary, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If SecondString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Compares two Null-terminated Unicode strings with maximum lengths, and
+ returns the difference between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. At most, Length Unicode
+ characters will be compared. If Length is 0, then 0 is returned. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched Unicode character in SecondString
+ subtracted from the first mismatched Unicode character in FirstString.
+
+ If Length > 0 and FirstString is NULL, then ASSERT().
+ If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
+ If Length > 0 and SecondString is NULL, then ASSERT().
+ If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to compare.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrnCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+
+ //
+ // ASSERT both strings are less long than PcdMaximumUnicodeStringLength.
+ // Length tests are performed inside StrLen().
+ //
+ ASSERT (StrSize (FirstString) != 0);
+ ASSERT (StrSize (SecondString) != 0);
+
+ while ((*FirstString != L'\0') &&
+ (*FirstString == *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string to another Null-terminated
+ Unicode string, and returns the concatenated Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination. The Null-terminated concatenated
+ Unicode String is returned. If Source and Destination overlap, then the
+ results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ )
+{
+ StrCpy (Destination + StrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated Unicode string with a maximum length to the
+ end of another Null-terminated Unicode string, and returns the concatenated
+ Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination, and Destination is returned. At
+ most, Length Unicode characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ )
+{
+ StrnCpy (Destination + StrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (StrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Returns the first occurance of a Null-terminated Unicode sub-string
+ in a Null-terminated Unicode string.
+
+ This function scans the contents of the Null-terminated Unicode string
+ specified by String and returns the first occurrence of SearchString.
+ If SearchString is not found in String, then NULL is returned. If
+ the length of SearchString is zero, then String is
+ returned.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If SearchString is NULL, then ASSERT().
+ If SearchString is not aligned on a 16-bit boundary, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and SearchString
+ or String contains more than PcdMaximumUnicodeStringLength Unicode
+ characters not including the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+ @param SearchString Pointer to a Null-terminated Unicode string to search for.
+
+ @retval NULL If the SearchString does not appear in String.
+ @retval !NULL If there is a match.
+
+**/
+CHAR16 *
+EFIAPI
+StrStr (
+ IN CONST CHAR16 *String,
+ IN CONST CHAR16 *SearchString
+ )
+{
+ CONST CHAR16 *FirstMatch;
+ CONST CHAR16 *SearchStringTmp;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+ ASSERT (SearchString != NULL);
+ ASSERT (((UINTN) SearchString & 0x01) == 0);
+
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length of String should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+ }
+
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length of SearchString should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (StrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength));
+ }
+
+ while (*String != '\0') {
+ SearchStringTmp = SearchString;
+ FirstMatch = String;
+
+ while ((*String == *SearchStringTmp)
+ && (*SearchStringTmp != '\0')
+ && (*String != '\0')) {
+ String++;
+ SearchStringTmp++;
+ }
+
+ if (*SearchStringTmp == '\0') {
+ return (CHAR16 *) FirstMatch;
+ }
+
+ if (SearchStringTmp == SearchString) {
+ //
+ // If no character from SearchString match,
+ // move the pointer to the String under search
+ // by one character.
+ //
+ String++;
+ }
+ }
+
+ return NULL;
+}
+
+/**
+ Check if a Unicode character is a decimal character.
+
+ This internal function checks if a Unicode character is a
+ decimal character. The valid decimal character is from
+ L'0' to L'9'.
+
+
+ @param Char The character to check against.
+
+ @retval TRUE If the Char is a decmial character.
+ @retval FALSE Otherwise.
+
+**/
+STATIC
+BOOLEAN
+InternalIsDecimalDigitCharacter (
+ IN CHAR16 Char
+ )
+{
+ return (BOOLEAN) (Char >= L'0' && Char <= L'9');
+}
+
+/**
+ Convert a Unicode character to upper case only if
+ it maps to a valid small-case ASCII character.
+
+ This internal function only deal with Unicode character
+ which maps to a valid small-case ASII character, i.e.
+ L'a' to L'z'. For other Unicode character, the input character
+ is returned directly.
+
+
+ @param Char The character to convert.
+
+ @retval LowerCharacter If the Char is with range L'a' to L'z'.
+ @retval Unchanged Otherwise.
+
+**/
+STATIC
+CHAR16
+InternalCharToUpper (
+ IN CHAR16 Char
+ )
+{
+ if (Char >= L'a' && Char <= L'z') {
+ return (CHAR16) (Char - (L'a' - L'A'));
+ }
+
+ return Char;
+}
+
+/**
+ Convert a Unicode character to numerical value.
+
+ This internal function only deal with Unicode character
+ which maps to a valid hexadecimal ASII character, i.e.
+ L'0' to L'9', L'a' to L'f' or L'A' to L'F'. For other
+ Unicode character, the value returned does not make sense.
+
+ @param Char The character to convert.
+
+ @retval UINTN The numerical value converted.
+
+**/
+STATIC
+UINTN
+InternalHexCharToUintn (
+ IN CHAR16 Char
+ )
+{
+ if (InternalIsDecimalDigitCharacter (Char)) {
+ return Char - L'0';
+ }
+
+ return (UINTN) (10 + InternalCharToUpper (Char) - L'A');
+}
+
+/**
+ Check if a Unicode character is a hexadecimal character.
+
+ This internal function checks if a Unicode character is a
+ decimal character. The valid hexadecimal character is
+ L'0' to L'9', L'a' to L'f', or L'A' to L'F'.
+
+
+ @param Char The character to check against.
+
+ @retval TRUE If the Char is a hexadecmial character.
+ @retval FALSE Otherwise.
+
+**/
+STATIC
+BOOLEAN
+InternalIsHexaDecimalDigitCharacter (
+ IN CHAR16 Char
+ )
+{
+
+ return (BOOLEAN) (InternalIsDecimalDigitCharacter (Char) ||
+ (Char >= L'A' && Char <= L'F') ||
+ (Char >= L'a' && Char <= L'f'));
+}
+
+/**
+ Convert a Null-terminated Unicode decimal string to a value of
+ type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the Unicode string specified by String as a decimal number. The format
+ of the input Unicode string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The
+ function will ignore the pad space, which includes spaces or
+ tab characters, before [decimal digits]. The running zero in the
+ beginning of [decimal digits] will be ignored. Then, the function
+ stops at the first character that is a not a valid decimal character
+ or a Null-terminator, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits,
+ then 0 is returned.
+ If the number represented by String overflows according
+ to the range defined by UINTN, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+StrDecimalToUintn (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Result;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+ ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == L' ') || (*String == L'\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == L'0') {
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalIsDecimalDigitCharacter (*String)) {
+ //
+ // If the number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) ||
+ ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) &&
+ (*String - L'0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10)
+ );
+
+ Result = Result * 10 + (*String - L'0');
+ String++;
+ }
+
+ return Result;
+}
+
+
+/**
+ Convert a Null-terminated Unicode decimal string to a value of
+ type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the Unicode string specified by String as a decimal number. The format
+ of the input Unicode string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The
+ function will ignore the pad space, which includes spaces or
+ tab characters, before [decimal digits]. The running zero in the
+ beginning of [decimal digits] will be ignored. Then, the function
+ stops at the first character that is a not a valid decimal character
+ or a Null-terminator, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits,
+ then 0 is returned.
+ If the number represented by String overflows according
+ to the range defined by UINT64, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+StrDecimalToUint64 (
+ IN CONST CHAR16 *String
+ )
+{
+ UINT64 Result;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+ ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == L' ') || (*String == L'\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == L'0') {
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalIsDecimalDigitCharacter (*String)) {
+ //
+ // If the number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) ||
+ ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) &&
+ (*String - L'0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10)
+ );
+
+ Result = MultU64x32 (Result, 10) + (*String - L'0');
+ String++;
+ }
+
+ return Result;
+}
+
+/**
+ Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the Unicode string specified by String as a hexadecimal number.
+ The format of the input Unicode string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
+ If "x" appears in the input string, it must be prefixed with at least one 0.
+ The function will ignore the pad space, which includes spaces or tab characters,
+ before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
+ [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
+ first valid hexadecimal digit. Then, the function stops at the first character that is
+ a not a valid hexadecimal character or NULL, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then zero is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
+ then zero is returned.
+ If the number represented by String overflows according to the range defined by
+ UINTN, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+StrHexToUintn (
+ IN CONST CHAR16 *String
+ )
+{
+ UINTN Result;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+ ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == L' ') || (*String == L'\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == L'0') {
+ String++;
+ }
+
+ if (InternalCharToUpper (*String) == L'X') {
+ ASSERT (*(String - 1) == L'0');
+ if (*(String - 1) != L'0') {
+ return 0;
+ }
+ //
+ // Skip the 'X'
+ //
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalIsHexaDecimalDigitCharacter (*String)) {
+ //
+ // If the Hex Number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) ||
+ ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) &&
+ (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16))
+ );
+
+ Result = (Result << 4) + InternalHexCharToUintn (*String);
+ String++;
+ }
+
+ return Result;
+}
+
+
+/**
+ Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the Unicode string specified by String as a hexadecimal number.
+ The format of the input Unicode string String is
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
+ If "x" appears in the input string, it must be prefixed with at least one 0.
+ The function will ignore the pad space, which includes spaces or tab characters,
+ before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
+ [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
+ first valid hexadecimal digit. Then, the function stops at the first character that is
+ a not a valid hexadecimal character or NULL, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then zero is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
+ then zero is returned.
+ If the number represented by String overflows according to the range defined by
+ UINT64, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+StrHexToUint64 (
+ IN CONST CHAR16 *String
+ )
+{
+ UINT64 Result;
+
+ ASSERT (String != NULL);
+ ASSERT (((UINTN) String & 0x01) == 0);
+ ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == L' ') || (*String == L'\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == L'0') {
+ String++;
+ }
+
+ if (InternalCharToUpper (*String) == L'X') {
+ ASSERT (*(String - 1) == L'0');
+ if (*(String - 1) != L'0') {
+ return 0;
+ }
+ //
+ // Skip the 'X'
+ //
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalIsHexaDecimalDigitCharacter (*String)) {
+ //
+ // If the Hex Number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16)||
+ ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) &&
+ (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16))
+ );
+
+ Result = LShiftU64 (Result, 4);
+ Result = Result + InternalHexCharToUintn (*String);
+ String++;
+ }
+
+ return Result;
+}
+
+/**
+ Check if a ASCII character is a decimal character.
+
+ This internal function checks if a Unicode character is a
+ decimal character. The valid decimal character is from
+ '0' to '9'.
+
+ @param Char The character to check against.
+
+ @retval TRUE If the Char is a decmial character.
+ @retval FALSE Otherwise.
+
+**/
+STATIC
+BOOLEAN
+InternalAsciiIsDecimalDigitCharacter (
+ IN CHAR8 Char
+ )
+{
+ return (BOOLEAN) (Char >= '0' && Char <= '9');
+}
+
+/**
+ Check if a ASCII character is a hexadecimal character.
+
+ This internal function checks if a ASCII character is a
+ decimal character. The valid hexadecimal character is
+ L'0' to L'9', L'a' to L'f', or L'A' to L'F'.
+
+
+ @param Char The character to check against.
+
+ @retval TRUE If the Char is a hexadecmial character.
+ @retval FALSE Otherwise.
+
+**/
+STATIC
+BOOLEAN
+InternalAsciiIsHexaDecimalDigitCharacter (
+ IN CHAR8 Char
+ )
+{
+
+ return (BOOLEAN) (InternalAsciiIsDecimalDigitCharacter (Char) ||
+ (Char >= 'A' && Char <= 'F') ||
+ (Char >= 'a' && Char <= 'f'));
+}
+
+/**
+ Convert a Null-terminated Unicode string to a Null-terminated
+ ASCII string and returns the ASCII string.
+
+ This function converts the content of the Unicode string Source
+ to the ASCII string Destination by copying the lower 8 bits of
+ each Unicode character. It returns Destination. The function terminates
+ the ASCII string Destination by appending a Null-terminator character
+ at the end. The caller is responsible to make sure Destination points
+ to a buffer with size equal or greater than (StrLen (Source) + 1) in bytes.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+
+ If any Unicode characters in Source contain non-zero value in
+ the upper 8 bits, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more
+ than PcdMaximumAsciiStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Destination Pointer to a Null-terminated ASCII string.
+
+ @reture Destination
+
+**/
+CHAR8 *
+EFIAPI
+UnicodeStrToAsciiStr (
+ IN CONST CHAR16 *Source,
+ OUT CHAR8 *Destination
+ )
+{
+ ASSERT (Destination != NULL);
+ ASSERT (Source != NULL);
+ ASSERT (((UINTN) Source & 0x01) == 0);
+
+ //
+ // Source and Destination should not overlap
+ //
+ ASSERT ((UINTN) ((CHAR16 *) Destination - Source) > StrLen (Source));
+ ASSERT ((UINTN) ((CHAR8 *) Source - Destination) > StrLen (Source));
+
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length of Source should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {
+ ASSERT (StrLen (Source) < PcdGet32 (PcdMaximumUnicodeStringLength));
+ }
+
+ while (*Source != '\0') {
+ //
+ // If any Unicode characters in Source contain
+ // non-zero value in the upper 8 bits, then ASSERT().
+ //
+ ASSERT (*Source < 0x100);
+ *(Destination++) = (CHAR8) *(Source++);
+ }
+
+ *Destination = '\0';
+
+ return Destination;
+}
+
+
+/**
+ Copies one Null-terminated ASCII string to another Null-terminated ASCII
+ string and returns the new ASCII string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ CHAR8 *ReturnValue;
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source));
+
+ ReturnValue = Destination;
+ while (*Source) {
+ *(Destination++) = *(Source++);
+ }
+ *Destination = 0;
+ return ReturnValue;
+}
+
+/**
+ Copies one Null-terminated ASCII string with a maximum length to another
+ Null-terminated ASCII string with a maximum length and returns the new ASCII
+ string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. At most, Length ASCII characters
+ are copied from Source to Destination. If Length is 0, then Destination is
+ returned unmodified. If Length is greater that the number of ASCII characters
+ in Source, then Destination is padded with Null ASCII characters. If Source
+ and Destination overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to copy.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ CHAR8 *ReturnValue;
+
+ if (Length == 0) {
+ return Destination;
+ }
+
+ //
+ // Destination cannot be NULL
+ //
+ ASSERT (Destination != NULL);
+
+ //
+ // Destination and source cannot overlap
+ //
+ ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN)(Source - Destination) >= Length);
+
+ ReturnValue = Destination;
+
+ while (*Source && Length > 0) {
+ *(Destination++) = *(Source++);
+ Length--;
+ }
+
+ ZeroMem (Destination, Length * sizeof (*Destination));
+ return ReturnValue;
+}
+
+/**
+ Returns the length of a Null-terminated ASCII string.
+
+ This function returns the number of ASCII characters in the Null-terminated
+ ASCII string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Length;
+
+ ASSERT (String != NULL);
+
+ for (Length = 0; *String != '\0'; String++, Length++) {
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (Length < PcdGet32 (PcdMaximumAsciiStringLength));
+ }
+ }
+ return Length;
+}
+
+/**
+ Returns the size of a Null-terminated ASCII string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated ASCII string
+ specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrSize (
+ IN CONST CHAR8 *String
+ )
+{
+ return (AsciiStrLen (String) + 1) * sizeof (*String);
+}
+
+/**
+ Compares two Null-terminated ASCII strings, and returns the difference
+ between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched ASCII character in SecondString subtracted from the first
+ mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') && (*FirstString == *SecondString)) {
+ FirstString++;
+ SecondString++;
+ }
+
+ return *FirstString - *SecondString;
+}
+
+/**
+ Converts a lowercase Ascii character to upper one
+
+ If Chr is lowercase Ascii character, then converts it to upper one.
+
+ If Value >= 0xA0, then ASSERT().
+ If (Value & 0x0F) >= 0x0A, then ASSERT().
+
+ @param chr one Ascii character
+
+ @return The uppercase value of Ascii character
+
+**/
+STATIC
+CHAR8
+AsciiToUpper (
+ IN CHAR8 Chr
+ )
+{
+ return (UINT8) ((Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr);
+}
+
+/**
+ Convert a ASCII character to numerical value.
+
+ This internal function only deal with Unicode character
+ which maps to a valid hexadecimal ASII character, i.e.
+ '0' to '9', 'a' to 'f' or 'A' to 'F'. For other
+ ASCII character, the value returned does not make sense.
+
+ @param Char The character to convert.
+
+ @retval UINTN The numerical value converted.
+
+**/
+STATIC
+UINTN
+InternalAsciiHexCharToUintn (
+ IN CHAR8 Char
+ )
+{
+ if (InternalIsDecimalDigitCharacter (Char)) {
+ return Char - '0';
+ }
+
+ return (UINTN) (10 + AsciiToUpper (Char) - 'A');
+}
+
+
+/**
+ Performs a case insensitive comparison of two Null-terminated ASCII strings,
+ and returns the difference between the first mismatched ASCII characters.
+
+ This function performs a case insensitive comparison of the Null-terminated
+ ASCII string FirstString to the Null-terminated ASCII string SecondString. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched lower case ASCII character in
+ SecondString subtracted from the first mismatched lower case ASCII character
+ in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString using case insensitive
+ comparisons.
+ @retval !=0 FirstString is not identical to SecondString using case
+ insensitive comparisons.
+
+**/
+INTN
+EFIAPI
+AsciiStriCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ )
+{
+ CHAR8 UpperFirstString;
+ CHAR8 UpperSecondString;
+
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ UpperFirstString = AsciiToUpper (*FirstString);
+ UpperSecondString = AsciiToUpper (*SecondString);
+ while ((*FirstString != '\0') && (UpperFirstString == UpperSecondString)) {
+ FirstString++;
+ SecondString++;
+ UpperFirstString = AsciiToUpper (*FirstString);
+ UpperSecondString = AsciiToUpper (*SecondString);
+ }
+
+ return UpperFirstString - UpperSecondString;
+}
+
+/**
+ Compares two Null-terminated ASCII strings with maximum lengths, and returns
+ the difference between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. At most, Length ASCII characters
+ will be compared. If Length is 0, then 0 is returned. If FirstString is
+ identical to SecondString, then 0 is returned. Otherwise, the value returned
+ is the first mismatched ASCII character in SecondString subtracted from the
+ first mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrnCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+
+ //
+ // ASSERT both strings are less long than PcdMaximumAsciiStringLength
+ //
+ ASSERT (AsciiStrSize (FirstString));
+ ASSERT (AsciiStrSize (SecondString));
+
+ while ((*FirstString != '\0') &&
+ (*FirstString == *SecondString) &&
+ (Length > 1)) {
+ FirstString++;
+ SecondString++;
+ Length--;
+ }
+ return *FirstString - *SecondString;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string to another Null-terminated
+ ASCII string, and returns the concatenated ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents of
+ Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination. The Null-terminated concatenated ASCII
+ String is returned.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ )
+{
+ AsciiStrCpy (Destination + AsciiStrLen (Destination), Source);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Concatenates one Null-terminated ASCII string with a maximum length to the
+ end of another Null-terminated ASCII string, and returns the concatenated
+ ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents
+ of Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination, and Destination is returned. At most,
+ Length ASCII characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters not including the Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ )
+{
+ AsciiStrnCpy (Destination + AsciiStrLen (Destination), Source, Length);
+
+ //
+ // Size of the resulting string should never be zero.
+ // PcdMaximumUnicodeStringLength is tested inside StrLen().
+ //
+ ASSERT (AsciiStrSize (Destination) != 0);
+ return Destination;
+}
+
+/**
+ Returns the first occurance of a Null-terminated ASCII sub-string
+ in a Null-terminated ASCII string.
+
+ This function scans the contents of the ASCII string specified by String
+ and returns the first occurrence of SearchString. If SearchString is not
+ found in String, then NULL is returned. If the length of SearchString is zero,
+ then String is returned.
+
+ If String is NULL, then ASSERT().
+ If SearchString is NULL, then ASSERT().
+
+ If PcdMaximumAsciiStringLength is not zero, and SearchString or
+ String contains more than PcdMaximumAsciiStringLength Unicode characters
+ not including the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+ @param SearchString Pointer to a Null-terminated ASCII string to search for.
+
+ @retval NULL If the SearchString does not appear in String.
+ @retval !NULL If there is a match.
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrStr (
+ IN CONST CHAR8 *String,
+ IN CONST CHAR8 *SearchString
+ )
+{
+ CONST CHAR8 *FirstMatch;
+ CONST CHAR8 *SearchStringTmp;
+
+ ASSERT (String != NULL);
+ ASSERT (SearchString != NULL);
+
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length of String should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));
+ }
+
+ //
+ // If PcdMaximumUnicodeStringLength is not zero,
+ // length of SearchString should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (AsciiStrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength));
+ }
+
+ while (*String != '\0') {
+ SearchStringTmp = SearchString;
+ FirstMatch = String;
+
+ while ((*String == *SearchStringTmp)
+ && (*SearchStringTmp != '\0')
+ && (*String != '\0')) {
+ String++;
+ SearchStringTmp++;
+ }
+
+ if (*SearchStringTmp == '\0') {
+ return (CHAR8 *) FirstMatch;
+ }
+
+ if (SearchStringTmp == SearchString) {
+ //
+ // If no character from SearchString match,
+ // move the pointer to the String under search
+ // by one character.
+ //
+ String++;
+ }
+
+ }
+
+ return NULL;
+}
+
+/**
+ Convert a Null-terminated ASCII decimal string to a value of type
+ UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the ASCII string String as a decimal number. The format of the input
+ ASCII string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The function will
+ ignore the pad space, which includes spaces or tab characters, before the digits.
+ The running zero in the beginning of [decimal digits] will be ignored. Then, the
+ function stops at the first character that is a not a valid decimal character or
+ Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits, then 0 is returned.
+ If the number represented by String overflows according to the range defined by
+ UINTN, then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+AsciiStrDecimalToUintn (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Result;
+
+ ASSERT (String != NULL);
+ ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == ' ') || (*String == '\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == '0') {
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalAsciiIsDecimalDigitCharacter (*String)) {
+ //
+ // If the number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) ||
+ ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) &&
+ (*String - '0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10)
+ );
+
+ Result = Result * 10 + (*String - '0');
+ String++;
+ }
+
+ return Result;
+}
+
+
+/**
+ Convert a Null-terminated ASCII decimal string to a value of type
+ UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the ASCII string String as a decimal number. The format of the input
+ ASCII string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The function will
+ ignore the pad space, which includes spaces or tab characters, before the digits.
+ The running zero in the beginning of [decimal digits] will be ignored. Then, the
+ function stops at the first character that is a not a valid decimal character or
+ Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits, then 0 is returned.
+ If the number represented by String overflows according to the range defined by
+ UINT64, then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+AsciiStrDecimalToUint64 (
+ IN CONST CHAR8 *String
+ )
+{
+ UINT64 Result;
+
+ ASSERT (String != NULL);
+ ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == ' ') || (*String == '\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == '0') {
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalAsciiIsDecimalDigitCharacter (*String)) {
+ //
+ // If the number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) ||
+ ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) &&
+ (*String - '0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10)
+ );
+
+ Result = MultU64x32 (Result, 10) + (*String - '0');
+ String++;
+ }
+
+ return Result;
+}
+
+/**
+ Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents of
+ the ASCII string String as a hexadecimal number. The format of the input ASCII
+ string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
+ appears in the input string, it must be prefixed with at least one 0. The function
+ will ignore the pad space, which includes spaces or tab characters, before [zeros],
+ [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
+ will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
+ digit. Then, the function stops at the first character that is a not a valid
+ hexadecimal character or Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
+ 0 is returned.
+
+ If the number represented by String overflows according to the range defined by UINTN,
+ then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero,
+ and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+AsciiStrHexToUintn (
+ IN CONST CHAR8 *String
+ )
+{
+ UINTN Result;
+
+ ASSERT (String != NULL);
+ ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == ' ') || (*String == '\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == '0') {
+ String++;
+ }
+
+ if (AsciiToUpper (*String) == 'X') {
+ ASSERT (*(String - 1) == '0');
+ if (*(String - 1) != '0') {
+ return 0;
+ }
+ //
+ // Skip the 'X'
+ //
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) {
+ //
+ // If the Hex Number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) ||
+ ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) &&
+ (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16))
+ );
+
+ Result = (Result << 4) + InternalAsciiHexCharToUintn (*String);
+ String++;
+ }
+
+ return Result;
+}
+
+
+/**
+ Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents of
+ the ASCII string String as a hexadecimal number. The format of the input ASCII
+ string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
+ appears in the input string, it must be prefixed with at least one 0. The function
+ will ignore the pad space, which includes spaces or tab characters, before [zeros],
+ [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
+ will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
+ digit. Then, the function stops at the first character that is a not a valid
+ hexadecimal character or Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
+ 0 is returned.
+
+ If the number represented by String overflows according to the range defined by UINT64,
+ then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero,
+ and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+AsciiStrHexToUint64 (
+ IN CONST CHAR8 *String
+ )
+{
+ UINT64 Result;
+
+ ASSERT (String != NULL);
+ ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));
+
+ //
+ // Ignore the pad spaces (space or tab) and leading Zeros
+ //
+ //
+ // Ignore the pad spaces (space or tab)
+ //
+ while ((*String == ' ') || (*String == '\t')) {
+ String++;
+ }
+
+ //
+ // Ignore leading Zeros after the spaces
+ //
+ while (*String == '0') {
+ String++;
+ }
+
+ if (AsciiToUpper (*String) == 'X') {
+ ASSERT (*(String - 1) == '0');
+ if (*(String - 1) != '0') {
+ return 0;
+ }
+ //
+ // Skip the 'X'
+ //
+ String++;
+ }
+
+ Result = 0;
+
+ while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) {
+ //
+ // If the Hex Number represented by String overflows according
+ // to the range defined by UINTN, then ASSERT().
+ //
+ ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16) ||
+ ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) &&
+ (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16))
+ );
+
+ Result = LShiftU64 (Result, 4);
+ Result = Result + InternalAsciiHexCharToUintn (*String);
+ String++;
+ }
+
+ return Result;
+}
+
+
+/**
+ Convert one Null-terminated ASCII string to a Null-terminated
+ Unicode string and returns the Unicode string.
+
+ This function converts the contents of the ASCII string Source to the Unicode
+ string Destination, and returns Destination. The function terminates the
+ Unicode string Destination by appending a Null-terminator character at the end.
+ The caller is responsible to make sure Destination points to a buffer with size
+ equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
+
+ If Destination is NULL, then ASSERT().
+ If Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Destination Pointer to a Null-terminated Unicode string.
+
+ @reture Destination
+
+**/
+CHAR16 *
+EFIAPI
+AsciiStrToUnicodeStr (
+ IN CONST CHAR8 *Source,
+ OUT CHAR16 *Destination
+ )
+{
+ ASSERT (Destination != NULL);
+ ASSERT (Source != NULL);
+
+ //
+ // Source and Destination should not overlap
+ //
+ ASSERT ((UINTN) ((CHAR8 *) Destination - Source) > AsciiStrLen (Source));
+ ASSERT ((UINTN) (Source - (CHAR8 *) Destination) > (AsciiStrLen (Source) * sizeof (CHAR16)));
+
+ //
+ // If PcdMaximumAsciiStringLength is not zero,
+ // length of Source should not more than PcdMaximumUnicodeStringLength
+ //
+ if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {
+ ASSERT (AsciiStrLen (Source) < PcdGet32 (PcdMaximumAsciiStringLength));
+ }
+
+ while (*Source != '\0') {
+ *(Destination++) = (CHAR16) *(Source++);
+ }
+ //
+ // End the Destination with a NULL.
+ //
+ *Destination = '\0';
+
+ return Destination;
+}
+
+/**
+ Converts an 8-bit value to an 8-bit BCD value.
+
+ Converts the 8-bit value specified by Value to BCD. The BCD value is
+ returned.
+
+ If Value >= 100, then ASSERT().
+
+ @param Value The 8-bit value to convert to BCD. Range 0..99.
+
+ @return The BCD value
+
+**/
+UINT8
+EFIAPI
+DecimalToBcd8 (
+ IN UINT8 Value
+ )
+{
+ ASSERT (Value < 100);
+ return (UINT8) (((Value / 10) << 4) | (Value % 10));
+}
+
+/**
+ Converts an 8-bit BCD value to an 8-bit value.
+
+ Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
+ value is returned.
+
+ If Value >= 0xA0, then ASSERT().
+ If (Value & 0x0F) >= 0x0A, then ASSERT().
+
+ @param Value The 8-bit BCD value to convert to an 8-bit value.
+
+ @return The 8-bit value is returned.
+
+**/
+UINT8
+EFIAPI
+BcdToDecimal8 (
+ IN UINT8 Value
+ )
+{
+ ASSERT (Value < 0xa0);
+ ASSERT ((Value & 0xf) < 0xa);
+ return (UINT8) ((Value >> 4) * 10 + (Value & 0xf));
+}
+
+
diff --git a/MdePkg/Library/BaseLib/SwapBytes16.c b/MdePkg/Library/BaseLib/SwapBytes16.c new file mode 100644 index 0000000000..3709f43f38 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes16.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Operand
+ )
+{
+ return (UINT16) ((Operand << 8) | (Operand >> 8));
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes32.c b/MdePkg/Library/BaseLib/SwapBytes32.c new file mode 100644 index 0000000000..1b1fe78fc2 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes32.c @@ -0,0 +1,47 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Operand
+ )
+{
+ UINT32 LowerBytes;
+ UINT32 HigherBytes;
+
+ LowerBytes = (UINT32) SwapBytes16 ((UINT16) Operand);
+ HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Operand >> 16));
+
+ return (LowerBytes << 16 | HigherBytes);
+}
diff --git a/MdePkg/Library/BaseLib/SwapBytes64.c b/MdePkg/Library/BaseLib/SwapBytes64.c new file mode 100644 index 0000000000..eaffbebcc6 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwapBytes64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return InternalMathSwapBytes64 (Operand);
+}
diff --git a/MdePkg/Library/BaseLib/SwitchStack.c b/MdePkg/Library/BaseLib/SwitchStack.c new file mode 100644 index 0000000000..39aec86391 --- /dev/null +++ b/MdePkg/Library/BaseLib/SwitchStack.c @@ -0,0 +1,71 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include <BaseLibInternals.h>
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return. This function
+ supports a variable number of arguments following the NewStack parameter.
+ These additional arguments are ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+
+ VA_START (Marker, NewStack);
+
+ InternalSwitchStack (EntryPoint, Context1, Context2, NewStack, Marker);
+
+ //
+ // InternalSwitchStack () will never return
+ //
+ ASSERT (FALSE);
+}
diff --git a/MdePkg/Library/BaseLib/Synchronization.c b/MdePkg/Library/BaseLib/Synchronization.c new file mode 100644 index 0000000000..30dabfbc20 --- /dev/null +++ b/MdePkg/Library/BaseLib/Synchronization.c @@ -0,0 +1,363 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = SPIN_LOCK_RELEASED;
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ return (BOOLEAN)(
+ InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ ) == (VOID*)SPIN_LOCK_RELEASED
+ );
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ *SpinLock = SPIN_LOCK_RELEASED;
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/SynchronizationGcc.c b/MdePkg/Library/BaseLib/SynchronizationGcc.c new file mode 100644 index 0000000000..85a3531967 --- /dev/null +++ b/MdePkg/Library/BaseLib/SynchronizationGcc.c @@ -0,0 +1,378 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SynchronizationGcc.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+//
+// GCC inline assembly for Read Write Barrier
+//
+#define _ReadWriteBarrier() do { asm volatile ("": : : "memory"); } while(0)
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+
+ _ReadWriteBarrier();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier();
+
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+ VOID *Result;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ Result = InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ );
+
+ _ReadWriteBarrier ();
+ return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier ();
+
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/SynchronizationMsc.c b/MdePkg/Library/BaseLib/SynchronizationMsc.c new file mode 100644 index 0000000000..29f1717b4a --- /dev/null +++ b/MdePkg/Library/BaseLib/SynchronizationMsc.c @@ -0,0 +1,380 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SynchronizationMsc.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for read write barrier Intrinsics
+//
+void _ReadWriteBarrier (void);
+#pragma intrinsic(_ReadWriteBarrier)
+
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+
+ _ReadWriteBarrier();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier();
+
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+ VOID *Result;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ Result = InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ );
+
+ _ReadWriteBarrier ();
+ return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier ();
+
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/MdePkg/Library/BaseLib/Unaligned.c b/MdePkg/Library/BaseLib/Unaligned.c new file mode 100644 index 0000000000..fef8343e94 --- /dev/null +++ b/MdePkg/Library/BaseLib/Unaligned.c @@ -0,0 +1,225 @@ +/** @file
+ Unaligned access functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer & 0xffffff;
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ *Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);
+ return Value;
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
diff --git a/MdePkg/Library/BaseLib/x86DisablePaging32.c b/MdePkg/Library/BaseLib/x86DisablePaging32.c new file mode 100644 index 0000000000..9e72141de6 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86DisablePaging32.c @@ -0,0 +1,70 @@ +/** @file
+ IA-32/x64 AsmDisablePaging32()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86DisablePaging32.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/MdePkg/Library/BaseLib/x86DisablePaging64.c b/MdePkg/Library/BaseLib/x86DisablePaging64.c new file mode 100644 index 0000000000..527950e038 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86DisablePaging64.c @@ -0,0 +1,67 @@ +/** @file
+ IA-32/x64 AsmDisablePaging64()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86DisablePaging64.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/MdePkg/Library/BaseLib/x86EnablePaging32.c b/MdePkg/Library/BaseLib/x86EnablePaging32.c new file mode 100644 index 0000000000..9efacb45e5 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86EnablePaging32.c @@ -0,0 +1,73 @@ +/** @file
+ IA-32/x64 AsmEnablePaging32()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86EnablePaging32.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/MdePkg/Library/BaseLib/x86EnablePaging64.c b/MdePkg/Library/BaseLib/x86EnablePaging64.c new file mode 100644 index 0000000000..75647d7d3e --- /dev/null +++ b/MdePkg/Library/BaseLib/x86EnablePaging64.c @@ -0,0 +1,69 @@ +/** @file
+ IA-32/x64 AsmEnablePaging64()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86EnablePaging64.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/MdePkg/Library/BaseLib/x86FxRestore.c b/MdePkg/Library/BaseLib/x86FxRestore.c new file mode 100644 index 0000000000..c3f76d4629 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86FxRestore.c @@ -0,0 +1,53 @@ +/** @file
+ IA-32/x64 AsmFxRestore()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86FxRestore.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+
+ //
+ // Check the flag recorded by AsmFxSave()
+ //
+ ASSERT (*(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) == 0xAA5555AA);
+
+ InternalX86FxRestore (Buffer);
+}
diff --git a/MdePkg/Library/BaseLib/x86FxSave.c b/MdePkg/Library/BaseLib/x86FxSave.c new file mode 100644 index 0000000000..2ccbe4894b --- /dev/null +++ b/MdePkg/Library/BaseLib/x86FxSave.c @@ -0,0 +1,52 @@ +/** @file
+ IA-32/x64 AsmFxSave()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86FxSave.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+
+ InternalX86FxSave (Buffer);
+
+ //
+ // Mark one flag at end of Buffer, it will be check by AsmFxRestor()
+ //
+ *(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) = 0xAA5555AA;
+}
diff --git a/MdePkg/Library/BaseLib/x86GetInterruptState.c b/MdePkg/Library/BaseLib/x86GetInterruptState.c new file mode 100644 index 0000000000..fd108e1c8d --- /dev/null +++ b/MdePkg/Library/BaseLib/x86GetInterruptState.c @@ -0,0 +1,44 @@ +/** @file
+ IA-32/x64 GetInterruptState()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86GetInterruptState.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ IA32_EFLAGS32 EFlags;
+
+ EFlags.UintN = AsmReadEflags ();
+ return (BOOLEAN)(EFlags.Bits.IF == 1);
+}
+
+
diff --git a/MdePkg/Library/BaseLib/x86MemoryFence.c b/MdePkg/Library/BaseLib/x86MemoryFence.c new file mode 100644 index 0000000000..4c824d2794 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86MemoryFence.c @@ -0,0 +1,36 @@ +/** @file
+ IA-32/x64 MemoryFence().
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86MemoryFence.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ return;
+}
diff --git a/MdePkg/Library/BaseLib/x86Msr.c b/MdePkg/Library/BaseLib/x86Msr.c new file mode 100644 index 0000000000..a9ad2425ae --- /dev/null +++ b/MdePkg/Library/BaseLib/x86Msr.c @@ -0,0 +1,654 @@ +/** @file
+ IA-32/x64 MSR functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Msr.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Returns the lower 32-bits of a Machine Specific Register(MSR).
+
+ Reads and returns the lower 32-bits of the MSR specified by Index.
+ No parameter checking is performed on Index, and some Index values may cause
+ CPU exceptions. The caller must either guarantee that Index is valid, or the
+ caller must set up exception handlers to catch the exceptions. This function
+ is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The lower 32 bits of the MSR identified by Index.
+
+**/
+UINT32
+EFIAPI
+AsmReadMsr32 (
+ IN UINT32 Index
+ )
+{
+ return (UINT32)AsmReadMsr64 (Index);
+}
+
+/**
+ Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).
+
+ Writes the 32-bit value specified by Value to the MSR specified by Index. The
+ upper 32-bits of the MSR write are set to zero. The 32-bit value written to
+ the MSR is returned. No parameter checking is performed on Index or Value,
+ and some of these may cause CPU exceptions. The caller must either guarantee
+ that Index and Value are valid, or the caller must establish proper exception
+ handlers. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 32-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+AsmWriteMsr32 (
+ IN UINT32 Index,
+ IN UINT32 Value
+ )
+{
+ return (UINT32)AsmWriteMsr64 (Index, Value);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrOr64 (Index, OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ )
+{
+ return (UINT32)AsmMsrAnd64 (Index, AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Value) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (OrData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAndThenOr64 (
+ Index,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAndThenOr64 (
+ AsmReadMsr64 (Index),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ )
+ );
+}
diff --git a/MdePkg/Library/BaseLib/x86ReadGdtr.c b/MdePkg/Library/BaseLib/x86ReadGdtr.c new file mode 100644 index 0000000000..c1b75d1397 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86ReadGdtr.c @@ -0,0 +1,43 @@ +/** @file
+ IA-32/x64 AsmReadGdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86ReadGdtr.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86ReadGdtr (Gdtr);
+}
diff --git a/MdePkg/Library/BaseLib/x86ReadIdtr.c b/MdePkg/Library/BaseLib/x86ReadIdtr.c new file mode 100644 index 0000000000..c5a0d652fe --- /dev/null +++ b/MdePkg/Library/BaseLib/x86ReadIdtr.c @@ -0,0 +1,43 @@ +/** @file
+ IA-32/x64 AsmReadIdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86ReadIdtr.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86ReadIdtr (Idtr);
+}
diff --git a/MdePkg/Library/BaseLib/x86Thunk.c b/MdePkg/Library/BaseLib/x86Thunk.c new file mode 100644 index 0000000000..44b452ceb2 --- /dev/null +++ b/MdePkg/Library/BaseLib/x86Thunk.c @@ -0,0 +1,248 @@ +/** @file
+ Real Mode Thunk Functions for IA32 and X64.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Thunk.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Byte packed structure for a segment descriptor in a GDT/LDT
+//
+typedef union {
+ struct {
+ UINT32 LimitLow:16;
+ UINT32 BaseLow:16;
+ UINT32 BaseMid:8;
+ UINT32 Type:4;
+ UINT32 S:1;
+ UINT32 DPL:2;
+ UINT32 P:1;
+ UINT32 LimitHigh:4;
+ UINT32 AVL:1;
+ UINT32 L:1;
+ UINT32 DB:1;
+ UINT32 G:1;
+ UINT32 BaseHigh:8;
+ } Bits;
+ UINT64 Uint64;
+} IA32_SEGMENT_DESCRIPTOR;
+
+extern CONST UINT8 m16Start;
+extern CONST UINT16 m16Size;
+extern CONST UINT16 mThunk16Attr;
+extern CONST UINT16 m16Gdt;
+extern CONST UINT16 m16GdtrBase;
+extern CONST UINT16 mTransition;
+
+/**
+ Invokes 16-bit code in big real mode and returns the updated register set.
+
+ This function transfers control to the 16-bit code specified by CS:EIP using
+ the stack specified by SS:ESP in RegisterSet. The updated registers are saved
+ on the real mode stack and the starting address of the save area is returned.
+
+ @param RegisterSet Values of registers before invocation of 16-bit code.
+ @param Transition Pointer to the transition code under 1MB.
+
+ @return The pointer to a IA32_REGISTER_SET structure containing the updated
+ register values.
+
+**/
+IA32_REGISTER_SET *
+EFIAPI
+InternalAsmThunk16 (
+ IN IA32_REGISTER_SET *RegisterSet,
+ IN OUT VOID *Transition
+ );
+
+/**
+ Retrieves the properties for 16-bit thunk functions.
+
+ Computes the size of the buffer and stack below 1MB required to use the
+ AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
+ buffer size is returned in RealModeBufferSize, and the stack size is returned
+ in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
+ then the actual minimum stack size is ExtraStackSize plus the maximum number
+ of bytes that need to be passed to the 16-bit real mode code.
+
+ If RealModeBufferSize is NULL, then ASSERT().
+ If ExtraStackSize is NULL, then ASSERT().
+
+ @param RealModeBufferSize A pointer to the size of the buffer below 1MB
+ required to use the 16-bit thunk functions.
+ @param ExtraStackSize A pointer to the extra size of stack below 1MB
+ that the 16-bit thunk functions require for
+ temporary storage in the transition to and from
+ 16-bit real mode.
+
+**/
+VOID
+EFIAPI
+AsmGetThunk16Properties (
+ OUT UINT32 *RealModeBufferSize,
+ OUT UINT32 *ExtraStackSize
+ )
+{
+ ASSERT (RealModeBufferSize != NULL);
+ ASSERT (ExtraStackSize != NULL);
+
+ *RealModeBufferSize = m16Size;
+
+ //
+ // Extra 4 bytes for return address, and another 4 bytes for mode transition
+ //
+ *ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;
+}
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ IA32_SEGMENT_DESCRIPTOR *RealModeGdt;
+
+ ASSERT (ThunkContext != NULL);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);
+
+ CopyMem (ThunkContext->RealModeBuffer, &m16Start, m16Size);
+
+ //
+ // Point RealModeGdt to the GDT to be used in transition
+ //
+ // RealModeGdt[0]: Reserved as NULL descriptor
+ // RealModeGdt[1]: Code Segment
+ // RealModeGdt[2]: Data Segment
+ // RealModeGdt[3]: Call Gate
+ //
+ RealModeGdt = (IA32_SEGMENT_DESCRIPTOR*)(
+ (UINTN)ThunkContext->RealModeBuffer + m16Gdt);
+
+ //
+ // Update Code & Data Segment Descriptor
+ //
+ RealModeGdt[1].Bits.BaseLow =
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & ~0xf;
+ RealModeGdt[1].Bits.BaseMid =
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer >> 16;
+
+ //
+ // Update transition code entry point offset
+ //
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mTransition) +=
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & 0xf;
+
+ //
+ // Update Segment Limits for both Code and Data Segment Descriptors
+ //
+ if ((ThunkContext->ThunkAttributes & THUNK_ATTRIBUTE_BIG_REAL_MODE) == 0) {
+ //
+ // Set segment limits to 64KB
+ //
+ RealModeGdt[1].Bits.LimitHigh = 0;
+ RealModeGdt[1].Bits.G = 0;
+ RealModeGdt[2].Bits.LimitHigh = 0;
+ RealModeGdt[2].Bits.G = 0;
+ }
+
+ //
+ // Update GDTBASE for this thunk context
+ //
+ *(VOID**)((UINTN)ThunkContext->RealModeBuffer + m16GdtrBase) = RealModeGdt;
+
+ //
+ // Update Thunk Attributes
+ //
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mThunk16Attr) =
+ ThunkContext->ThunkAttributes;
+}
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used. This function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ IA32_REGISTER_SET *UpdatedRegs;
+
+ ASSERT (ThunkContext != NULL);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);
+
+ UpdatedRegs = InternalAsmThunk16 (
+ ThunkContext->RealModeState,
+ ThunkContext->RealModeBuffer
+ );
+
+ CopyMem (ThunkContext->RealModeState, UpdatedRegs, sizeof (*UpdatedRegs));
+}
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk. This
+ function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ AsmPrepareThunk16 (ThunkContext);
+ AsmThunk16 (ThunkContext);
+}
diff --git a/MdePkg/Library/BaseLib/x86WriteGdtr.c b/MdePkg/Library/BaseLib/x86WriteGdtr.c new file mode 100644 index 0000000000..20982ae88c --- /dev/null +++ b/MdePkg/Library/BaseLib/x86WriteGdtr.c @@ -0,0 +1,43 @@ +/** @file
+ IA-32/x64 AsmWriteGdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86GetInterruptState.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86WriteGdtr (Gdtr);
+}
diff --git a/MdePkg/Library/BaseLib/x86WriteIdtr.c b/MdePkg/Library/BaseLib/x86WriteIdtr.c new file mode 100644 index 0000000000..3188aa275f --- /dev/null +++ b/MdePkg/Library/BaseLib/x86WriteIdtr.c @@ -0,0 +1,43 @@ +/** @file
+ IA-32/x64 AsmWriteIdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86WriteIdtr.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseLibInternals.h"
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86WriteIdtr (Idtr);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf new file mode 100644 index 0000000000..9082ddcf02 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf @@ -0,0 +1,96 @@ +#/** @file
+# Component description file for Base Memory Library
+#
+# Base Memory Library implementation - no ASM.
+# Copyright (c) 2007, Intel Corporation
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseMemoryLib
+ FILE_GUID = fd44e603-002a-4b29-9f5f-529e815b6165
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BaseMemoryLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ SetMem.c
+ ScanMem64Wrapper.c
+ ScanMem32Wrapper.c
+ ScanMem16Wrapper.c
+ ScanMem8Wrapper.c
+ ZeroMemWrapper.c
+ CompareMemWrapper.c
+ SetMem64Wrapper.c
+ SetMem32Wrapper.c
+ SetMem16Wrapper.c
+ SetMemWrapper.c
+ CopyMemWrapper.c
+ MemLibGeneric.c
+ MemLibGuid.c
+ CopyMem.c
+ MemLibInternals.h
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa new file mode 100644 index 0000000000..52fe3bbfba --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa @@ -0,0 +1,60 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BaseMemoryLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>fd44e603-002a-4b29-9f5f-529e815b6165</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base Memory Library</Abstract>
+ <Description>Base Memory Library implementation – no ASM.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseMemoryLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemLibInternals.h</Filename>
+ <Filename>CopyMem.c</Filename>
+ <Filename>MemLibGuid.c</Filename>
+ <Filename>MemLibGeneric.c</Filename>
+ <Filename>CopyMemWrapper.c</Filename>
+ <Filename>SetMemWrapper.c</Filename>
+ <Filename>SetMem16Wrapper.c</Filename>
+ <Filename>SetMem32Wrapper.c</Filename>
+ <Filename>SetMem64Wrapper.c</Filename>
+ <Filename>CompareMemWrapper.c</Filename>
+ <Filename>ZeroMemWrapper.c</Filename>
+ <Filename>ScanMem8Wrapper.c</Filename>
+ <Filename>ScanMem16Wrapper.c</Filename>
+ <Filename>ScanMem32Wrapper.c</Filename>
+ <Filename>ScanMem64Wrapper.c</Filename>
+ <Filename>SetMem.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLib/CommonHeader.h b/MdePkg/Library/BaseMemoryLib/CommonHeader.h new file mode 100644 index 0000000000..68b4d9483b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c new file mode 100644 index 0000000000..b816af7489 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c @@ -0,0 +1,72 @@ +/** @file
+ CompareMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CompareMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Compares the contents of two buffers.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.
+ If all Length bytes of the two buffers are identical, then 0 is returned. Otherwise, the
+ value returned is the first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+ If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+
+ @param DestinationBuffer Pointer to the destination buffer to compare.
+ @param SourceBuffer Pointer to the source buffer to compare.
+ @param Length Number of bytes to compare.
+
+ @return 0 All Length bytes of the two buffers are identical.
+ @retval Non-zero The first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/CopyMem.c b/MdePkg/Library/BaseMemoryLib/CopyMem.c new file mode 100644 index 0000000000..df5258c93e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/CopyMem.c @@ -0,0 +1,67 @@ +/** @file
+ Implementation of the EfiCopyMem routine. This function is broken
+ out into its own source file so that it can be excluded from a
+ build for a particular platform easily if an optimized version
+ is desired.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EfiCopyMem.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *Destination,
+ IN CONST VOID *Source,
+ IN UINTN Length
+ )
+{
+ //
+ // Declare the local variables that actually move the data elements as
+ // volatile to prevent the optimizer from replacing this function with
+ // the intrinsic memcpy()
+ //
+ volatile UINT8 *Destination8;
+ CONST UINT8 *Source8;
+
+ if (Source > Destination) {
+ Destination8 = (UINT8*)Destination;
+ Source8 = (CONST UINT8*)Source;
+ while (Length-- != 0) {
+ *(Destination8++) = *(Source8++);
+ }
+ } else if (Source < Destination) {
+ Destination8 = (UINT8*)Destination + Length;
+ Source8 = (CONST UINT8*)Source + Length;
+ while (Length-- != 0) {
+ *(--Destination8) = *(--Source8);
+ }
+ }
+ return Destination;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c new file mode 100644 index 0000000000..b0449b19b5 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c @@ -0,0 +1,67 @@ +/** @file
+ CopyMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CopyMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Copies a source buffer to a destination buffer, and returns the destination buffer.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns
+ DestinationBuffer. The implementation must be reentrant, and it must handle the case
+ where SourceBuffer overlaps DestinationBuffer.
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer Pointer to the destination buffer of the memory copy.
+ @param SourceBuffer Pointer to the source buffer of the memory copy.
+ @param Length Number of bytes to copy from SourceBuffer to DestinationBuffer.
+
+ @return DestinationBuffer.
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return DestinationBuffer;
+ }
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ if (DestinationBuffer == SourceBuffer) {
+ return DestinationBuffer;
+ }
+ return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c new file mode 100644 index 0000000000..93d5f805e2 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c @@ -0,0 +1,266 @@ +/** @file
+ Architecture Independent Base Memory Library Implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGeneric.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ do {
+ ((UINT16*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ do {
+ ((UINT32*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ do {
+ ((UINT64*)Buffer)[--Length] = Value;
+ } while (Length != 0);
+ return Buffer;
+}
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ return InternalMemSetMem (Buffer, Length, 0);
+}
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ while ((--Length != 0) &&
+ (*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {
+ DestinationBuffer = (INT8*)DestinationBuffer + 1;
+ SourceBuffer = (INT8*)SourceBuffer + 1;
+ }
+ return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;
+}
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ CONST UINT8 *Pointer;
+
+ Pointer = (CONST UINT8*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ CONST UINT16 *Pointer;
+
+ Pointer = (CONST UINT16*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ CONST UINT32 *Pointer;
+
+ Pointer = (CONST UINT32*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ CONST UINT64 *Pointer;
+
+ Pointer = (CONST UINT64*)Buffer;
+ do {
+ if (*(Pointer++) == Value) {
+ return Pointer;
+ }
+ } while (--Length != 0);
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGuid.c b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c new file mode 100644 index 0000000000..6e9682d523 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c @@ -0,0 +1,142 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid to
+ DestinationGuid, and returns DestinationGuid.
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid.
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ UINT64 LowPartOfGuid1;
+ UINT64 LowPartOfGuid2;
+ UINT64 HighPartOfGuid1;
+ UINT64 HighPartOfGuid2;
+
+ LowPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1);
+ LowPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2);
+ HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);
+ HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);
+
+ return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the 128-bit
+ GUID value that matches Guid. If a match is found, then a pointer to the matching
+ GUID in the target buffer is returned. If no match is found, then NULL is returned.
+ If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 128-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return A pointer to the matching Guid in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/MemLibInternals.h b/MdePkg/Library/BaseMemoryLib/MemLibInternals.h new file mode 100644 index 0000000000..2bd034da2b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/MemLibInternals.h @@ -0,0 +1,235 @@ +/** @file
+ Declaration of internal functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibInternals.h
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+#ifndef __MEM_LIB_INTERNALS__
+#define __MEM_LIB_INTERNALS__
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c new file mode 100644 index 0000000000..f0ca471844 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 16-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c new file mode 100644 index 0000000000..7a0ebcd78f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 32-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c new file mode 100644 index 0000000000..dd1a82fef2 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 64-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c new file mode 100644 index 0000000000..685563e379 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c @@ -0,0 +1,66 @@ +/** @file
+ ScanMem8() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem8Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for an 8-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMem.c b/MdePkg/Library/BaseMemoryLib/SetMem.c new file mode 100644 index 0000000000..3378a23795 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMem.c @@ -0,0 +1,57 @@ +/** @file
+ Implementation of the EfiSetMem routine. This function is broken
+ out into its own source file so that it can be excluded from a
+ build for a particular platform easily if an optimized version
+ is desired.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ )
+{
+ //
+ // Declare the local variables that actually move the data elements as
+ // volatile to prevent the optimizer from replacing this function with
+ // the intrinsic memset()
+ //
+ volatile UINT8 *Pointer;
+
+ Pointer = (UINT8*)Buffer;
+ while (Size-- != 0) {
+ *(Pointer++) = Value;
+ }
+ return Buffer;
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c new file mode 100644 index 0000000000..5e58eb9f74 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c new file mode 100644 index 0000000000..f4927f7d9a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c new file mode 100644 index 0000000000..e84556343a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c new file mode 100644 index 0000000000..84a7d62ea9 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c @@ -0,0 +1,61 @@ +/** @file
+ SetMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a byte value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Length Number of bytes to set.
+ @param Value Value of the set operation.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return InternalMemSetMem (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c new file mode 100644 index 0000000000..886c9343b8 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c @@ -0,0 +1,56 @@ +/** @file
+ ZeroMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ZeroMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with zeros, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with zeros.
+ @param Length Number of bytes in Buffer to fill with zeros.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (!(Buffer == NULL && Length > 0));
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ return InternalMemZeroMem (Buffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf new file mode 100644 index 0000000000..3190f3ce55 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf @@ -0,0 +1,143 @@ +#/** @file
+# Component description file for RepStr Base Memory Library
+#
+# Base Memory Library that uses REP string instructions for
+# high performance and small size. Optimized for use in PEI.
+# Copyright (c) 2007, Intel Corporation
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseMemoryLibRepStr
+ FILE_GUID = e7884bf4-51a1-485b-982a-ff89129983bc
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BaseMemoryLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ MemLibInternals.h
+ CommonHeader.h
+
+[Sources.Ia32]
+ Ia32/ScanMem64.S
+ Ia32/ScanMem32.S
+ Ia32/ScanMem16.S
+ Ia32/ScanMem8.S
+ Ia32/CompareMem.S
+ Ia32/ZeroMem.S
+ Ia32/SetMem64.S
+ Ia32/SetMem32.S
+ Ia32/SetMem16.S
+ Ia32/SetMem.S
+ Ia32/CopyMem.S
+ Ia32/ScanMem64.asm
+ Ia32/ScanMem32.asm
+ Ia32/ScanMem16.asm
+ Ia32/ScanMem8.asm
+ Ia32/CompareMem.asm
+ Ia32/ZeroMem.asm
+ Ia32/SetMem64.asm
+ Ia32/SetMem32.asm
+ Ia32/SetMem16.asm
+ Ia32/SetMem.asm
+ Ia32/CopyMem.asm
+ ScanMem64Wrapper.c
+ ScanMem32Wrapper.c
+ ScanMem16Wrapper.c
+ ScanMem8Wrapper.c
+ ZeroMemWrapper.c
+ CompareMemWrapper.c
+ SetMem64Wrapper.c
+ SetMem32Wrapper.c
+ SetMem16Wrapper.c
+ SetMemWrapper.c
+ CopyMemWrapper.c
+ MemLibGuid.c
+
+[Sources.X64]
+ x64/ScanMem64.asm
+ x64/ScanMem32.asm
+ x64/ScanMem16.asm
+ x64/ScanMem8.asm
+ x64/CompareMem.asm
+ x64/ZeroMem.asm
+ x64/SetMem64.asm
+ x64/SetMem32.asm
+ x64/SetMem16.asm
+ x64/SetMem.asm
+ x64/CopyMem.asm
+ ScanMem64Wrapper.c
+ ScanMem32Wrapper.c
+ ScanMem16Wrapper.c
+ ScanMem8Wrapper.c
+ ZeroMemWrapper.c
+ CompareMemWrapper.c
+ SetMem64Wrapper.c
+ SetMem32Wrapper.c
+ SetMem16Wrapper.c
+ SetMemWrapper.c
+ CopyMemWrapper.c
+ MemLibGuid.c
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa new file mode 100644 index 0000000000..0d98031313 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa @@ -0,0 +1,103 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BaseMemoryLibRepStr</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>e7884bf4-51a1-485b-982a-ff89129983bc</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for RepStr Base Memory Library</Abstract>
+ <Description>Base Memory Library that uses REP string instructions for + high performance and small size. Optimized for use in PEI.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseMemoryLibRepStr</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemLibInternals.h</Filename>
+ <Filename SupArchList="IA32">MemLibGuid.c</Filename>
+ <Filename SupArchList="IA32">CopyMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem16Wrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem32Wrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem64Wrapper.c</Filename>
+ <Filename SupArchList="IA32">CompareMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">ZeroMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem8Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem16Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem32Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem64Wrapper.c</Filename>
+ <Filename SupArchList="IA32">Ia32/CopyMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem16.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem32.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem64.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ZeroMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/CompareMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem8.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem16.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem32.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem64.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/CopyMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem16.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem32.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem64.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ZeroMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/CompareMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem8.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem16.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem32.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem64.S</Filename>
+ <Filename SupArchList="X64">MemLibGuid.c</Filename>
+ <Filename SupArchList="X64">CopyMemWrapper.c</Filename>
+ <Filename SupArchList="X64">SetMemWrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem16Wrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem32Wrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem64Wrapper.c</Filename>
+ <Filename SupArchList="X64">CompareMemWrapper.c</Filename>
+ <Filename SupArchList="X64">ZeroMemWrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem8Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem16Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem32Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem64Wrapper.c</Filename>
+ <Filename SupArchList="X64">x64/CopyMem.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem16.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem32.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem64.asm</Filename>
+ <Filename SupArchList="X64">x64/ZeroMem.asm</Filename>
+ <Filename SupArchList="X64">x64/CompareMem.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem8.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem16.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem32.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem64.asm</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h b/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h new file mode 100644 index 0000000000..68b4d9483b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c new file mode 100644 index 0000000000..b816af7489 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c @@ -0,0 +1,72 @@ +/** @file
+ CompareMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CompareMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Compares the contents of two buffers.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.
+ If all Length bytes of the two buffers are identical, then 0 is returned. Otherwise, the
+ value returned is the first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+ If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+
+ @param DestinationBuffer Pointer to the destination buffer to compare.
+ @param SourceBuffer Pointer to the source buffer to compare.
+ @param Length Number of bytes to compare.
+
+ @return 0 All Length bytes of the two buffers are identical.
+ @retval Non-zero The first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c new file mode 100644 index 0000000000..b0449b19b5 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c @@ -0,0 +1,67 @@ +/** @file
+ CopyMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CopyMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Copies a source buffer to a destination buffer, and returns the destination buffer.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns
+ DestinationBuffer. The implementation must be reentrant, and it must handle the case
+ where SourceBuffer overlaps DestinationBuffer.
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer Pointer to the destination buffer of the memory copy.
+ @param SourceBuffer Pointer to the source buffer of the memory copy.
+ @param Length Number of bytes to copy from SourceBuffer to DestinationBuffer.
+
+ @return DestinationBuffer.
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return DestinationBuffer;
+ }
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ if (DestinationBuffer == SourceBuffer) {
+ return DestinationBuffer;
+ }
+ return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S new file mode 100644 index 0000000000..3968604ca6 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CompareMem.Asm
+#
+# Abstract:
+#
+# CompareMem function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemCompareMem
+
+#------------------------------------------------------------------------------
+# INTN
+# EFIAPI
+# InternalMemCompareMem (
+# IN CONST VOID *DestinationBuffer,
+# IN CONST VOID *SourceBuffer,
+# IN UINTN Length
+# );
+#------------------------------------------------------------------------------
+_InternalMemCompareMem:
+ push %esi
+ push %edi
+ movl 12(%esp), %esi
+ movl 16(%esp), %edi
+ movl 20(%esp), %ecx
+ repe cmpsb
+ movzbl -1(%esi), %eax
+ movzbl -1(%edi), %edx
+ subl %edx, %eax
+ pop %edi
+ pop %esi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm new file mode 100644 index 0000000000..dabd337a7c --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm @@ -0,0 +1,59 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; INTN
+; EFIAPI
+; InternalMemCompareMem (
+; IN CONST VOID *DestinationBuffer,
+; IN CONST VOID *SourceBuffer,
+; IN UINTN Length
+; );
+;------------------------------------------------------------------------------
+InternalMemCompareMem PROC USES esi edi
+ mov esi, [esp + 12]
+ mov edi, [esp + 16]
+ mov ecx, [esp + 20]
+ repe cmpsb
+ movzx eax, byte ptr [esi - 1]
+ movzx edx, byte ptr [edi - 1]
+ sub eax, edx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S new file mode 100644 index 0000000000..a83fc04634 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S @@ -0,0 +1,70 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CopyMem.Asm
+#
+# Abstract:
+#
+# CopyMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemCopyMem
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemCopyMem (
+# IN VOID *Destination,
+# IN VOID *Source,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+_InternalMemCopyMem:
+ push %esi
+ push %edi
+ movl 16(%esp), %esi # esi <- Source
+ movl 12(%esp), %edi # edi <- Destination
+ movl 20(%esp), %edx # edx <- Count
+ leal -1(%esi, %edx), %eax # eax <- End of Source
+ cmpl %edi, %esi
+ jae L0
+ cmpl %edi, %eax
+ jae L_CopyBackward # Copy backward if overlapped
+L0:
+ movl %edx, %ecx
+ andl $3, %edx
+ shrl $2, %ecx
+ rep
+ movsl # Copy as many Dwords as possible
+ jmp L_CopyBytes
+L_CopyBackward:
+ movl %eax, %esi # esi <- End of Source
+ leal -1(%edi, %edx), %edi # edi <- End of Destination
+ std
+L_CopyBytes:
+ movl %edx, %ecx
+ rep
+ movsb # Copy bytes backward
+ cld
+ movl 12(%esp), %eax # eax <- Destination as return value
+ pop %edi
+ pop %esi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm new file mode 100644 index 0000000000..08f3676705 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm @@ -0,0 +1,68 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.Asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemCopyMem (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINTN Count
+; )
+;------------------------------------------------------------------------------
+InternalMemCopyMem PROC USES esi edi
+ mov esi, [esp + 16] ; esi <- Source
+ mov edi, [esp + 12] ; edi <- Destination
+ mov edx, [esp + 20] ; edx <- Count
+ lea eax, [esi + edx - 1] ; eax <- End of Source
+ cmp esi, edi
+ jae @F
+ cmp eax, edi
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ mov ecx, edx
+ and edx, 3
+ shr ecx, 2
+ rep movsd ; Copy as many Dwords as possible
+ jmp @CopyBytes
+@CopyBackward:
+ mov esi, eax ; esi <- End of Source
+ lea edi, [edi + edx - 1] ; edi <- End of Destination
+ std
+@CopyBytes:
+ mov ecx, edx
+ rep movsb ; Copy bytes backward
+ cld
+ mov eax, [esp + 12] ; eax <- Destination as return value
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S new file mode 100644 index 0000000000..276b4ff29f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem16.Asm
+#
+# Abstract:
+#
+# ScanMem16 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem16
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem16 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT16 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem16:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movl 16(%esp), %eax
+ repne scasw
+ leal -2(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm new file mode 100644 index 0000000000..a6d03306f3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem16 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT16 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem16 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasw
+ lea eax, [edi - 2]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S new file mode 100644 index 0000000000..fced1b2362 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem32.Asm
+#
+# Abstract:
+#
+# ScanMem32 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem32
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem32 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT32 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem32:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movl 16(%esp), %eax
+ repne scasl
+ leal -4(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm new file mode 100644 index 0000000000..46a80111d7 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem32 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem32 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasd
+ lea eax, [edi - 4]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S new file mode 100644 index 0000000000..37dc3bbf67 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S @@ -0,0 +1,64 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem64.Asm
+#
+# Abstract:
+#
+# ScanMem64 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem64
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem64 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem64:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 16(%esp), %eax
+ movl 20(%esp), %edx
+ movl 8(%esp), %edi
+L0:
+ cmpl (%edi), %eax
+ leal 8(%edi), %edi
+ loopne L0
+ jne L1
+ cmpl -4(%edi), %edx
+ jecxz L1
+ jne L0
+L1:
+ leal -8(%edi), %eax
+ cmovne %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm new file mode 100644 index 0000000000..c19ed989ed --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm @@ -0,0 +1,67 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem64 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ cmp eax, [edi]
+ lea edi, [edi + 8]
+ loopne @B
+ jne @F
+ cmp edx, [edi - 4]
+ jecxz @F
+ jne @B
+@@:
+ lea eax, [edi - 8]
+ cmovne eax, ecx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S new file mode 100644 index 0000000000..e7d2a26cad --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem8.Asm
+#
+# Abstract:
+#
+# ScanMem8 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem8
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem8 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT8 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem8:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movb 16(%esp), %al
+ repne scasb
+ leal -1(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm new file mode 100644 index 0000000000..def2690d1a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem8 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT8 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem8 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov al, [esp + 16]
+ repne scasb
+ lea eax, [edi - 1]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S new file mode 100644 index 0000000000..46029950be --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S @@ -0,0 +1,51 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem.Asm
+#
+# Abstract:
+#
+# SetMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ .386:
+ .code:
+
+.globl _InternalMemSetMem
+
+#------------------------------------------------------------------------------
+# VOID *
+# InternalMemSetMem (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT8 Value
+# )
+#------------------------------------------------------------------------------
+_InternalMemSetMem:
+ push %edi
+ movl 16(%esp),%eax
+ movl 8(%esp),%edi
+ movl 12(%esp),%ecx
+ rep
+ stosb
+ movl 8(%esp),%eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm new file mode 100644 index 0000000000..d88d1fd105 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm @@ -0,0 +1,50 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.Asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemSetMem (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosb
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S new file mode 100644 index 0000000000..ff62e947a4 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S @@ -0,0 +1,48 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem16.Asm
+#
+# Abstract:
+#
+# SetMem16 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem16
+
+#------------------------------------------------------------------------------
+# VOID *
+# InternalMemSetMem16 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT16 Value
+# )
+#------------------------------------------------------------------------------
+_InternalMemSetMem16:
+ push %edi
+ movl 16(%esp), %eax
+ movl 8(%esp), %edi
+ movl 12(%esp), %ecx
+ rep
+ stosw
+ movl 8(%esp), %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm new file mode 100644 index 0000000000..414ed7cae6 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm @@ -0,0 +1,50 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.Asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemSetMem16 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT16 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem16 PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosw
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S new file mode 100644 index 0000000000..8b94d563af --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S @@ -0,0 +1,48 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem32.Asm
+#
+# Abstract:
+#
+# SetMem32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem32
+
+#------------------------------------------------------------------------------
+# VOID *
+# InternalMemSetMem32 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT32 Value
+# )
+#------------------------------------------------------------------------------
+_InternalMemSetMem32:
+ push %edi
+ movl 16(%esp),%eax
+ movl 8(%esp),%edi
+ movl 12(%esp),%ecx
+ rep
+ stosl
+ movl 8(%esp),%eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm new file mode 100644 index 0000000000..020bb795cf --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm @@ -0,0 +1,50 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.Asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemSetMem32 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT32 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem32 PROC USES edi
+ mov eax, [esp + 16]
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ rep stosd
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S new file mode 100644 index 0000000000..68418cca6c --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S @@ -0,0 +1,51 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem64.Asm
+#
+# Abstract:
+#
+# SetMem64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem64
+
+#------------------------------------------------------------------------------
+# VOID *
+# InternalMemSetMem64 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT64 Value
+# )
+#------------------------------------------------------------------------------
+_InternalMemSetMem64:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 16(%esp), %eax
+ movl 20(%esp), %edx
+ movl 8(%esp), %edi
+L0:
+ mov %eax, -8(%edi, %ecx, 8)
+ mov %edx, -4(%edi, %ecx, 8)
+ loop L0
+ movl %edi, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm new file mode 100644 index 0000000000..c9a51ae701 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm @@ -0,0 +1,54 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.Asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemSetMem64 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT64 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ mov [edi + ecx*8 - 8], eax
+ mov [edi + ecx*8 - 4], edx
+ loop @B
+ mov eax, edi
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S new file mode 100644 index 0000000000..9551c1a4a6 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S @@ -0,0 +1,54 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ZeroMem.Asm
+#
+# Abstract:
+#
+# ZeroMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemZeroMem
+
+#------------------------------------------------------------------------------
+# VOID *
+# InternalMemZeroMem (
+# IN VOID *Buffer,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+_InternalMemZeroMem:
+ push %edi
+ xorl %eax,%eax
+ movl 8(%esp),%edi
+ movl 12(%esp),%ecx
+ movl %ecx,%edx
+ shrl $2,%ecx
+ andl $3,%edx
+ pushl %edi
+ rep
+ stosl
+ movl %edx,%ecx
+ rep
+ stosb
+ popl %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm new file mode 100644 index 0000000000..26137f771e --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.Asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemZeroMem (
+; IN VOID *Buffer,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMemZeroMem PROC USES edi
+ xor eax, eax
+ mov edi, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edx, ecx
+ shr ecx, 2
+ and edx, 3
+ push edi
+ rep stosd
+ mov ecx, edx
+ rep stosb
+ pop eax
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c new file mode 100644 index 0000000000..2434358017 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c @@ -0,0 +1,137 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid to
+ DestinationGuid, and returns DestinationGuid.
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid.
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the 128-bit
+ GUID value that matches Guid. If a match is found, then a pointer to the matching
+ GUID in the target buffer is returned. If no match is found, then NULL is returned.
+ If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 128-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return A pointer to the matching Guid in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h b/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h new file mode 100644 index 0000000000..2bd034da2b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h @@ -0,0 +1,235 @@ +/** @file
+ Declaration of internal functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibInternals.h
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+#ifndef __MEM_LIB_INTERNALS__
+#define __MEM_LIB_INTERNALS__
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c new file mode 100644 index 0000000000..f0ca471844 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 16-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c new file mode 100644 index 0000000000..7a0ebcd78f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 32-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c new file mode 100644 index 0000000000..dd1a82fef2 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 64-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c new file mode 100644 index 0000000000..685563e379 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c @@ -0,0 +1,66 @@ +/** @file
+ ScanMem8() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem8Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for an 8-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c new file mode 100644 index 0000000000..5e58eb9f74 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c new file mode 100644 index 0000000000..f4927f7d9a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c new file mode 100644 index 0000000000..e84556343a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c new file mode 100644 index 0000000000..84a7d62ea9 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c @@ -0,0 +1,61 @@ +/** @file
+ SetMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a byte value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Length Number of bytes to set.
+ @param Value Value of the set operation.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return InternalMemSetMem (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c new file mode 100644 index 0000000000..886c9343b8 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c @@ -0,0 +1,56 @@ +/** @file
+ ZeroMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ZeroMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with zeros, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with zeros.
+ @param Length Number of bytes in Buffer to fill with zeros.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (!(Buffer == NULL && Length > 0));
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ return InternalMemZeroMem (Buffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf new file mode 100644 index 0000000000..8a7c787077 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf @@ -0,0 +1,143 @@ +#/** @file
+# Component description file for SSE2 Base Memory Library
+#
+# Base Memory Library that uses XMM registers for high performance.
+# Optimized for use in DXE.
+# Copyright (c) 2007, Intel Corporation
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseMemoryLibSse2
+ FILE_GUID = 65a18235-5096-4032-8c63-214f0249ce8d
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BaseMemoryLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ MemLibInternals.h
+ CommonHeader.h
+
+[Sources.Ia32]
+ Ia32/ScanMem64.S
+ Ia32/ScanMem32.S
+ Ia32/ScanMem16.S
+ Ia32/ScanMem8.S
+ Ia32/CompareMem.S
+ Ia32/ZeroMem.S
+ Ia32/SetMem64.S
+ Ia32/SetMem32.S
+ Ia32/SetMem16.S
+ Ia32/SetMem.S
+ Ia32/CopyMem.S
+ Ia32/ScanMem64.asm
+ Ia32/ScanMem32.asm
+ Ia32/ScanMem16.asm
+ Ia32/ScanMem8.asm
+ Ia32/CompareMem.asm
+ Ia32/ZeroMem.asm
+ Ia32/SetMem64.asm
+ Ia32/SetMem32.asm
+ Ia32/SetMem16.asm
+ Ia32/SetMem.asm
+ Ia32/CopyMem.asm
+ ScanMem64Wrapper.c
+ ScanMem32Wrapper.c
+ ScanMem16Wrapper.c
+ ScanMem8Wrapper.c
+ ZeroMemWrapper.c
+ CompareMemWrapper.c
+ SetMem64Wrapper.c
+ SetMem32Wrapper.c
+ SetMem16Wrapper.c
+ SetMemWrapper.c
+ CopyMemWrapper.c
+ MemLibGuid.c
+
+[Sources.X64]
+ x64/ScanMem64.asm
+ x64/ScanMem32.asm
+ x64/ScanMem16.asm
+ x64/ScanMem8.asm
+ x64/CompareMem.asm
+ x64/ZeroMem.asm
+ x64/SetMem64.asm
+ x64/SetMem32.asm
+ x64/SetMem16.asm
+ x64/SetMem.asm
+ x64/CopyMem.asm
+ ScanMem64Wrapper.c
+ ScanMem32Wrapper.c
+ ScanMem16Wrapper.c
+ ScanMem8Wrapper.c
+ ZeroMemWrapper.c
+ CompareMemWrapper.c
+ SetMem64Wrapper.c
+ SetMem32Wrapper.c
+ SetMem16Wrapper.c
+ SetMemWrapper.c
+ CopyMemWrapper.c
+ MemLibGuid.c
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa new file mode 100644 index 0000000000..5415b3db95 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa @@ -0,0 +1,103 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BaseMemoryLibSse2</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>65a18235-5096-4032-8c63-214f0249ce8d</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for SSE2 Base Memory Library</Abstract>
+ <Description>Base Memory Library that uses XMM registers for high performance.
+ Optimized for use in DXE.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseMemoryLibSse2</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>MemLibInternals.h</Filename>
+ <Filename SupArchList="IA32">MemLibGuid.c</Filename>
+ <Filename SupArchList="IA32">CopyMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem16Wrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem32Wrapper.c</Filename>
+ <Filename SupArchList="IA32">SetMem64Wrapper.c</Filename>
+ <Filename SupArchList="IA32">CompareMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">ZeroMemWrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem8Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem16Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem32Wrapper.c</Filename>
+ <Filename SupArchList="IA32">ScanMem64Wrapper.c</Filename>
+ <Filename SupArchList="IA32">Ia32/CopyMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem16.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem32.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem64.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ZeroMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/CompareMem.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem8.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem16.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem32.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem64.asm</Filename>
+ <Filename SupArchList="IA32">Ia32/CopyMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem16.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem32.S</Filename>
+ <Filename SupArchList="IA32">Ia32/SetMem64.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ZeroMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/CompareMem.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem8.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem16.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem32.S</Filename>
+ <Filename SupArchList="IA32">Ia32/ScanMem64.S</Filename>
+ <Filename SupArchList="X64">MemLibGuid.c</Filename>
+ <Filename SupArchList="X64">CopyMemWrapper.c</Filename>
+ <Filename SupArchList="X64">SetMemWrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem16Wrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem32Wrapper.c</Filename>
+ <Filename SupArchList="X64">SetMem64Wrapper.c</Filename>
+ <Filename SupArchList="X64">CompareMemWrapper.c</Filename>
+ <Filename SupArchList="X64">ZeroMemWrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem8Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem16Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem32Wrapper.c</Filename>
+ <Filename SupArchList="X64">ScanMem64Wrapper.c</Filename>
+ <Filename SupArchList="X64">x64/CopyMem.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem16.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem32.asm</Filename>
+ <Filename SupArchList="X64">x64/SetMem64.asm</Filename>
+ <Filename SupArchList="X64">x64/ZeroMem.asm</Filename>
+ <Filename SupArchList="X64">x64/CompareMem.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem8.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem16.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem32.asm</Filename>
+ <Filename SupArchList="X64">x64/ScanMem64.asm</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
diff --git a/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h b/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h new file mode 100644 index 0000000000..68b4d9483b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c new file mode 100644 index 0000000000..b816af7489 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c @@ -0,0 +1,72 @@ +/** @file
+ CompareMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CompareMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Compares the contents of two buffers.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.
+ If all Length bytes of the two buffers are identical, then 0 is returned. Otherwise, the
+ value returned is the first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+ If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+
+ @param DestinationBuffer Pointer to the destination buffer to compare.
+ @param SourceBuffer Pointer to the source buffer to compare.
+ @param Length Number of bytes to compare.
+
+ @return 0 All Length bytes of the two buffers are identical.
+ @retval Non-zero The first mismatched byte in SourceBuffer subtracted from the first
+ mismatched byte in DestinationBuffer.
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return 0;
+ }
+ ASSERT (DestinationBuffer != NULL);
+ ASSERT (SourceBuffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c new file mode 100644 index 0000000000..b0449b19b5 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c @@ -0,0 +1,67 @@ +/** @file
+ CopyMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CopyMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Copies a source buffer to a destination buffer, and returns the destination buffer.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns
+ DestinationBuffer. The implementation must be reentrant, and it must handle the case
+ where SourceBuffer overlaps DestinationBuffer.
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer Pointer to the destination buffer of the memory copy.
+ @param SourceBuffer Pointer to the source buffer of the memory copy.
+ @param Length Number of bytes to copy from SourceBuffer to DestinationBuffer.
+
+ @return DestinationBuffer.
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ )
+{
+ if (Length == 0) {
+ return DestinationBuffer;
+ }
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));
+
+ if (DestinationBuffer == SourceBuffer) {
+ return DestinationBuffer;
+ }
+ return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S new file mode 100644 index 0000000000..3968604ca6 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CompareMem.Asm
+#
+# Abstract:
+#
+# CompareMem function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemCompareMem
+
+#------------------------------------------------------------------------------
+# INTN
+# EFIAPI
+# InternalMemCompareMem (
+# IN CONST VOID *DestinationBuffer,
+# IN CONST VOID *SourceBuffer,
+# IN UINTN Length
+# );
+#------------------------------------------------------------------------------
+_InternalMemCompareMem:
+ push %esi
+ push %edi
+ movl 12(%esp), %esi
+ movl 16(%esp), %edi
+ movl 20(%esp), %ecx
+ repe cmpsb
+ movzbl -1(%esi), %eax
+ movzbl -1(%edi), %edx
+ subl %edx, %eax
+ pop %edi
+ pop %esi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm new file mode 100644 index 0000000000..dabd337a7c --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm @@ -0,0 +1,59 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CompareMem.Asm
+;
+; Abstract:
+;
+; CompareMem function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; INTN
+; EFIAPI
+; InternalMemCompareMem (
+; IN CONST VOID *DestinationBuffer,
+; IN CONST VOID *SourceBuffer,
+; IN UINTN Length
+; );
+;------------------------------------------------------------------------------
+InternalMemCompareMem PROC USES esi edi
+ mov esi, [esp + 12]
+ mov edi, [esp + 16]
+ mov ecx, [esp + 20]
+ repe cmpsb
+ movzx eax, byte ptr [esi - 1]
+ movzx edx, byte ptr [edi - 1]
+ sub eax, edx
+ ret
+InternalMemCompareMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S new file mode 100644 index 0000000000..82a2b94d0b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S @@ -0,0 +1,90 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CopyMem.asm
+#
+# Abstract:
+#
+# CopyMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemCopyMem
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemCopyMem (
+# IN VOID *Destination,
+# IN VOID *Source,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+_InternalMemCopyMem:
+ push %esi
+ push %edi
+ movl 16(%esp), %esi # esi <- Source
+ movl 12(%esp), %edi # edi <- Destination
+ movl 20(%esp), %edx # edx <- Count
+ leal -1(%esi,%edx,), %eax # eax <- End of Source
+ cmpl %edi, %esi
+ jae L0
+ cmpl %edi, %eax # Overlapped?
+ jae L_CopyBackward # Copy backward if overlapped
+L0:
+ xorl %ecx, %ecx
+ subl %edi, %ecx
+ andl $15, %ecx # ecx + edi aligns on 16-byte boundary
+ jz L1
+ cmpl %edx, %ecx
+ cmova %edx, %ecx
+ subl %ecx, %edx # edx <- remaining bytes to copy
+ rep
+ movsb
+L1:
+ movl %edx, %ecx
+ andl $15, %edx
+ shrl $4, %ecx # ecx <- # of DQwords to copy
+ jz L_CopyBytes
+ addl $-16, %esp
+ movdqu %xmm0, (%esp)
+L2:
+ movdqu (%esi), %xmm0
+ movntdq %xmm0, (%edi)
+ addl $16, %esi
+ addl $16, %edi
+ loop L2
+ mfence
+ movdqu (%esp),%xmm0
+ addl $16, %esp # stack cleanup
+ jmp L_CopyBytes
+L_CopyBackward:
+ movl %eax, %esi # esi <- Last byte in Source
+ leal -1(%edi,%edx,), %edi # edi <- Last byte in Destination
+ std
+L_CopyBytes:
+ movl %edx, %ecx
+ rep
+ movsb
+ cld
+ movl 12(%esp), %eax # eax <- Destination as return value
+ pop %edi
+ pop %esi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm new file mode 100644 index 0000000000..d8b80dba03 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm @@ -0,0 +1,89 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CopyMem.asm
+;
+; Abstract:
+;
+; CopyMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; InternalMemCopyMem (
+; IN VOID *Destination,
+; IN VOID *Source,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMemCopyMem PROC USES esi edi
+ mov esi, [esp + 16] ; esi <- Source
+ mov edi, [esp + 12] ; edi <- Destination
+ mov edx, [esp + 20] ; edx <- Count
+ lea eax, [esi + edx - 1] ; eax <- End of Source
+ cmp esi, edi
+ jae @F
+ cmp eax, edi ; Overlapped?
+ jae @CopyBackward ; Copy backward if overlapped
+@@:
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx ; edx <- remaining bytes to copy
+ rep movsb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4 ; ecx <- # of DQwords to copy
+ jz @CopyBytes
+ add esp, -16
+ movdqu [esp], xmm0 ; save xmm0
+@@:
+ movdqu xmm0, [esi] ; esi may not be 16-bytes aligned
+ movntdq [edi], xmm0 ; edi should be 16-bytes aligned
+ add esi, 16
+ add edi, 16
+ loop @B
+ mfence
+ movdqu xmm0, [esp] ; restore xmm0
+ add esp, 16 ; stack cleanup
+ jmp @CopyBytes
+@CopyBackward:
+ mov esi, eax ; esi <- Last byte in Source
+ lea edi, [edi + edx - 1] ; edi <- Last byte in Destination
+ std
+@CopyBytes:
+ mov ecx, edx
+ rep movsb
+ cld
+ mov eax, [esp + 12] ; eax <- Destination as return value
+ ret
+InternalMemCopyMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S new file mode 100644 index 0000000000..276b4ff29f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem16.Asm
+#
+# Abstract:
+#
+# ScanMem16 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem16
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem16 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT16 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem16:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movl 16(%esp), %eax
+ repne scasw
+ leal -2(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm new file mode 100644 index 0000000000..a6d03306f3 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem16.Asm
+;
+; Abstract:
+;
+; ScanMem16 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem16 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT16 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem16 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasw
+ lea eax, [edi - 2]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S new file mode 100644 index 0000000000..fced1b2362 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem32.Asm
+#
+# Abstract:
+#
+# ScanMem32 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem32
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem32 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT32 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem32:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movl 16(%esp), %eax
+ repne scasl
+ leal -4(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm new file mode 100644 index 0000000000..46a80111d7 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem32.Asm
+;
+; Abstract:
+;
+; ScanMem32 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem32 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem32 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov eax, [esp + 16]
+ repne scasd
+ lea eax, [edi - 4]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S new file mode 100644 index 0000000000..37dc3bbf67 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S @@ -0,0 +1,64 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem64.Asm
+#
+# Abstract:
+#
+# ScanMem64 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem64
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem64 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem64:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 16(%esp), %eax
+ movl 20(%esp), %edx
+ movl 8(%esp), %edi
+L0:
+ cmpl (%edi), %eax
+ leal 8(%edi), %edi
+ loopne L0
+ jne L1
+ cmpl -4(%edi), %edx
+ jecxz L1
+ jne L0
+L1:
+ leal -8(%edi), %eax
+ cmovne %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm new file mode 100644 index 0000000000..c19ed989ed --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm @@ -0,0 +1,67 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem64.Asm
+;
+; Abstract:
+;
+; ScanMem64 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem64 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem64 PROC USES edi
+ mov ecx, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov edi, [esp + 8]
+@@:
+ cmp eax, [edi]
+ lea edi, [edi + 8]
+ loopne @B
+ jne @F
+ cmp edx, [edi - 4]
+ jecxz @F
+ jne @B
+@@:
+ lea eax, [edi - 8]
+ cmovne eax, ecx
+ ret
+InternalMemScanMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S new file mode 100644 index 0000000000..e7d2a26cad --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S @@ -0,0 +1,55 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ScanMem8.Asm
+#
+# Abstract:
+#
+# ScanMem8 function
+#
+# Notes:
+#
+# The following BaseMemoryLib instances share the same version of this file:
+#
+# BaseMemoryLibRepStr
+# BaseMemoryLibMmx
+# BaseMemoryLibSse2
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemScanMem8
+
+#------------------------------------------------------------------------------
+# CONST VOID *
+# EFIAPI
+# InternalMemScanMem8 (
+# IN CONST VOID *Buffer,
+# IN UINTN Length,
+# IN UINT8 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemScanMem8:
+ push %edi
+ movl 12(%esp), %ecx
+ movl 8(%esp), %edi
+ movb 16(%esp), %al
+ repne scasb
+ leal -1(%edi), %eax
+ cmovnz %ecx, %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm new file mode 100644 index 0000000000..def2690d1a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm @@ -0,0 +1,58 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ScanMem8.Asm
+;
+; Abstract:
+;
+; ScanMem8 function
+;
+; Notes:
+;
+; The following BaseMemoryLib instances share the same version of this file:
+;
+; BaseMemoryLibRepStr
+; BaseMemoryLibMmx
+; BaseMemoryLibSse2
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; CONST VOID *
+; EFIAPI
+; InternalMemScanMem8 (
+; IN CONST VOID *Buffer,
+; IN UINTN Length,
+; IN UINT8 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemScanMem8 PROC USES edi
+ mov ecx, [esp + 12]
+ mov edi, [esp + 8]
+ mov al, [esp + 16]
+ repne scasb
+ lea eax, [edi - 1]
+ cmovnz eax, ecx
+ ret
+InternalMemScanMem8 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S new file mode 100644 index 0000000000..aa6f59fb4f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S @@ -0,0 +1,81 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem.asm
+#
+# Abstract:
+#
+# SetMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+ .686:
+ #.MODEL flat,C
+ .xmm:
+ .code:
+
+#------------------------------------------------------------------------------
+# VOID *
+# _mem_SetMem (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT8 Value
+# );
+#------------------------------------------------------------------------------
+.globl _InternalMemSetMem
+_InternalMemSetMem:
+ push %edi
+ movl 12(%esp), %edx # edx <- Count
+ movl 8(%esp), %edi # edi <- Buffer
+ movb 16(%esp), %al # al <- Value
+ xorl %ecx, %ecx
+ subl %edi, %ecx
+ andl $15, %ecx # ecx + edi aligns on 16-byte boundary
+ jz L0
+ cmpl %edx, %ecx
+ cmova %edx, %ecx
+ subl %ecx, %edx
+ rep
+ stosb
+L0:
+ movl %edx, %ecx
+ andl $15, %edx
+ shrl $4, %ecx # ecx <- # of DQwords to set
+ jz L_SetBytes
+ movb %al, %ah # ax <- Value | (Value << 8)
+ addl $-16, %esp
+ movdqu %xmm0, (%esp)
+ movd %eax, %xmm0
+ pshuflw $0, %xmm0, %xmm0
+ movlhps %xmm0, %xmm0
+L1:
+ movntdq %xmm0, (%edi)
+ addl $16, %edi
+ loop L1
+ mfence
+ movdqu (%esp), %xmm0
+ addl $16, %esp # stack cleanup
+L_SetBytes:
+ movl %edx, %ecx
+ rep
+ stosb
+ movl 8(%esp), %eax # eax <- Buffer as return value
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm new file mode 100644 index 0000000000..f41d19cc82 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm @@ -0,0 +1,80 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem.asm
+;
+; Abstract:
+;
+; SetMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; InternalMemSetMem (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT8 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemSetMem PROC USES edi
+ mov edx, [esp + 12] ; edx <- Count
+ mov edi, [esp + 8] ; edi <- Buffer
+ mov al, [esp + 16] ; al <- Value
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4 ; ecx <- # of DQwords to set
+ jz @SetBytes
+ mov ah, al ; ax <- Value | (Value << 8)
+ add esp, -16
+ movdqu [esp], xmm0 ; save xmm0
+ movd xmm0, eax
+ pshuflw xmm0, xmm0, 0 ; xmm0[0..63] <- Value repeats 8 times
+ movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
+@@:
+ movntdq [edi], xmm0 ; edi should be 16-byte aligned
+ add edi, 16
+ loop @B
+ mfence
+ movdqu xmm0, [esp] ; restore xmm0
+ add esp, 16 ; stack cleanup
+@SetBytes:
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8] ; eax <- Buffer as return value
+ ret
+InternalMemSetMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S new file mode 100644 index 0000000000..fac9a722b0 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S @@ -0,0 +1,74 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem16.asm
+#
+# Abstract:
+#
+# SetMem16 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem16
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemSetMem16 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT16 Value
+# )
+#------------------------------------------------------------------------------
+_InternalMemSetMem16:
+ push %edi
+ movl 12(%esp), %edx
+ movl 8(%esp), %edi
+ xorl %ecx, %ecx
+ subl %edi, %ecx
+ andl $15, %ecx # ecx + edi aligns on 16-byte boundary
+ movl 16(%esp), %eax
+ jz L0
+ shrl %ecx
+ cmpl %edx, %ecx
+ cmova %edx, %ecx
+ subl %ecx, %edx
+ rep
+ stosw
+L0:
+ movl %edx, %ecx
+ andl $7, %edx
+ shrl $3, %ecx
+ jz L_SetWords
+ movd %eax, %xmm0
+ pshuflw $0, %xmm0, %xmm0
+ movlhps %xmm0, %xmm0
+L1:
+ movntdq %xmm0, (%edi)
+ addl $16, %edi
+ loop L1
+ mfence
+L_SetWords:
+ movl %edx, %ecx
+ rep
+ stosw
+ movl 8(%esp), %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm new file mode 100644 index 0000000000..93ce0af5b1 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm @@ -0,0 +1,76 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem16.asm
+;
+; Abstract:
+;
+; SetMem16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; InternalMemSetMem16 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT16 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemSetMem16 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ mov eax, [esp + 16]
+ jz @F
+ shr ecx, 1
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosw
+@@:
+ mov ecx, edx
+ and edx, 7
+ shr ecx, 3
+ jz @SetWords
+ movd xmm0, eax
+ pshuflw xmm0, xmm0, 0
+ movlhps xmm0, xmm0
+@@:
+ movntdq [edi], xmm0 ; edi should be 16-byte aligned
+ add edi, 16
+ loop @B
+ mfence
+@SetWords:
+ mov ecx, edx
+ rep stosw
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem16 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S new file mode 100644 index 0000000000..8b0095a1e2 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S @@ -0,0 +1,73 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem32.asm
+#
+# Abstract:
+#
+# SetMem32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem32
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemSetMem32 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT32 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemSetMem32:
+ push %edi
+ movl 12(%esp), %edx
+ movl 8(%esp), %edi
+ xorl %ecx, %ecx
+ subl %edi, %ecx
+ andl $15, %ecx # ecx + edi aligns on 16-byte boundary
+ movl 16(%esp), %eax
+ jz L0
+ shrl $2, %ecx
+ cmpl %edx, %ecx
+ cmova %edx, %ecx
+ subl %ecx, %edx
+ rep
+ stosl
+L0:
+ movl %edx, %ecx
+ andl $3, %edx
+ shrl $2, %ecx
+ jz L_SetDwords
+ movd %eax, %xmm0
+ pshufd $0, %xmm0, %xmm0
+L1:
+ movntdq %xmm0, (%edi)
+ addl $16, %edi
+ loop L1
+ mfence
+L_SetDwords:
+ movl %edx, %ecx
+ rep
+ stosl
+ movl 8(%esp), %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm new file mode 100644 index 0000000000..3aea7b1581 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm @@ -0,0 +1,75 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem32.asm
+;
+; Abstract:
+;
+; SetMem32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; InternalMemSetMem32 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT32 Value
+; );
+;------------------------------------------------------------------------------
+InternalMemSetMem32 PROC USES edi
+ mov edx, [esp + 12]
+ mov edi, [esp + 8]
+ xor ecx, ecx
+ sub ecx, edi
+ and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ mov eax, [esp + 16]
+ jz @F
+ shr ecx, 2
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosd
+@@:
+ mov ecx, edx
+ and edx, 3
+ shr ecx, 2
+ jz @SetDwords
+ movd xmm0, eax
+ pshufd xmm0, xmm0, 0
+@@:
+ movntdq [edi], xmm0
+ add edi, 16
+ loop @B
+ mfence
+@SetDwords:
+ mov ecx, edx
+ rep stosd
+ mov eax, [esp + 8]
+ ret
+InternalMemSetMem32 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S new file mode 100644 index 0000000000..bf42354572 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S @@ -0,0 +1,63 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetMem64.S
+#
+# Abstract:
+#
+# SetMem64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemSetMem64
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemSetMem64 (
+# IN VOID *Buffer,
+# IN UINTN Count,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+_InternalMemSetMem64:
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ testb $8, %al
+ movl %eax, %edx
+ movq 0xc(%esp), %xmm0
+ jz L1
+ movq %xmm0, (%edx)
+ addl $8, %edx
+ decl %ecx
+L1:
+ shrl %ecx
+ jz L_SetQwords
+ movlhps %xmm0, %xmm0
+L2:
+ movntdq %xmm0, (%edx)
+ leal 16(%edx), %edx
+ loop L2
+ mfence
+L_SetQwords:
+ jnc L3
+ movq %xmm0, (%edx)
+L3:
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm new file mode 100644 index 0000000000..8f1ebe4cdb --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm @@ -0,0 +1,69 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetMem64.asm
+;
+; Abstract:
+;
+; SetMem64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; InternalMemSetMem64 (
+; IN VOID *Buffer,
+; IN UINTN Count,
+; IN UINT64 Value
+; )
+;------------------------------------------------------------------------------
+InternalMemSetMem64 PROC
+ mov eax, [esp + 4] ; eax <- Buffer
+ mov ecx, [esp + 8] ; ecx <- Count
+ test al, 8
+ mov edx, eax
+ movq xmm0, [esp + 12]
+ jz @F
+ movq [edx], xmm0
+ add edx, 8
+ dec ecx
+@@:
+ shr ecx, 1
+ jz @SetQwords
+ movlhps xmm0, xmm0
+@@:
+ movntdq [edx], xmm0
+ lea edx, [edx + 16]
+ loop @B
+ mfence
+@SetQwords:
+ jnc @F
+ movq [edx], xmm0
+@@:
+ ret
+InternalMemSetMem64 ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S new file mode 100644 index 0000000000..657584d4df --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S @@ -0,0 +1,70 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ZeroMem.asm
+#
+# Abstract:
+#
+# ZeroMem function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl _InternalMemZeroMem
+
+#------------------------------------------------------------------------------
+# VOID *
+# EFIAPI
+# InternalMemZeroMem (
+# IN VOID *Buffer,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+_InternalMemZeroMem:
+ push %edi
+ movl 8(%esp), %edi
+ movl 12(%esp), %edx
+ xorl %ecx, %ecx
+ subl %edi, %ecx
+ xorl %eax, %eax
+ andl $15, %ecx
+ jz L0
+ cmpl %edx, %ecx
+ cmova %edx, %ecx
+ subl %ecx, %edx
+ rep
+ stosb
+L0:
+ movl %edx, %ecx
+ andl $15, %edx
+ shrl $4, %ecx
+ jz L_ZeroBytes
+ pxor %xmm0, %xmm0
+L1:
+ movntdq %xmm0, (%edi)
+ addl $16, %edi
+ loop L1
+ mfence
+L_ZeroBytes:
+ movl %edx, %ecx
+ rep
+ stosb
+ movl 8(%esp), %eax
+ pop %edi
+ ret
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm new file mode 100644 index 0000000000..2f06ee1961 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm @@ -0,0 +1,72 @@ +//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ZeroMem.asm
+;
+; Abstract:
+;
+; ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; InternalMemZeroMem (
+; IN VOID *Buffer,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMemZeroMem PROC USES edi
+ mov edi, [esp + 8]
+ mov edx, [esp + 12]
+ xor ecx, ecx
+ sub ecx, edi
+ xor eax, eax
+ and ecx, 15
+ jz @F
+ cmp ecx, edx
+ cmova ecx, edx
+ sub edx, ecx
+ rep stosb
+@@:
+ mov ecx, edx
+ and edx, 15
+ shr ecx, 4
+ jz @ZeroBytes
+ pxor xmm0, xmm0
+@@:
+ movntdq [edi], xmm0
+ add edi, 16
+ loop @B
+ mfence
+@ZeroBytes:
+ mov ecx, edx
+ rep stosb
+ mov eax, [esp + 8]
+ ret
+InternalMemZeroMem ENDP
+
+ END
diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c new file mode 100644 index 0000000000..2434358017 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c @@ -0,0 +1,137 @@ +/** @file
+ Implementation of GUID functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibGuid.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid to
+ DestinationGuid, and returns DestinationGuid.
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid.
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ )
+{
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid)
+ );
+ WriteUnaligned64 (
+ (UINT64*)DestinationGuid + 1,
+ ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)
+ );
+ return DestinationGuid;
+}
+
+/**
+ Compares two GUIDs.
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.
+ If there are any bit differences in the two GUIDs, then FALSE is returned.
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 A pointer to a 128 bit GUID.
+ @param Guid2 A pointer to a 128 bit GUID.
+
+ @retval TRUE Guid1 and Guid2 are identical.
+ @retval FALSE Guid1 and Guid2 are not identical.
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ )
+{
+ return (BOOLEAN)(
+ ReadUnaligned64 ((CONST UINT64*)Guid1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2) &&
+ ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)
+ == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)
+ );
+}
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the 128-bit
+ GUID value that matches Guid. If a match is found, then a pointer to the matching
+ GUID in the target buffer is returned. If no match is found, then NULL is returned.
+ If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 128-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return A pointer to the matching Guid in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ )
+{
+ CONST GUID *GuidPtr;
+
+ ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);
+
+ GuidPtr = (GUID*)Buffer;
+ Buffer = GuidPtr + Length / sizeof (*GuidPtr);
+ while (GuidPtr < (CONST GUID*)Buffer) {
+ if (CompareGuid (GuidPtr, Guid)) {
+ return (VOID*)GuidPtr;
+ }
+ GuidPtr++;
+ }
+ return NULL;
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h b/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h new file mode 100644 index 0000000000..2bd034da2b --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h @@ -0,0 +1,235 @@ +/** @file
+ Declaration of internal functions for Base Memory Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemLibInternals.h
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+#ifndef __MEM_LIB_INTERNALS__
+#define __MEM_LIB_INTERNALS__
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+InternalMemCopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemSetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+InternalMemZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare. Must be non-zero.
+
+ @retval 0 if MemOne == MemTwo
+
+**/
+INTN
+EFIAPI
+InternalMemCompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan. Must be non-zero.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+
+**/
+CONST VOID *
+EFIAPI
+InternalMemScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c new file mode 100644 index 0000000000..f0ca471844 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 16-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c new file mode 100644 index 0000000000..7a0ebcd78f --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 32-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c new file mode 100644 index 0000000000..dd1a82fef2 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c @@ -0,0 +1,71 @@ +/** @file
+ ScanMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for a 64-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c new file mode 100644 index 0000000000..685563e379 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c @@ -0,0 +1,66 @@ +/** @file
+ ScanMem8() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScanMem8Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from the lowest
+ address to the highest address for an 8-bit value that matches Value. If a match is found,
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return NULL;
+ }
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c new file mode 100644 index 0000000000..5e58eb9f74 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem16() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem16Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c new file mode 100644 index 0000000000..f4927f7d9a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem32() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem32Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c new file mode 100644 index 0000000000..e84556343a --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c @@ -0,0 +1,70 @@ +/** @file
+ SetMem64() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMem64Wrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT (Buffer != NULL);
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+ ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);
+ ASSERT ((Length & (sizeof (Value) - 1)) == 0);
+
+ return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c new file mode 100644 index 0000000000..84a7d62ea9 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c @@ -0,0 +1,61 @@ +/** @file
+ SetMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with a byte value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Length Number of bytes to set.
+ @param Value Value of the set operation.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ )
+{
+ if (Length == 0) {
+ return Buffer;
+ }
+
+ ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));
+
+ return InternalMemSetMem (Buffer, Length, Value);
+}
diff --git a/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c new file mode 100644 index 0000000000..886c9343b8 --- /dev/null +++ b/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c @@ -0,0 +1,56 @@ +/** @file
+ ZeroMem() implementation.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ZeroMemWrapper.c
+
+ The following BaseMemoryLib instances share the same version of this file:
+
+ BaseMemoryLib
+ BaseMemoryLibMmx
+ BaseMemoryLibSse2
+ BaseMemoryLibRepStr
+ PeiMemoryLib
+ DxeMemoryLib
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "MemLibInternals.h"
+
+/**
+ Fills a target buffer with zeros, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+ If Length > 0 and Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with zeros.
+ @param Length Number of bytes in Buffer to fill with zeros.
+
+ @return Buffer.
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ ASSERT (!(Buffer == NULL && Length > 0));
+ ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));
+ return InternalMemZeroMem (Buffer, Length);
+}
diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf new file mode 100644 index 0000000000..2814b59a78 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf @@ -0,0 +1,82 @@ +#/** @file
+# Component description file for Base PCI Cf8 Library.
+#
+# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
+# Layers on top of an I/O Library instance.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePciCf8Lib
+ FILE_GUID = 472ab06d-9810-4c00-bb7f-dad1828fc1ab
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciCf8Lib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PciLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+
diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa new file mode 100644 index 0000000000..aa6309b269 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePciCf8Lib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>472ab06d-9810-4c00-bb7f-dad1828fc1ab</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base PCI Cf8 Library.</Abstract>
+ <Description>PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
+ Layers on top of an I/O Library instance.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePciCf8Lib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PciCf8Lib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>IoLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciCf8Lib/CommonHeader.h b/MdePkg/Library/BasePciCf8Lib/CommonHeader.h new file mode 100644 index 0000000000..01be6d5325 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PciCf8Lib.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePciCf8Lib/PciLib.c b/MdePkg/Library/BasePciCf8Lib/PciLib.c new file mode 100644 index 0000000000..77676b7eb7 --- /dev/null +++ b/MdePkg/Library/BasePciCf8Lib/PciLib.c @@ -0,0 +1,1466 @@ +/** @file
+ PCI Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Declare I/O Ports used to perform PCI Confguration Cycles
+//
+#define PCI_CONFIGURATION_ADDRESS_PORT 0xCF8
+#define PCI_CONFIGURATION_DATA_PORT 0xCFC
+
+//
+// Declare macro to convert PCI Library formatted address to CF8 formatted address
+//
+// PCI Library formatted address CF8 Formatted Address
+// ============================= ======================
+// Bits 00..11 Register Bits 00..07 Register
+// Bits 12..14 Function Bits 08..10 Function
+// Bits 15..19 Device Bits 11..15 Device
+// Bits 20..27 Bus Bits 16..23 Bus
+// Bits 28..31 Reserved(MBZ) Bits 24..30 Reserved(MBZ)
+// Bits 31..31 Must be 1
+//
+
+/**
+ Assert the validity of a PCI address. A valid PCI address should contain 1's
+ only in the low 28 bits.
+
+ @param A The address to validate.
+ @param M Additional bits to assert to be zero.
+
+**/
+#define ASSERT_INVALID_PCI_ADDRESS(A,M) \
+ ASSERT (((A) & (~0xffff0ff | (M))) == 0)
+
+/**
+ Convert a PCI Express address to PCI CF8 address.
+
+ @param A The address to convert.
+
+ @retval The coverted address.
+
+**/
+#define PCI_TO_CF8_ADDRESS(A) \
+ ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Read8 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Write8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Or8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8And8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8AndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAndThenOr8(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 0);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr8 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Read16 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Write16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Or16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8And16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8AndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAndThenOr16(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 1);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr16 (
+ PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Read32 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoRead32 (PCI_CONFIGURATION_DATA_PORT);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Write32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoWrite32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ Value
+ );
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Or32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ OrData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8And32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAnd32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ AndData
+ );
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8AndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoAndThenOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldRead32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldWrite32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAnd32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAndThenOr32(
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address, 3);
+ IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
+ return IoBitFieldAndThenOr32 (
+ PCI_CONFIGURATION_DATA_PORT,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8ReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ UINTN ReturnValue;
+
+ ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
+
+ if (Size == 0) {
+ return Size;
+ }
+
+ ASSERT (Buffer != NULL);
+
+ //
+ // Save Size for return
+ //
+ ReturnValue = Size;
+
+ if ((StartAddress & 1) != 0) {
+ //
+ // Read a byte if StartAddress is byte aligned
+ //
+ *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
+ StartAddress += sizeof (UINT8);
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
+ //
+ // Read a word if StartAddress is word aligned
+ //
+ *(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (Size >= sizeof (UINT32)) {
+ //
+ // Read as many double words as possible
+ //
+ *(volatile UINT32 *)Buffer = PciCf8Read32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16)) {
+ //
+ // Read the last remaining word if exist
+ //
+ *(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT8)) {
+ //
+ // Read the last remaining byte if exist
+ //
+ *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
+ }
+
+ return ReturnValue;
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8WriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ UINTN ReturnValue;
+
+ ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
+
+ if (Size == 0) {
+ return 0;
+ }
+
+ ASSERT (Buffer != NULL);
+
+ //
+ // Save Size for return
+ //
+ ReturnValue = Size;
+
+ if ((StartAddress & 1) != 0) {
+ //
+ // Write a byte if StartAddress is byte aligned
+ //
+ PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
+ StartAddress += sizeof (UINT8);
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
+ //
+ // Write a word if StartAddress is word aligned
+ //
+ PciCf8Write16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (Size >= sizeof (UINT32)) {
+ //
+ // Write as many double words as possible
+ //
+ PciCf8Write32 (StartAddress, *(UINT32*)Buffer);
+ StartAddress += sizeof (UINT32);
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16)) {
+ //
+ // Write the last remaining word if exist
+ //
+ PciCf8Write16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT8)) {
+ //
+ // Write the last remaining byte if exist
+ //
+ PciCf8Write8 (StartAddress, *(UINT8*)Buffer);
+ }
+
+ return ReturnValue;
+}
diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf new file mode 100644 index 0000000000..18868b98ce --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf @@ -0,0 +1,93 @@ +#/** @file
+# Component description file for Base PCI Express Library.
+#
+# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
+# PCI Configuration cycles. Layers on top of an I/O Library instance.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePciExpressLib
+ FILE_GUID = 287e50f4-a188-4699-b907-3e4080ca5688
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciExpressLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PciLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PcdLib
+ DebugLib
+ IoLib
+
+
+################################################################################
+#
+# Pcd DYNAMIC - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsDynamic.common]
+ PcdPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa new file mode 100644 index 0000000000..cd46cc6922 --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePciExpressLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>287e50f4-a188-4699-b907-3e4080ca5688</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base PCI Express Library.</Abstract>
+ <Description>PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
+ PCI Configuration cycles. Layers on top of an I/O Library instance.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePciExpressLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PciExpressLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>IoLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="DYNAMIC">
+ <C_Name>PcdPciExpressBaseAddress</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>The base address of PCI Express MMIO window.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciExpressLib/CommonHeader.h b/MdePkg/Library/BasePciExpressLib/CommonHeader.h new file mode 100644 index 0000000000..0f71c42cea --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/CommonHeader.h @@ -0,0 +1,34 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PciExpressLib.h>
+#include <Library/IoLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePciExpressLib/PciLib.c b/MdePkg/Library/BasePciExpressLib/PciLib.c new file mode 100644 index 0000000000..a98e66dd46 --- /dev/null +++ b/MdePkg/Library/BasePciExpressLib/PciLib.c @@ -0,0 +1,1371 @@ +/** @file
+ PCI Library.
+
+ Functions in this library instance make use of MMIO functions in IoLib to
+ access memory mapped PCI configuration space.
+
+ All assertions for I/O operations are handled in MMIO functions in the IoLib
+ Library.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Assert the validity of a PCI address. A valid PCI address should contain 1's
+ only in the low 28 bits.
+
+ @param A The address to validate.
+
+**/
+#define ASSERT_INVALID_PCI_ADDRESS(A) \
+ ASSERT (((A) & ~0xfffffff) == 0)
+
+
+/**
+ Gets the base address of PCI Express.
+
+ This internal functions retrieves PCI Express Base Address via a PCD entry
+ PcdPciExpressBaseAddress.
+
+ @return The base address of PCI Express.
+
+**/
+STATIC
+volatile VOID*
+GetPciExpressBaseAddress (
+ VOID
+ )
+{
+ return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);
+}
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressRead8 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr8 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressRead16 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr16 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressRead32 (
+ IN UINTN Address
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioAndThenOr32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldRead32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit
+ );
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldWrite32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ Value
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldOr32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAnd32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData
+ );
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT_INVALID_PCI_ADDRESS (Address);
+ return MmioBitFieldAndThenOr32 (
+ (UINTN) GetPciExpressBaseAddress () + Address,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ UINTN ReturnValue;
+
+ ASSERT_INVALID_PCI_ADDRESS (StartAddress);
+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
+
+ if (Size == 0) {
+ return Size;
+ }
+
+ ASSERT (Buffer != NULL);
+
+ //
+ // Save Size for return
+ //
+ ReturnValue = Size;
+
+ if ((StartAddress & 1) != 0) {
+ //
+ // Read a byte if StartAddress is byte aligned
+ //
+ *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);
+ StartAddress += sizeof (UINT8);
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
+ //
+ // Read a word if StartAddress is word aligned
+ //
+ *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (Size >= sizeof (UINT32)) {
+ //
+ // Read as many double words as possible
+ //
+ *(volatile UINT32 *)Buffer = PciExpressRead32 (StartAddress);
+ StartAddress += sizeof (UINT32);
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16)) {
+ //
+ // Read the last remaining word if exist
+ //
+ *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT8)) {
+ //
+ // Read the last remaining byte if exist
+ //
+ *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);
+ }
+
+ return ReturnValue;
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ UINTN ReturnValue;
+
+ ASSERT_INVALID_PCI_ADDRESS (StartAddress);
+ ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
+
+ if (Size == 0) {
+ return 0;
+ }
+
+ ASSERT (Buffer != NULL);
+
+ //
+ // Save Size for return
+ //
+ ReturnValue = Size;
+
+ if ((StartAddress & 1) != 0) {
+ //
+ // Write a byte if StartAddress is byte aligned
+ //
+ PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
+ StartAddress += sizeof (UINT8);
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {
+ //
+ // Write a word if StartAddress is word aligned
+ //
+ PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ while (Size >= sizeof (UINT32)) {
+ //
+ // Write as many double words as possible
+ //
+ PciExpressWrite32 (StartAddress, *(UINT32*)Buffer);
+ StartAddress += sizeof (UINT32);
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT16)) {
+ //
+ // Write the last remaining word if exist
+ //
+ PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);
+ StartAddress += sizeof (UINT16);
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16*)Buffer + 1;
+ }
+
+ if (Size >= sizeof (UINT8)) {
+ //
+ // Write the last remaining byte if exist
+ //
+ PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);
+ }
+
+ return ReturnValue;
+}
diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf new file mode 100644 index 0000000000..5914d4d0ec --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf @@ -0,0 +1,81 @@ +#/** @file
+# Component description file for PCI CF8 Base PCI Library
+#
+# PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform
+# PCI Configuration cycles. Layers on top of an I/O Library instance.
+# Copyright (c) 2007 - 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePciLibCf8
+ FILE_GUID = 28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PciLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PciCf8Lib
+
diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa new file mode 100644 index 0000000000..85edbbabd7 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePciLibCf8</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for PCI CF8 Base PCI Library</Abstract>
+ <Description>PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform
+ PCI Configuration cycles. Layers on top of an I/O Library instance.</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePciLibCf8</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PciLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PciCf8Lib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciLibCf8/CommonHeader.h b/MdePkg/Library/BasePciLibCf8/CommonHeader.h new file mode 100644 index 0000000000..07c1b07df1 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/CommonHeader.h @@ -0,0 +1,32 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PciLib.h>
+#include <Library/PciCf8Lib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePciLibCf8/PciLib.c b/MdePkg/Library/BasePciLibCf8/PciLib.c new file mode 100644 index 0000000000..1bf9c87ea8 --- /dev/null +++ b/MdePkg/Library/BasePciLibCf8/PciLib.c @@ -0,0 +1,1073 @@ +/** @file
+ PCI Library using Port CF8/CFC access.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciRead8 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read8 (Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ )
+{
+ return PciCf8Write8 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8Or8 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return PciCf8And8 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8AndThenOr8 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead8 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return PciCf8BitFieldWrite8 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8BitFieldOr8 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return PciCf8BitFieldAnd8 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciRead16 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read16 (Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ )
+{
+ return PciCf8Write16 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8Or16 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return PciCf8And16 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8AndThenOr16 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead16 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return PciCf8BitFieldWrite16 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8BitFieldOr16 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return PciCf8BitFieldAnd16 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciRead32 (
+ IN UINTN Address
+ )
+{
+ return PciCf8Read32 (Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ )
+{
+ return PciCf8Write32 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8Or32 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return PciCf8And32 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8AndThenOr32 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciCf8BitFieldRead32 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return PciCf8BitFieldWrite32 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8BitFieldOr32 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return PciCf8BitFieldAnd32 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciCf8BitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ return PciCf8ReadBuffer (StartAddress, Size, Buffer);
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ return PciCf8WriteBuffer (StartAddress, Size, Buffer);
+}
diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf new file mode 100644 index 0000000000..91ea0eeaa0 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf @@ -0,0 +1,81 @@ +#/** @file
+# Component description file for PCI Express Base PCI Library.
+#
+# PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI
+# Configuration cycles. Layers on top of an I/O Library instance.
+# Copyright (c) 2007 - 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePciLibPciExpress
+ FILE_GUID = 8987081e-daeb-44a9-8bef-a195b22d9417
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PciLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PciLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PciExpressLib
+
diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa new file mode 100644 index 0000000000..b39faa8410 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BasePciLibPciExpress</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>8987081e-daeb-44a9-8bef-a195b22d9417</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for PCI Express Base PCI Library.</Abstract>
+ <Description>PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI
+ Configuration cycles. Layers on top of an I/O Library instance.</Description>
+ <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePciLibPciExpress</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PciLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PciExpressLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PciLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h b/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h new file mode 100644 index 0000000000..b101e3f2d6 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h @@ -0,0 +1,32 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007 - 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PciLib.h>
+#include <Library/PciExpressLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePciLibPciExpress/PciLib.c b/MdePkg/Library/BasePciLibPciExpress/PciLib.c new file mode 100644 index 0000000000..0b828dd8c7 --- /dev/null +++ b/MdePkg/Library/BasePciLibPciExpress/PciLib.c @@ -0,0 +1,1073 @@ +/** @file
+ PCI Library using PC Express access.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciRead8 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead8 (Address);
+}
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ )
+{
+ return PciExpressWrite8 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressOr8 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ )
+{
+ return PciExpressAnd8 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressAndThenOr8 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead8 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ return PciExpressBitFieldWrite8 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressBitFieldOr8 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ return PciExpressBitFieldAnd8 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciRead16 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead16 (Address);
+}
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ )
+{
+ return PciExpressWrite16 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressOr16 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ )
+{
+ return PciExpressAnd16 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressAndThenOr16 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead16 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ return PciExpressBitFieldWrite16 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressBitFieldOr16 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ return PciExpressBitFieldAnd16 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciRead32 (
+ IN UINTN Address
+ )
+{
+ return PciExpressRead32 (Address);
+}
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ )
+{
+ return PciExpressWrite32 (Address, Data);
+}
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressOr32 (Address, OrData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ )
+{
+ return PciExpressAnd32 (Address, AndData);
+}
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressAndThenOr32 (Address, AndData, OrData);
+}
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return PciExpressBitFieldRead32 (Address, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ return PciExpressBitFieldWrite32 (Address, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressBitFieldOr32 (Address, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ return PciExpressBitFieldAnd32 (Address, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return PciExpressBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);
+}
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+{
+ return PciExpressReadBuffer (StartAddress, Size, Buffer);
+}
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+{
+ return PciExpressWriteBuffer (StartAddress, Size, Buffer);
+}
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf new file mode 100644 index 0000000000..99bb3f7670 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf @@ -0,0 +1,80 @@ +#/** @file
+# Component description file Base PE/Coff Get Entry Point Library
+#
+# PE/COFF Entry Point Library implementation.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePeCoffGetEntryPointLib
+ FILE_GUID = be490364-73d2-420d-950e-f6450ca75dfb
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeCoffGetEntryPointLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PeCoffGetEntryPoint.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa new file mode 100644 index 0000000000..5512f6cfbf --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa @@ -0,0 +1,42 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePeCoffGetEntryPointLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>be490364-73d2-420d-950e-f6450ca75dfb</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file Base PE/Coff Get Entry Point Library</Abstract>
+ <Description>PE/COFF Entry Point Library implementation.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePeCoffGetEntryPointLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PeCoffGetEntryPointLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PeCoffGetEntryPoint.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h b/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h new file mode 100644 index 0000000000..fcc8d3ebe1 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h @@ -0,0 +1,32 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c new file mode 100644 index 0000000000..057a171e96 --- /dev/null +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c @@ -0,0 +1,249 @@ +/** @file
+ Tiano PE/COFF loader.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffGetEntryPoint.c
+
+**/
+
+
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+#include <Include/IndustryStandard/PeImage.h>
+
+/**
+ Retrieves and returns a pointer to the entry point to a PE/COFF image that has been loaded
+ into system memory with the PE/COFF Loader Library functions.
+
+ Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry
+ point in EntryPoint. If the entry point could not be retrieved from the PE/COFF image, then
+ return RETURN_INVALID_PARAMETER. Otherwise return RETURN_SUCCESS.
+ If Pe32Data is NULL, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system memory.
+ @param EntryPoint Pointer to entry point to the PE/COFF image to return.
+
+ @retval RETURN_SUCCESS EntryPoint was returned.
+ @retval RETURN_INVALID_PARAMETER The entry point could not be found in the PE/COFF image.
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderGetEntryPoint (
+ IN VOID *Pe32Data,
+ OUT VOID **EntryPoint
+ )
+{
+ EFI_IMAGE_DOS_HEADER *DosHeader;
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Header;
+
+ ASSERT (Pe32Data != NULL);
+ ASSERT (EntryPoint != NULL);
+
+ DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
+ if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ //
+ // DOS image header is present, so read the PE header after the DOS image header.
+ //
+ Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));
+ } else {
+ //
+ // DOS image header is not present, so PE header is at the image base.
+ //
+ Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;
+ }
+
+ //
+ // Calculate the entry point relative to the start of the image.
+ // AddressOfEntryPoint is common for PE32 & PE32+
+ //
+ *EntryPoint = (VOID *)((UINTN)Pe32Data + (UINTN)(Header.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
+ return RETURN_SUCCESS;
+}
+
+
+/**
+ Returns the machine type of a PE/COFF image.
+
+ Returns the machine type from the PE/COFF image specified by Pe32Data.
+ If Pe32Data is NULL, then ASSERT().
+
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system
+ memory.
+
+ @return Machine type or zero if not a valid iamge.
+
+**/
+UINT16
+EFIAPI
+PeCoffLoaderGetMachineType (
+ IN VOID *Pe32Data
+ )
+{
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
+ EFI_IMAGE_DOS_HEADER *DosHdr;
+
+ DosHdr = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
+ if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data + DosHdr->e_lfanew);
+ } else {
+ Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data);
+ }
+
+ if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {
+ return Hdr.Pe32->FileHeader.Machine;
+ }
+
+ return 0x0000;
+}
+
+/**
+ Returns a pointer to the PDB file name for a PE/COFF image that has been
+ loaded into system memory with the PE/COFF Loader Library functions.
+
+ Returns the PDB file name for the PE/COFF image specified by Pe32Data. If
+ the PE/COFF image specified by Pe32Data is not a valid, then NULL is
+ returned. If the PE/COFF image specified by Pe32Data does not contain a
+ debug directory entry, then NULL is returned. If the debug directory entry
+ in the PE/COFF image specified by Pe32Data does not contain a PDB file name,
+ then NULL is returned.
+ If Pe32Data is NULL, then ASSERT().
+
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system
+ memory.
+
+ @return The PDB file name for the PE/COFF image specified by Pe32Data or NULL
+ if it cannot be retrieved.
+
+**/
+VOID *
+EFIAPI
+PeCoffLoaderGetPdbPointer (
+ IN VOID *Pe32Data
+ )
+{
+ EFI_IMAGE_DOS_HEADER *DosHeader;
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
+ EFI_IMAGE_DATA_DIRECTORY *DirectoryEntry;
+ EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *DebugEntry;
+ UINTN DirCount;
+ VOID *CodeViewEntryPointer;
+ INTN TEImageAdjust;
+ UINT32 NumberOfRvaAndSizes;
+ UINT16 Magic;
+
+ ASSERT (Pe32Data != NULL);
+
+ TEImageAdjust = 0;
+ DirectoryEntry = NULL;
+ DebugEntry = NULL;
+ NumberOfRvaAndSizes = 0;
+
+ DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;
+ if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
+ //
+ // DOS image header is present, so read the PE header after the DOS image header.
+ //
+ Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));
+ } else {
+ //
+ // DOS image header is not present, so PE header is at the image base.
+ //
+ Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;
+ }
+
+ if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE) {
+ if (Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG].VirtualAddress != 0) {
+ DirectoryEntry = &Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG];
+ TEImageAdjust = sizeof (EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize;
+ DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *)((UINTN) Hdr.Te +
+ Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG].VirtualAddress +
+ TEImageAdjust);
+ }
+ } else if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {
+ //
+ // NOTE: We use Machine field to identify PE32/PE32+, instead of Magic.
+ // It is due to backward-compatibility, for some system might
+ // generate PE32+ image with PE32 Magic.
+ //
+ switch (Hdr.Pe32->FileHeader.Machine) {
+ case EFI_IMAGE_MACHINE_IA32:
+ //
+ // Assume PE32 image with IA32 Machine field.
+ //
+ Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
+ break;
+ case EFI_IMAGE_MACHINE_X64:
+ case EFI_IMAGE_MACHINE_IPF:
+ //
+ // Assume PE32+ image with X64 or IPF Machine field
+ //
+ Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
+ break;
+ default:
+ //
+ // For unknow Machine field, use Magic in optional Header
+ //
+ Magic = Hdr.Pe32->OptionalHeader.Magic;
+ }
+
+ if (Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) {
+ //
+ // Use PE32 offset get Debug Directory Entry
+ //
+ NumberOfRvaAndSizes = Hdr.Pe32->OptionalHeader.NumberOfRvaAndSizes;
+ DirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *)&(Hdr.Pe32->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG]);
+ DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *) ((UINTN) Pe32Data + DirectoryEntry->VirtualAddress);
+ } else if (Hdr.Pe32->OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {
+ //
+ // Use PE32+ offset get Debug Directory Entry
+ //
+ NumberOfRvaAndSizes = Hdr.Pe32Plus->OptionalHeader.NumberOfRvaAndSizes;
+ DirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *)&(Hdr.Pe32Plus->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG]);
+ DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *) ((UINTN) Pe32Data + DirectoryEntry->VirtualAddress);
+ }
+
+ if (NumberOfRvaAndSizes <= EFI_IMAGE_DIRECTORY_ENTRY_DEBUG) {
+ DirectoryEntry = NULL;
+ DebugEntry = NULL;
+ }
+ } else {
+ return NULL;
+ }
+
+ if (DebugEntry == NULL || DirectoryEntry == NULL) {
+ return NULL;
+ }
+
+ for (DirCount = 0; DirCount < DirectoryEntry->Size; DirCount++, DebugEntry++) {
+ if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
+ if (DebugEntry->SizeOfData > 0) {
+ CodeViewEntryPointer = (VOID *) ((UINTN) DebugEntry->RVA + ((UINTN)Pe32Data) + (UINTN)TEImageAdjust);
+ switch (* (UINT32 *) CodeViewEntryPointer) {
+ case CODEVIEW_SIGNATURE_NB10:
+ return (VOID *) ((CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY));
+ case CODEVIEW_SIGNATURE_RSDS:
+ return (VOID *) ((CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY));
+ default:
+ break;
+ }
+ }
+ }
+ }
+
+ return NULL;
+}
+
+
diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf new file mode 100644 index 0000000000..9f50ecd852 --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf @@ -0,0 +1,92 @@ +#/** @file
+# Component description file for NULL Performance Library
+#
+# Performance Library that layers on top of the Base Library to measure start
+# and end times using CPU specific timer services if they are available.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePerformanceLibNull
+ FILE_GUID = FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PerformanceLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PerformanceLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PcdLib
+ DebugLib
+
+
+################################################################################
+#
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ PcdPerformanceLibraryPropertyMask|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa new file mode 100644 index 0000000000..0026b44e1a --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa @@ -0,0 +1,54 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePerformanceLibNull</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for NULL Performance Library</Abstract>
+ <Description>Performance Library that layers on top of the Base Library to measure start
+ and end times using CPU specific timer services if they are available.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePerformanceLibNull</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PerformanceLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PerformanceLib.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="FIXED_AT_BUILD">
+ <C_Name>PcdPerformanceLibraryPropertyMask</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>The bitmask of flags that specify the enable/disable of
+ Performance Measurement.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h b/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h new file mode 100644 index 0000000000..17bcd31a55 --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PerformanceLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c new file mode 100644 index 0000000000..1785bab28f --- /dev/null +++ b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c @@ -0,0 +1,165 @@ +/** @file
+ Base Performance Library which provides no service.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PerformanceLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Creates a record for the beginning of a performance measurement.
+
+ Creates a record that contains the Handle, Token, and Module.
+ If TimeStamp is not zero, then TimeStamp is added to the record as the start time.
+ If TimeStamp is zero, then this function reads the current time stamp
+ and adds that time stamp value to the record as the start time.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The start of the measurement was recorded.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.
+
+**/
+RETURN_STATUS
+EFIAPI
+StartPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token,
+ IN CONST CHAR8 *Module,
+ IN UINT64 TimeStamp
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+/**
+ Fills in the end time of a performance measurement.
+
+ Looks up the record that matches Handle, Token, and Module.
+ If the record can not be found then return RETURN_NOT_FOUND.
+ If the record is found and TimeStamp is not zero,
+ then TimeStamp is added to the record as the end time.
+ If the record is found and TimeStamp is zero, then this function reads
+ the current time stamp and adds that time stamp value to the record as the end time.
+ If this function is called multiple times for the same record, then the end time is overwritten.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The end of the measurement was recorded.
+ @retval RETURN_NOT_FOUND The specified measurement record could not be found.
+
+**/
+RETURN_STATUS
+EFIAPI
+EndPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token,
+ IN CONST CHAR8 *Module,
+ IN UINT64 TimeStamp
+ )
+{
+ return RETURN_SUCCESS;
+}
+
+/**
+ Attempts to retrieve a performance measurement log entry from the performance measurement log.
+
+ Attempts to retrieve the performance log entry specified by LogEntryKey. If LogEntryKey is
+ zero on entry, then an attempt is made to retrieve the first entry from the performance log,
+ and the key for the second entry in the log is returned. If the performance log is empty,
+ then no entry is retrieved and zero is returned. If LogEntryKey is not zero, then the performance
+ log entry associated with LogEntryKey is retrieved, and the key for the next entry in the log is
+ returned. If LogEntryKey is the key for the last entry in the log, then the last log entry is
+ retrieved and an implementation specific non-zero key value that specifies the end of the performance
+ log is returned. If LogEntryKey is equal this implementation specific non-zero key value, then no entry
+ is retrieved and zero is returned. In the cases where a performance log entry can be returned,
+ the log entry is returned in Handle, Token, Module, StartTimeStamp, and EndTimeStamp.
+ If LogEntryKey is not a valid log entry key for the performance measurement log, then ASSERT().
+ If Handle is NULL, then ASSERT().
+ If Token is NULL, then ASSERT().
+ If Module is NULL, then ASSERT().
+ If StartTimeStamp is NULL, then ASSERT().
+ If EndTimeStamp is NULL, then ASSERT().
+
+ @param LogEntryKey On entry, the key of the performance measurement log entry to retrieve.
+ 0, then the first performance measurement log entry is retrieved.
+ On exit, the key of the next performance lof entry entry.
+ @param Handle Pointer to environment specific context used to identify the component
+ being measured.
+ @param Token Pointer to a Null-terminated ASCII string that identifies the component
+ being measured.
+ @param Module Pointer to a Null-terminated ASCII string that identifies the module
+ being measured.
+ @param StartTimeStamp Pointer to the 64-bit time stamp that was recorded when the measurement
+ was started.
+ @param EndTimeStamp Pointer to the 64-bit time stamp that was recorded when the measurement
+ was ended.
+
+ @return The key for the next performance log entry (in general case).
+
+**/
+UINTN
+EFIAPI
+GetPerformanceMeasurement (
+ IN UINTN LogEntryKey,
+ OUT CONST VOID **Handle,
+ OUT CONST CHAR8 **Token,
+ OUT CONST CHAR8 **Module,
+ OUT UINT64 *StartTimeStamp,
+ OUT UINT64 *EndTimeStamp
+ )
+{
+ ASSERT (Handle != NULL);
+ ASSERT (Token != NULL);
+ ASSERT (Module != NULL);
+ ASSERT (StartTimeStamp != NULL);
+ ASSERT (EndTimeStamp != NULL);
+
+ return 0;
+}
+
+/**
+ Returns TRUE if the performance measurement macros are enabled.
+
+ This function returns TRUE if the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set.
+ @retval FALSE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PerformanceMeasurementEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdPerformanceLibraryPropertyMask) & PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf new file mode 100644 index 0000000000..bc8e36d4d4 --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf @@ -0,0 +1,91 @@ +#/** @file
+# Component description file for Debug Base Post Code Library.
+#
+# Post Code Library that layers on top of a Debug Library instance.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePostCodeLibDebug
+ FILE_GUID = 19e3bbba-beb1-43e8-b32d-9acbb22c7639
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PostCodeLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PostCode.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ PcdLib
+ DebugLib
+
+
+################################################################################
+#
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ PcdPostCodePropertyMask|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa new file mode 100644 index 0000000000..f4095f38dc --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa @@ -0,0 +1,53 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePostCodeLibDebug</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>19e3bbba-beb1-43e8-b32d-9acbb22c7639</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Debug Base Post Code Library.</Abstract>
+ <Description>Post Code Library that layers on top of a Debug Library instance.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePostCodeLibDebug</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PostCodeLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PostCode.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="FIXED_AT_BUILD">
+ <C_Name>PcdPostCodePropertyMask</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>The bitmask of flags that specify the enable/disable of Post
+ Code, Post Code Description.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h b/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h new file mode 100644 index 0000000000..7d68ffe3ca --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PostCodeLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePostCodeLibDebug/PostCode.c b/MdePkg/Library/BasePostCodeLibDebug/PostCode.c new file mode 100644 index 0000000000..f929ba811d --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibDebug/PostCode.c @@ -0,0 +1,127 @@ +/** @file
+ Report Status Code Library Post Code functions for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x\n", Value));
+ return Value;
+}
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ )
+{
+ DEBUG((EFI_D_INFO, "POST %08x - %s\n", Value, Description));
+ return Value;
+}
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdPostCodePropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is set.
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PostCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdPostCodePropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is set.
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PostCodeDescriptionEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf new file mode 100644 index 0000000000..b43a006191 --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf @@ -0,0 +1,91 @@ +#/** @file
+# Component description file for Port 80 Base Post Code Library.
+#
+# Post Code Library that writes post code values to I/O port 0x80.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePostCodeLibPort80
+ FILE_GUID = b6e9a733-eb75-41b6-b30c-009bcf3801c8
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PostCodeLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PostCode.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ IoLib
+ PcdLib
+
+
+################################################################################
+#
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ PcdPostCodePropertyMask|gEfiMdePkgTokenSpaceGuid
+
diff --git a/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa new file mode 100644 index 0000000000..7677762c55 --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa @@ -0,0 +1,53 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePostCodeLibPort80</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>b6e9a733-eb75-41b6-b30c-009bcf3801c8</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Port 80 Base Post Code Library.</Abstract>
+ <Description>Post Code Library that writes post code values to I/O port 0x80.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePostCodeLibPort80</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PostCodeLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>PcdLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>IoLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PostCode.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+ <PcdCoded>
+ <PcdEntry PcdItemType="FIXED_AT_BUILD">
+ <C_Name>PcdPostCodePropertyMask</C_Name>
+ <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+ <HelpText>The bitmask of flags that specify the enable/disable of Post
+ Code, Post Code Description.</HelpText>
+ </PcdEntry>
+ </PcdCoded>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h b/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h new file mode 100644 index 0000000000..12ef16fb1e --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PostCodeLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePostCodeLibPort80/PostCode.c b/MdePkg/Library/BasePostCodeLibPort80/PostCode.c new file mode 100644 index 0000000000..a5e8a65be1 --- /dev/null +++ b/MdePkg/Library/BasePostCodeLibPort80/PostCode.c @@ -0,0 +1,128 @@ +/** @file
+ Report Status Code Library Post Code functions for DXE Phase.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ )
+{
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ )
+{
+ IoWrite8 (0x80, (UINT8)(Value));
+ return Value;
+}
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdPostCodePropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is set.
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PostCodeEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the
+ POST_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdPostCodePropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdPostCodeProperyMask is set.
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdPostCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PostCodeDescriptionEnabled (
+ VOID
+ )
+{
+ return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);
+}
diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.inf b/MdePkg/Library/BasePrintLib/BasePrintLib.inf new file mode 100644 index 0000000000..340b148b19 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/BasePrintLib.inf @@ -0,0 +1,83 @@ +#/** @file
+# Component description file for Base Print Library.
+#
+# Print Library implementation.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BasePrintLib
+ FILE_GUID = a86fbfca-0183-4eeb-aa8a-762e3b7da1f3
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PrintLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ PrintLibInternal.h
+ PrintLibInternal.c
+ PrintLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+
diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.msa b/MdePkg/Library/BasePrintLib/BasePrintLib.msa new file mode 100644 index 0000000000..6e6865aa4a --- /dev/null +++ b/MdePkg/Library/BasePrintLib/BasePrintLib.msa @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+ <MsaHeader>
+ <ModuleName>BasePrintLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>a86fbfca-0183-4eeb-aa8a-762e3b7da1f3</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base Print Library.</Abstract>
+ <Description>Print Library implementation.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BasePrintLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>PrintLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>PrintLib.c</Filename>
+ <Filename>PrintLibInternal.c</Filename>
+ <Filename>PrintLibInternal.h</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BasePrintLib/CommonHeader.h b/MdePkg/Library/BasePrintLib/CommonHeader.h new file mode 100644 index 0000000000..c6d7f4136e --- /dev/null +++ b/MdePkg/Library/BasePrintLib/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/PrintLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BasePrintLib/PrintLib.c b/MdePkg/Library/BasePrintLib/PrintLib.c new file mode 100644 index 0000000000..764e3847a2 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLib.c @@ -0,0 +1,1085 @@ +/** @file
+ Print Library.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "PrintLibInternal.h"
+
+#define WARNING_STATUS_NUMBER 4
+#define ERROR_STATUS_NUMBER 24
+#define ASSERT_UNICODE_BUFFER(Buffer) ASSERT ((((UINTN) (Buffer)) & 0x01) == 0)
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 *StatusString [] = {
+ "Success", // RETURN_SUCCESS = 0
+ "Warning Unknown Glyph", // RETURN_WARN_UNKNOWN_GLYPH = 1
+ "Warning Delete Failure", // RETURN_WARN_DELETE_FAILURE = 2
+ "Warning Write Failure", // RETURN_WARN_WRITE_FAILURE = 3
+ "Warning Buffer Too Small", // RETURN_WARN_BUFFER_TOO_SMALL = 4
+ "Load Error", // RETURN_LOAD_ERROR = 1 | MAX_BIT
+ "Invalid Parameter", // RETURN_INVALID_PARAMETER = 2 | MAX_BIT
+ "Unsupported", // RETURN_UNSUPPORTED = 3 | MAX_BIT
+ "Bad Buffer Size", // RETURN_BAD_BUFFER_SIZE = 4 | MAX_BIT
+ "Buffer Too Small", // RETURN_BUFFER_TOO_SMALL, = 5 | MAX_BIT
+ "Not Ready", // RETURN_NOT_READY = 6 | MAX_BIT
+ "Device Error", // RETURN_DEVICE_ERROR = 7 | MAX_BIT
+ "Write Protected", // RETURN_WRITE_PROTECTED = 8 | MAX_BIT
+ "Out of Resources", // RETURN_OUT_OF_RESOURCES = 9 | MAX_BIT
+ "Volume Corrupt", // RETURN_VOLUME_CORRUPTED = 10 | MAX_BIT
+ "Volume Full", // RETURN_VOLUME_FULL = 11 | MAX_BIT
+ "No Media", // RETURN_NO_MEDIA = 12 | MAX_BIT
+ "Media changed", // RETURN_MEDIA_CHANGED = 13 | MAX_BIT
+ "Not Found", // RETURN_NOT_FOUND = 14 | MAX_BIT
+ "Access Denied", // RETURN_ACCESS_DENIED = 15 | MAX_BIT
+ "No Response", // RETURN_NO_RESPONSE = 16 | MAX_BIT
+ "No mapping", // RETURN_NO_MAPPING = 17 | MAX_BIT
+ "Time out", // RETURN_TIMEOUT = 18 | MAX_BIT
+ "Not started", // RETURN_NOT_STARTED = 19 | MAX_BIT
+ "Already started", // RETURN_ALREADY_STARTED = 20 | MAX_BIT
+ "Aborted", // RETURN_ABORTED = 21 | MAX_BIT
+ "ICMP Error", // RETURN_ICMP_ERROR = 22 | MAX_BIT
+ "TFTP Error", // RETURN_TFTP_ERROR = 23 | MAX_BIT
+ "Protocol Error" // RETURN_PROTOCOL_ERROR = 24 | MAX_BIT
+};
+
+/**
+ Worker function that produces a Null-terminated string in an output buffer
+ based on a Null-terminated format string and a VA_LIST argument list.
+
+ VSPrint function to process format and place the results in Buffer. Since a
+ VA_LIST is used this rountine allows the nesting of Vararg routines. Thus
+ this is the main print working routine.
+
+ @param Buffer Character buffer to print the results of the parsing
+ of Format into.
+ @param BufferSize Maximum number of characters to put into buffer.
+ @param Flags Intial flags value.
+ Can only have FORMAT_UNICODE and OUTPUT_UNICODE set.
+ @param Format Null-terminated format string.
+ @param Marker Vararg list consumed by processing Format.
+
+ @return Number of characters printed not including the Null-terminator.
+
+**/
+UINTN
+BasePrintLibVSPrint (
+ OUT CHAR8 *Buffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST Marker
+ )
+{
+ CHAR8 *OriginalBuffer;
+ CHAR8 *EndBuffer;
+ CHAR8 ValueBuffer[MAXIMUM_VALUE_CHARACTERS];
+ UINTN BytesPerOutputCharacter;
+ UINTN BytesPerFormatCharacter;
+ UINTN FormatMask;
+ UINTN FormatCharacter;
+ UINTN Width;
+ UINTN Precision;
+ INT64 Value;
+ CONST CHAR8 *ArgumentString;
+ UINTN Character;
+ GUID *TmpGuid;
+ TIME *TmpTime;
+ UINTN Count;
+ UINTN ArgumentMask;
+ INTN BytesPerArgumentCharacter;
+ UINTN ArgumentCharacter;
+ BOOLEAN Done;
+ UINTN Index;
+ CHAR8 Prefix;
+ BOOLEAN ZeroPad;
+ BOOLEAN Comma;
+ UINTN Digits;
+ UINTN Radix;
+ RETURN_STATUS Status;
+
+ if (BufferSize == 0) {
+ return 0;
+ }
+ ASSERT (Buffer != NULL);
+
+ if ((Flags & OUTPUT_UNICODE) != 0) {
+ BytesPerOutputCharacter = 2;
+ } else {
+ BytesPerOutputCharacter = 1;
+ }
+
+ //
+ // Reserve space for the Null terminator.
+ //
+ BufferSize--;
+ OriginalBuffer = Buffer;
+ //
+ // Set the tag for the end of the input Buffer.
+ //
+ EndBuffer = Buffer + BufferSize * BytesPerOutputCharacter;
+
+ if ((Flags & FORMAT_UNICODE) != 0) {
+ //
+ // Make sure format string cannot contain more than PcdMaximumUnicodeStringLength
+ // Unicode characters if PcdMaximumUnicodeStringLength is not zero.
+ //
+ ASSERT (StrSize ((CHAR16 *) Format) != 0);
+ BytesPerFormatCharacter = 2;
+ FormatMask = 0xffff;
+ } else {
+ //
+ // Make sure format string cannot contain more than PcdMaximumAsciiStringLength
+ // Ascii characters if PcdMaximumAsciiStringLength is not zero.
+ //
+ ASSERT (AsciiStrSize (Format) != 0);
+ BytesPerFormatCharacter = 1;
+ FormatMask = 0xff;
+ }
+
+
+
+ //
+ // Get the first character from the format string
+ //
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+
+ //
+ // Loop until the end of the format string is reached or the output buffer is full
+ //
+ while (FormatCharacter != 0 && Buffer < EndBuffer) {
+ //
+ // Clear all the flag bits except those that may have been passed in
+ //
+ Flags &= (OUTPUT_UNICODE | FORMAT_UNICODE);
+
+ //
+ // Set the default width to zero, and the default precision to 1
+ //
+ Width = 0;
+ Precision = 1;
+ Prefix = 0;
+ Comma = FALSE;
+ ZeroPad = FALSE;
+ Count = 0;
+ Digits = 0;
+
+ switch (FormatCharacter) {
+ case '%':
+ //
+ // Parse Flags and Width
+ //
+ for (Done = FALSE; !Done; ) {
+ Format += BytesPerFormatCharacter;
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ switch (FormatCharacter) {
+ case '.':
+ Flags |= PRECISION;
+ break;
+ case '-':
+ Flags |= LEFT_JUSTIFY;
+ break;
+ case '+':
+ Flags |= PREFIX_SIGN;
+ break;
+ case ' ':
+ Flags |= PREFIX_BLANK;
+ break;
+ case ',':
+ Flags |= COMMA_TYPE;
+ break;
+ case 'L':
+ case 'l':
+ Flags |= LONG_TYPE;
+ break;
+ case '*':
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PAD_TO_WIDTH;
+ Width = VA_ARG (Marker, UINTN);
+ } else {
+ Precision = VA_ARG (Marker, UINTN);
+ }
+ break;
+ case '0':
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PREFIX_ZERO;
+ }
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ for (Count = 0; ((FormatCharacter >= '0') && (FormatCharacter <= '9')); ){
+ Count = (Count * 10) + FormatCharacter - '0';
+ Format += BytesPerFormatCharacter;
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ }
+ Format -= BytesPerFormatCharacter;
+ if ((Flags & PRECISION) == 0) {
+ Flags |= PAD_TO_WIDTH;
+ Width = Count;
+ } else {
+ Precision = Count;
+ }
+ break;
+
+ case '\0':
+ //
+ // Make no output if Format string terminates unexpectedly when
+ // looking up for flag, width, precision and type.
+ //
+ Format -= BytesPerFormatCharacter;
+ Precision = 0;
+ //
+ // break skipped on purpose.
+ //
+ default:
+ Done = TRUE;
+ break;
+ }
+ }
+
+ //
+ // Handle each argument type
+ //
+ switch (FormatCharacter) {
+ case 'p':
+ //
+ // Flag space, +, 0, L & l are invalid for type p.
+ //
+ Flags &= ~(PREFIX_BLANK | PREFIX_SIGN | PREFIX_ZERO | LONG_TYPE);
+ if (sizeof (VOID *) > 4) {
+ Flags |= LONG_TYPE;
+ }
+ case 'X':
+ Flags |= PREFIX_ZERO;
+ //
+ // break skipped on purpose
+ //
+ case 'x':
+ Flags |= RADIX_HEX;
+ //
+ // break skipped on purpose
+ //
+ case 'd':
+ if ((Flags & LONG_TYPE) == 0) {
+ Value = (VA_ARG (Marker, int));
+ } else {
+ Value = VA_ARG (Marker, INT64);
+ }
+ if ((Flags & PREFIX_BLANK) != 0) {
+ Prefix = ' ';
+ }
+ if ((Flags & PREFIX_SIGN) != 0) {
+ Prefix = '+';
+ }
+ if ((Flags & COMMA_TYPE) != 0) {
+ Comma = TRUE;
+ }
+ if ((Flags & RADIX_HEX) == 0) {
+ Radix = 10;
+ if (Comma) {
+ Flags &= (~PREFIX_ZERO);
+ Precision = 1;
+ }
+ if (Value < 0) {
+ Flags |= PREFIX_SIGN;
+ Prefix = '-';
+ Value = -Value;
+ }
+ } else {
+ Radix = 16;
+ Comma = FALSE;
+ if ((Flags & LONG_TYPE) == 0 && Value < 0) {
+ Value = (unsigned int)Value;
+ }
+ }
+ //
+ // Convert Value to a reversed string
+ //
+ Count = BasePrintLibValueToString (ValueBuffer, Value, Radix);
+ if (Value == 0 && Precision == 0) {
+ Count = 0;
+ }
+ ArgumentString = (CHAR8 *)ValueBuffer + Count;
+
+ Digits = Count % 3;
+ if (Digits != 0) {
+ Digits = 3 - Digits;
+ }
+ if (Comma && Count != 0) {
+ Count += ((Count - 1) / 3);
+ }
+ if (Prefix != 0) {
+ Count++;
+ Precision++;
+ }
+ Flags |= ARGUMENT_REVERSED;
+ ZeroPad = TRUE;
+ if ((Flags & PREFIX_ZERO) != 0) {
+ if ((Flags & LEFT_JUSTIFY) == 0) {
+ if ((Flags & PAD_TO_WIDTH) != 0) {
+ if ((Flags & PRECISION) == 0) {
+ Precision = Width;
+ }
+ }
+ }
+ }
+ break;
+
+ case 's':
+ case 'S':
+ Flags |= ARGUMENT_UNICODE;
+ //
+ // break skipped on purpose
+ //
+ case 'a':
+ ArgumentString = (CHAR8 *)VA_ARG (Marker, CHAR8 *);
+ if (ArgumentString == NULL) {
+ Flags &= (~ARGUMENT_UNICODE);
+ ArgumentString = "<null string>";
+ }
+ break;
+
+ case 'c':
+ Character = VA_ARG (Marker, UINTN) & 0xffff;
+ ArgumentString = (CHAR8 *)&Character;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+
+ case 'g':
+ TmpGuid = VA_ARG (Marker, GUID *);
+ if (TmpGuid == NULL) {
+ ArgumentString = "<null guid>";
+ } else {
+ BasePrintLibSPrint (
+ ValueBuffer,
+ MAXIMUM_VALUE_CHARACTERS,
+ 0,
+ "%08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x",
+ TmpGuid->Data1,
+ TmpGuid->Data2,
+ TmpGuid->Data3,
+ TmpGuid->Data4[0],
+ TmpGuid->Data4[1],
+ TmpGuid->Data4[2],
+ TmpGuid->Data4[3],
+ TmpGuid->Data4[4],
+ TmpGuid->Data4[5],
+ TmpGuid->Data4[6],
+ TmpGuid->Data4[7]
+ );
+ ArgumentString = ValueBuffer;
+ }
+ break;
+
+ case 't':
+ TmpTime = VA_ARG (Marker, TIME *);
+ if (TmpTime == NULL) {
+ ArgumentString = "<null time>";
+ } else {
+ BasePrintLibSPrint (
+ ValueBuffer,
+ MAXIMUM_VALUE_CHARACTERS,
+ 0,
+ "%02d/%02d/%04d %02d:%02d",
+ TmpTime->Month,
+ TmpTime->Day,
+ TmpTime->Year,
+ TmpTime->Hour,
+ TmpTime->Minute
+ );
+ ArgumentString = ValueBuffer;
+ }
+ break;
+
+ case 'r':
+ Status = VA_ARG (Marker, RETURN_STATUS);
+ ArgumentString = ValueBuffer;
+ if (RETURN_ERROR (Status)) {
+ //
+ // Clear error bit
+ //
+ Index = Status & ~MAX_BIT;
+ if (Index > 0 && Index <= ERROR_STATUS_NUMBER) {
+ ArgumentString = StatusString [Index + WARNING_STATUS_NUMBER];
+ }
+ } else {
+ Index = Status;
+ if (Index <= WARNING_STATUS_NUMBER) {
+ ArgumentString = StatusString [Index];
+ }
+ }
+ if (ArgumentString == ValueBuffer) {
+ BasePrintLibSPrint ((CHAR8 *) ValueBuffer, MAXIMUM_VALUE_CHARACTERS, 0, "%08X", Status);
+ }
+ break;
+
+ case '\n':
+ ArgumentString = "\n\r";
+ break;
+
+ case '%':
+ default:
+ //
+ // if the type is '%' or unknown, then print it to the screen
+ //
+ ArgumentString = (CHAR8 *)&FormatCharacter;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+ }
+ break;
+
+ case '\n':
+ ArgumentString = "\n\r";
+ break;
+
+ default:
+ ArgumentString = (CHAR8 *)&FormatCharacter;
+ Flags |= ARGUMENT_UNICODE;
+ break;
+ }
+
+ //
+ // Retrieve the ArgumentString attriubutes
+ //
+ if ((Flags & ARGUMENT_UNICODE) != 0) {
+ ArgumentMask = 0xffff;
+ BytesPerArgumentCharacter = 2;
+ } else {
+ ArgumentMask = 0xff;
+ BytesPerArgumentCharacter = 1;
+ }
+ if ((Flags & ARGUMENT_REVERSED) != 0) {
+ BytesPerArgumentCharacter = -BytesPerArgumentCharacter;
+ } else {
+ //
+ // Compute the number of characters in ArgumentString and store it in Count
+ // ArgumentString is either null-terminated, or it contains Precision characters
+ //
+ for (Count = 0; Count < Precision || ((Flags & PRECISION) == 0); Count++) {
+ ArgumentCharacter = ((ArgumentString[Count * BytesPerArgumentCharacter] & 0xff) | ((ArgumentString[Count * BytesPerArgumentCharacter + 1]) << 8)) & ArgumentMask;
+ if (ArgumentCharacter == 0) {
+ break;
+ }
+ }
+ }
+
+ if (Precision < Count) {
+ Precision = Count;
+ }
+
+ //
+ // Pad before the string
+ //
+ if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH)) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Precision, ' ', BytesPerOutputCharacter);
+ }
+
+ if (ZeroPad) {
+ if (Prefix != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, Prefix, BytesPerOutputCharacter);
+ }
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Precision - Count, '0', BytesPerOutputCharacter);
+ } else {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Precision - Count, ' ', BytesPerOutputCharacter);
+ if (Prefix != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, Prefix, BytesPerOutputCharacter);
+ }
+ }
+
+ //
+ // Output the Prefix character if it is present
+ //
+ Index = 0;
+ if (Prefix != 0) {
+ Index++;
+ }
+
+ //
+ // Copy the string into the output buffer performing the required type conversions
+ //
+ while (Index < Count) {
+ ArgumentCharacter = ((*ArgumentString & 0xff) | (*(ArgumentString + 1) << 8)) & ArgumentMask;
+
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ArgumentCharacter, BytesPerOutputCharacter);
+ ArgumentString += BytesPerArgumentCharacter;
+ Index++;
+ if (Comma) {
+ Digits++;
+ if (Digits == 3) {
+ Digits = 0;
+ Index++;
+ if (Index < Count) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ',', BytesPerOutputCharacter);
+ }
+ }
+ }
+ }
+
+ //
+ // Pad after the string
+ //
+ if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH | LEFT_JUSTIFY)) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Precision, ' ', BytesPerOutputCharacter);
+ }
+
+ //
+ // Get the next character from the format string
+ //
+ Format += BytesPerFormatCharacter;
+
+ //
+ // Get the next character from the format string
+ //
+ FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;
+ }
+
+ //
+ // Null terminate the Unicode or ASCII string
+ //
+ BasePrintLibFillBuffer (Buffer, EndBuffer + BytesPerOutputCharacter, 1, 0, BytesPerOutputCharacter);
+ //
+ // Make sure output buffer cannot contain more than PcdMaximumUnicodeStringLength
+ // Unicode characters if PcdMaximumUnicodeStringLength is not zero.
+ //
+ ASSERT ((((Flags & OUTPUT_UNICODE) == 0)) || (StrSize ((CHAR16 *) OriginalBuffer) != 0));
+ //
+ // Make sure output buffer cannot contain more than PcdMaximumAsciiStringLength
+ // ASCII characters if PcdMaximumAsciiStringLength is not zero.
+ //
+ ASSERT ((((Flags & OUTPUT_UNICODE) != 0)) || (AsciiStrSize (OriginalBuffer) != 0));
+
+ return ((Buffer - OriginalBuffer) / BytesPerOutputCharacter);
+}
+
+/**
+ Worker function that produces a Null-terminated string in an output buffer
+ based on a Null-terminated format string and variable argument list.
+
+ VSPrint function to process format and place the results in Buffer. Since a
+ VA_LIST is used this rountine allows the nesting of Vararg routines. Thus
+ this is the main print working routine.
+
+ @param Buffer Character buffer to print the results of the parsing
+ of Format into.
+ @param BufferSize Maximum number of characters to put into buffer.
+ Zero means no limit.
+ @param Flags Intial flags value.
+ Can only have FORMAT_UNICODE and OUTPUT_UNICODE set
+ @param FormatString Null-terminated format string.
+
+ @return Number of characters printed not including the Null-terminator.
+
+**/
+UINTN
+BasePrintLibSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, Flags, FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on
+ a Null-terminated Unicode format string and a VA_LIST argument list
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on the
+ contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeVSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ ASSERT_UNICODE_BUFFER(StartOfBuffer);
+ ASSERT_UNICODE_BUFFER(FormatString);
+ return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, FORMAT_UNICODE | OUTPUT_UNICODE, (CHAR8 *)FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ Unicode format string and variable argument list.
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return UnicodeVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on the
+ contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeVSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ ASSERT_UNICODE_BUFFER(StartOfBuffer);
+ return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, OUTPUT_UNICODE,FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return UnicodeVSPrintAsciiFormat (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+/**
+ Converts a decimal value to a Null-terminated Unicode string.
+
+ Converts the decimal number specified by Value to a Null-terminated Unicode
+ string specified by Buffer containing at most Width characters. No padding of spaces
+ is ever performed. If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The number of Unicode characters in Buffer is returned not including the Null-terminator.
+ If the conversion contains more than Width characters, then only the first
+ Width characters are returned, and the total number of characters
+ required to perform the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If HEX_RADIX is set in Flags, then the output buffer will be
+ formatted in hexadecimal format.
+ If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param Flags The bitmask of flags that specify left justification, zero pad, and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of Unicode characters to place in Buffer, not including
+ the Null-terminator.
+
+ @return The number of Unicode characters in Buffer not including the Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeValueToString (
+ IN OUT CHAR16 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ )
+{
+ ASSERT_UNICODE_BUFFER(Buffer);
+ return BasePrintLibConvertValueToString ((CHAR8 *)Buffer, Flags, Value, Width, 2);
+}
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on
+ the contents of the format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiVSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, 0, FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return AsciiVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on
+ the contents of the format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiVSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ )
+{
+ ASSERT_UNICODE_BUFFER (FormatString);
+ return BasePrintLibVSPrint (StartOfBuffer, BufferSize, FORMAT_UNICODE, (CHAR8 *)FormatString, Marker);
+}
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ VA_START (Marker, FormatString);
+ return AsciiVSPrintUnicodeFormat (StartOfBuffer, BufferSize, FormatString, Marker);
+}
+
+
+/**
+ Converts a decimal value to a Null-terminated ASCII string.
+
+ Converts the decimal number specified by Value to a Null-terminated ASCII string
+ specified by Buffer containing at most Width characters. No padding of spaces
+ is ever performed.
+ If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The number of ASCII characters in Buffer is returned not including the Null-terminator.
+ If the conversion contains more than Width characters, then only the first Width
+ characters are returned, and the total number of characters required to perform
+ the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If HEX_RADIX is set in Flags, then the output buffer will be
+ formatted in hexadecimal format.
+ If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+
+ If Buffer is NULL, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param Flags The bitmask of flags that specify left justification, zero pad, and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of ASCII characters to place in Buffer, not including
+ the Null-terminator.
+
+ @return The number of ASCII characters in Buffer not including the Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ )
+{
+ return BasePrintLibConvertValueToString (Buffer, Flags, Value, Width, 1);
+}
+
diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.c b/MdePkg/Library/BasePrintLib/PrintLibInternal.c new file mode 100644 index 0000000000..72c05e4dc5 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.c @@ -0,0 +1,214 @@ +/** @file
+ Print Library worker functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLibInternal.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "PrintLibInternal.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 mHexStr[] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
+
+
+/**
+ Internal function that places the character into the Buffer.
+
+ Internal function that places ASCII or Unicode character into the Buffer.
+
+ @param Buffer Buffer to place the Unicode or ASCII string.
+ @param EndBuffer The end of the input Buffer. No characters will be
+ placed after that.
+ @param Length Count of character to be placed into Buffer.
+ @param Character Character to be placed into Buffer.
+ @param Increment Character increment in Buffer.
+
+ @return Number of characters printed.
+
+**/
+CHAR8 *
+BasePrintLibFillBuffer (
+ CHAR8 *Buffer,
+ CHAR8 *EndBuffer,
+ INTN Length,
+ UINTN Character,
+ INTN Increment
+ )
+{
+ INTN Index;
+
+ for (Index = 0; Index < Length && Buffer < EndBuffer; Index++) {
+ *Buffer = (CHAR8) Character;
+ *(Buffer + 1) = (CHAR8) (Character >> 8);
+ Buffer += Increment;
+ }
+ return Buffer;
+}
+
+/**
+ Internal function that convert a decimal number to a string in Buffer.
+
+ Print worker function that convert a decimal number to a string in Buffer.
+
+ @param Buffer Location to place the Unicode or ASCII string of Value.
+ @param Value Value to convert to a Decimal or Hexidecimal string in Buffer.
+ @param Radix Radix of the value
+
+ @return Number of characters printed.
+
+**/
+UINTN
+EFIAPI
+BasePrintLibValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN INT64 Value,
+ IN UINTN Radix
+ )
+{
+ UINTN Digits;
+ UINT32 Remainder;
+
+ //
+ // Loop to convert one digit at a time in reverse order
+ //
+ *(Buffer++) = 0;
+ Digits = 0;
+ do {
+ Value = (INT64)DivU64x32Remainder ((UINT64)Value, (UINT32)Radix, &Remainder);
+ *(Buffer++) = mHexStr[Remainder];
+ Digits++;
+ } while (Value != 0);
+ return Digits;
+}
+
+/**
+ Internal function that converts a decimal value to a Null-terminated string.
+
+ Converts the decimal number specified by Value to a Null-terminated
+ string specified by Buffer containing at most Width characters.
+ If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The number of characters in Buffer is returned not including the Null-terminator.
+ If the conversion contains more than Width characters, then only the first
+ Width characters are returned, and the total number of characters
+ required to perform the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If HEX_RADIX is set in Flags, then the output buffer will be formatted in hexadecimal format.
+ If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+
+ If Buffer is NULL, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ string.
+ @param Flags The bitmask of flags that specify left justification, zero pad,
+ and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of characters to place in Buffer, not including
+ the Null-terminator.
+ @param Increment Character increment in Buffer.
+
+ @return The number of characters in Buffer not including the Null-terminator.
+
+**/
+UINTN
+BasePrintLibConvertValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width,
+ IN UINTN Increment
+ )
+{
+ CHAR8 *OriginalBuffer;
+ CHAR8 *EndBuffer;
+ CHAR8 ValueBuffer[MAXIMUM_VALUE_CHARACTERS];
+ UINTN Count;
+ UINTN Digits;
+ UINTN Index;
+ UINTN Radix;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (Width < MAXIMUM_VALUE_CHARACTERS);
+ //
+ // Make sure Flags can only contain supported bits.
+ //
+ ASSERT ((Flags & ~(LEFT_JUSTIFY | COMMA_TYPE | PREFIX_ZERO | RADIX_HEX)) == 0);
+
+ //
+ // If both COMMA_TYPE and HEX_RADIX are set, then ASSERT ()
+ //
+ ASSERT (((Flags & COMMA_TYPE) != 0 && (Flags & RADIX_HEX) != 0) == FALSE);
+
+ OriginalBuffer = Buffer;
+
+ if (Width == 0 || (Flags & COMMA_TYPE) != 0) {
+ Flags &= (~PREFIX_ZERO);
+ }
+
+ if (Width == 0) {
+ Width = MAXIMUM_VALUE_CHARACTERS - 1;
+ }
+ //
+ // Set the tag for the end of the input Buffer.
+ //
+ EndBuffer = Buffer + Width * Increment;
+
+ if ((Value < 0) && ((Flags & RADIX_HEX) == 0)) {
+ Value = -Value;
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, '-', Increment);
+ Width--;
+ }
+
+ Radix = ((Flags & RADIX_HEX) == 0)? 10 : 16;
+ Count = BasePrintLibValueToString (ValueBuffer, Value, Radix);
+
+ if ((Flags & PREFIX_ZERO) != 0) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Count, '0', Increment);
+ }
+
+ Digits = Count % 3;
+ if (Digits != 0) {
+ Digits = 3 - Digits;
+ }
+ for (Index = 0; Index < Count; Index++) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ValueBuffer[Count - Index], Increment);
+ if ((Flags & COMMA_TYPE) != 0) {
+ Digits++;
+ if (Digits == 3) {
+ Digits = 0;
+ if ((Index + 1) < Count) {
+ Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ',', Increment);
+ }
+ }
+ }
+ }
+
+ BasePrintLibFillBuffer (Buffer, EndBuffer + Increment, 1, 0, Increment);
+
+ return ((Buffer - OriginalBuffer) / Increment);
+}
+
diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.h b/MdePkg/Library/BasePrintLib/PrintLibInternal.h new file mode 100644 index 0000000000..164de3c3d0 --- /dev/null +++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.h @@ -0,0 +1,206 @@ +/** @file
+ Print Library Internal Functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLibInternal.h
+
+**/
+
+#ifndef __PRINT_LIB_INTERNAL_H
+#define __PRINT_LIB_INTERNAL_H
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Print primitives
+//
+//#define LEFT_JUSTIFY 0x01
+#define PREFIX_SIGN 0x02
+#define PREFIX_BLANK 0x04
+//#define COMMA_TYPE 0x08
+#define LONG_TYPE 0x10
+//#define PREFIX_ZERO 0x20
+#define OUTPUT_UNICODE 0x40
+//#define RADIX_HEX 0x80
+#define FORMAT_UNICODE 0x100
+#define PAD_TO_WIDTH 0x200
+#define ARGUMENT_UNICODE 0x400
+#define PRECISION 0x800
+#define ARGUMENT_REVERSED 0x1000
+
+//
+// Record date and time information
+//
+typedef struct {
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Day;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
+ UINT8 Pad1;
+ UINT32 Nanosecond;
+ INT16 TimeZone;
+ UINT8 Daylight;
+ UINT8 Pad2;
+} TIME;
+
+/**
+ Worker function that produces a Null-terminated string in an output buffer
+ based on a Null-terminated format string and a VA_LIST argument list.
+
+ VSPrint function to process format and place the results in Buffer. Since a
+ VA_LIST is used this rountine allows the nesting of Vararg routines. Thus
+ this is the main print working routine.
+
+ @param Buffer Character buffer to print the results of the parsing
+ of Format into.
+ @param BufferSize Maximum number of characters to put into buffer.
+ @param Flags Intial flags value.
+ Can only have FORMAT_UNICODE and OUTPUT_UNICODE set.
+ @param Format Null-terminated format string.
+ @param Marker Vararg list consumed by processing Format.
+
+ @return Number of characters printed not including the Null-terminator.
+
+**/
+UINTN
+BasePrintLibVSPrint (
+ OUT CHAR8 *Buffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *Format,
+ IN VA_LIST Marker
+ );
+
+/**
+ Worker function that produces a Null-terminated string in an output buffer
+ based on a Null-terminated format string and variable argument list.
+
+ VSPrint function to process format and place the results in Buffer. Since a
+ VA_LIST is used this rountine allows the nesting of Vararg routines. Thus
+ this is the main print working routine
+
+ @param Buffer Character buffer to print the results of the parsing
+ of Format into.
+ @param BufferSize Maximum number of characters to put into buffer.
+ Zero means no limit.
+ @param Flags Intial flags value.
+ Can only have FORMAT_UNICODE and OUTPUT_UNICODE set
+ @param FormatString Null-terminated format string.
+
+ @return Number of characters printed.
+
+**/
+UINTN
+BasePrintLibSPrint (
+ OUT CHAR8 *Buffer,
+ IN UINTN BufferSize,
+ IN UINTN Flags,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+/**
+ Internal function that places the character into the Buffer.
+
+ Internal function that places ASCII or Unicode character into the Buffer.
+
+ @param Buffer Buffer to place the Unicode or ASCII string.
+ @param EndBuffer The end of the input Buffer. No characters will be
+ placed after that.
+ @param Length Count of character to be placed into Buffer.
+ @param Character Character to be placed into Buffer.
+ @param Increment Character increment in Buffer.
+
+ @return Number of characters printed.
+
+**/
+CHAR8 *
+BasePrintLibFillBuffer (
+ CHAR8 *Buffer,
+ CHAR8 *EndBuffer,
+ INTN Length,
+ UINTN Character,
+ INTN Increment
+ );
+
+/**
+ Internal function that convert a decimal number to a string in Buffer.
+
+ Print worker function that convert a decimal number to a string in Buffer.
+
+ @param Buffer Location to place the Unicode or ASCII string of Value.
+ @param Value Value to convert to a Decimal or Hexidecimal string in Buffer.
+ @param Radix Radix of the value
+
+ @return Number of characters printed.
+
+**/
+UINTN
+EFIAPI
+BasePrintLibValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN INT64 Value,
+ IN UINTN Radix
+ );
+
+/**
+ Internal function that converts a decimal value to a Null-terminated string.
+
+ Converts the decimal number specified by Value to a Null-terminated
+ string specified by Buffer containing at most Width characters.
+ If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The total number of characters placed in Buffer is returned.
+ If the conversion contains more than Width characters, then only the first
+ Width characters are returned, and the total number of characters
+ required to perform the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If Value is < 0, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+
+ If Buffer is NULL, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ string.
+ @param Flags The bitmask of flags that specify left justification, zero pad,
+ and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of characters to place in Buffer, not including
+ the Null-terminator.
+ @param Increment Character increment in Buffer.
+
+ @return Total number of characters required to perform the conversion.
+
+**/
+UINTN
+BasePrintLibConvertValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width,
+ IN UINTN Increment
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf new file mode 100644 index 0000000000..5a48211afc --- /dev/null +++ b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf @@ -0,0 +1,83 @@ +#/** @file
+# Timer library NULL template implementaton
+#
+# A non-functional instance of the Timer Library that can be used as a template
+# for the implementation of a functional timer library instance. This library instance can
+# also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer
+# services as well as EBC modules that require timer services
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseTimerLibNullTemplate
+ FILE_GUID = f4731d79-537e-4505-bd52-c03f9b1f6b89
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = TimerLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ TimerLibNull.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ DebugLib
+
diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa new file mode 100644 index 0000000000..6861a9faac --- /dev/null +++ b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa @@ -0,0 +1,45 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BaseTimerLibNullTemplate</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>f4731d79-537e-4505-bd52-c03f9b1f6b89</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Timer library NULL template implementaton</Abstract>
+ <Description>A non-functional instance of the Timer Library that can be used as a template
+ for the implementation of a functional timer library instance. This library instance can
+ also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer
+ services as well as EBC modules that require timer services</Description>
+ <Copyright>Copyright (c) 2007, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseTimerLibNullTemplate</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>TimerLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>TimerLibNull.c</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h b/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h new file mode 100644 index 0000000000..c65882cc18 --- /dev/null +++ b/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h @@ -0,0 +1,32 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/TimerLib.h>
+#include <Library/DebugLib.h>
+
+#endif
diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c b/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c new file mode 100644 index 0000000000..caca0c3cc2 --- /dev/null +++ b/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c @@ -0,0 +1,116 @@ +/** @file
+ A non-functional instance of the Timer Library.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: TimerLibNull.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+/**
+ Stalls the CPU for at least the given number of microseconds.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ )
+{
+ ASSERT (FALSE);
+ return MicroSeconds;
+}
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return NanoSeconds
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ Retrieves the current value of a 64-bit free running performance counter. The
+ counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ OUT UINT64 *StartValue, OPTIONAL
+ OUT UINT64 *EndValue OPTIONAL
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c new file mode 100644 index 0000000000..15917a1c12 --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c @@ -0,0 +1,800 @@ +/** @file
+ UEFI Decompress Library.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDecompressLib.c
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+#include "BaseUefiDecompressLibInternals.h"
+
+/**
+ Read NumOfBit of bits from source into mBitBuf
+
+ Shift mBitBuf NumOfBits left. Read in NumOfBits of bits from source.
+
+ @param Sd The global scratch data
+ @param NumOfBits The number of bits to shift and read.
+
+**/
+VOID
+FillBuf (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ )
+{
+ //
+ // Left shift NumOfBits of bits in advance
+ //
+ Sd->mBitBuf = (UINT32) (Sd->mBitBuf << NumOfBits);
+
+ //
+ // Copy data needed in bytes into mSbuBitBuf
+ //
+ while (NumOfBits > Sd->mBitCount) {
+
+ Sd->mBitBuf |= (UINT32) (Sd->mSubBitBuf << (NumOfBits = (UINT16) (NumOfBits - Sd->mBitCount)));
+
+ if (Sd->mCompSize > 0) {
+ //
+ // Get 1 byte into SubBitBuf
+ //
+ Sd->mCompSize--;
+ Sd->mSubBitBuf = Sd->mSrcBase[Sd->mInBuf++];
+ Sd->mBitCount = 8;
+
+ } else {
+ //
+ // No more bits from the source, just pad zero bit.
+ //
+ Sd->mSubBitBuf = 0;
+ Sd->mBitCount = 8;
+
+ }
+ }
+
+ //
+ // Caculate additional bit count read to update mBitCount
+ //
+ Sd->mBitCount = (UINT16) (Sd->mBitCount - NumOfBits);
+
+ //
+ // Copy NumOfBits of bits from mSubBitBuf into mBitBuf
+ //
+ Sd->mBitBuf |= Sd->mSubBitBuf >> Sd->mBitCount;
+}
+
+/**
+ Get NumOfBits of bits out from mBitBuf
+
+ Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent
+ NumOfBits of bits from source. Returns NumOfBits of bits that are
+ popped out.
+
+ @param Sd The global scratch data.
+ @param NumOfBits The number of bits to pop and read.
+
+ @return The bits that are popped out.
+
+**/
+UINT32
+GetBits (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ )
+{
+ UINT32 OutBits;
+
+ //
+ // Pop NumOfBits of Bits from Left
+ //
+ OutBits = (UINT32) (Sd->mBitBuf >> (BITBUFSIZ - NumOfBits));
+
+ //
+ // Fill up mBitBuf from source
+ //
+ FillBuf (Sd, NumOfBits);
+
+ return OutBits;
+}
+
+/**
+ Creates Huffman Code mapping table according to code length array.
+
+ Creates Huffman Code mapping table for Extra Set, Char&Len Set
+ and Position Set according to code length array.
+
+ @param Sd The global scratch data
+ @param NumOfChar Number of symbols in the symbol set
+ @param BitLen Code length array
+ @param TableBits The width of the mapping table
+ @param Table The table
+
+ @retval 0 OK.
+ @retval BAD_TABLE The table is corrupted.
+
+**/
+UINT16
+MakeTable (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfChar,
+ IN UINT8 *BitLen,
+ IN UINT16 TableBits,
+ OUT UINT16 *Table
+ )
+{
+ UINT16 Count[17];
+ UINT16 Weight[17];
+ UINT16 Start[18];
+ UINT16 *Pointer;
+ UINT16 Index3;
+ volatile UINT16 Index;
+ UINT16 Len;
+ UINT16 Char;
+ UINT16 JuBits;
+ UINT16 Avail;
+ UINT16 NextCode;
+ UINT16 Mask;
+ UINT16 WordOfStart;
+ UINT16 WordOfCount;
+
+
+ for (Index = 1; Index <= 16; Index++) {
+ Count[Index] = 0;
+ }
+
+ for (Index = 0; Index < NumOfChar; Index++) {
+ Count[BitLen[Index]]++;
+ }
+
+ Start[1] = 0;
+
+ for (Index = 1; Index <= 16; Index++) {
+ WordOfStart = Start[Index];
+ WordOfCount = Count[Index];
+ Start[Index + 1] = (UINT16) (WordOfStart + (WordOfCount << (16 - Index)));
+ }
+
+ if (Start[17] != 0) {
+ /*(1U << 16)*/
+ return (UINT16) BAD_TABLE;
+ }
+
+ JuBits = (UINT16) (16 - TableBits);
+
+ for (Index = 1; Index <= TableBits; Index++) {
+ Start[Index] >>= JuBits;
+ Weight[Index] = (UINT16) (1U << (TableBits - Index));
+ }
+
+ while (Index <= 16) {
+ Weight[Index] = (UINT16) (1U << (16 - Index));
+ Index++;
+ }
+
+ Index = (UINT16) (Start[TableBits + 1] >> JuBits);
+
+ if (Index != 0) {
+ Index3 = (UINT16) (1U << TableBits);
+ while (Index != Index3) {
+ Table[Index++] = 0;
+ }
+ }
+
+ Avail = NumOfChar;
+ Mask = (UINT16) (1U << (15 - TableBits));
+
+ for (Char = 0; Char < NumOfChar; Char++) {
+
+ Len = BitLen[Char];
+ if (Len == 0) {
+ continue;
+ }
+
+ NextCode = (UINT16) (Start[Len] + Weight[Len]);
+
+ if (Len <= TableBits) {
+
+ for (Index = Start[Len]; Index < NextCode; Index++) {
+ Table[Index] = Char;
+ }
+
+ } else {
+
+ Index3 = Start[Len];
+ Pointer = &Table[Index3 >> JuBits];
+ Index = (UINT16) (Len - TableBits);
+
+ while (Index != 0) {
+ if (*Pointer == 0) {
+ Sd->mRight[Avail] = Sd->mLeft[Avail] = 0;
+ *Pointer = Avail++;
+ }
+
+ if (Index3 & Mask) {
+ Pointer = &Sd->mRight[*Pointer];
+ } else {
+ Pointer = &Sd->mLeft[*Pointer];
+ }
+
+ Index3 <<= 1;
+ Index--;
+ }
+
+ *Pointer = Char;
+
+ }
+
+ Start[Len] = NextCode;
+ }
+ //
+ // Succeeds
+ //
+ return 0;
+}
+
+/**
+ Decodes a position value.
+
+ Get a position value according to Position Huffman Table.
+
+ @param Sd the global scratch data
+
+ @return The position value decoded.
+
+**/
+UINT32
+DecodeP (
+ IN SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Val;
+ UINT32 Mask;
+ UINT32 Pos;
+
+ Val = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];
+
+ if (Val >= MAXNP) {
+ Mask = 1U << (BITBUFSIZ - 1 - 8);
+
+ do {
+
+ if (Sd->mBitBuf & Mask) {
+ Val = Sd->mRight[Val];
+ } else {
+ Val = Sd->mLeft[Val];
+ }
+
+ Mask >>= 1;
+ } while (Val >= MAXNP);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mPTLen[Val]);
+
+ Pos = Val;
+ if (Val > 1) {
+ Pos = (UINT32) ((1U << (Val - 1)) + GetBits (Sd, (UINT16) (Val - 1)));
+ }
+
+ return Pos;
+}
+
+/**
+ Reads code lengths for the Extra Set or the Position Set.
+
+ Read in the Extra Set or Pointion Set Length Arrary, then
+ generate the Huffman code mapping for them.
+
+ @param Sd The global scratch data.
+ @param nn Number of symbols.
+ @param nbit Number of bits needed to represent nn.
+ @param Special The special symbol that needs to be taken care of.
+
+ @retval 0 OK.
+ @retval BAD_TABLE Table is corrupted.
+
+**/
+UINT16
+ReadPTLen (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 nn,
+ IN UINT16 nbit,
+ IN UINT16 Special
+ )
+{
+ UINT16 Number;
+ UINT16 CharC;
+ volatile UINT16 Index;
+ UINT32 Mask;
+
+ //
+ // Read Extra Set Code Length Array size
+ //
+ Number = (UINT16) GetBits (Sd, nbit);
+
+ if (Number == 0) {
+ //
+ // This represents only Huffman code used
+ //
+ CharC = (UINT16) GetBits (Sd, nbit);
+
+ for (Index = 0; Index < 256; Index++) {
+ Sd->mPTTable[Index] = CharC;
+ }
+
+ for (Index = 0; Index < nn; Index++) {
+ Sd->mPTLen[Index] = 0;
+ }
+
+ return 0;
+ }
+
+ Index = 0;
+
+ while (Index < Number) {
+
+ CharC = (UINT16) (Sd->mBitBuf >> (BITBUFSIZ - 3));
+
+ //
+ // If a code length is less than 7, then it is encoded as a 3-bit
+ // value. Or it is encoded as a series of "1"s followed by a
+ // terminating "0". The number of "1"s = Code length - 4.
+ //
+ if (CharC == 7) {
+ Mask = 1U << (BITBUFSIZ - 1 - 3);
+ while (Mask & Sd->mBitBuf) {
+ Mask >>= 1;
+ CharC += 1;
+ }
+ }
+
+ FillBuf (Sd, (UINT16) ((CharC < 7) ? 3 : CharC - 3));
+
+ Sd->mPTLen[Index++] = (UINT8) CharC;
+
+ //
+ // For Code&Len Set,
+ // After the third length of the code length concatenation,
+ // a 2-bit value is used to indicated the number of consecutive
+ // zero lengths after the third length.
+ //
+ if (Index == Special) {
+ CharC = (UINT16) GetBits (Sd, 2);
+ while ((INT16) (--CharC) >= 0) {
+ Sd->mPTLen[Index++] = 0;
+ }
+ }
+ }
+
+ while (Index < nn) {
+ Sd->mPTLen[Index++] = 0;
+ }
+
+ return MakeTable (Sd, nn, Sd->mPTLen, 8, Sd->mPTTable);
+}
+
+/**
+ Reads code lengths for Char&Len Set.
+
+ Read in and decode the Char&Len Set Code Length Array, then
+ generate the Huffman Code mapping table for the Char&Len Set.
+
+ @param Sd the global scratch data
+
+**/
+VOID
+ReadCLen (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Number;
+ UINT16 CharC;
+ volatile UINT16 Index;
+ UINT32 Mask;
+
+ Number = (UINT16) GetBits (Sd, CBIT);
+
+ if (Number == 0) {
+ //
+ // This represents only Huffman code used
+ //
+ CharC = (UINT16) GetBits (Sd, CBIT);
+
+ for (Index = 0; Index < NC; Index++) {
+ Sd->mCLen[Index] = 0;
+ }
+
+ for (Index = 0; Index < 4096; Index++) {
+ Sd->mCTable[Index] = CharC;
+ }
+
+ return ;
+ }
+
+ Index = 0;
+ while (Index < Number) {
+ CharC = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];
+ if (CharC >= NT) {
+ Mask = 1U << (BITBUFSIZ - 1 - 8);
+
+ do {
+
+ if (Mask & Sd->mBitBuf) {
+ CharC = Sd->mRight[CharC];
+ } else {
+ CharC = Sd->mLeft[CharC];
+ }
+
+ Mask >>= 1;
+
+ } while (CharC >= NT);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mPTLen[CharC]);
+
+ if (CharC <= 2) {
+
+ if (CharC == 0) {
+ CharC = 1;
+ } else if (CharC == 1) {
+ CharC = (UINT16) (GetBits (Sd, 4) + 3);
+ } else if (CharC == 2) {
+ CharC = (UINT16) (GetBits (Sd, CBIT) + 20);
+ }
+
+ while ((INT16) (--CharC) >= 0) {
+ Sd->mCLen[Index++] = 0;
+ }
+
+ } else {
+
+ Sd->mCLen[Index++] = (UINT8) (CharC - 2);
+
+ }
+ }
+
+ while (Index < NC) {
+ Sd->mCLen[Index++] = 0;
+ }
+
+ MakeTable (Sd, NC, Sd->mCLen, 12, Sd->mCTable);
+
+ return ;
+}
+
+/**
+ Decode a character/length value.
+
+ Read one value from mBitBuf, Get one code from mBitBuf. If it is at block boundary, generates
+ Huffman code mapping table for Extra Set, Code&Len Set and
+ Position Set.
+
+ @param Sd The global scratch data.
+
+ @return The value decoded.
+
+**/
+UINT16
+DecodeC (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 Index2;
+ UINT32 Mask;
+
+ if (Sd->mBlockSize == 0) {
+ //
+ // Starting a new block
+ // Read BlockSize from block header
+ //
+ Sd->mBlockSize = (UINT16) GetBits (Sd, 16);
+
+ //
+ // Read in the Extra Set Code Length Arrary,
+ // Generate the Huffman code mapping table for Extra Set.
+ //
+ Sd->mBadTableFlag = ReadPTLen (Sd, NT, TBIT, 3);
+ if (Sd->mBadTableFlag != 0) {
+ return 0;
+ }
+
+ //
+ // Read in and decode the Char&Len Set Code Length Arrary,
+ // Generate the Huffman code mapping table for Char&Len Set.
+ //
+ ReadCLen (Sd);
+
+ //
+ // Read in the Position Set Code Length Arrary,
+ // Generate the Huffman code mapping table for the Position Set.
+ //
+ Sd->mBadTableFlag = ReadPTLen (Sd, MAXNP, Sd->mPBit, (UINT16) (-1));
+ if (Sd->mBadTableFlag != 0) {
+ return 0;
+ }
+ }
+
+ //
+ // Get one code according to Code&Set Huffman Table
+ //
+ Sd->mBlockSize--;
+ Index2 = Sd->mCTable[Sd->mBitBuf >> (BITBUFSIZ - 12)];
+
+ if (Index2 >= NC) {
+ Mask = 1U << (BITBUFSIZ - 1 - 12);
+
+ do {
+ if (Sd->mBitBuf & Mask) {
+ Index2 = Sd->mRight[Index2];
+ } else {
+ Index2 = Sd->mLeft[Index2];
+ }
+
+ Mask >>= 1;
+ } while (Index2 >= NC);
+ }
+ //
+ // Advance what we have read
+ //
+ FillBuf (Sd, Sd->mCLen[Index2]);
+
+ return Index2;
+}
+
+/**
+ Decode the source data and put the resulting data into the destination buffer.
+
+ Decode the source data and put the resulting data into the destination buffer.
+
+ @param Sd The global scratch data
+
+**/
+VOID
+Decode (
+ SCRATCH_DATA *Sd
+ )
+{
+ UINT16 BytesRemain;
+ UINT32 DataIdx;
+ UINT16 CharC;
+
+ BytesRemain = (UINT16) (-1);
+
+ DataIdx = 0;
+
+ for (;;) {
+ //
+ // Get one code from mBitBuf
+ //
+ CharC = DecodeC (Sd);
+ if (Sd->mBadTableFlag != 0) {
+ goto Done;
+ }
+
+ if (CharC < 256) {
+ //
+ // Process an Original character
+ //
+ if (Sd->mOutBuf >= Sd->mOrigSize) {
+ goto Done;
+ } else {
+ //
+ // Write orignal character into mDstBase
+ //
+ Sd->mDstBase[Sd->mOutBuf++] = (UINT8) CharC;
+ }
+
+ } else {
+ //
+ // Process a Pointer
+ //
+ CharC = (UINT16) (CharC - (UINT8_MAX + 1 - THRESHOLD));
+
+ //
+ // Get string length
+ //
+ BytesRemain = CharC;
+
+ //
+ // Locate string position
+ //
+ DataIdx = Sd->mOutBuf - DecodeP (Sd) - 1;
+
+ //
+ // Write BytesRemain of bytes into mDstBase
+ //
+ BytesRemain--;
+ while ((INT16) (BytesRemain) >= 0) {
+ Sd->mDstBase[Sd->mOutBuf++] = Sd->mDstBase[DataIdx++];
+ if (Sd->mOutBuf >= Sd->mOrigSize) {
+ goto Done;
+ }
+
+ BytesRemain--;
+ }
+ }
+ }
+
+Done:
+ return ;
+}
+
+/**
+ Retrieves the size of the uncompressed buffer and the size of the scratch buffer.
+
+ Retrieves the size of the uncompressed buffer and the temporary scratch buffer
+ required to decompress the buffer specified by Source and SourceSize.
+ If the size of the uncompressed buffer or the size of the scratch buffer cannot
+ be determined from the compressed data specified by Source and SourceData,
+ then RETURN_INVALID_PARAMETER is returned. Otherwise, the size of the uncompressed
+ buffer is returned in DestinationSize, the size of the scratch buffer is returned
+ in ScratchSize, and RETURN_SUCCESS is returned.
+ This function does not have scratch buffer available to perform a thorough
+ checking of the validity of the source data. It just retrieves the "Original Size"
+ field from the beginning bytes of the source data and output it as DestinationSize.
+ And ScratchSize is specific to the decompression implementation.
+
+ If Source is NULL, then ASSERT().
+ If DestinationSize is NULL, then ASSERT().
+ If ScratchSize is NULL, then ASSERT().
+
+ @param Source The source buffer containing the compressed data.
+ @param SourceSize The size, in bytes, of the source buffer.
+ @param DestinationSize A pointer to the size, in bytes, of the uncompressed buffer
+ that will be generated when the compressed buffer specified
+ by Source and SourceSize is decompressed..
+ @param ScratchSize A pointer to the size, in bytes, of the scratch buffer that
+ is required to decompress the compressed buffer specified
+ by Source and SourceSize.
+
+ @retval RETURN_SUCCESS The size of destination buffer and the size of scratch
+ buffer are successull retrieved.
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted
+
+**/
+RETURN_STATUS
+EFIAPI
+UefiDecompressGetInfo (
+ IN CONST VOID *Source,
+ IN UINT32 SourceSize,
+ OUT UINT32 *DestinationSize,
+ OUT UINT32 *ScratchSize
+ )
+{
+ UINT32 CompressedSize;
+
+ ASSERT (Source != NULL);
+ ASSERT (DestinationSize != NULL);
+ ASSERT (ScratchSize != NULL);
+
+ *ScratchSize = sizeof (SCRATCH_DATA);
+
+ if (SourceSize < 8) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ CopyMem (&CompressedSize, Source, sizeof (UINT32));
+ CopyMem (DestinationSize, (VOID *)((UINT8 *)Source + 4), sizeof (UINT32));
+
+ if (SourceSize < (CompressedSize + 8)) {
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Decompresses a compressed source buffer.
+
+ This function is designed so that the decompression algorithm can be implemented
+ without using any memory services. As a result, this function is not allowed to
+ call any memory allocation services in its implementation. It is the caller's r
+ esponsibility to allocate and free the Destination and Scratch buffers.
+ If the compressed source data specified by Source is sucessfully decompressed
+ into Destination, then RETURN_SUCCESS is returned. If the compressed source data
+ specified by Source is not in a valid compressed data format,
+ then RETURN_INVALID_PARAMETER is returned.
+
+ If Source is NULL, then ASSERT().
+ If Destination is NULL, then ASSERT().
+ If the required scratch buffer size > 0 and Scratch is NULL, then ASSERT().
+
+ @param Source The source buffer containing the compressed data.
+ @param Destination The destination buffer to store the decompressed data
+ @param Scratch A temporary scratch buffer that is used to perform the decompression.
+ This is an optional parameter that may be NULL if the
+ required scratch buffer size is 0.
+
+ @retval RETURN_SUCCESS Decompression is successfull
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted
+
+**/
+RETURN_STATUS
+EFIAPI
+UefiDecompress (
+ IN CONST VOID *Source,
+ IN OUT VOID *Destination,
+ IN OUT VOID *Scratch
+ )
+{
+ volatile UINT32 Index;
+ UINT32 CompSize;
+ UINT32 OrigSize;
+ SCRATCH_DATA *Sd;
+ CONST UINT8 *Src;
+ UINT8 *Dst;
+
+ ASSERT (Source != NULL);
+ ASSERT (Destination != NULL);
+ ASSERT (Scratch != NULL);
+
+ Src = Source;
+ Dst = Destination;
+
+ Sd = (SCRATCH_DATA *) Scratch;
+
+ CompSize = Src[0] + (Src[1] << 8) + (Src[2] << 16) + (Src[3] << 24);
+ OrigSize = Src[4] + (Src[5] << 8) + (Src[6] << 16) + (Src[7] << 24);
+
+ //
+ // If compressed file size is 0, return
+ //
+ if (OrigSize == 0) {
+ return RETURN_SUCCESS;
+ }
+
+ Src = Src + 8;
+
+ for (Index = 0; Index < sizeof (SCRATCH_DATA); Index++) {
+ ((UINT8 *) Sd)[Index] = 0;
+ }
+ //
+ // The length of the field 'Position Set Code Length Array Size' in Block Header.
+ // For EFI 1.1 de/compression algorithm(Version 1), mPBit = 4
+ // For Tiano de/compression algorithm(Version 2), mPBit = 5
+ //
+ Sd->mPBit = 4;
+ Sd->mSrcBase = (UINT8 *)Src;
+ Sd->mDstBase = Dst;
+ //
+ // CompSize and OrigSize are caculated in bytes
+ //
+ Sd->mCompSize = CompSize;
+ Sd->mOrigSize = OrigSize;
+
+ //
+ // Fill the first BITBUFSIZ bits
+ //
+ FillBuf (Sd, BITBUFSIZ);
+
+ //
+ // Decompress it
+ //
+ Decode (Sd);
+
+ if (Sd->mBadTableFlag != 0) {
+ //
+ // Something wrong with the source
+ //
+ return RETURN_INVALID_PARAMETER;
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf new file mode 100644 index 0000000000..979c95b446 --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf @@ -0,0 +1,82 @@ +#/** @file
+# Component description file for Base Uefi Decompress Library
+#
+# UEFI Decompress Library implementation.
+# Copyright (c) 2007, Intel Corporation.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseUefiDecompressLib
+ FILE_GUID = 9ae5147d-b240-467f-a484-b024fdc42ee0
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = UefiDecompressLib
+ EDK_RELEASE_VERSION = 0x00020000
+ EFI_SPECIFICATION_VERSION = 0x00020000
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources.common]
+ BaseUefiDecompressLibInternals.h
+ BaseUefiDecompressLib.c
+ CommonHeader.h
+
+
+################################################################################
+#
+# Includes Section - list of Include locations that are required for
+# this module.
+#
+################################################################################
+
+[Includes]
+ $(WORKSPACE)/MdePkg\Include/Library
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+
diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa new file mode 100644 index 0000000000..f8bfc3f754 --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <MsaHeader>
+ <ModuleName>BaseUefiDecompressLib</ModuleName>
+ <ModuleType>BASE</ModuleType>
+ <GuidValue>9ae5147d-b240-467f-a484-b024fdc42ee0</GuidValue>
+ <Version>1.0</Version>
+ <Abstract>Component description file for Base Uefi Decompress Library</Abstract>
+ <Description>UEFI Decompress Library implementation.</Description>
+ <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>
+ <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+ <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
+ </MsaHeader>
+ <ModuleDefinitions>
+ <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+ <BinaryModule>false</BinaryModule>
+ <OutputFileBasename>BaseUefiDecompressLib</OutputFileBasename>
+ </ModuleDefinitions>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_PRODUCED">
+ <Keyword>UefiDecompressLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>DebugLib</Keyword>
+ </LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">
+ <Keyword>BaseMemoryLib</Keyword>
+ </LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>BaseUefiDecompressLib.c</Filename>
+ <Filename>BaseUefiDecompressLibInternals.h</Filename>
+ </SourceFiles>
+ <PackageDependencies>
+ <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+ </PackageDependencies>
+ <Externs>
+ <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+ <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+ </Externs>
+</ModuleSurfaceArea>
\ No newline at end of file diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h new file mode 100644 index 0000000000..f11df343eb --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h @@ -0,0 +1,220 @@ +/** @file
+ Internal include file for Base UEFI Decompress Libary.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseUefiDecompressLibInternals.h
+
+**/
+
+#ifndef __BASE_UEFI_DECOMPRESS_LIB_INTERNALS_H__
+#define __BASE_UEFI_DECOMPRESS_LIB_INTERNALS_H__
+
+//
+// Include common header file for this module.
+//
+#include "CommonHeader.h"
+
+//
+// Decompression algorithm begins here
+//
+#define BITBUFSIZ 32
+#define MAXMATCH 256
+#define THRESHOLD 3
+#define CODE_BIT 16
+#define BAD_TABLE - 1
+
+//
+// C: Char&Len Set; P: Position Set; T: exTra Set
+//
+#define NC (0xff + MAXMATCH + 2 - THRESHOLD)
+#define CBIT 9
+#define MAXPBIT 5
+#define TBIT 5
+#define MAXNP ((1U << MAXPBIT) - 1)
+#define NT (CODE_BIT + 3)
+#if NT > MAXNP
+#define NPT NT
+#else
+#define NPT MAXNP
+#endif
+
+typedef struct {
+ UINT8 *mSrcBase; ///< Starting address of compressed data
+ UINT8 *mDstBase; ///< Starting address of decompressed data
+ UINT32 mOutBuf;
+ UINT32 mInBuf;
+
+ UINT16 mBitCount;
+ UINT32 mBitBuf;
+ UINT32 mSubBitBuf;
+ UINT16 mBlockSize;
+ UINT32 mCompSize;
+ UINT32 mOrigSize;
+
+ UINT16 mBadTableFlag;
+
+ UINT16 mLeft[2 * NC - 1];
+ UINT16 mRight[2 * NC - 1];
+ UINT8 mCLen[NC];
+ UINT8 mPTLen[NPT];
+ UINT16 mCTable[4096];
+ UINT16 mPTTable[256];
+
+ ///
+ /// The length of the field 'Position Set Code Length Array Size' in Block Header.
+ /// For EFI 1.1 de/compression algorithm, mPBit = 4
+ /// For Tiano de/compression algorithm, mPBit = 5
+ ///
+ UINT8 mPBit;
+} SCRATCH_DATA;
+
+/**
+ Read NumOfBit of bits from source into mBitBuf
+
+ Shift mBitBuf NumOfBits left. Read in NumOfBits of bits from source.
+
+ @param Sd The global scratch data
+ @param NumOfBits The number of bits to shift and read.
+
+**/
+VOID
+FillBuf (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ );
+
+/**
+ Get NumOfBits of bits out from mBitBuf
+
+ Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent
+ NumOfBits of bits from source. Returns NumOfBits of bits that are
+ popped out.
+
+ @param Sd The global scratch data.
+ @param NumOfBits The number of bits to pop and read.
+
+ @return The bits that are popped out.
+
+**/
+UINT32
+GetBits (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfBits
+ );
+
+/**
+ Creates Huffman Code mapping table according to code length array.
+
+ Creates Huffman Code mapping table for Extra Set, Char&Len Set
+ and Position Set according to code length array.
+
+ @param Sd The global scratch data
+ @param NumOfChar Number of symbols in the symbol set
+ @param BitLen Code length array
+ @param TableBits The width of the mapping table
+ @param Table The table
+
+ @retval 0 OK.
+ @retval BAD_TABLE The table is corrupted.
+
+**/
+UINT16
+MakeTable (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 NumOfChar,
+ IN UINT8 *BitLen,
+ IN UINT16 TableBits,
+ OUT UINT16 *Table
+ );
+
+/**
+ Decodes a position value.
+
+ Get a position value according to Position Huffman Table.
+
+ @param Sd the global scratch data
+
+ @return The position value decoded.
+
+**/
+UINT32
+DecodeP (
+ IN SCRATCH_DATA *Sd
+ );
+
+/**
+ Reads code lengths for the Extra Set or the Position Set.
+
+ Read in the Extra Set or Pointion Set Length Arrary, then
+ generate the Huffman code mapping for them.
+
+ @param Sd The global scratch data.
+ @param nn Number of symbols.
+ @param nbit Number of bits needed to represent nn.
+ @param Special The special symbol that needs to be taken care of.
+
+ @retval 0 OK.
+ @retval BAD_TABLE Table is corrupted.
+
+**/
+UINT16
+ReadPTLen (
+ IN SCRATCH_DATA *Sd,
+ IN UINT16 nn,
+ IN UINT16 nbit,
+ IN UINT16 Special
+ );
+
+/**
+ Reads code lengths for Char&Len Set.
+
+ Read in and decode the Char&Len Set Code Length Array, then
+ generate the Huffman Code mapping table for the Char&Len Set.
+
+ @param Sd the global scratch data
+
+**/
+VOID
+ReadCLen (
+ SCRATCH_DATA *Sd
+ );
+
+/**
+ Decode a character/length value.
+
+ Read one value from mBitBuf, Get one code from mBitBuf. If it is at block boundary, generates
+ Huffman code mapping table for Extra Set, Code&Len Set and
+ Position Set.
+
+ @param Sd The global scratch data.
+
+ @return The value decoded.
+
+**/
+UINT16
+DecodeC (
+ SCRATCH_DATA *Sd
+ );
+
+/**
+ Decode the source data and put the resulting data into the destination buffer.
+
+ Decode the source data and put the resulting data into the destination buffer.
+
+ @param Sd The global scratch data
+
+**/
+VOID
+Decode (
+ SCRATCH_DATA *Sd
+ );
+
+#endif
diff --git a/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h b/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h new file mode 100644 index 0000000000..38ef4e221c --- /dev/null +++ b/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h @@ -0,0 +1,33 @@ +/**@file
+ Common header file shared by all source files.
+
+ This file includes package header files, library classes and protocol, PPI & GUID definitions.
+
+ Copyright (c) 2007, Intel Corporation.
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __COMMON_HEADER_H_
+#define __COMMON_HEADER_H_
+
+
+//
+// The package level header files this module uses
+//
+#include <Base.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+//
+// The Library classes this module consumes
+//
+#include <Library/UefiDecompressLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+
+#endif
|