diff options
author | Ronald Cron <ronald.cron@arm.com> | 2014-08-19 13:29:52 +0000 |
---|---|---|
committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-19 13:29:52 +0000 |
commit | 3402aac7d985bf8a9f9d3c639f3fe93609380513 (patch) | |
tree | 67b11334dc45181581aaaac236243fe72c7f614c /Omap35xxPkg/Include/Omap3530/Omap3530Dma.h | |
parent | 62d441fb17d59958bf00c4a1f3b52bf6a0b40b24 (diff) | |
download | edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.tar.gz edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.tar.bz2 edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.zip |
ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Omap35xxPkg/Include/Omap3530/Omap3530Dma.h')
-rwxr-xr-x | Omap35xxPkg/Include/Omap3530/Omap3530Dma.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h index 5db9a07972..a6e070dda3 100755 --- a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h @@ -56,9 +56,9 @@ #define DMA4_CSDP_BURST_EN32 (0x2 << 14)
#define DMA4_CSDP_BURST_EN64 (0x3 << 14)
-#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
+#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
#define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)
-#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
+#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
#define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18
#define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0
@@ -72,7 +72,7 @@ #define DMA4_CSDP_SRC_ENDIAN_BIG BIT21
#define DMA4_CSDP_SRC_ENDIAN_LITTLE 0
-// Channel Control
+// Channel Control
#define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f
#define DMA4_CCR_FS_ELEMENT (0 | 0)
@@ -104,7 +104,7 @@ #define DMA4_CCR_CONST_FILL_ENABLE BIT16
#define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
-
+
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24
#define DMA4_CSR_DROP BIT1
@@ -126,5 +126,5 @@ #define DMA4_CICR_ENABLE_ALL 0x1FBE
-#endif
+#endif
|