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| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-04-27 18:59:36 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-04-27 18:59:36 +0000 |
| commit | a46c3d499ebf59983752ea7179a13425daa57b6a (patch) | |
| tree | e755ea7bf9e1ede242c73d66382b0cbb1578bcf5 /Omap35xxPkg/PciEmulation | |
| parent | 01a1c0fc9e60dfd6b26bd6d9aa9c3a6242bbb608 (diff) | |
| download | edk2-a46c3d499ebf59983752ea7179a13425daa57b6a.tar.gz edk2-a46c3d499ebf59983752ea7179a13425daa57b6a.tar.bz2 edk2-a46c3d499ebf59983752ea7179a13425daa57b6a.zip | |
Remove debug #ifdef in USB HC init
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10431 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Omap35xxPkg/PciEmulation')
| -rw-r--r-- | Omap35xxPkg/PciEmulation/PciEmulation.c | 62 |
1 files changed, 6 insertions, 56 deletions
diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.c b/Omap35xxPkg/PciEmulation/PciEmulation.c index 91761c451d..8620c05058 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.c +++ b/Omap35xxPkg/PciEmulation/PciEmulation.c @@ -62,14 +62,13 @@ ConfigureUSBHost ( EFI_STATUS Status; UINT8 Data = 0; -#if 0 // Take USB host out of force-standby mode - MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY + MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY | UHH_SYSCONFIG_CLOCKACTIVITY_ON | UHH_SYSCONFIG_SIDLEMODE_NO_STANDBY | UHH_SYSCONFIG_ENAWAKEUP_ENABLE | UHH_SYSCONFIG_AUTOIDLE_ALWAYS_RUN); - MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_P3_CONNECT_STATUS_DISCONNECT + MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_P3_CONNECT_STATUS_DISCONNECT | UHH_HOSTCONFIG_P2_CONNECT_STATUS_DISCONNECT | UHH_HOSTCONFIG_P1_CONNECT_STATUS_DISCONNECT | UHH_HOSTCONFIG_ENA_INCR_ALIGN_DISABLE @@ -79,24 +78,10 @@ ConfigureUSBHost ( | UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN_ON | UHH_HOSTCONFIG_P1_ULPI_BYPASS_ULPI_MODE); - // USB reset (GPIO 147 - Port 5 pin 19) output high - MmioAnd32(GPIO5_BASE + GPIO_OE, ~BIT19); - MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19); - - // Get the Power IC protocol. - Status = gBS->LocateProtocol(&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950); - ASSERT_EFI_ERROR(Status); - - //Enable power to the USB host. - Status = gTPS65950->Read(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data); - ASSERT_EFI_ERROR(Status); - - //LEDAON & LEDAPWM control the power to the USB host so enable those bits. - Data |= (LEDAON | LEDAPWM); + // USB reset (GPIO 147 - Port 5 pin 19) output high + MmioAnd32(GPIO5_BASE + GPIO_OE, ~BIT19); + MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19); - Status = gTPS65950->Write(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data); - ASSERT_EFI_ERROR(Status); -#else // Get the Power IC protocol. Status = gBS->LocateProtocol(&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950); ASSERT_EFI_ERROR(Status); @@ -110,44 +95,9 @@ ConfigureUSBHost ( Status = gTPS65950->Write(gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data); ASSERT_EFI_ERROR(Status); - - // USB reset (GPIO 147 - Port 5 pin 19) output low - MmioAnd32 (GPIO5_BASE + GPIO_OE, ~BIT19); - MmioWrite32 (GPIO5_BASE + GPIO_CLEARDATAOUT, BIT19); - - // Turn on functional & interface clocks to the USBHOST power domain - MmioOr32 (CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE); - MmioOr32 (CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE); - // Wait for clock to become active - while (0 == (MmioRead32 (CM_CLKSTST_USBHOST) & 1)); - - - - // Take USB host out of force-standby mode - MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY - | UHH_SYSCONFIG_CLOCKACTIVITY_ON - | UHH_SYSCONFIG_ENAWAKEUP_ENABLE - | UHH_SYSCONFIG_SOFTRESET - ); - while ((MmioRead32 (UHH_SYSSTATUS) & UHH_SYSSTATUS_RESETDONE) != UHH_SYSSTATUS_RESETDONE); - - MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_CLOCKACTIVITY_ON - | UHH_SYSCONFIG_SIDLEMODE_NO_STANDBY - | UHH_SYSCONFIG_ENAWAKEUP_ENABLE - ); - - - MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_ENA_INCR16_ENABLE - | UHH_HOSTCONFIG_ENA_INCR8_ENABLE - | UHH_HOSTCONFIG_ENA_INCR4_ENABLE - ); - - // USB reset output high - MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19); - -#endif } + EFI_STATUS PciIoPollMem ( IN EFI_PCI_IO_PROTOCOL *This, |