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authorMichael Kubacki <michael.kubacki@microsoft.com>2021-12-05 14:54:09 -0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2021-12-07 17:24:28 +0000
commitac0a286f4d747a4c6c603a7b225917293cbe1e9f (patch)
tree32654f2b35755afc961e2c97296b2dec5762da75 /OvmfPkg/Include/IndustryStandard
parentd1050b9dff1cace252aff86630bfdb59dff5f507 (diff)
downloadedk2-ac0a286f4d747a4c6c603a7b225917293cbe1e9f.tar.gz
edk2-ac0a286f4d747a4c6c603a7b225917293cbe1e9f.tar.bz2
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OvmfPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the OvmfPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Andrew Fish <afish@apple.com>
Diffstat (limited to 'OvmfPkg/Include/IndustryStandard')
-rw-r--r--OvmfPkg/Include/IndustryStandard/Bhyve.h4
-rw-r--r--OvmfPkg/Include/IndustryStandard/E820.h17
-rw-r--r--OvmfPkg/Include/IndustryStandard/FusionMptScsi.h86
-rw-r--r--OvmfPkg/Include/IndustryStandard/I440FxPiix4.h30
-rw-r--r--OvmfPkg/Include/IndustryStandard/InstructionParsing.h52
-rw-r--r--OvmfPkg/Include/IndustryStandard/LegacyVgaBios.h192
-rw-r--r--OvmfPkg/Include/IndustryStandard/LinuxBzimage.h247
-rw-r--r--OvmfPkg/Include/IndustryStandard/LsiScsi.h120
-rw-r--r--OvmfPkg/Include/IndustryStandard/Microvm.h13
-rw-r--r--OvmfPkg/Include/IndustryStandard/PageTable.h188
-rw-r--r--OvmfPkg/Include/IndustryStandard/PvScsi.h218
-rw-r--r--OvmfPkg/Include/IndustryStandard/Q35MchIch9.h146
-rw-r--r--OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h24
-rw-r--r--OvmfPkg/Include/IndustryStandard/QemuFwCfg.h89
-rw-r--r--OvmfPkg/Include/IndustryStandard/QemuLoader.h46
-rw-r--r--OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h20
-rw-r--r--OvmfPkg/Include/IndustryStandard/QemuTpm.h44
-rw-r--r--OvmfPkg/Include/IndustryStandard/Virtio095.h124
-rw-r--r--OvmfPkg/Include/IndustryStandard/Virtio095Net.h76
-rw-r--r--OvmfPkg/Include/IndustryStandard/Virtio10.h76
-rw-r--r--OvmfPkg/Include/IndustryStandard/Virtio10Net.h4
-rw-r--r--OvmfPkg/Include/IndustryStandard/VirtioBlk.h73
-rw-r--r--OvmfPkg/Include/IndustryStandard/VirtioFs.h316
-rw-r--r--OvmfPkg/Include/IndustryStandard/VirtioGpu.h96
-rw-r--r--OvmfPkg/Include/IndustryStandard/VirtioScsi.h79
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/arch-arm/xen.h273
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/arch-x86/hvm/start_info.h40
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_32.h5
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_64.h5
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen.h69
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/event_channel.h27
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/grant_table.h302
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/hvm/hvm_op.h13
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/hvm/params.h60
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/blkif.h116
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/console.h10
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/protocols.h20
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/ring.h49
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/xenbus.h45
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/io/xs_wire.h155
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/memory.h77
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/xen-compat.h12
-rw-r--r--OvmfPkg/Include/IndustryStandard/Xen/xen.h394
43 files changed, 2040 insertions, 2012 deletions
diff --git a/OvmfPkg/Include/IndustryStandard/Bhyve.h b/OvmfPkg/Include/IndustryStandard/Bhyve.h
index ab8f2b0729..c22d301d47 100644
--- a/OvmfPkg/Include/IndustryStandard/Bhyve.h
+++ b/OvmfPkg/Include/IndustryStandard/Bhyve.h
@@ -11,8 +11,8 @@
#ifndef __BHYVE_H__
#define __BHYVE_H__
-#define BHYVE_ACPI_TIMER_IO_ADDR 0x408
+#define BHYVE_ACPI_TIMER_IO_ADDR 0x408
-#define BHYVE_PM_REG 0x404
+#define BHYVE_PM_REG 0x404
#endif // __BHYVE_H__
diff --git a/OvmfPkg/Include/IndustryStandard/E820.h b/OvmfPkg/Include/IndustryStandard/E820.h
index 1fa0956d2c..e41be5af3c 100644
--- a/OvmfPkg/Include/IndustryStandard/E820.h
+++ b/OvmfPkg/Include/IndustryStandard/E820.h
@@ -7,7 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-
#ifndef __E820_H__
#define __E820_H__
@@ -21,17 +20,17 @@ typedef enum {
} EFI_ACPI_MEMORY_TYPE;
typedef struct {
- UINT64 BaseAddr;
- UINT64 Length;
- EFI_ACPI_MEMORY_TYPE Type;
+ UINT64 BaseAddr;
+ UINT64 Length;
+ EFI_ACPI_MEMORY_TYPE Type;
} EFI_E820_ENTRY64;
typedef struct {
- UINT32 BassAddrLow;
- UINT32 BaseAddrHigh;
- UINT32 LengthLow;
- UINT32 LengthHigh;
- EFI_ACPI_MEMORY_TYPE Type;
+ UINT32 BassAddrLow;
+ UINT32 BaseAddrHigh;
+ UINT32 LengthLow;
+ UINT32 LengthHigh;
+ EFI_ACPI_MEMORY_TYPE Type;
} EFI_E820_ENTRY;
#pragma pack()
diff --git a/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h b/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h
index 99778d1537..ad5dbaa414 100644
--- a/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h
+++ b/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h
@@ -15,43 +15,43 @@
// Device offsets and constants
//
-#define LSI_LOGIC_PCI_VENDOR_ID 0x1000
-#define LSI_53C1030_PCI_DEVICE_ID 0x0030
-#define LSI_SAS1068_PCI_DEVICE_ID 0x0054
-#define LSI_SAS1068E_PCI_DEVICE_ID 0x0058
+#define LSI_LOGIC_PCI_VENDOR_ID 0x1000
+#define LSI_53C1030_PCI_DEVICE_ID 0x0030
+#define LSI_SAS1068_PCI_DEVICE_ID 0x0054
+#define LSI_SAS1068E_PCI_DEVICE_ID 0x0058
-#define MPT_REG_DOORBELL 0x00
-#define MPT_REG_WRITE_SEQ 0x04
-#define MPT_REG_HOST_DIAG 0x08
-#define MPT_REG_TEST 0x0c
-#define MPT_REG_DIAG_DATA 0x10
-#define MPT_REG_DIAG_ADDR 0x14
-#define MPT_REG_ISTATUS 0x30
-#define MPT_REG_IMASK 0x34
-#define MPT_REG_REQ_Q 0x40
-#define MPT_REG_REP_Q 0x44
+#define MPT_REG_DOORBELL 0x00
+#define MPT_REG_WRITE_SEQ 0x04
+#define MPT_REG_HOST_DIAG 0x08
+#define MPT_REG_TEST 0x0c
+#define MPT_REG_DIAG_DATA 0x10
+#define MPT_REG_DIAG_ADDR 0x14
+#define MPT_REG_ISTATUS 0x30
+#define MPT_REG_IMASK 0x34
+#define MPT_REG_REQ_Q 0x40
+#define MPT_REG_REP_Q 0x44
-#define MPT_DOORBELL_RESET 0x40
-#define MPT_DOORBELL_HANDSHAKE 0x42
+#define MPT_DOORBELL_RESET 0x40
+#define MPT_DOORBELL_HANDSHAKE 0x42
-#define MPT_IMASK_DOORBELL 0x01
-#define MPT_IMASK_REPLY 0x08
+#define MPT_IMASK_DOORBELL 0x01
+#define MPT_IMASK_REPLY 0x08
-#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST 0x00
-#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT 0x02
+#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST 0x00
+#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT 0x02
-#define MPT_SG_ENTRY_TYPE_SIMPLE 0x01
+#define MPT_SG_ENTRY_TYPE_SIMPLE 0x01
-#define MPT_IOC_WHOINIT_ROM_BIOS 0x02
+#define MPT_IOC_WHOINIT_ROM_BIOS 0x02
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x00 << 24)
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x01 << 24)
-#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x02 << 24)
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x00 << 24)
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x01 << 24)
+#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x02 << 24)
-#define MPT_SCSI_IOCSTATUS_SUCCESS 0x0000
-#define MPT_SCSI_IOCSTATUS_DEVICE_NOT_THERE 0x0043
-#define MPT_SCSI_IOCSTATUS_DATA_OVERRUN 0x0044
-#define MPT_SCSI_IOCSTATUS_DATA_UNDERRUN 0x0045
+#define MPT_SCSI_IOCSTATUS_SUCCESS 0x0000
+#define MPT_SCSI_IOCSTATUS_DEVICE_NOT_THERE 0x0043
+#define MPT_SCSI_IOCSTATUS_DATA_OVERRUN 0x0044
+#define MPT_SCSI_IOCSTATUS_DATA_UNDERRUN 0x0045
//
// Device structures
@@ -107,18 +107,18 @@ typedef struct {
} MPT_SCSI_IO_REQUEST;
typedef struct {
- UINT32 Length: 24;
- UINT32 EndOfList: 1;
- UINT32 Is64BitAddress: 1;
+ UINT32 Length : 24;
+ UINT32 EndOfList : 1;
+ UINT32 Is64BitAddress : 1;
//
// True when the buffer contains data to be transfered. Otherwise it's the
// destination buffer
//
- UINT32 BufferContainsData: 1;
- UINT32 LocalAddress: 1;
- UINT32 ElementType: 2;
- UINT32 EndOfBuffer: 1;
- UINT32 LastElement: 1;
+ UINT32 BufferContainsData : 1;
+ UINT32 LocalAddress : 1;
+ UINT32 ElementType : 2;
+ UINT32 EndOfBuffer : 1;
+ UINT32 LastElement : 1;
UINT64 DataBufferAddress;
} MPT_SG_ENTRY_SIMPLE;
@@ -142,19 +142,19 @@ typedef struct {
} MPT_SCSI_IO_REPLY;
typedef struct {
- MPT_SCSI_IO_REQUEST Header;
- MPT_SG_ENTRY_SIMPLE Sg;
+ MPT_SCSI_IO_REQUEST Header;
+ MPT_SG_ENTRY_SIMPLE Sg;
} MPT_SCSI_REQUEST_WITH_SG;
#pragma pack ()
typedef union {
- MPT_SCSI_IO_REPLY Data;
- UINT64 Uint64; // 8 byte alignment required by HW
+ MPT_SCSI_IO_REPLY Data;
+ UINT64 Uint64; // 8 byte alignment required by HW
} MPT_SCSI_IO_REPLY_ALIGNED;
typedef union {
- MPT_SCSI_REQUEST_WITH_SG Data;
- UINT64 Uint64; // 8 byte alignment required by HW
+ MPT_SCSI_REQUEST_WITH_SG Data;
+ UINT64 Uint64; // 8 byte alignment required by HW
} MPT_SCSI_REQUEST_ALIGNED;
#endif // __FUSION_MPT_SCSI_H__
diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
index 3973ff0a95..b4c374c920 100644
--- a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
+++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
@@ -19,36 +19,36 @@
//
// Host Bridge Device ID (DID) value for I440FX
//
-#define INTEL_82441_DEVICE_ID 0x1237
+#define INTEL_82441_DEVICE_ID 0x1237
//
// B/D/F/Type: 0/0/0/PCI
//
-#define PMC_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
+#define PMC_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
-#define PIIX4_PAM0 0x59
-#define PIIX4_PAM1 0x5A
-#define PIIX4_PAM2 0x5B
-#define PIIX4_PAM3 0x5C
-#define PIIX4_PAM4 0x5D
-#define PIIX4_PAM5 0x5E
-#define PIIX4_PAM6 0x5F
+#define PIIX4_PAM0 0x59
+#define PIIX4_PAM1 0x5A
+#define PIIX4_PAM2 0x5B
+#define PIIX4_PAM3 0x5C
+#define PIIX4_PAM4 0x5D
+#define PIIX4_PAM5 0x5E
+#define PIIX4_PAM6 0x5F
//
// B/D/F/Type: 0/1/3/PCI
//
-#define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset))
+#define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset))
-#define PIIX4_PMBA 0x40
-#define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
+#define PIIX4_PMBA 0x40
+#define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
BIT10 | BIT9 | BIT8 | BIT7 | BIT6)
-#define PIIX4_PMREGMISC 0x80
-#define PIIX4_PMREGMISC_PMIOSE BIT0
+#define PIIX4_PMREGMISC 0x80
+#define PIIX4_PMREGMISC_PMIOSE BIT0
//
// IO ports
//
-#define PIIX4_CPU_HOTPLUG_BASE 0xAF00
+#define PIIX4_CPU_HOTPLUG_BASE 0xAF00
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/InstructionParsing.h b/OvmfPkg/Include/IndustryStandard/InstructionParsing.h
index 149ff328e0..e70557a933 100644
--- a/OvmfPkg/Include/IndustryStandard/InstructionParsing.h
+++ b/OvmfPkg/Include/IndustryStandard/InstructionParsing.h
@@ -17,14 +17,14 @@
//
typedef union {
struct {
- UINT8 BitB:1;
- UINT8 BitX:1;
- UINT8 BitR:1;
- UINT8 BitW:1;
- UINT8 Rex:4;
+ UINT8 BitB : 1;
+ UINT8 BitX : 1;
+ UINT8 BitR : 1;
+ UINT8 BitW : 1;
+ UINT8 Rex : 4;
} Bits;
- UINT8 Uint8;
+ UINT8 Uint8;
} INSTRUCTION_REX_PREFIX;
//
@@ -32,12 +32,12 @@ typedef union {
//
typedef union {
struct {
- UINT8 Rm:3;
- UINT8 Reg:3;
- UINT8 Mod:2;
+ UINT8 Rm : 3;
+ UINT8 Reg : 3;
+ UINT8 Mod : 2;
} Bits;
- UINT8 Uint8;
+ UINT8 Uint8;
} INSTRUCTION_MODRM;
//
@@ -45,28 +45,28 @@ typedef union {
//
typedef union {
struct {
- UINT8 Base:3;
- UINT8 Index:3;
- UINT8 Scale:2;
+ UINT8 Base : 3;
+ UINT8 Index : 3;
+ UINT8 Scale : 2;
} Bits;
- UINT8 Uint8;
+ UINT8 Uint8;
} INSTRUCTION_SIB;
//
// Legacy Instruction Prefixes
//
-#define OVERRIDE_SEGMENT_CS 0x2E
-#define OVERRIDE_SEGMENT_DS 0x3E
-#define OVERRIDE_SEGMENT_ES 0x26
-#define OVERRIDE_SEGMENT_SS 0x36
-#define OVERRIDE_SEGMENT_FS 0x64
-#define OVERRIDE_SEGMENT_GS 0x65
-#define OVERRIDE_OPERAND_SIZE 0x66
-#define OVERRIDE_ADDRESS_SIZE 0x67
-#define LOCK_PREFIX 0xF0
-#define REPNZ_PREFIX 0xF2
-#define REPZ_PREFIX 0xF3
+#define OVERRIDE_SEGMENT_CS 0x2E
+#define OVERRIDE_SEGMENT_DS 0x3E
+#define OVERRIDE_SEGMENT_ES 0x26
+#define OVERRIDE_SEGMENT_SS 0x36
+#define OVERRIDE_SEGMENT_FS 0x64
+#define OVERRIDE_SEGMENT_GS 0x65
+#define OVERRIDE_OPERAND_SIZE 0x66
+#define OVERRIDE_ADDRESS_SIZE 0x67
+#define LOCK_PREFIX 0xF0
+#define REPNZ_PREFIX 0xF2
+#define REPZ_PREFIX 0xF3
//
// REX Prefixes
@@ -78,6 +78,6 @@ typedef union {
//
// Two-byte Opcode Flag
//
-#define TWO_BYTE_OPCODE_ESCAPE 0x0F
+#define TWO_BYTE_OPCODE_ESCAPE 0x0F
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/LegacyVgaBios.h b/OvmfPkg/Include/IndustryStandard/LegacyVgaBios.h
index 38360a68b2..7568d585a9 100644
--- a/OvmfPkg/Include/IndustryStandard/LegacyVgaBios.h
+++ b/OvmfPkg/Include/IndustryStandard/LegacyVgaBios.h
@@ -18,111 +18,111 @@
#pragma pack (1)
typedef struct {
- UINT8 Signature[4];
- UINT16 VesaVersion;
- UINT32 OemNameAddress;
- UINT32 Capabilities;
- UINT32 ModeListAddress;
- UINT16 VideoMem64K;
- UINT16 OemSoftwareVersion;
- UINT32 VendorNameAddress;
- UINT32 ProductNameAddress;
- UINT32 ProductRevAddress;
+ UINT8 Signature[4];
+ UINT16 VesaVersion;
+ UINT32 OemNameAddress;
+ UINT32 Capabilities;
+ UINT32 ModeListAddress;
+ UINT16 VideoMem64K;
+ UINT16 OemSoftwareVersion;
+ UINT32 VendorNameAddress;
+ UINT32 ProductNameAddress;
+ UINT32 ProductRevAddress;
} VBE_INFO_BASE;
typedef struct {
- VBE_INFO_BASE Base;
- UINT8 Buffer[256 - sizeof (VBE_INFO_BASE)];
+ VBE_INFO_BASE Base;
+ UINT8 Buffer[256 - sizeof (VBE_INFO_BASE)];
} VBE_INFO;
typedef struct {
- UINT16 ModeAttr;
- UINT8 WindowAAttr;
- UINT8 WindowBAttr;
- UINT16 WindowGranularityKB;
- UINT16 WindowSizeKB;
- UINT16 WindowAStartSegment;
- UINT16 WindowBStartSegment;
- UINT32 WindowPositioningAddress;
- UINT16 BytesPerScanLine;
-
- UINT16 Width;
- UINT16 Height;
- UINT8 CharCellWidth;
- UINT8 CharCellHeight;
- UINT8 NumPlanes;
- UINT8 BitsPerPixel;
- UINT8 NumBanks;
- UINT8 MemoryModel;
- UINT8 BankSizeKB;
- UINT8 NumImagePagesLessOne;
- UINT8 Vbe3;
-
- UINT8 RedMaskSize;
- UINT8 RedMaskPos;
- UINT8 GreenMaskSize;
- UINT8 GreenMaskPos;
- UINT8 BlueMaskSize;
- UINT8 BlueMaskPos;
- UINT8 ReservedMaskSize;
- UINT8 ReservedMaskPos;
- UINT8 DirectColorModeInfo;
-
- UINT32 LfbAddress;
- UINT32 OffScreenAddress;
- UINT16 OffScreenSizeKB;
-
- UINT16 BytesPerScanLineLinear;
- UINT8 NumImagesLessOneBanked;
- UINT8 NumImagesLessOneLinear;
- UINT8 RedMaskSizeLinear;
- UINT8 RedMaskPosLinear;
- UINT8 GreenMaskSizeLinear;
- UINT8 GreenMaskPosLinear;
- UINT8 BlueMaskSizeLinear;
- UINT8 BlueMaskPosLinear;
- UINT8 ReservedMaskSizeLinear;
- UINT8 ReservedMaskPosLinear;
- UINT32 MaxPixelClockHz;
- UINT8 Reserved[190];
+ UINT16 ModeAttr;
+ UINT8 WindowAAttr;
+ UINT8 WindowBAttr;
+ UINT16 WindowGranularityKB;
+ UINT16 WindowSizeKB;
+ UINT16 WindowAStartSegment;
+ UINT16 WindowBStartSegment;
+ UINT32 WindowPositioningAddress;
+ UINT16 BytesPerScanLine;
+
+ UINT16 Width;
+ UINT16 Height;
+ UINT8 CharCellWidth;
+ UINT8 CharCellHeight;
+ UINT8 NumPlanes;
+ UINT8 BitsPerPixel;
+ UINT8 NumBanks;
+ UINT8 MemoryModel;
+ UINT8 BankSizeKB;
+ UINT8 NumImagePagesLessOne;
+ UINT8 Vbe3;
+
+ UINT8 RedMaskSize;
+ UINT8 RedMaskPos;
+ UINT8 GreenMaskSize;
+ UINT8 GreenMaskPos;
+ UINT8 BlueMaskSize;
+ UINT8 BlueMaskPos;
+ UINT8 ReservedMaskSize;
+ UINT8 ReservedMaskPos;
+ UINT8 DirectColorModeInfo;
+
+ UINT32 LfbAddress;
+ UINT32 OffScreenAddress;
+ UINT16 OffScreenSizeKB;
+
+ UINT16 BytesPerScanLineLinear;
+ UINT8 NumImagesLessOneBanked;
+ UINT8 NumImagesLessOneLinear;
+ UINT8 RedMaskSizeLinear;
+ UINT8 RedMaskPosLinear;
+ UINT8 GreenMaskSizeLinear;
+ UINT8 GreenMaskPosLinear;
+ UINT8 BlueMaskSizeLinear;
+ UINT8 BlueMaskPosLinear;
+ UINT8 ReservedMaskSizeLinear;
+ UINT8 ReservedMaskPosLinear;
+ UINT32 MaxPixelClockHz;
+ UINT8 Reserved[190];
} VBE_MODE_INFO;
typedef struct {
- UINT16 ModeAttr;
- UINT8 WindowAAttr;
- UINT8 WindowBAttr;
- UINT16 WindowGranularityKB;
- UINT16 WindowSizeKB;
- UINT16 WindowAStartSegment;
- UINT16 WindowBStartSegment;
- UINT32 WindowPositioningAddress;
- UINT16 BytesPerScanLine;
-
- UINT16 Width;
- UINT16 Height;
- UINT8 CharCellWidth;
- UINT8 CharCellHeight;
- UINT8 NumPlanes;
- UINT8 BitsPerPixel;
- UINT8 NumBanks;
- UINT8 MemoryModel;
- UINT8 BankSizeKB;
- UINT8 NumImagePagesLessOne;
- UINT8 Vbe3;
-
- UINT8 RedMaskSize;
- UINT8 RedMaskPos;
- UINT8 GreenMaskSize;
- UINT8 GreenMaskPos;
- UINT8 BlueMaskSize;
- UINT8 BlueMaskPos;
- UINT8 ReservedMaskSize;
- UINT8 ReservedMaskPos;
- UINT8 DirectColorModeInfo;
-
- UINT32 LfbAddress;
- UINT32 OffScreenAddress;
- UINT16 OffScreenSizeKB;
+ UINT16 ModeAttr;
+ UINT8 WindowAAttr;
+ UINT8 WindowBAttr;
+ UINT16 WindowGranularityKB;
+ UINT16 WindowSizeKB;
+ UINT16 WindowAStartSegment;
+ UINT16 WindowBStartSegment;
+ UINT32 WindowPositioningAddress;
+ UINT16 BytesPerScanLine;
+
+ UINT16 Width;
+ UINT16 Height;
+ UINT8 CharCellWidth;
+ UINT8 CharCellHeight;
+ UINT8 NumPlanes;
+ UINT8 BitsPerPixel;
+ UINT8 NumBanks;
+ UINT8 MemoryModel;
+ UINT8 BankSizeKB;
+ UINT8 NumImagePagesLessOne;
+ UINT8 Vbe3;
+
+ UINT8 RedMaskSize;
+ UINT8 RedMaskPos;
+ UINT8 GreenMaskSize;
+ UINT8 GreenMaskPos;
+ UINT8 BlueMaskSize;
+ UINT8 BlueMaskPos;
+ UINT8 ReservedMaskSize;
+ UINT8 ReservedMaskPos;
+ UINT8 DirectColorModeInfo;
+
+ UINT32 LfbAddress;
+ UINT32 OffScreenAddress;
+ UINT16 OffScreenSizeKB;
} VBE2_MODE_INFO;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/LinuxBzimage.h b/OvmfPkg/Include/IndustryStandard/LinuxBzimage.h
index aa00ddaf41..08d0fcab44 100644
--- a/OvmfPkg/Include/IndustryStandard/LinuxBzimage.h
+++ b/OvmfPkg/Include/IndustryStandard/LinuxBzimage.h
@@ -8,151 +8,154 @@
#ifndef __LINUX_BZIMAGE_H__
#define __LINUX_BZIMAGE_H__
-#define BOOTSIG 0x1FE
-#define SETUP_HDR 0x53726448 /* 0x53726448 == "HdrS" */
+#define BOOTSIG 0x1FE
+#define SETUP_HDR 0x53726448 /* 0x53726448 == "HdrS" */
-#define E820_RAM 1
-#define E820_RESERVED 2
-#define E820_ACPI 3
-#define E820_NVS 4
-#define E820_UNUSABLE 5
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3
+#define E820_NVS 4
+#define E820_UNUSABLE 5
#pragma pack(1)
struct setup_header {
- UINT8 setup_secs; /* Sectors for setup code */
- UINT16 root_flags;
- UINT32 sys_size;
- UINT16 ram_size;
- UINT16 video_mode;
- UINT16 root_dev;
- UINT16 signature; /* Boot signature */
- UINT16 jump;
- UINT32 header;
- UINT16 version;
- UINT16 su_switch;
- UINT16 setup_seg;
- UINT16 start_sys;
- UINT16 kernel_ver;
- UINT8 loader_id;
- UINT8 load_flags;
- UINT16 movesize;
- UINT32 code32_start; /* Start of code loaded high */
- UINT32 ramdisk_start; /* Start of initial ramdisk */
- UINT32 ramdisk_len; /* Length of initial ramdisk */
- UINT32 bootsect_kludge;
- UINT16 heap_end;
- UINT8 ext_loader_ver; /* Extended boot loader version */
- UINT8 ext_loader_type; /* Extended boot loader ID */
- UINT32 cmd_line_ptr; /* 32-bit pointer to the kernel command line */
- UINT32 ramdisk_max; /* Highest legal initrd address */
- UINT32 kernel_alignment; /* Physical addr alignment required for kernel */
- UINT8 relocatable_kernel; /* Whether kernel is relocatable or not */
- UINT8 min_alignment;
- UINT16 xloadflags;
- UINT32 cmdline_size;
- UINT32 hardware_subarch;
- UINT64 hardware_subarch_data;
- UINT32 payload_offset;
- UINT32 payload_length;
- UINT64 setup_data;
- UINT64 pref_address;
- UINT32 init_size;
- UINT32 handover_offset;
+ UINT8 setup_secs; /* Sectors for setup code */
+ UINT16 root_flags;
+ UINT32 sys_size;
+ UINT16 ram_size;
+ UINT16 video_mode;
+ UINT16 root_dev;
+ UINT16 signature; /* Boot signature */
+ UINT16 jump;
+ UINT32 header;
+ UINT16 version;
+ UINT16 su_switch;
+ UINT16 setup_seg;
+ UINT16 start_sys;
+ UINT16 kernel_ver;
+ UINT8 loader_id;
+ UINT8 load_flags;
+ UINT16 movesize;
+ UINT32 code32_start; /* Start of code loaded high */
+ UINT32 ramdisk_start; /* Start of initial ramdisk */
+ UINT32 ramdisk_len; /* Length of initial ramdisk */
+ UINT32 bootsect_kludge;
+ UINT16 heap_end;
+ UINT8 ext_loader_ver; /* Extended boot loader version */
+ UINT8 ext_loader_type; /* Extended boot loader ID */
+ UINT32 cmd_line_ptr; /* 32-bit pointer to the kernel command line */
+ UINT32 ramdisk_max; /* Highest legal initrd address */
+ UINT32 kernel_alignment; /* Physical addr alignment required for kernel */
+ UINT8 relocatable_kernel; /* Whether kernel is relocatable or not */
+ UINT8 min_alignment;
+ UINT16 xloadflags;
+ UINT32 cmdline_size;
+ UINT32 hardware_subarch;
+ UINT64 hardware_subarch_data;
+ UINT32 payload_offset;
+ UINT32 payload_length;
+ UINT64 setup_data;
+ UINT64 pref_address;
+ UINT32 init_size;
+ UINT32 handover_offset;
};
struct efi_info {
- UINT32 efi_loader_signature;
- UINT32 efi_systab;
- UINT32 efi_memdesc_size;
- UINT32 efi_memdesc_version;
- UINT32 efi_memmap;
- UINT32 efi_memmap_size;
- UINT32 efi_systab_hi;
- UINT32 efi_memmap_hi;
+ UINT32 efi_loader_signature;
+ UINT32 efi_systab;
+ UINT32 efi_memdesc_size;
+ UINT32 efi_memdesc_version;
+ UINT32 efi_memmap;
+ UINT32 efi_memmap_size;
+ UINT32 efi_systab_hi;
+ UINT32 efi_memmap_hi;
};
struct e820_entry {
- UINT64 addr; /* start of memory segment */
- UINT64 size; /* size of memory segment */
- UINT32 type; /* type of memory segment */
+ UINT64 addr; /* start of memory segment */
+ UINT64 size; /* size of memory segment */
+ UINT32 type; /* type of memory segment */
};
struct screen_info {
- UINT8 orig_x; /* 0x00 */
- UINT8 orig_y; /* 0x01 */
- UINT16 ext_mem_k; /* 0x02 */
- UINT16 orig_video_page; /* 0x04 */
- UINT8 orig_video_mode; /* 0x06 */
- UINT8 orig_video_cols; /* 0x07 */
- UINT8 flags; /* 0x08 */
- UINT8 unused2; /* 0x09 */
- UINT16 orig_video_ega_bx;/* 0x0a */
- UINT16 unused3; /* 0x0c */
- UINT8 orig_video_lines; /* 0x0e */
- UINT8 orig_video_isVGA; /* 0x0f */
- UINT16 orig_video_points;/* 0x10 */
-
- /* VESA graphic mode -- linear frame buffer */
- UINT16 lfb_width; /* 0x12 */
- UINT16 lfb_height; /* 0x14 */
- UINT16 lfb_depth; /* 0x16 */
- UINT32 lfb_base; /* 0x18 */
- UINT32 lfb_size; /* 0x1c */
- UINT16 cl_magic, cl_offset; /* 0x20 */
- UINT16 lfb_linelength; /* 0x24 */
- UINT8 red_size; /* 0x26 */
- UINT8 red_pos; /* 0x27 */
- UINT8 green_size; /* 0x28 */
- UINT8 green_pos; /* 0x29 */
- UINT8 blue_size; /* 0x2a */
- UINT8 blue_pos; /* 0x2b */
- UINT8 rsvd_size; /* 0x2c */
- UINT8 rsvd_pos; /* 0x2d */
- UINT16 vesapm_seg; /* 0x2e */
- UINT16 vesapm_off; /* 0x30 */
- UINT16 pages; /* 0x32 */
- UINT16 vesa_attributes; /* 0x34 */
- UINT32 capabilities; /* 0x36 */
- UINT8 _reserved[6]; /* 0x3a */
+ UINT8 orig_x; /* 0x00 */
+ UINT8 orig_y; /* 0x01 */
+ UINT16 ext_mem_k; /* 0x02 */
+ UINT16 orig_video_page; /* 0x04 */
+ UINT8 orig_video_mode; /* 0x06 */
+ UINT8 orig_video_cols; /* 0x07 */
+ UINT8 flags; /* 0x08 */
+ UINT8 unused2; /* 0x09 */
+ UINT16 orig_video_ega_bx; /* 0x0a */
+ UINT16 unused3; /* 0x0c */
+ UINT8 orig_video_lines; /* 0x0e */
+ UINT8 orig_video_isVGA; /* 0x0f */
+ UINT16 orig_video_points; /* 0x10 */
+
+ /* VESA graphic mode -- linear frame buffer */
+ UINT16 lfb_width; /* 0x12 */
+ UINT16 lfb_height; /* 0x14 */
+ UINT16 lfb_depth; /* 0x16 */
+ UINT32 lfb_base; /* 0x18 */
+ UINT32 lfb_size; /* 0x1c */
+ UINT16 cl_magic, cl_offset; /* 0x20 */
+ UINT16 lfb_linelength; /* 0x24 */
+ UINT8 red_size; /* 0x26 */
+ UINT8 red_pos; /* 0x27 */
+ UINT8 green_size; /* 0x28 */
+ UINT8 green_pos; /* 0x29 */
+ UINT8 blue_size; /* 0x2a */
+ UINT8 blue_pos; /* 0x2b */
+ UINT8 rsvd_size; /* 0x2c */
+ UINT8 rsvd_pos; /* 0x2d */
+ UINT16 vesapm_seg; /* 0x2e */
+ UINT16 vesapm_off; /* 0x30 */
+ UINT16 pages; /* 0x32 */
+ UINT16 vesa_attributes; /* 0x34 */
+ UINT32 capabilities; /* 0x36 */
+ UINT8 _reserved[6]; /* 0x3a */
};
struct boot_params {
- struct screen_info screen_info;
- UINT8 apm_bios_info[0x14];
- UINT8 _pad2[4];
- UINT64 tboot_addr;
- UINT8 ist_info[0x10];
- UINT8 _pad3[16];
- UINT8 hd0_info[16];
- UINT8 hd1_info[16];
- UINT8 sys_desc_table[0x10];
- UINT8 olpc_ofw_header[0x10];
- UINT8 _pad4[128];
- UINT8 edid_info[0x80];
- struct efi_info efi_info;
- UINT32 alt_mem_k;
- UINT32 scratch;
- UINT8 e820_entries;
- UINT8 eddbuf_entries;
- UINT8 edd_mbr_sig_buf_entries;
- UINT8 _pad6[6];
- struct setup_header hdr;
- UINT8 _pad7[0x290-0x1f1-sizeof(struct setup_header)];
- UINT32 edd_mbr_sig_buffer[16];
- struct e820_entry e820_map[128];
- UINT8 _pad8[48];
- UINT8 eddbuf[0x1ec];
- UINT8 _pad9[276];
+ struct screen_info screen_info;
+ UINT8 apm_bios_info[0x14];
+ UINT8 _pad2[4];
+ UINT64 tboot_addr;
+ UINT8 ist_info[0x10];
+ UINT8 _pad3[16];
+ UINT8 hd0_info[16];
+ UINT8 hd1_info[16];
+ UINT8 sys_desc_table[0x10];
+ UINT8 olpc_ofw_header[0x10];
+ UINT8 _pad4[128];
+ UINT8 edid_info[0x80];
+ struct efi_info efi_info;
+ UINT32 alt_mem_k;
+ UINT32 scratch;
+ UINT8 e820_entries;
+ UINT8 eddbuf_entries;
+ UINT8 edd_mbr_sig_buf_entries;
+ UINT8 _pad6[6];
+ struct setup_header hdr;
+ UINT8 _pad7[0x290-0x1f1-sizeof (struct setup_header)];
+ UINT32 edd_mbr_sig_buffer[16];
+ struct e820_entry e820_map[128];
+ UINT8 _pad8[48];
+ UINT8 eddbuf[0x1ec];
+ UINT8 _pad9[276];
};
typedef struct {
- UINT16 limit;
- UINT64 *base;
+ UINT16 limit;
+ UINT64 *base;
} dt_addr_t;
#pragma pack()
-extern EFI_STATUS setup_graphics(struct boot_params *buf);
+extern EFI_STATUS
+setup_graphics (
+ struct boot_params *buf
+ );
#endif /* __LINUX_BZIMAGE_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/LsiScsi.h b/OvmfPkg/Include/IndustryStandard/LsiScsi.h
index 01d75323cd..affff53889 100644
--- a/OvmfPkg/Include/IndustryStandard/LsiScsi.h
+++ b/OvmfPkg/Include/IndustryStandard/LsiScsi.h
@@ -14,90 +14,90 @@
//
// Device ID
//
-#define LSI_LOGIC_PCI_VENDOR_ID 0x1000
-#define LSI_53C895A_PCI_DEVICE_ID 0x0012
+#define LSI_LOGIC_PCI_VENDOR_ID 0x1000
+#define LSI_53C895A_PCI_DEVICE_ID 0x0012
//
// LSI 53C895A Registers
//
-#define LSI_REG_DSTAT 0x0C
-#define LSI_REG_ISTAT0 0x14
-#define LSI_REG_DSP 0x2C
-#define LSI_REG_SIST0 0x42
-#define LSI_REG_SIST1 0x43
-#define LSI_REG_CSBC 0xDC
+#define LSI_REG_DSTAT 0x0C
+#define LSI_REG_ISTAT0 0x14
+#define LSI_REG_DSP 0x2C
+#define LSI_REG_SIST0 0x42
+#define LSI_REG_SIST1 0x43
+#define LSI_REG_CSBC 0xDC
//
// The status bits for DMA Status (DSTAT)
//
-#define LSI_DSTAT_IID BIT0
-#define LSI_DSTAT_R BIT1
-#define LSI_DSTAT_SIR BIT2
-#define LSI_DSTAT_SSI BIT3
-#define LSI_DSTAT_ABRT BIT4
-#define LSI_DSTAT_BF BIT5
-#define LSI_DSTAT_MDPE BIT6
-#define LSI_DSTAT_DFE BIT7
+#define LSI_DSTAT_IID BIT0
+#define LSI_DSTAT_R BIT1
+#define LSI_DSTAT_SIR BIT2
+#define LSI_DSTAT_SSI BIT3
+#define LSI_DSTAT_ABRT BIT4
+#define LSI_DSTAT_BF BIT5
+#define LSI_DSTAT_MDPE BIT6
+#define LSI_DSTAT_DFE BIT7
//
// The status bits for Interrupt Status Zero (ISTAT0)
//
-#define LSI_ISTAT0_DIP BIT0
-#define LSI_ISTAT0_SIP BIT1
-#define LSI_ISTAT0_INTF BIT2
-#define LSI_ISTAT0_CON BIT3
-#define LSI_ISTAT0_SEM BIT4
-#define LSI_ISTAT0_SIGP BIT5
-#define LSI_ISTAT0_SRST BIT6
-#define LSI_ISTAT0_ABRT BIT7
+#define LSI_ISTAT0_DIP BIT0
+#define LSI_ISTAT0_SIP BIT1
+#define LSI_ISTAT0_INTF BIT2
+#define LSI_ISTAT0_CON BIT3
+#define LSI_ISTAT0_SEM BIT4
+#define LSI_ISTAT0_SIGP BIT5
+#define LSI_ISTAT0_SRST BIT6
+#define LSI_ISTAT0_ABRT BIT7
//
// The status bits for SCSI Interrupt Status Zero (SIST0)
//
-#define LSI_SIST0_PAR BIT0
-#define LSI_SIST0_RST BIT1
-#define LSI_SIST0_UDC BIT2
-#define LSI_SIST0_SGE BIT3
-#define LSI_SIST0_RSL BIT4
-#define LSI_SIST0_SEL BIT5
-#define LSI_SIST0_CMP BIT6
-#define LSI_SIST0_MA BIT7
+#define LSI_SIST0_PAR BIT0
+#define LSI_SIST0_RST BIT1
+#define LSI_SIST0_UDC BIT2
+#define LSI_SIST0_SGE BIT3
+#define LSI_SIST0_RSL BIT4
+#define LSI_SIST0_SEL BIT5
+#define LSI_SIST0_CMP BIT6
+#define LSI_SIST0_MA BIT7
//
// The status bits for SCSI Interrupt Status One (SIST1)
//
-#define LSI_SIST1_HTH BIT0
-#define LSI_SIST1_GEN BIT1
-#define LSI_SIST1_STO BIT2
-#define LSI_SIST1_R3 BIT3
-#define LSI_SIST1_SBMC BIT4
-#define LSI_SIST1_R5 BIT5
-#define LSI_SIST1_R6 BIT6
-#define LSI_SIST1_R7 BIT7
+#define LSI_SIST1_HTH BIT0
+#define LSI_SIST1_GEN BIT1
+#define LSI_SIST1_STO BIT2
+#define LSI_SIST1_R3 BIT3
+#define LSI_SIST1_SBMC BIT4
+#define LSI_SIST1_R5 BIT5
+#define LSI_SIST1_R6 BIT6
+#define LSI_SIST1_R7 BIT7
//
// LSI 53C895A Script Instructions
//
-#define LSI_INS_TYPE_BLK 0x00000000
-#define LSI_INS_TYPE_IO BIT30
-#define LSI_INS_TYPE_TC BIT31
-
-#define LSI_INS_BLK_SCSIP_DAT_OUT 0x00000000
-#define LSI_INS_BLK_SCSIP_DAT_IN BIT24
-#define LSI_INS_BLK_SCSIP_CMD BIT25
-#define LSI_INS_BLK_SCSIP_STAT (BIT24 | BIT25)
-#define LSI_INS_BLK_SCSIP_MSG_OUT (BIT25 | BIT26)
-#define LSI_INS_BLK_SCSIP_MSG_IN (BIT24 | BIT25 | BIT26)
-
-#define LSI_INS_IO_OPC_SEL 0x00000000
-#define LSI_INS_IO_OPC_WAIT_RESEL BIT28
-
-#define LSI_INS_TC_CP BIT17
-#define LSI_INS_TC_JMP BIT19
-#define LSI_INS_TC_RA BIT23
-
-#define LSI_INS_TC_OPC_JMP 0x00000000
-#define LSI_INS_TC_OPC_INT (BIT27 | BIT28)
+#define LSI_INS_TYPE_BLK 0x00000000
+#define LSI_INS_TYPE_IO BIT30
+#define LSI_INS_TYPE_TC BIT31
+
+#define LSI_INS_BLK_SCSIP_DAT_OUT 0x00000000
+#define LSI_INS_BLK_SCSIP_DAT_IN BIT24
+#define LSI_INS_BLK_SCSIP_CMD BIT25
+#define LSI_INS_BLK_SCSIP_STAT (BIT24 | BIT25)
+#define LSI_INS_BLK_SCSIP_MSG_OUT (BIT25 | BIT26)
+#define LSI_INS_BLK_SCSIP_MSG_IN (BIT24 | BIT25 | BIT26)
+
+#define LSI_INS_IO_OPC_SEL 0x00000000
+#define LSI_INS_IO_OPC_WAIT_RESEL BIT28
+
+#define LSI_INS_TC_CP BIT17
+#define LSI_INS_TC_JMP BIT19
+#define LSI_INS_TC_RA BIT23
+
+#define LSI_INS_TC_OPC_JMP 0x00000000
+#define LSI_INS_TC_OPC_INT (BIT27 | BIT28)
#define LSI_INS_TC_SCSIP_DAT_OUT 0x00000000
#define LSI_INS_TC_SCSIP_MSG_IN (BIT24 | BIT25 | BIT26)
diff --git a/OvmfPkg/Include/IndustryStandard/Microvm.h b/OvmfPkg/Include/IndustryStandard/Microvm.h
index ae0c2e5311..4f669766c4 100644
--- a/OvmfPkg/Include/IndustryStandard/Microvm.h
+++ b/OvmfPkg/Include/IndustryStandard/Microvm.h
@@ -4,16 +4,17 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+
#ifndef __MICROVM_H__
#define __MICROVM_H__
-#define MICROVM_PSEUDO_DEVICE_ID 0xfff1
+#define MICROVM_PSEUDO_DEVICE_ID 0xfff1
/* generic event device */
-#define MICROVM_GED_MMIO_BASE 0xfea00000
-#define MICROVM_GED_MMIO_BASE_REGS (MICROVM_GED_MMIO_BASE + 0x200)
-#define MICROVM_ACPI_GED_REG_SLEEP_CTL 0x00
-#define MICROVM_ACPI_GED_REG_RESET 0x02
-#define MICROVM_ACPI_GED_RESET_VALUE 0x42
+#define MICROVM_GED_MMIO_BASE 0xfea00000
+#define MICROVM_GED_MMIO_BASE_REGS (MICROVM_GED_MMIO_BASE + 0x200)
+#define MICROVM_ACPI_GED_REG_SLEEP_CTL 0x00
+#define MICROVM_ACPI_GED_REG_RESET 0x02
+#define MICROVM_ACPI_GED_RESET_VALUE 0x42
#endif // __MICROVM_H__
diff --git a/OvmfPkg/Include/IndustryStandard/PageTable.h b/OvmfPkg/Include/IndustryStandard/PageTable.h
index 5e797eeea8..a75b3fcfe7 100644
--- a/OvmfPkg/Include/IndustryStandard/PageTable.h
+++ b/OvmfPkg/Include/IndustryStandard/PageTable.h
@@ -25,21 +25,21 @@
typedef union {
struct {
- UINT64 Present:1; // 0 = Not present in memory,
- // 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
- // 1 = Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed,
- // 1 = Accessed (set by CPU)
- UINT64 Reserved:1; // Reserved
- UINT64 MustBeZero:2; // Must Be Zero
- UINT64 Available:3; // Available for use by system software
- UINT64 PageTableBaseAddress:40; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // No Execute bit
+ UINT64 Present : 1; // 0 = Not present in memory,
+ // 1 = Present in memory
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching,
+ // 1 = Write-Through caching
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
+ UINT64 Accessed : 1; // 0 = Not accessed,
+ // 1 = Accessed (set by CPU)
+ UINT64 Reserved : 1; // Reserved
+ UINT64 MustBeZero : 2; // Must Be Zero
+ UINT64 Available : 3; // Available for use by system software
+ UINT64 PageTableBaseAddress : 40; // Page Table Base Address
+ UINT64 AvabilableHigh : 11; // Available for use by system software
+ UINT64 Nx : 1; // No Execute bit
} Bits;
UINT64 Uint64;
} PAGE_MAP_AND_DIRECTORY_POINTER;
@@ -49,25 +49,25 @@ typedef union {
//
typedef union {
struct {
- UINT64 Present:1; // 0 = Not present in memory,
- // 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
- // 1 = Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed,
- // 1 = Accessed (set by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by
- // processor on access to page
- UINT64 PAT:1; //
- UINT64 Global:1; // 0 = Not global page, 1 = global page
- // TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PageTableBaseAddress:40; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code,
- // 1 = No Code Execution
+ UINT64 Present : 1; // 0 = Not present in memory,
+ // 1 = Present in memory
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching,
+ // 1 = Write-Through caching
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
+ UINT64 Accessed : 1; // 0 = Not accessed,
+ // 1 = Accessed (set by CPU)
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by
+ // processor on access to page
+ UINT64 PAT : 1; //
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page
+ // TLB not cleared on CR3 write
+ UINT64 Available : 3; // Available for use by system software
+ UINT64 PageTableBaseAddress : 40; // Page Table Base Address
+ UINT64 AvabilableHigh : 11; // Available for use by system software
+ UINT64 Nx : 1; // 0 = Execute Code,
+ // 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_4K_ENTRY;
@@ -77,27 +77,27 @@ typedef union {
//
typedef union {
struct {
- UINT64 Present:1; // 0 = Not present in memory,
- // 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
- // 1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed,
- // 1 = Accessed (set by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by
- // processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page
- // TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:8; // Must be zero;
- UINT64 PageTableBaseAddress:31; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code,
- // 1 = No Code Execution
+ UINT64 Present : 1; // 0 = Not present in memory,
+ // 1 = Present in memory
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching,
+ // 1=Write-Through caching
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
+ UINT64 Accessed : 1; // 0 = Not accessed,
+ // 1 = Accessed (set by CPU)
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by
+ // processor on access to page
+ UINT64 MustBe1 : 1; // Must be 1
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page
+ // TLB not cleared on CR3 write
+ UINT64 Available : 3; // Available for use by system software
+ UINT64 PAT : 1; //
+ UINT64 MustBeZero : 8; // Must be zero;
+ UINT64 PageTableBaseAddress : 31; // Page Table Base Address
+ UINT64 AvabilableHigh : 11; // Available for use by system software
+ UINT64 Nx : 1; // 0 = Execute Code,
+ // 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_ENTRY;
@@ -107,55 +107,55 @@ typedef union {
//
typedef union {
struct {
- UINT64 Present:1; // 0 = Not present in memory,
- // 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching,
- // 1 = Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed,
- // 1 = Accessed (set by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by
- // processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page
- // TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:17; // Must be zero;
- UINT64 PageTableBaseAddress:22; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code,
- // 1 = No Code Execution
+ UINT64 Present : 1; // 0 = Not present in memory,
+ // 1 = Present in memory
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching,
+ // 1 = Write-Through caching
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
+ UINT64 Accessed : 1; // 0 = Not accessed,
+ // 1 = Accessed (set by CPU)
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by
+ // processor on access to page
+ UINT64 MustBe1 : 1; // Must be 1
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page
+ // TLB not cleared on CR3 write
+ UINT64 Available : 3; // Available for use by system software
+ UINT64 PAT : 1; //
+ UINT64 MustBeZero : 17; // Must be zero;
+ UINT64 PageTableBaseAddress : 22; // Page Table Base Address
+ UINT64 AvabilableHigh : 11; // Available for use by system software
+ UINT64 Nx : 1; // 0 = Execute Code,
+ // 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_1G_ENTRY;
#pragma pack()
-#define IA32_PG_P BIT0
-#define IA32_PG_RW BIT1
-#define IA32_PG_PS BIT7
+#define IA32_PG_P BIT0
+#define IA32_PG_RW BIT1
+#define IA32_PG_PS BIT7
-#define PAGING_PAE_INDEX_MASK 0x1FF
+#define PAGING_PAE_INDEX_MASK 0x1FF
-#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
-#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
-#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
+#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
+#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
+#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
-#define PAGING_L1_ADDRESS_SHIFT 12
-#define PAGING_L2_ADDRESS_SHIFT 21
-#define PAGING_L3_ADDRESS_SHIFT 30
-#define PAGING_L4_ADDRESS_SHIFT 39
+#define PAGING_L1_ADDRESS_SHIFT 12
+#define PAGING_L2_ADDRESS_SHIFT 21
+#define PAGING_L3_ADDRESS_SHIFT 30
+#define PAGING_L4_ADDRESS_SHIFT 39
-#define PAGING_PML4E_NUMBER 4
+#define PAGING_PML4E_NUMBER 4
-#define PAGETABLE_ENTRY_MASK ((1UL << 9) - 1)
-#define PML4_OFFSET(x) ( (x >> 39) & PAGETABLE_ENTRY_MASK)
-#define PDP_OFFSET(x) ( (x >> 30) & PAGETABLE_ENTRY_MASK)
-#define PDE_OFFSET(x) ( (x >> 21) & PAGETABLE_ENTRY_MASK)
-#define PTE_OFFSET(x) ( (x >> 12) & PAGETABLE_ENTRY_MASK)
-#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
+#define PAGETABLE_ENTRY_MASK ((1UL << 9) - 1)
+#define PML4_OFFSET(x) ( (x >> 39) & PAGETABLE_ENTRY_MASK)
+#define PDP_OFFSET(x) ( (x >> 30) & PAGETABLE_ENTRY_MASK)
+#define PDE_OFFSET(x) ( (x >> 21) & PAGETABLE_ENTRY_MASK)
+#define PTE_OFFSET(x) ( (x >> 12) & PAGETABLE_ENTRY_MASK)
+#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h b/OvmfPkg/Include/IndustryStandard/PvScsi.h
index a4d6634f3b..70ed91ddb3 100644
--- a/OvmfPkg/Include/IndustryStandard/PvScsi.h
+++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
@@ -15,60 +15,60 @@
// Device offsets and constants
//
-#define PCI_VENDOR_ID_VMWARE (0x15ad)
-#define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
+#define PCI_VENDOR_ID_VMWARE (0x15ad)
+#define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
//
// CDB (Command Descriptor Block) with size above this constant
// should be considered out-of-band
//
-#define PVSCSI_CDB_MAX_SIZE (16)
+#define PVSCSI_CDB_MAX_SIZE (16)
typedef enum {
- PvScsiRegOffsetCommand = 0x0,
- PvScsiRegOffsetCommandData = 0x4,
- PvScsiRegOffsetCommandStatus = 0x8,
- PvScsiRegOffsetLastSts0 = 0x100,
- PvScsiRegOffsetLastSts1 = 0x104,
- PvScsiRegOffsetLastSts2 = 0x108,
- PvScsiRegOffsetLastSts3 = 0x10c,
- PvScsiRegOffsetIntrStatus = 0x100c,
- PvScsiRegOffsetIntrMask = 0x2010,
- PvScsiRegOffsetKickNonRwIo = 0x3014,
- PvScsiRegOffsetDebug = 0x3018,
- PvScsiRegOffsetKickRwIo = 0x4018,
+ PvScsiRegOffsetCommand = 0x0,
+ PvScsiRegOffsetCommandData = 0x4,
+ PvScsiRegOffsetCommandStatus = 0x8,
+ PvScsiRegOffsetLastSts0 = 0x100,
+ PvScsiRegOffsetLastSts1 = 0x104,
+ PvScsiRegOffsetLastSts2 = 0x108,
+ PvScsiRegOffsetLastSts3 = 0x10c,
+ PvScsiRegOffsetIntrStatus = 0x100c,
+ PvScsiRegOffsetIntrMask = 0x2010,
+ PvScsiRegOffsetKickNonRwIo = 0x3014,
+ PvScsiRegOffsetDebug = 0x3018,
+ PvScsiRegOffsetKickRwIo = 0x4018,
} PVSCSI_BAR0_OFFSETS;
//
// Define Interrupt-Status register flags
//
-#define PVSCSI_INTR_CMPL_0 BIT0
-#define PVSCSI_INTR_CMPL_1 BIT1
-#define PVSCSI_INTR_CMPL_MASK (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)
+#define PVSCSI_INTR_CMPL_0 BIT0
+#define PVSCSI_INTR_CMPL_1 BIT1
+#define PVSCSI_INTR_CMPL_MASK (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)
typedef enum {
- PvScsiCmdFirst = 0,
- PvScsiCmdAdapterReset = 1,
- PvScsiCmdIssueScsi = 2,
- PvScsiCmdSetupRings = 3,
- PvScsiCmdResetBus = 4,
- PvScsiCmdResetDevice = 5,
- PvScsiCmdAbortCmd = 6,
- PvScsiCmdConfig = 7,
- PvScsiCmdSetupMsgRing = 8,
- PvScsiCmdDeviceUnplug = 9,
- PvScsiCmdLast = 10
+ PvScsiCmdFirst = 0,
+ PvScsiCmdAdapterReset = 1,
+ PvScsiCmdIssueScsi = 2,
+ PvScsiCmdSetupRings = 3,
+ PvScsiCmdResetBus = 4,
+ PvScsiCmdResetDevice = 5,
+ PvScsiCmdAbortCmd = 6,
+ PvScsiCmdConfig = 7,
+ PvScsiCmdSetupMsgRing = 8,
+ PvScsiCmdDeviceUnplug = 9,
+ PvScsiCmdLast = 10
} PVSCSI_COMMANDS;
-#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES (32)
+#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES (32)
#pragma pack (1)
typedef struct {
- UINT32 ReqRingNumPages;
- UINT32 CmpRingNumPages;
- UINT64 RingsStatePPN;
- UINT64 ReqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
- UINT64 CmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+ UINT32 ReqRingNumPages;
+ UINT32 CmpRingNumPages;
+ UINT64 RingsStatePPN;
+ UINT64 ReqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+ UINT64 CmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
} PVSCSI_CMD_DESC_SETUP_RINGS;
#pragma pack ()
@@ -77,52 +77,52 @@ typedef struct {
#pragma pack (1)
typedef struct {
- UINT32 ReqProdIdx;
- UINT32 ReqConsIdx;
- UINT32 ReqNumEntriesLog2;
+ UINT32 ReqProdIdx;
+ UINT32 ReqConsIdx;
+ UINT32 ReqNumEntriesLog2;
- UINT32 CmpProdIdx;
- UINT32 CmpConsIdx;
- UINT32 CmpNumEntriesLog2;
+ UINT32 CmpProdIdx;
+ UINT32 CmpConsIdx;
+ UINT32 CmpNumEntriesLog2;
- UINT8 Pad[104];
+ UINT8 Pad[104];
- UINT32 MsgProdIdx;
- UINT32 MsgConsIdx;
- UINT32 MsgNumEntriesLog2;
+ UINT32 MsgProdIdx;
+ UINT32 MsgConsIdx;
+ UINT32 MsgNumEntriesLog2;
} PVSCSI_RINGS_STATE;
#pragma pack ()
//
// Define PVSCSI request descriptor tags
//
-#define PVSCSI_SIMPLE_QUEUE_TAG (0x20)
+#define PVSCSI_SIMPLE_QUEUE_TAG (0x20)
//
// Define PVSCSI request descriptor flags
//
-#define PVSCSI_FLAG_CMD_WITH_SG_LIST BIT0
-#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB BIT1
-#define PVSCSI_FLAG_CMD_DIR_NONE BIT2
-#define PVSCSI_FLAG_CMD_DIR_TOHOST BIT3
-#define PVSCSI_FLAG_CMD_DIR_TODEVICE BIT4
+#define PVSCSI_FLAG_CMD_WITH_SG_LIST BIT0
+#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB BIT1
+#define PVSCSI_FLAG_CMD_DIR_NONE BIT2
+#define PVSCSI_FLAG_CMD_DIR_TOHOST BIT3
+#define PVSCSI_FLAG_CMD_DIR_TODEVICE BIT4
#pragma pack (1)
typedef struct {
- UINT64 Context;
- UINT64 DataAddr;
- UINT64 DataLen;
- UINT64 SenseAddr;
- UINT32 SenseLen;
- UINT32 Flags;
- UINT8 Cdb[16];
- UINT8 CdbLen;
- UINT8 Lun[8];
- UINT8 Tag;
- UINT8 Bus;
- UINT8 Target;
- UINT8 VcpuHint;
- UINT8 Unused[59];
+ UINT64 Context;
+ UINT64 DataAddr;
+ UINT64 DataLen;
+ UINT64 SenseAddr;
+ UINT32 SenseLen;
+ UINT32 Flags;
+ UINT8 Cdb[16];
+ UINT8 CdbLen;
+ UINT8 Lun[8];
+ UINT8 Tag;
+ UINT8 Bus;
+ UINT8 Target;
+ UINT8 VcpuHint;
+ UINT8 Unused[59];
} PVSCSI_RING_REQ_DESC;
#pragma pack ()
@@ -130,56 +130,56 @@ typedef struct {
// Host adapter status/error codes
//
typedef enum {
- PvScsiBtStatSuccess = 0x00, // CCB complete normally with no errors
+ PvScsiBtStatSuccess = 0x00, // CCB complete normally with no errors
PvScsiBtStatLinkedCommandCompleted = 0x0a,
PvScsiBtStatLinkedCommandCompletedWithFlag = 0x0b,
- PvScsiBtStatDataUnderrun = 0x0c,
- PvScsiBtStatSelTimeout = 0x11, // SCSI selection timeout
- PvScsiBtStatDatarun = 0x12, // Data overrun/underrun
- PvScsiBtStatBusFree = 0x13, // Unexpected bus free
- PvScsiBtStatInvPhase = 0x14, //
- // Invalid bus phase or sequence requested
- // by target
- //
- PvScsiBtStatLunMismatch = 0x17, //
- // Linked CCB has different LUN from first
- // CCB
- //
- PvScsiBtStatSensFailed = 0x1b, // Auto request sense failed
- PvScsiBtStatTagReject = 0x1c, //
- // SCSI II tagged queueing message rejected
- // by target
- //
- PvScsiBtStatBadMsg = 0x1d, //
- // Unsupported message received by the host
- // adapter
- //
- PvScsiBtStatHaHardware = 0x20, // Host adapter hardware failed
- PvScsiBtStatNoResponse = 0x21, //
- // Target did not respond to SCSI ATN sent
- // a SCSI RST
- //
- PvScsiBtStatSentRst = 0x22, // Host adapter asserted a SCSI RST
- PvScsiBtStatRecvRst = 0x23, // Other SCSI devices asserted a SCSI RST
- PvScsiBtStatDisconnect = 0x24, //
- // Target device reconnected improperly
- // (w/o tag)
- //
- PvScsiBtStatBusReset = 0x25, // Host adapter issued BUS device reset
- PvScsiBtStatAbortQueue = 0x26, // Abort queue generated
- PvScsiBtStatHaSoftware = 0x27, // Host adapter software error
- PvScsiBtStatHaTimeout = 0x30, // Host adapter hardware timeout error
- PvScsiBtStatScsiParity = 0x34, // SCSI parity error detected
+ PvScsiBtStatDataUnderrun = 0x0c,
+ PvScsiBtStatSelTimeout = 0x11, // SCSI selection timeout
+ PvScsiBtStatDatarun = 0x12, // Data overrun/underrun
+ PvScsiBtStatBusFree = 0x13, // Unexpected bus free
+ PvScsiBtStatInvPhase = 0x14, //
+ // Invalid bus phase or sequence requested
+ // by target
+ //
+ PvScsiBtStatLunMismatch = 0x17, //
+ // Linked CCB has different LUN from first
+ // CCB
+ //
+ PvScsiBtStatSensFailed = 0x1b, // Auto request sense failed
+ PvScsiBtStatTagReject = 0x1c, //
+ // SCSI II tagged queueing message rejected
+ // by target
+ //
+ PvScsiBtStatBadMsg = 0x1d, //
+ // Unsupported message received by the host
+ // adapter
+ //
+ PvScsiBtStatHaHardware = 0x20, // Host adapter hardware failed
+ PvScsiBtStatNoResponse = 0x21, //
+ // Target did not respond to SCSI ATN sent
+ // a SCSI RST
+ //
+ PvScsiBtStatSentRst = 0x22, // Host adapter asserted a SCSI RST
+ PvScsiBtStatRecvRst = 0x23, // Other SCSI devices asserted a SCSI RST
+ PvScsiBtStatDisconnect = 0x24, //
+ // Target device reconnected improperly
+ // (w/o tag)
+ //
+ PvScsiBtStatBusReset = 0x25, // Host adapter issued BUS device reset
+ PvScsiBtStatAbortQueue = 0x26, // Abort queue generated
+ PvScsiBtStatHaSoftware = 0x27, // Host adapter software error
+ PvScsiBtStatHaTimeout = 0x30, // Host adapter hardware timeout error
+ PvScsiBtStatScsiParity = 0x34, // SCSI parity error detected
} PVSCSI_HOST_BUS_ADAPTER_STATUS;
#pragma pack (1)
typedef struct {
- UINT64 Context;
- UINT64 DataLen;
- UINT32 SenseLen;
- UINT16 HostStatus;
- UINT16 ScsiStatus;
- UINT32 Pad[2];
+ UINT64 Context;
+ UINT64 DataLen;
+ UINT32 SenseLen;
+ UINT16 HostStatus;
+ UINT16 ScsiStatus;
+ UINT32 Pad[2];
} PVSCSI_RING_CMP_DESC;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
index 73db4b59a1..db828d31b3 100644
--- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
+++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
@@ -20,69 +20,69 @@
//
// Host Bridge Device ID (DID) value for Q35/MCH
//
-#define INTEL_Q35_MCH_DEVICE_ID 0x29C0
+#define INTEL_Q35_MCH_DEVICE_ID 0x29C0
//
// B/D/F/Type: 0/0/0/PCI
//
-#define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
-
-#define MCH_EXT_TSEG_MB 0x50
-#define MCH_EXT_TSEG_MB_QUERY 0xFFFF
-
-#define MCH_GGC 0x52
-#define MCH_GGC_IVD BIT1
-
-#define MCH_PCIEXBAR_LOW 0x60
-#define MCH_PCIEXBAR_LOWMASK 0x0FFFFFFF
-#define MCH_PCIEXBAR_BUS_FF 0
-#define MCH_PCIEXBAR_EN BIT0
-
-#define MCH_PCIEXBAR_HIGH 0x64
-#define MCH_PCIEXBAR_HIGHMASK 0xFFFFFFF0
-
-#define MCH_PAM0 0x90
-#define MCH_PAM1 0x91
-#define MCH_PAM2 0x92
-#define MCH_PAM3 0x93
-#define MCH_PAM4 0x94
-#define MCH_PAM5 0x95
-#define MCH_PAM6 0x96
-
-#define MCH_DEFAULT_SMBASE_CTL 0x9C
-#define MCH_DEFAULT_SMBASE_QUERY 0xFF
-#define MCH_DEFAULT_SMBASE_IN_RAM 0x01
-#define MCH_DEFAULT_SMBASE_LCK 0x02
-#define MCH_DEFAULT_SMBASE_SIZE SIZE_128KB
-
-#define MCH_SMRAM 0x9D
-#define MCH_SMRAM_D_LCK BIT4
-#define MCH_SMRAM_G_SMRAME BIT3
-
-#define MCH_ESMRAMC 0x9E
-#define MCH_ESMRAMC_H_SMRAME BIT7
-#define MCH_ESMRAMC_E_SMERR BIT6
-#define MCH_ESMRAMC_SM_CACHE BIT5
-#define MCH_ESMRAMC_SM_L1 BIT4
-#define MCH_ESMRAMC_SM_L2 BIT3
-#define MCH_ESMRAMC_TSEG_EXT (BIT2 | BIT1)
-#define MCH_ESMRAMC_TSEG_8MB BIT2
-#define MCH_ESMRAMC_TSEG_2MB BIT1
-#define MCH_ESMRAMC_TSEG_1MB 0
-#define MCH_ESMRAMC_TSEG_MASK (BIT2 | BIT1)
-#define MCH_ESMRAMC_T_EN BIT0
-
-#define MCH_GBSM 0xA4
-#define MCH_GBSM_MB_SHIFT 20
-
-#define MCH_BGSM 0xA8
-#define MCH_BGSM_MB_SHIFT 20
-
-#define MCH_TSEGMB 0xAC
-#define MCH_TSEGMB_MB_SHIFT 20
-
-#define MCH_TOLUD 0xB0
-#define MCH_TOLUD_MB_SHIFT 4
+#define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
+
+#define MCH_EXT_TSEG_MB 0x50
+#define MCH_EXT_TSEG_MB_QUERY 0xFFFF
+
+#define MCH_GGC 0x52
+#define MCH_GGC_IVD BIT1
+
+#define MCH_PCIEXBAR_LOW 0x60
+#define MCH_PCIEXBAR_LOWMASK 0x0FFFFFFF
+#define MCH_PCIEXBAR_BUS_FF 0
+#define MCH_PCIEXBAR_EN BIT0
+
+#define MCH_PCIEXBAR_HIGH 0x64
+#define MCH_PCIEXBAR_HIGHMASK 0xFFFFFFF0
+
+#define MCH_PAM0 0x90
+#define MCH_PAM1 0x91
+#define MCH_PAM2 0x92
+#define MCH_PAM3 0x93
+#define MCH_PAM4 0x94
+#define MCH_PAM5 0x95
+#define MCH_PAM6 0x96
+
+#define MCH_DEFAULT_SMBASE_CTL 0x9C
+#define MCH_DEFAULT_SMBASE_QUERY 0xFF
+#define MCH_DEFAULT_SMBASE_IN_RAM 0x01
+#define MCH_DEFAULT_SMBASE_LCK 0x02
+#define MCH_DEFAULT_SMBASE_SIZE SIZE_128KB
+
+#define MCH_SMRAM 0x9D
+#define MCH_SMRAM_D_LCK BIT4
+#define MCH_SMRAM_G_SMRAME BIT3
+
+#define MCH_ESMRAMC 0x9E
+#define MCH_ESMRAMC_H_SMRAME BIT7
+#define MCH_ESMRAMC_E_SMERR BIT6
+#define MCH_ESMRAMC_SM_CACHE BIT5
+#define MCH_ESMRAMC_SM_L1 BIT4
+#define MCH_ESMRAMC_SM_L2 BIT3
+#define MCH_ESMRAMC_TSEG_EXT (BIT2 | BIT1)
+#define MCH_ESMRAMC_TSEG_8MB BIT2
+#define MCH_ESMRAMC_TSEG_2MB BIT1
+#define MCH_ESMRAMC_TSEG_1MB 0
+#define MCH_ESMRAMC_TSEG_MASK (BIT2 | BIT1)
+#define MCH_ESMRAMC_T_EN BIT0
+
+#define MCH_GBSM 0xA4
+#define MCH_GBSM_MB_SHIFT 20
+
+#define MCH_BGSM 0xA8
+#define MCH_BGSM_MB_SHIFT 20
+
+#define MCH_TSEGMB 0xAC
+#define MCH_TSEGMB_MB_SHIFT 20
+
+#define MCH_TOLUD 0xB0
+#define MCH_TOLUD_MB_SHIFT 4
//
// B/D/F/Type: 0/0x1f/0/PCI
@@ -93,35 +93,35 @@
#define POWER_MGMT_REGISTER_Q35_EFI_PCI_ADDRESS(Offset) \
EFI_PCI_ADDRESS (0, 0x1f, 0, (Offset))
-#define ICH9_PMBASE 0x40
-#define ICH9_PMBASE_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
+#define ICH9_PMBASE 0x40
+#define ICH9_PMBASE_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
BIT10 | BIT9 | BIT8 | BIT7)
-#define ICH9_ACPI_CNTL 0x44
-#define ICH9_ACPI_CNTL_ACPI_EN BIT7
+#define ICH9_ACPI_CNTL 0x44
+#define ICH9_ACPI_CNTL_ACPI_EN BIT7
-#define ICH9_GEN_PMCON_1 0xA0
-#define ICH9_GEN_PMCON_1_SMI_LOCK BIT4
+#define ICH9_GEN_PMCON_1 0xA0
+#define ICH9_GEN_PMCON_1_SMI_LOCK BIT4
-#define ICH9_RCBA 0xF0
-#define ICH9_RCBA_EN BIT0
+#define ICH9_RCBA 0xF0
+#define ICH9_RCBA_EN BIT0
//
// IO ports
//
#define ICH9_APM_CNT 0xB2
-#define ICH9_APM_CNT_CPU_HOTPLUG 0x04
+#define ICH9_APM_CNT_CPU_HOTPLUG 0x04
#define ICH9_APM_STS 0xB3
-#define ICH9_CPU_HOTPLUG_BASE 0x0CD8
+#define ICH9_CPU_HOTPLUG_BASE 0x0CD8
//
// IO ports relative to PMBASE
//
-#define ICH9_PMBASE_OFS_SMI_EN 0x30
-#define ICH9_SMI_EN_APMC_EN BIT5
-#define ICH9_SMI_EN_GBL_SMI_EN BIT0
+#define ICH9_PMBASE_OFS_SMI_EN 0x30
+#define ICH9_SMI_EN_APMC_EN BIT5
+#define ICH9_SMI_EN_GBL_SMI_EN BIT0
-#define ICH9_ROOT_COMPLEX_BASE 0xFED1C000
+#define ICH9_ROOT_COMPLEX_BASE 0xFED1C000
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h
index d0e83102c1..1b7c6c8df3 100644
--- a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h
+++ b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h
@@ -28,21 +28,21 @@
// register,
// - followed by distinguished bitmasks or values in the register.
//
-#define QEMU_CPUHP_R_CMD_DATA2 0x0
+#define QEMU_CPUHP_R_CMD_DATA2 0x0
-#define QEMU_CPUHP_R_CPU_STAT 0x4
-#define QEMU_CPUHP_STAT_ENABLED BIT0
-#define QEMU_CPUHP_STAT_INSERT BIT1
-#define QEMU_CPUHP_STAT_REMOVE BIT2
-#define QEMU_CPUHP_STAT_EJECT BIT3
-#define QEMU_CPUHP_STAT_FW_REMOVE BIT4
+#define QEMU_CPUHP_R_CPU_STAT 0x4
+#define QEMU_CPUHP_STAT_ENABLED BIT0
+#define QEMU_CPUHP_STAT_INSERT BIT1
+#define QEMU_CPUHP_STAT_REMOVE BIT2
+#define QEMU_CPUHP_STAT_EJECT BIT3
+#define QEMU_CPUHP_STAT_FW_REMOVE BIT4
-#define QEMU_CPUHP_RW_CMD_DATA 0x8
+#define QEMU_CPUHP_RW_CMD_DATA 0x8
-#define QEMU_CPUHP_W_CPU_SEL 0x0
+#define QEMU_CPUHP_W_CPU_SEL 0x0
-#define QEMU_CPUHP_W_CMD 0x5
-#define QEMU_CPUHP_CMD_GET_PENDING 0x0
-#define QEMU_CPUHP_CMD_GET_ARCH_ID 0x3
+#define QEMU_CPUHP_W_CMD 0x5
+#define QEMU_CPUHP_CMD_GET_PENDING 0x0
+#define QEMU_CPUHP_CMD_GET_ARCH_ID 0x3
#endif // QEMU_CPU_HOTPLUG_H_
diff --git a/OvmfPkg/Include/IndustryStandard/QemuFwCfg.h b/OvmfPkg/Include/IndustryStandard/QemuFwCfg.h
index 7969aba3ca..9adf158c22 100644
--- a/OvmfPkg/Include/IndustryStandard/QemuFwCfg.h
+++ b/OvmfPkg/Include/IndustryStandard/QemuFwCfg.h
@@ -18,69 +18,68 @@
// The size, in bytes, of names of firmware configuration files, including at
// least one terminating NUL byte.
//
-#define QEMU_FW_CFG_FNAME_SIZE 56
+#define QEMU_FW_CFG_FNAME_SIZE 56
//
// If the following bit is set in the UINT32 fw_cfg revision / feature bitmap
// -- read from key 0x0001 with the basic IO Port or MMIO method --, then the
// DMA interface is available.
//
-#define FW_CFG_F_DMA BIT1
+#define FW_CFG_F_DMA BIT1
//
// Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).
//
-#define FW_CFG_DMA_CTL_ERROR BIT0
-#define FW_CFG_DMA_CTL_READ BIT1
-#define FW_CFG_DMA_CTL_SKIP BIT2
-#define FW_CFG_DMA_CTL_SELECT BIT3
-#define FW_CFG_DMA_CTL_WRITE BIT4
+#define FW_CFG_DMA_CTL_ERROR BIT0
+#define FW_CFG_DMA_CTL_READ BIT1
+#define FW_CFG_DMA_CTL_SKIP BIT2
+#define FW_CFG_DMA_CTL_SELECT BIT3
+#define FW_CFG_DMA_CTL_WRITE BIT4
//
// The fw_cfg registers can be found at these IO Ports, on the IO-mapped
// platforms (Ia32 and X64).
//
-#define FW_CFG_IO_SELECTOR 0x510
-#define FW_CFG_IO_DATA 0x511
-#define FW_CFG_IO_DMA_ADDRESS 0x514
+#define FW_CFG_IO_SELECTOR 0x510
+#define FW_CFG_IO_DATA 0x511
+#define FW_CFG_IO_DMA_ADDRESS 0x514
//
// Numerically defined keys.
//
typedef enum {
- QemuFwCfgItemSignature = 0x0000,
- QemuFwCfgItemInterfaceVersion = 0x0001,
- QemuFwCfgItemSystemUuid = 0x0002,
- QemuFwCfgItemRamSize = 0x0003,
- QemuFwCfgItemGraphicsEnabled = 0x0004,
- QemuFwCfgItemSmpCpuCount = 0x0005,
- QemuFwCfgItemMachineId = 0x0006,
- QemuFwCfgItemKernelAddress = 0x0007,
- QemuFwCfgItemKernelSize = 0x0008,
- QemuFwCfgItemKernelCommandLine = 0x0009,
- QemuFwCfgItemInitrdAddress = 0x000a,
- QemuFwCfgItemInitrdSize = 0x000b,
- QemuFwCfgItemBootDevice = 0x000c,
- QemuFwCfgItemNumaData = 0x000d,
- QemuFwCfgItemBootMenu = 0x000e,
- QemuFwCfgItemMaximumCpuCount = 0x000f,
- QemuFwCfgItemKernelEntry = 0x0010,
- QemuFwCfgItemKernelData = 0x0011,
- QemuFwCfgItemInitrdData = 0x0012,
- QemuFwCfgItemCommandLineAddress = 0x0013,
- QemuFwCfgItemCommandLineSize = 0x0014,
- QemuFwCfgItemCommandLineData = 0x0015,
- QemuFwCfgItemKernelSetupAddress = 0x0016,
- QemuFwCfgItemKernelSetupSize = 0x0017,
- QemuFwCfgItemKernelSetupData = 0x0018,
- QemuFwCfgItemFileDir = 0x0019,
-
- QemuFwCfgItemX86AcpiTables = 0x8000,
- QemuFwCfgItemX86SmbiosTables = 0x8001,
- QemuFwCfgItemX86Irq0Override = 0x8002,
- QemuFwCfgItemX86E820Table = 0x8003,
- QemuFwCfgItemX86HpetData = 0x8004,
+ QemuFwCfgItemSignature = 0x0000,
+ QemuFwCfgItemInterfaceVersion = 0x0001,
+ QemuFwCfgItemSystemUuid = 0x0002,
+ QemuFwCfgItemRamSize = 0x0003,
+ QemuFwCfgItemGraphicsEnabled = 0x0004,
+ QemuFwCfgItemSmpCpuCount = 0x0005,
+ QemuFwCfgItemMachineId = 0x0006,
+ QemuFwCfgItemKernelAddress = 0x0007,
+ QemuFwCfgItemKernelSize = 0x0008,
+ QemuFwCfgItemKernelCommandLine = 0x0009,
+ QemuFwCfgItemInitrdAddress = 0x000a,
+ QemuFwCfgItemInitrdSize = 0x000b,
+ QemuFwCfgItemBootDevice = 0x000c,
+ QemuFwCfgItemNumaData = 0x000d,
+ QemuFwCfgItemBootMenu = 0x000e,
+ QemuFwCfgItemMaximumCpuCount = 0x000f,
+ QemuFwCfgItemKernelEntry = 0x0010,
+ QemuFwCfgItemKernelData = 0x0011,
+ QemuFwCfgItemInitrdData = 0x0012,
+ QemuFwCfgItemCommandLineAddress = 0x0013,
+ QemuFwCfgItemCommandLineSize = 0x0014,
+ QemuFwCfgItemCommandLineData = 0x0015,
+ QemuFwCfgItemKernelSetupAddress = 0x0016,
+ QemuFwCfgItemKernelSetupSize = 0x0017,
+ QemuFwCfgItemKernelSetupData = 0x0018,
+ QemuFwCfgItemFileDir = 0x0019,
+ QemuFwCfgItemX86AcpiTables = 0x8000,
+ QemuFwCfgItemX86SmbiosTables = 0x8001,
+ QemuFwCfgItemX86Irq0Override = 0x8002,
+ QemuFwCfgItemX86E820Table = 0x8003,
+ QemuFwCfgItemX86HpetData = 0x8004,
} FIRMWARE_CONFIG_ITEM;
//
@@ -89,9 +88,9 @@ typedef enum {
//
#pragma pack (1)
typedef struct {
- UINT32 Control;
- UINT32 Length;
- UINT64 Address;
+ UINT32 Control;
+ UINT32 Length;
+ UINT64 Address;
} FW_CFG_DMA_ACCESS;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/QemuLoader.h b/OvmfPkg/Include/IndustryStandard/QemuLoader.h
index 5782a23c43..cf953c448b 100644
--- a/OvmfPkg/Include/IndustryStandard/QemuLoader.h
+++ b/OvmfPkg/Include/IndustryStandard/QemuLoader.h
@@ -16,7 +16,7 @@
//
// The types and the documentation reflects the SeaBIOS interface.
//
-#define QEMU_LOADER_FNAME_SIZE QEMU_FW_CFG_FNAME_SIZE
+#define QEMU_LOADER_FNAME_SIZE QEMU_FW_CFG_FNAME_SIZE
typedef enum {
QemuLoaderCmdAllocate = 1,
@@ -36,9 +36,9 @@ typedef enum {
// allocated in the zone specified by Zone, aligned at a multiple of Alignment.
//
typedef struct {
- UINT8 File[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT32 Alignment; // power of two
- UINT8 Zone; // QEMU_LOADER_ALLOC_ZONE values
+ UINT8 File[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT32 Alignment; // power of two
+ UINT8 Zone; // QEMU_LOADER_ALLOC_ZONE values
} QEMU_LOADER_ALLOCATE;
//
@@ -49,10 +49,10 @@ typedef struct {
// been placed (when QemuLoaderCmdAllocate has been executed for PointeeFile).
//
typedef struct {
- UINT8 PointerFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT8 PointeeFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT32 PointerOffset;
- UINT8 PointerSize; // one of 1, 2, 4, 8
+ UINT8 PointerFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT8 PointeeFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT32 PointerOffset;
+ UINT8 PointerSize; // one of 1, 2, 4, 8
} QEMU_LOADER_ADD_POINTER;
//
@@ -61,10 +61,10 @@ typedef struct {
// UINT8 result at ResultOffset in the same File.
//
typedef struct {
- UINT8 File[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT32 ResultOffset;
- UINT32 Start;
- UINT32 Length;
+ UINT8 File[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT32 ResultOffset;
+ UINT32 Start;
+ UINT32 Length;
} QEMU_LOADER_ADD_CHECKSUM;
//
@@ -84,21 +84,21 @@ typedef struct {
// field.
//
typedef struct {
- UINT8 PointerFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT8 PointeeFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
- UINT32 PointerOffset;
- UINT32 PointeeOffset;
- UINT8 PointerSize; // one of 1, 2, 4, 8
+ UINT8 PointerFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT8 PointeeFile[QEMU_LOADER_FNAME_SIZE]; // NUL-terminated
+ UINT32 PointerOffset;
+ UINT32 PointeeOffset;
+ UINT8 PointerSize; // one of 1, 2, 4, 8
} QEMU_LOADER_WRITE_POINTER;
typedef struct {
- UINT32 Type; // QEMU_LOADER_COMMAND_TYPE values
+ UINT32 Type; // QEMU_LOADER_COMMAND_TYPE values
union {
- QEMU_LOADER_ALLOCATE Allocate;
- QEMU_LOADER_ADD_POINTER AddPointer;
- QEMU_LOADER_ADD_CHECKSUM AddChecksum;
- QEMU_LOADER_WRITE_POINTER WritePointer;
- UINT8 Padding[124];
+ QEMU_LOADER_ALLOCATE Allocate;
+ QEMU_LOADER_ADD_POINTER AddPointer;
+ QEMU_LOADER_ADD_CHECKSUM AddChecksum;
+ QEMU_LOADER_WRITE_POINTER WritePointer;
+ UINT8 Padding[124];
} Command;
} QEMU_LOADER_ENTRY;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h b/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h
index e4fc5df26e..a70b99fccf 100644
--- a/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h
+++ b/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h
@@ -18,22 +18,22 @@
// The hints apply to PCI Bridges whose PCI_DEVICE_INDEPENDENT_REGION.VendorId
// equals the following value.
//
-#define QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT 0x1B36
+#define QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT 0x1B36
//
// Common capability header for all hints.
//
#pragma pack (1)
typedef struct {
- EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;
- UINT8 Type;
+ EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;
+ UINT8 Type;
} QEMU_PCI_BRIDGE_CAPABILITY_HDR;
#pragma pack ()
//
// Values defined for QEMU_PCI_BRIDGE_CAPABILITY_HDR.Type.
//
-#define QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION 0x01
+#define QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION 0x01
//
// PCI Resource Reservation structure for when
@@ -42,12 +42,12 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- QEMU_PCI_BRIDGE_CAPABILITY_HDR BridgeHdr;
- UINT32 BusNumbers;
- UINT64 Io;
- UINT32 NonPrefetchable32BitMmio;
- UINT32 Prefetchable32BitMmio;
- UINT64 Prefetchable64BitMmio;
+ QEMU_PCI_BRIDGE_CAPABILITY_HDR BridgeHdr;
+ UINT32 BusNumbers;
+ UINT64 Io;
+ UINT32 NonPrefetchable32BitMmio;
+ UINT32 Prefetchable32BitMmio;
+ UINT64 Prefetchable64BitMmio;
} QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/QemuTpm.h b/OvmfPkg/Include/IndustryStandard/QemuTpm.h
index a43e2547bd..1a269e6ad8 100644
--- a/OvmfPkg/Include/IndustryStandard/QemuTpm.h
+++ b/OvmfPkg/Include/IndustryStandard/QemuTpm.h
@@ -17,28 +17,28 @@
//
// whether function is blocked by BIOS settings; bits 0, 1, 2
//
-#define QEMU_TPM_PPI_FUNC_NOT_IMPLEMENTED (0 << 0)
-#define QEMU_TPM_PPI_FUNC_BIOS_ONLY (1 << 0)
-#define QEMU_TPM_PPI_FUNC_BLOCKED (2 << 0)
-#define QEMU_TPM_PPI_FUNC_ALLOWED_USR_REQ (3 << 0)
-#define QEMU_TPM_PPI_FUNC_ALLOWED_USR_NOT_REQ (4 << 0)
-#define QEMU_TPM_PPI_FUNC_MASK (7 << 0)
+#define QEMU_TPM_PPI_FUNC_NOT_IMPLEMENTED (0 << 0)
+#define QEMU_TPM_PPI_FUNC_BIOS_ONLY (1 << 0)
+#define QEMU_TPM_PPI_FUNC_BLOCKED (2 << 0)
+#define QEMU_TPM_PPI_FUNC_ALLOWED_USR_REQ (3 << 0)
+#define QEMU_TPM_PPI_FUNC_ALLOWED_USR_NOT_REQ (4 << 0)
+#define QEMU_TPM_PPI_FUNC_MASK (7 << 0)
//
// The following structure is shared between firmware and ACPI.
//
#pragma pack (1)
typedef struct {
- UINT8 Func[256]; // func
- UINT8 In; // ppin
- UINT32 Ip; // ppip
- UINT32 Response; // pprp
- UINT32 Request; // pprq
- UINT32 RequestParameter; // pprm
- UINT32 LastRequest; // lppr
- UINT32 FRet; // fret
- UINT8 Res1[0x40]; // res1
- UINT8 NextStep; // next_step
+ UINT8 Func[256]; // func
+ UINT8 In; // ppin
+ UINT32 Ip; // ppip
+ UINT32 Response; // pprp
+ UINT32 Request; // pprq
+ UINT32 RequestParameter; // pprm
+ UINT32 LastRequest; // lppr
+ UINT32 FRet; // fret
+ UINT8 Res1[0x40]; // res1
+ UINT8 NextStep; // next_step
} QEMU_TPM_PPI;
#pragma pack ()
@@ -47,15 +47,15 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- UINT32 PpiAddress;
- UINT8 TpmVersion;
- UINT8 PpiVersion;
+ UINT32 PpiAddress;
+ UINT8 TpmVersion;
+ UINT8 PpiVersion;
} QEMU_FWCFG_TPM_CONFIG;
#pragma pack ()
-#define QEMU_TPM_VERSION_UNSPEC 0
-#define QEMU_TPM_VERSION_1_2 1
-#define QEMU_TPM_VERSION_2 2
+#define QEMU_TPM_VERSION_UNSPEC 0
+#define QEMU_TPM_VERSION_1_2 1
+#define QEMU_TPM_VERSION_2 2
#define QEMU_TPM_PPI_VERSION_NONE 0
#define QEMU_TPM_PPI_VERSION_1_30 1
diff --git a/OvmfPkg/Include/IndustryStandard/Virtio095.h b/OvmfPkg/Include/IndustryStandard/Virtio095.h
index fe886d223e..e06f87db79 100644
--- a/OvmfPkg/Include/IndustryStandard/Virtio095.h
+++ b/OvmfPkg/Include/IndustryStandard/Virtio095.h
@@ -32,9 +32,8 @@
//
// Virtio IDs
//
-#define VIRTIO_VENDOR_ID 0x1AF4
-#define VIRTIO_MMIO_MAGIC 0x74726976 // "virt"
-
+#define VIRTIO_VENDOR_ID 0x1AF4
+#define VIRTIO_MMIO_MAGIC 0x74726976 // "virt"
//
// VirtIo Device Specific Configuration Offsets
@@ -46,36 +45,36 @@
//
// PCI VirtIo Header Offsets
//
-#define VIRTIO_PCI_OFFSET_DEVICE_FEATURES 0x00
-#define VIRTIO_PCI_OFFSET_GUEST_FEATURES 0x04
-#define VIRTIO_PCI_OFFSET_QUEUE_ADDRESS 0x08
-#define VIRTIO_PCI_OFFSET_QUEUE_SIZE 0x0C
-#define VIRTIO_PCI_OFFSET_QUEUE_SELECT 0x0E
-#define VIRTIO_PCI_OFFSET_QUEUE_NOTIFY 0x10
-#define VIRTIO_PCI_OFFSET_QUEUE_DEVICE_STATUS 0x12
-#define VIRTIO_PCI_OFFSET_QUEUE_DEVICE_ISR 0x13
+#define VIRTIO_PCI_OFFSET_DEVICE_FEATURES 0x00
+#define VIRTIO_PCI_OFFSET_GUEST_FEATURES 0x04
+#define VIRTIO_PCI_OFFSET_QUEUE_ADDRESS 0x08
+#define VIRTIO_PCI_OFFSET_QUEUE_SIZE 0x0C
+#define VIRTIO_PCI_OFFSET_QUEUE_SELECT 0x0E
+#define VIRTIO_PCI_OFFSET_QUEUE_NOTIFY 0x10
+#define VIRTIO_PCI_OFFSET_QUEUE_DEVICE_STATUS 0x12
+#define VIRTIO_PCI_OFFSET_QUEUE_DEVICE_ISR 0x13
//
// MMIO VirtIo Header Offsets
//
-#define VIRTIO_MMIO_OFFSET_MAGIC 0x00
-#define VIRTIO_MMIO_OFFSET_VERSION 0x04
-#define VIRTIO_MMIO_OFFSET_DEVICE_ID 0x08
-#define VIRTIO_MMIO_OFFSET_VENDOR_ID 0x0C
-#define VIRTIO_MMIO_OFFSET_HOST_FEATURES 0x10
-#define VIRTIO_MMIO_OFFSET_HOST_FEATURES_SEL 0x14
-#define VIRTIO_MMIO_OFFSET_GUEST_FEATURES 0x20
-#define VIRTIO_MMIO_OFFSET_GUEST_FEATURES_SEL 0x24
-#define VIRTIO_MMIO_OFFSET_GUEST_PAGE_SIZE 0x28
-#define VIRTIO_MMIO_OFFSET_QUEUE_SEL 0x30
-#define VIRTIO_MMIO_OFFSET_QUEUE_NUM_MAX 0x34
-#define VIRTIO_MMIO_OFFSET_QUEUE_NUM 0x38
-#define VIRTIO_MMIO_OFFSET_QUEUE_ALIGN 0x3C
-#define VIRTIO_MMIO_OFFSET_QUEUE_PFN 0x40
-#define VIRTIO_MMIO_OFFSET_QUEUE_NOTIFY 0x50
-#define VIRTIO_MMIO_OFFSET_INTERRUPT_STATUS 0x60
-#define VIRTIO_MMIO_OFFSET_INTERRUPT_ACK 0x64
-#define VIRTIO_MMIO_OFFSET_STATUS 0x70
+#define VIRTIO_MMIO_OFFSET_MAGIC 0x00
+#define VIRTIO_MMIO_OFFSET_VERSION 0x04
+#define VIRTIO_MMIO_OFFSET_DEVICE_ID 0x08
+#define VIRTIO_MMIO_OFFSET_VENDOR_ID 0x0C
+#define VIRTIO_MMIO_OFFSET_HOST_FEATURES 0x10
+#define VIRTIO_MMIO_OFFSET_HOST_FEATURES_SEL 0x14
+#define VIRTIO_MMIO_OFFSET_GUEST_FEATURES 0x20
+#define VIRTIO_MMIO_OFFSET_GUEST_FEATURES_SEL 0x24
+#define VIRTIO_MMIO_OFFSET_GUEST_PAGE_SIZE 0x28
+#define VIRTIO_MMIO_OFFSET_QUEUE_SEL 0x30
+#define VIRTIO_MMIO_OFFSET_QUEUE_NUM_MAX 0x34
+#define VIRTIO_MMIO_OFFSET_QUEUE_NUM 0x38
+#define VIRTIO_MMIO_OFFSET_QUEUE_ALIGN 0x3C
+#define VIRTIO_MMIO_OFFSET_QUEUE_PFN 0x40
+#define VIRTIO_MMIO_OFFSET_QUEUE_NOTIFY 0x50
+#define VIRTIO_MMIO_OFFSET_INTERRUPT_STATUS 0x60
+#define VIRTIO_MMIO_OFFSET_INTERRUPT_ACK 0x64
+#define VIRTIO_MMIO_OFFSET_STATUS 0x70
//
// Data in the communication area is defined as packed and accessed as
@@ -94,76 +93,73 @@
//
// virtio-0.9.5, 2.3.4 Available Ring
//
-#define VRING_AVAIL_F_NO_INTERRUPT BIT0
+#define VRING_AVAIL_F_NO_INTERRUPT BIT0
typedef struct {
- volatile UINT16 *Flags;
- volatile UINT16 *Idx;
+ volatile UINT16 *Flags;
+ volatile UINT16 *Idx;
- volatile UINT16 *Ring; // QueueSize elements
- volatile UINT16 *UsedEvent; // unused as per negotiation
+ volatile UINT16 *Ring; // QueueSize elements
+ volatile UINT16 *UsedEvent; // unused as per negotiation
} VRING_AVAIL;
-
//
// virtio-0.9.5, 2.3.5 Used Ring
//
-#define VRING_USED_F_NO_NOTIFY BIT0
+#define VRING_USED_F_NO_NOTIFY BIT0
#pragma pack(1)
typedef struct {
- UINT32 Id;
- UINT32 Len;
+ UINT32 Id;
+ UINT32 Len;
} VRING_USED_ELEM;
#pragma pack()
typedef struct {
- volatile UINT16 *Flags;
- volatile UINT16 *Idx;
- volatile VRING_USED_ELEM *UsedElem; // QueueSize elements
- volatile UINT16 *AvailEvent; // unused as per negotiation
+ volatile UINT16 *Flags;
+ volatile UINT16 *Idx;
+ volatile VRING_USED_ELEM *UsedElem; // QueueSize elements
+ volatile UINT16 *AvailEvent; // unused as per negotiation
} VRING_USED;
-
//
// virtio-0.9.5, 2.3.2 Descriptor Table
//
-#define VRING_DESC_F_NEXT BIT0 // more descriptors in this request
-#define VRING_DESC_F_WRITE BIT1 // buffer to be written *by the host*
-#define VRING_DESC_F_INDIRECT BIT2 // unused
+#define VRING_DESC_F_NEXT BIT0 // more descriptors in this request
+#define VRING_DESC_F_WRITE BIT1 // buffer to be written *by the host*
+#define VRING_DESC_F_INDIRECT BIT2 // unused
#pragma pack(1)
typedef struct {
- UINT64 Addr;
- UINT32 Len;
- UINT16 Flags;
- UINT16 Next;
+ UINT64 Addr;
+ UINT32 Len;
+ UINT16 Flags;
+ UINT16 Next;
} VRING_DESC;
#pragma pack()
typedef struct {
- UINTN NumPages;
- VOID *Base; // deallocate only this field
- volatile VRING_DESC *Desc; // QueueSize elements
- VRING_AVAIL Avail;
- VRING_USED Used;
- UINT16 QueueSize;
+ UINTN NumPages;
+ VOID *Base; // deallocate only this field
+ volatile VRING_DESC *Desc; // QueueSize elements
+ VRING_AVAIL Avail;
+ VRING_USED Used;
+ UINT16 QueueSize;
} VRING;
//
// virtio-0.9.5, 2.2.2.1 Device Status
//
-#define VSTAT_ACK BIT0
-#define VSTAT_DRIVER BIT1
-#define VSTAT_DRIVER_OK BIT2
-#define VSTAT_FAILED BIT7
+#define VSTAT_ACK BIT0
+#define VSTAT_DRIVER BIT1
+#define VSTAT_DRIVER_OK BIT2
+#define VSTAT_FAILED BIT7
//
// virtio-0.9.5, Appendix B: Reserved (Device-Independent) Feature Bits
//
-#define VIRTIO_F_NOTIFY_ON_EMPTY BIT24
-#define VIRTIO_F_RING_INDIRECT_DESC BIT28
-#define VIRTIO_F_RING_EVENT_IDX BIT29
-
+#define VIRTIO_F_NOTIFY_ON_EMPTY BIT24
+#define VIRTIO_F_RING_INDIRECT_DESC BIT28
+#define VIRTIO_F_RING_EVENT_IDX BIT29
#endif // _VIRTIO_0_9_5_H_
diff --git a/OvmfPkg/Include/IndustryStandard/Virtio095Net.h b/OvmfPkg/Include/IndustryStandard/Virtio095Net.h
index 9c0ed5ed24..372015a0f5 100644
--- a/OvmfPkg/Include/IndustryStandard/Virtio095Net.h
+++ b/OvmfPkg/Include/IndustryStandard/Virtio095Net.h
@@ -18,74 +18,74 @@
//
#pragma pack(1)
typedef struct {
- UINT8 Mac[6];
- UINT16 LinkStatus;
+ UINT8 Mac[6];
+ UINT16 LinkStatus;
} VIRTIO_NET_CONFIG;
#pragma pack()
-#define OFFSET_OF_VNET(Field) OFFSET_OF (VIRTIO_NET_CONFIG, Field)
-#define SIZE_OF_VNET(Field) (sizeof ((VIRTIO_NET_CONFIG *) 0)->Field)
+#define OFFSET_OF_VNET(Field) OFFSET_OF (VIRTIO_NET_CONFIG, Field)
+#define SIZE_OF_VNET(Field) (sizeof ((VIRTIO_NET_CONFIG *) 0)->Field)
//
// Queue Identifiers
//
-#define VIRTIO_NET_Q_RX 0
-#define VIRTIO_NET_Q_TX 1
+#define VIRTIO_NET_Q_RX 0
+#define VIRTIO_NET_Q_TX 1
//
// Feature Bits
//
-#define VIRTIO_NET_F_CSUM BIT0 // host to checksum outgoing packets
-#define VIRTIO_NET_F_GUEST_CSUM BIT1 // guest to checksum incoming packets
-#define VIRTIO_NET_F_MAC BIT5 // MAC available to guest
-#define VIRTIO_NET_F_GSO BIT6 // deprecated
-#define VIRTIO_NET_F_GUEST_TSO4 BIT7 // guest can receive TSOv4
-#define VIRTIO_NET_F_GUEST_TSO6 BIT8 // guest can receive TSOv6
-#define VIRTIO_NET_F_GUEST_ECN BIT9 // guest can receive TSO with ECN
-#define VIRTIO_NET_F_GUEST_UFO BIT10 // guest can receive UFO
-#define VIRTIO_NET_F_HOST_TSO4 BIT11 // host can receive TSOv4
-#define VIRTIO_NET_F_HOST_TSO6 BIT12 // host can receive TSOv6
-#define VIRTIO_NET_F_HOST_ECN BIT13 // host can receive TSO with ECN
-#define VIRTIO_NET_F_HOST_UFO BIT14 // host can receive UFO
-#define VIRTIO_NET_F_MRG_RXBUF BIT15 // guest can merge receive buffers
-#define VIRTIO_NET_F_STATUS BIT16 // link status available to guest
-#define VIRTIO_NET_F_CTRL_VQ BIT17 // control channel available
-#define VIRTIO_NET_F_CTRL_RX BIT18 // control channel RX mode support
-#define VIRTIO_NET_F_CTRL_VLAN BIT19 // control channel VLAN filtering
-#define VIRTIO_NET_F_GUEST_ANNOUNCE BIT21 // guest can send gratuitous pkts
+#define VIRTIO_NET_F_CSUM BIT0 // host to checksum outgoing packets
+#define VIRTIO_NET_F_GUEST_CSUM BIT1 // guest to checksum incoming packets
+#define VIRTIO_NET_F_MAC BIT5 // MAC available to guest
+#define VIRTIO_NET_F_GSO BIT6 // deprecated
+#define VIRTIO_NET_F_GUEST_TSO4 BIT7 // guest can receive TSOv4
+#define VIRTIO_NET_F_GUEST_TSO6 BIT8 // guest can receive TSOv6
+#define VIRTIO_NET_F_GUEST_ECN BIT9 // guest can receive TSO with ECN
+#define VIRTIO_NET_F_GUEST_UFO BIT10 // guest can receive UFO
+#define VIRTIO_NET_F_HOST_TSO4 BIT11 // host can receive TSOv4
+#define VIRTIO_NET_F_HOST_TSO6 BIT12 // host can receive TSOv6
+#define VIRTIO_NET_F_HOST_ECN BIT13 // host can receive TSO with ECN
+#define VIRTIO_NET_F_HOST_UFO BIT14 // host can receive UFO
+#define VIRTIO_NET_F_MRG_RXBUF BIT15 // guest can merge receive buffers
+#define VIRTIO_NET_F_STATUS BIT16 // link status available to guest
+#define VIRTIO_NET_F_CTRL_VQ BIT17 // control channel available
+#define VIRTIO_NET_F_CTRL_RX BIT18 // control channel RX mode support
+#define VIRTIO_NET_F_CTRL_VLAN BIT19 // control channel VLAN filtering
+#define VIRTIO_NET_F_GUEST_ANNOUNCE BIT21 // guest can send gratuitous pkts
//
// Packet Header
//
#pragma pack(1)
typedef struct {
- UINT8 Flags;
- UINT8 GsoType;
- UINT16 HdrLen;
- UINT16 GsoSize;
- UINT16 CsumStart;
- UINT16 CsumOffset;
+ UINT8 Flags;
+ UINT8 GsoType;
+ UINT16 HdrLen;
+ UINT16 GsoSize;
+ UINT16 CsumStart;
+ UINT16 CsumOffset;
} VIRTIO_NET_REQ;
#pragma pack()
//
// Bits in VIRTIO_NET_REQ.Flags
//
-#define VIRTIO_NET_HDR_F_NEEDS_CSUM BIT0
+#define VIRTIO_NET_HDR_F_NEEDS_CSUM BIT0
//
// Types/Bits for VIRTIO_NET_REQ.GsoType
//
-#define VIRTIO_NET_HDR_GSO_NONE 0x00
-#define VIRTIO_NET_HDR_GSO_TCPV4 0x01
-#define VIRTIO_NET_HDR_GSO_UDP 0x03
-#define VIRTIO_NET_HDR_GSO_TCPV6 0x04
-#define VIRTIO_NET_HDR_GSO_ECN BIT7
+#define VIRTIO_NET_HDR_GSO_NONE 0x00
+#define VIRTIO_NET_HDR_GSO_TCPV4 0x01
+#define VIRTIO_NET_HDR_GSO_UDP 0x03
+#define VIRTIO_NET_HDR_GSO_TCPV6 0x04
+#define VIRTIO_NET_HDR_GSO_ECN BIT7
//
// Link Status Bits in VIRTIO_NET_CONFIG.LinkStatus
//
-#define VIRTIO_NET_S_LINK_UP BIT0
-#define VIRTIO_NET_S_ANNOUNCE BIT1
+#define VIRTIO_NET_S_LINK_UP BIT0
+#define VIRTIO_NET_S_ANNOUNCE BIT1
#endif // _VIRTIO_0_9_5_NET_H_
diff --git a/OvmfPkg/Include/IndustryStandard/Virtio10.h b/OvmfPkg/Include/IndustryStandard/Virtio10.h
index a1712247e0..c47bcbd41a 100644
--- a/OvmfPkg/Include/IndustryStandard/Virtio10.h
+++ b/OvmfPkg/Include/IndustryStandard/Virtio10.h
@@ -16,12 +16,12 @@
//
// Subsystem Device IDs (to be) introduced in VirtIo 1.0
//
-#define VIRTIO_SUBSYSTEM_GPU_DEVICE 16
+#define VIRTIO_SUBSYSTEM_GPU_DEVICE 16
//
// Subsystem Device IDs from the VirtIo spec at git commit 87fa6b5d8155;
// <https://github.com/oasis-tcs/virtio-spec/tree/87fa6b5d8155>.
//
-#define VIRTIO_SUBSYSTEM_FILESYSTEM 26
+#define VIRTIO_SUBSYSTEM_FILESYSTEM 26
//
// Structures for parsing the VirtIo 1.0 specific PCI capabilities from the
@@ -29,21 +29,21 @@
//
#pragma pack (1)
typedef struct {
- EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;
- UINT8 ConfigType; // Identifies the specific VirtIo 1.0 config structure
- UINT8 Bar; // The BAR that contains the structure
- UINT8 Padding[3];
- UINT32 Offset; // Offset within Bar until the start of the structure
- UINT32 Length; // Length of the structure
+ EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr;
+ UINT8 ConfigType; // Identifies the specific VirtIo 1.0 config structure
+ UINT8 Bar; // The BAR that contains the structure
+ UINT8 Padding[3];
+ UINT32 Offset; // Offset within Bar until the start of the structure
+ UINT32 Length; // Length of the structure
} VIRTIO_PCI_CAP;
#pragma pack ()
//
// Values for the VIRTIO_PCI_CAP.ConfigType field
//
-#define VIRTIO_PCI_CAP_COMMON_CFG 1 // Common configuration
-#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 // Notifications
-#define VIRTIO_PCI_CAP_DEVICE_CFG 4 // Device specific configuration
+#define VIRTIO_PCI_CAP_COMMON_CFG 1 // Common configuration
+#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 // Notifications
+#define VIRTIO_PCI_CAP_DEVICE_CFG 4 // Device specific configuration
//
// Structure pointed-to by Bar and Offset in VIRTIO_PCI_CAP when ConfigType is
@@ -51,46 +51,46 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- UINT32 DeviceFeatureSelect;
- UINT32 DeviceFeature;
- UINT32 DriverFeatureSelect;
- UINT32 DriverFeature;
- UINT16 MsixConfig;
- UINT16 NumQueues;
- UINT8 DeviceStatus;
- UINT8 ConfigGeneration;
- UINT16 QueueSelect;
- UINT16 QueueSize;
- UINT16 QueueMsixVector;
- UINT16 QueueEnable;
- UINT16 QueueNotifyOff;
- UINT64 QueueDesc;
- UINT64 QueueAvail;
- UINT64 QueueUsed;
+ UINT32 DeviceFeatureSelect;
+ UINT32 DeviceFeature;
+ UINT32 DriverFeatureSelect;
+ UINT32 DriverFeature;
+ UINT16 MsixConfig;
+ UINT16 NumQueues;
+ UINT8 DeviceStatus;
+ UINT8 ConfigGeneration;
+ UINT16 QueueSelect;
+ UINT16 QueueSize;
+ UINT16 QueueMsixVector;
+ UINT16 QueueEnable;
+ UINT16 QueueNotifyOff;
+ UINT64 QueueDesc;
+ UINT64 QueueAvail;
+ UINT64 QueueUsed;
} VIRTIO_PCI_COMMON_CFG;
#pragma pack ()
//
// VirtIo 1.0 device status bits
//
-#define VSTAT_FEATURES_OK BIT3
+#define VSTAT_FEATURES_OK BIT3
//
// VirtIo 1.0 reserved (device-independent) feature bits
//
-#define VIRTIO_F_VERSION_1 BIT32
-#define VIRTIO_F_IOMMU_PLATFORM BIT33
+#define VIRTIO_F_VERSION_1 BIT32
+#define VIRTIO_F_IOMMU_PLATFORM BIT33
//
// MMIO VirtIo Header Offsets
//
-#define VIRTIO_MMIO_OFFSET_QUEUE_READY 0x44
-#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_LO 0x80
-#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_HI 0x84
-#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_LO 0x90
-#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_HI 0x94
-#define VIRTIO_MMIO_OFFSET_QUEUE_USED_LO 0xa0
-#define VIRTIO_MMIO_OFFSET_QUEUE_USED_HI 0xa4
-#define VIRTIO_MMIO_OFFSET_CONFIG_GENERATION 0xfc
+#define VIRTIO_MMIO_OFFSET_QUEUE_READY 0x44
+#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_LO 0x80
+#define VIRTIO_MMIO_OFFSET_QUEUE_DESC_HI 0x84
+#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_LO 0x90
+#define VIRTIO_MMIO_OFFSET_QUEUE_AVAIL_HI 0x94
+#define VIRTIO_MMIO_OFFSET_QUEUE_USED_LO 0xa0
+#define VIRTIO_MMIO_OFFSET_QUEUE_USED_HI 0xa4
+#define VIRTIO_MMIO_OFFSET_CONFIG_GENERATION 0xfc
#endif // _VIRTIO_1_0_H_
diff --git a/OvmfPkg/Include/IndustryStandard/Virtio10Net.h b/OvmfPkg/Include/IndustryStandard/Virtio10Net.h
index 69dcaca465..4efb916408 100644
--- a/OvmfPkg/Include/IndustryStandard/Virtio10Net.h
+++ b/OvmfPkg/Include/IndustryStandard/Virtio10Net.h
@@ -18,8 +18,8 @@
//
#pragma pack (1)
typedef struct {
- VIRTIO_NET_REQ V0_9_5;
- UINT16 NumBuffers;
+ VIRTIO_NET_REQ V0_9_5;
+ UINT16 NumBuffers;
} VIRTIO_1_0_NET_REQ;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/VirtioBlk.h b/OvmfPkg/Include/IndustryStandard/VirtioBlk.h
index 23da619d77..7a904975c3 100644
--- a/OvmfPkg/Include/IndustryStandard/VirtioBlk.h
+++ b/OvmfPkg/Include/IndustryStandard/VirtioBlk.h
@@ -14,46 +14,45 @@
#include <IndustryStandard/Virtio.h>
-
//
// virtio-0.9.5, Appendix D: Block Device
//
#pragma pack(1)
typedef struct {
- UINT8 PhysicalBlockExp; // # of logical blocks per physical block (log2)
- UINT8 AlignmentOffset; // offset of first aligned logical block
- UINT16 MinIoSize; // suggested minimum I/O size in blocks
- UINT32 OptIoSize; // optimal (suggested maximum) I/O size in blocks
+ UINT8 PhysicalBlockExp; // # of logical blocks per physical block (log2)
+ UINT8 AlignmentOffset; // offset of first aligned logical block
+ UINT16 MinIoSize; // suggested minimum I/O size in blocks
+ UINT32 OptIoSize; // optimal (suggested maximum) I/O size in blocks
} VIRTIO_BLK_TOPOLOGY;
typedef struct {
- UINT64 Capacity;
- UINT32 SizeMax;
- UINT32 SegMax;
- UINT16 Cylinders;
- UINT8 Heads;
- UINT8 Sectors;
- UINT32 BlkSize;
- VIRTIO_BLK_TOPOLOGY Topology;
+ UINT64 Capacity;
+ UINT32 SizeMax;
+ UINT32 SegMax;
+ UINT16 Cylinders;
+ UINT8 Heads;
+ UINT8 Sectors;
+ UINT32 BlkSize;
+ VIRTIO_BLK_TOPOLOGY Topology;
} VIRTIO_BLK_CONFIG;
#pragma pack()
-#define OFFSET_OF_VBLK(Field) OFFSET_OF (VIRTIO_BLK_CONFIG, Field)
-#define SIZE_OF_VBLK(Field) (sizeof ((VIRTIO_BLK_CONFIG *) 0)->Field)
+#define OFFSET_OF_VBLK(Field) OFFSET_OF (VIRTIO_BLK_CONFIG, Field)
+#define SIZE_OF_VBLK(Field) (sizeof ((VIRTIO_BLK_CONFIG *) 0)->Field)
-#define VIRTIO_BLK_F_BARRIER BIT0
-#define VIRTIO_BLK_F_SIZE_MAX BIT1
-#define VIRTIO_BLK_F_SEG_MAX BIT2
-#define VIRTIO_BLK_F_GEOMETRY BIT4
-#define VIRTIO_BLK_F_RO BIT5
-#define VIRTIO_BLK_F_BLK_SIZE BIT6 // treated as "logical block size" in
+#define VIRTIO_BLK_F_BARRIER BIT0
+#define VIRTIO_BLK_F_SIZE_MAX BIT1
+#define VIRTIO_BLK_F_SEG_MAX BIT2
+#define VIRTIO_BLK_F_GEOMETRY BIT4
+#define VIRTIO_BLK_F_RO BIT5
+#define VIRTIO_BLK_F_BLK_SIZE BIT6 // treated as "logical block size" in
// practice; actual host side
// implementation negotiates "optimal"
// block size separately, via
// VIRTIO_BLK_F_TOPOLOGY
-#define VIRTIO_BLK_F_SCSI BIT7
-#define VIRTIO_BLK_F_FLUSH BIT9 // identical to "write cache enabled"
-#define VIRTIO_BLK_F_TOPOLOGY BIT10 // information on optimal I/O alignment
+#define VIRTIO_BLK_F_SCSI BIT7
+#define VIRTIO_BLK_F_FLUSH BIT9 // identical to "write cache enabled"
+#define VIRTIO_BLK_F_TOPOLOGY BIT10 // information on optimal I/O alignment
//
// We keep the status byte separate from the rest of the virtio-blk request
@@ -62,22 +61,22 @@ typedef struct {
//
#pragma pack(1)
typedef struct {
- UINT32 Type;
- UINT32 IoPrio;
- UINT64 Sector;
+ UINT32 Type;
+ UINT32 IoPrio;
+ UINT64 Sector;
} VIRTIO_BLK_REQ;
#pragma pack()
-#define VIRTIO_BLK_T_IN 0x00000000
-#define VIRTIO_BLK_T_OUT 0x00000001
-#define VIRTIO_BLK_T_SCSI_CMD 0x00000002
-#define VIRTIO_BLK_T_SCSI_CMD_OUT 0x00000003
-#define VIRTIO_BLK_T_FLUSH 0x00000004
-#define VIRTIO_BLK_T_FLUSH_OUT 0x00000005
-#define VIRTIO_BLK_T_BARRIER BIT31
+#define VIRTIO_BLK_T_IN 0x00000000
+#define VIRTIO_BLK_T_OUT 0x00000001
+#define VIRTIO_BLK_T_SCSI_CMD 0x00000002
+#define VIRTIO_BLK_T_SCSI_CMD_OUT 0x00000003
+#define VIRTIO_BLK_T_FLUSH 0x00000004
+#define VIRTIO_BLK_T_FLUSH_OUT 0x00000005
+#define VIRTIO_BLK_T_BARRIER BIT31
-#define VIRTIO_BLK_S_OK 0x00
-#define VIRTIO_BLK_S_IOERR 0x01
-#define VIRTIO_BLK_S_UNSUPP 0x02
+#define VIRTIO_BLK_S_OK 0x00
+#define VIRTIO_BLK_S_IOERR 0x01
+#define VIRTIO_BLK_S_UNSUPP 0x02
#endif // _VIRTIO_BLK_H_
diff --git a/OvmfPkg/Include/IndustryStandard/VirtioFs.h b/OvmfPkg/Include/IndustryStandard/VirtioFs.h
index dee437ec0d..dbcb62f6ca 100644
--- a/OvmfPkg/Include/IndustryStandard/VirtioFs.h
+++ b/OvmfPkg/Include/IndustryStandard/VirtioFs.h
@@ -22,12 +22,12 @@
//
// Lowest numbered queue for sending normal priority requests.
//
-#define VIRTIO_FS_REQUEST_QUEUE 1
+#define VIRTIO_FS_REQUEST_QUEUE 1
//
// Number of bytes in the "VIRTIO_FS_CONFIG.Tag" field.
//
-#define VIRTIO_FS_TAG_BYTES 36
+#define VIRTIO_FS_TAG_BYTES 36
//
// Device configuration layout.
@@ -40,12 +40,12 @@ typedef struct {
// encoded bytes take up the entire Tag field, then there is no NUL
// terminator.
//
- UINT8 Tag[VIRTIO_FS_TAG_BYTES];
+ UINT8 Tag[VIRTIO_FS_TAG_BYTES];
//
// The total number of request virtqueues exposed by the device (i.e.,
// excluding the "hiprio" queue).
//
- UINT32 NumReqQueues;
+ UINT32 NumReqQueues;
} VIRTIO_FS_CONFIG;
#pragma pack ()
@@ -74,56 +74,56 @@ typedef struct {
// interface version 7.32.
//
#define VIRTIO_FS_FUSE_MAJOR 7
-#define VIRTIO_FS_FUSE_MINOR 31
+#define VIRTIO_FS_FUSE_MINOR 31
//
// The inode number of the root directory.
//
-#define VIRTIO_FS_FUSE_ROOT_DIR_NODE_ID 1
+#define VIRTIO_FS_FUSE_ROOT_DIR_NODE_ID 1
//
// Distinguished errno values.
//
-#define VIRTIO_FS_FUSE_ERRNO_ENOENT (-2)
+#define VIRTIO_FS_FUSE_ERRNO_ENOENT (-2)
//
// File mode bitmasks.
//
-#define VIRTIO_FS_FUSE_MODE_TYPE_MASK 0170000u
-#define VIRTIO_FS_FUSE_MODE_TYPE_REG 0100000u
-#define VIRTIO_FS_FUSE_MODE_TYPE_DIR 0040000u
-#define VIRTIO_FS_FUSE_MODE_PERM_RWXU 0000700u
-#define VIRTIO_FS_FUSE_MODE_PERM_RUSR 0000400u
-#define VIRTIO_FS_FUSE_MODE_PERM_WUSR 0000200u
-#define VIRTIO_FS_FUSE_MODE_PERM_XUSR 0000100u
-#define VIRTIO_FS_FUSE_MODE_PERM_RWXG 0000070u
-#define VIRTIO_FS_FUSE_MODE_PERM_RGRP 0000040u
-#define VIRTIO_FS_FUSE_MODE_PERM_WGRP 0000020u
-#define VIRTIO_FS_FUSE_MODE_PERM_XGRP 0000010u
-#define VIRTIO_FS_FUSE_MODE_PERM_RWXO 0000007u
-#define VIRTIO_FS_FUSE_MODE_PERM_ROTH 0000004u
-#define VIRTIO_FS_FUSE_MODE_PERM_WOTH 0000002u
-#define VIRTIO_FS_FUSE_MODE_PERM_XOTH 0000001u
+#define VIRTIO_FS_FUSE_MODE_TYPE_MASK 0170000u
+#define VIRTIO_FS_FUSE_MODE_TYPE_REG 0100000u
+#define VIRTIO_FS_FUSE_MODE_TYPE_DIR 0040000u
+#define VIRTIO_FS_FUSE_MODE_PERM_RWXU 0000700u
+#define VIRTIO_FS_FUSE_MODE_PERM_RUSR 0000400u
+#define VIRTIO_FS_FUSE_MODE_PERM_WUSR 0000200u
+#define VIRTIO_FS_FUSE_MODE_PERM_XUSR 0000100u
+#define VIRTIO_FS_FUSE_MODE_PERM_RWXG 0000070u
+#define VIRTIO_FS_FUSE_MODE_PERM_RGRP 0000040u
+#define VIRTIO_FS_FUSE_MODE_PERM_WGRP 0000020u
+#define VIRTIO_FS_FUSE_MODE_PERM_XGRP 0000010u
+#define VIRTIO_FS_FUSE_MODE_PERM_RWXO 0000007u
+#define VIRTIO_FS_FUSE_MODE_PERM_ROTH 0000004u
+#define VIRTIO_FS_FUSE_MODE_PERM_WOTH 0000002u
+#define VIRTIO_FS_FUSE_MODE_PERM_XOTH 0000001u
//
// Flags for VirtioFsFuseOpSetAttr, in the VIRTIO_FS_FUSE_SETATTR_REQUEST.Valid
// field.
//
-#define VIRTIO_FS_FUSE_SETATTR_REQ_F_MODE BIT0
-#define VIRTIO_FS_FUSE_SETATTR_REQ_F_SIZE BIT3
-#define VIRTIO_FS_FUSE_SETATTR_REQ_F_ATIME BIT4
-#define VIRTIO_FS_FUSE_SETATTR_REQ_F_MTIME BIT5
+#define VIRTIO_FS_FUSE_SETATTR_REQ_F_MODE BIT0
+#define VIRTIO_FS_FUSE_SETATTR_REQ_F_SIZE BIT3
+#define VIRTIO_FS_FUSE_SETATTR_REQ_F_ATIME BIT4
+#define VIRTIO_FS_FUSE_SETATTR_REQ_F_MTIME BIT5
//
// Flags for VirtioFsFuseOpOpen.
//
-#define VIRTIO_FS_FUSE_OPEN_REQ_F_RDONLY 0
-#define VIRTIO_FS_FUSE_OPEN_REQ_F_RDWR 2
+#define VIRTIO_FS_FUSE_OPEN_REQ_F_RDONLY 0
+#define VIRTIO_FS_FUSE_OPEN_REQ_F_RDWR 2
//
// Flags for VirtioFsFuseOpInit.
//
-#define VIRTIO_FS_FUSE_INIT_REQ_F_DO_READDIRPLUS BIT13
+#define VIRTIO_FS_FUSE_INIT_REQ_F_DO_READDIRPLUS BIT13
/**
Macro for calculating the size of a directory stream entry.
@@ -156,7 +156,7 @@ typedef struct {
//
// Flags for VirtioFsFuseOpRename2.
//
-#define VIRTIO_FS_FUSE_RENAME2_REQ_F_NOREPLACE BIT0
+#define VIRTIO_FS_FUSE_RENAME2_REQ_F_NOREPLACE BIT0
//
// FUSE operation codes.
@@ -190,20 +190,20 @@ typedef enum {
// Request-response headers common to all request types.
//
typedef struct {
- UINT32 Len;
- UINT32 Opcode;
- UINT64 Unique;
- UINT64 NodeId;
- UINT32 Uid;
- UINT32 Gid;
- UINT32 Pid;
- UINT32 Padding;
+ UINT32 Len;
+ UINT32 Opcode;
+ UINT64 Unique;
+ UINT64 NodeId;
+ UINT32 Uid;
+ UINT32 Gid;
+ UINT32 Pid;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_REQUEST;
typedef struct {
- UINT32 Len;
- INT32 Error;
- UINT64 Unique;
+ UINT32 Len;
+ INT32 Error;
+ UINT64 Unique;
} VIRTIO_FS_FUSE_RESPONSE;
//
@@ -213,12 +213,12 @@ typedef struct {
// an inode.
//
typedef struct {
- UINT64 NodeId;
- UINT64 Generation;
- UINT64 EntryValid;
- UINT64 AttrValid;
- UINT32 EntryValidNsec;
- UINT32 AttrValidNsec;
+ UINT64 NodeId;
+ UINT64 Generation;
+ UINT64 EntryValid;
+ UINT64 AttrValid;
+ UINT32 EntryValidNsec;
+ UINT32 AttrValidNsec;
} VIRTIO_FS_FUSE_NODE_RESPONSE;
//
@@ -227,29 +227,29 @@ typedef struct {
// an inode.
//
typedef struct {
- UINT64 Ino;
- UINT64 Size;
- UINT64 Blocks;
- UINT64 Atime;
- UINT64 Mtime;
- UINT64 Ctime;
- UINT32 AtimeNsec;
- UINT32 MtimeNsec;
- UINT32 CtimeNsec;
- UINT32 Mode;
- UINT32 Nlink;
- UINT32 Uid;
- UINT32 Gid;
- UINT32 Rdev;
- UINT32 Blksize;
- UINT32 Padding;
+ UINT64 Ino;
+ UINT64 Size;
+ UINT64 Blocks;
+ UINT64 Atime;
+ UINT64 Mtime;
+ UINT64 Ctime;
+ UINT32 AtimeNsec;
+ UINT32 MtimeNsec;
+ UINT32 CtimeNsec;
+ UINT32 Mode;
+ UINT32 Nlink;
+ UINT32 Uid;
+ UINT32 Gid;
+ UINT32 Rdev;
+ UINT32 Blksize;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_ATTRIBUTES_RESPONSE;
//
// Header for VirtioFsFuseOpForget.
//
typedef struct {
- UINT64 NumberOfLookups;
+ UINT64 NumberOfLookups;
} VIRTIO_FS_FUSE_FORGET_REQUEST;
//
@@ -257,169 +257,169 @@ typedef struct {
// for VirtioFsFuseOpSetAttr).
//
typedef struct {
- UINT32 GetAttrFlags;
- UINT32 Dummy;
- UINT64 FileHandle;
+ UINT32 GetAttrFlags;
+ UINT32 Dummy;
+ UINT64 FileHandle;
} VIRTIO_FS_FUSE_GETATTR_REQUEST;
typedef struct {
- UINT64 AttrValid;
- UINT32 AttrValidNsec;
- UINT32 Dummy;
+ UINT64 AttrValid;
+ UINT32 AttrValidNsec;
+ UINT32 Dummy;
} VIRTIO_FS_FUSE_GETATTR_RESPONSE;
//
// Header for VirtioFsFuseOpSetAttr.
//
typedef struct {
- UINT32 Valid;
- UINT32 Padding;
- UINT64 FileHandle;
- UINT64 Size;
- UINT64 LockOwner;
- UINT64 Atime;
- UINT64 Mtime;
- UINT64 Ctime;
- UINT32 AtimeNsec;
- UINT32 MtimeNsec;
- UINT32 CtimeNsec;
- UINT32 Mode;
- UINT32 Unused4;
- UINT32 Uid;
- UINT32 Gid;
- UINT32 Unused5;
+ UINT32 Valid;
+ UINT32 Padding;
+ UINT64 FileHandle;
+ UINT64 Size;
+ UINT64 LockOwner;
+ UINT64 Atime;
+ UINT64 Mtime;
+ UINT64 Ctime;
+ UINT32 AtimeNsec;
+ UINT32 MtimeNsec;
+ UINT32 CtimeNsec;
+ UINT32 Mode;
+ UINT32 Unused4;
+ UINT32 Uid;
+ UINT32 Gid;
+ UINT32 Unused5;
} VIRTIO_FS_FUSE_SETATTR_REQUEST;
//
// Header for VirtioFsFuseOpMkDir.
//
typedef struct {
- UINT32 Mode;
- UINT32 Umask;
+ UINT32 Mode;
+ UINT32 Umask;
} VIRTIO_FS_FUSE_MKDIR_REQUEST;
//
// Headers for VirtioFsFuseOpOpen and VirtioFsFuseOpOpenDir.
//
typedef struct {
- UINT32 Flags;
- UINT32 Unused;
+ UINT32 Flags;
+ UINT32 Unused;
} VIRTIO_FS_FUSE_OPEN_REQUEST;
typedef struct {
- UINT64 FileHandle;
- UINT32 OpenFlags;
- UINT32 Padding;
+ UINT64 FileHandle;
+ UINT32 OpenFlags;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_OPEN_RESPONSE;
//
// Header for VirtioFsFuseOpRead and VirtioFsFuseOpReadDirPlus.
//
typedef struct {
- UINT64 FileHandle;
- UINT64 Offset;
- UINT32 Size;
- UINT32 ReadFlags;
- UINT64 LockOwner;
- UINT32 Flags;
- UINT32 Padding;
+ UINT64 FileHandle;
+ UINT64 Offset;
+ UINT32 Size;
+ UINT32 ReadFlags;
+ UINT64 LockOwner;
+ UINT32 Flags;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_READ_REQUEST;
//
// Headers for VirtioFsFuseOpWrite.
//
typedef struct {
- UINT64 FileHandle;
- UINT64 Offset;
- UINT32 Size;
- UINT32 WriteFlags;
- UINT64 LockOwner;
- UINT32 Flags;
- UINT32 Padding;
+ UINT64 FileHandle;
+ UINT64 Offset;
+ UINT32 Size;
+ UINT32 WriteFlags;
+ UINT64 LockOwner;
+ UINT32 Flags;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_WRITE_REQUEST;
typedef struct {
- UINT32 Size;
- UINT32 Padding;
+ UINT32 Size;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_WRITE_RESPONSE;
//
// Header for VirtioFsFuseOpStatFs.
//
typedef struct {
- UINT64 Blocks;
- UINT64 Bfree;
- UINT64 Bavail;
- UINT64 Files;
- UINT64 Ffree;
- UINT32 Bsize;
- UINT32 Namelen;
- UINT32 Frsize;
- UINT32 Padding;
- UINT32 Spare[6];
+ UINT64 Blocks;
+ UINT64 Bfree;
+ UINT64 Bavail;
+ UINT64 Files;
+ UINT64 Ffree;
+ UINT32 Bsize;
+ UINT32 Namelen;
+ UINT32 Frsize;
+ UINT32 Padding;
+ UINT32 Spare[6];
} VIRTIO_FS_FUSE_STATFS_RESPONSE;
//
// Header for VirtioFsFuseOpRelease and VirtioFsFuseOpReleaseDir.
//
typedef struct {
- UINT64 FileHandle;
- UINT32 Flags;
- UINT32 ReleaseFlags;
- UINT64 LockOwner;
+ UINT64 FileHandle;
+ UINT32 Flags;
+ UINT32 ReleaseFlags;
+ UINT64 LockOwner;
} VIRTIO_FS_FUSE_RELEASE_REQUEST;
//
// Header for VirtioFsFuseOpFsync and VirtioFsFuseOpFsyncDir.
//
typedef struct {
- UINT64 FileHandle;
- UINT32 FsyncFlags;
- UINT32 Padding;
+ UINT64 FileHandle;
+ UINT32 FsyncFlags;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_FSYNC_REQUEST;
//
// Header for VirtioFsFuseOpFlush.
//
typedef struct {
- UINT64 FileHandle;
- UINT32 Unused;
- UINT32 Padding;
- UINT64 LockOwner;
+ UINT64 FileHandle;
+ UINT32 Unused;
+ UINT32 Padding;
+ UINT64 LockOwner;
} VIRTIO_FS_FUSE_FLUSH_REQUEST;
//
// Headers for VirtioFsFuseOpInit.
//
typedef struct {
- UINT32 Major;
- UINT32 Minor;
- UINT32 MaxReadahead;
- UINT32 Flags;
+ UINT32 Major;
+ UINT32 Minor;
+ UINT32 MaxReadahead;
+ UINT32 Flags;
} VIRTIO_FS_FUSE_INIT_REQUEST;
typedef struct {
- UINT32 Major;
- UINT32 Minor;
- UINT32 MaxReadahead;
- UINT32 Flags;
- UINT16 MaxBackground;
- UINT16 CongestionThreshold;
- UINT32 MaxWrite;
- UINT32 TimeGran;
- UINT16 MaxPages;
- UINT16 MapAlignment;
- UINT32 Unused[8];
+ UINT32 Major;
+ UINT32 Minor;
+ UINT32 MaxReadahead;
+ UINT32 Flags;
+ UINT16 MaxBackground;
+ UINT16 CongestionThreshold;
+ UINT32 MaxWrite;
+ UINT32 TimeGran;
+ UINT16 MaxPages;
+ UINT16 MapAlignment;
+ UINT32 Unused[8];
} VIRTIO_FS_FUSE_INIT_RESPONSE;
//
// Header for VirtioFsFuseOpCreate.
//
typedef struct {
- UINT32 Flags;
- UINT32 Mode;
- UINT32 Umask;
- UINT32 Padding;
+ UINT32 Flags;
+ UINT32 Mode;
+ UINT32 Umask;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_CREATE_REQUEST;
//
@@ -433,21 +433,21 @@ typedef struct {
// sizes.
//
typedef struct {
- VIRTIO_FS_FUSE_NODE_RESPONSE NodeResp;
- VIRTIO_FS_FUSE_ATTRIBUTES_RESPONSE AttrResp;
- UINT64 NodeId;
- UINT64 CookieForNextEntry;
- UINT32 Namelen;
- UINT32 Type;
+ VIRTIO_FS_FUSE_NODE_RESPONSE NodeResp;
+ VIRTIO_FS_FUSE_ATTRIBUTES_RESPONSE AttrResp;
+ UINT64 NodeId;
+ UINT64 CookieForNextEntry;
+ UINT32 Namelen;
+ UINT32 Type;
} VIRTIO_FS_FUSE_DIRENTPLUS_RESPONSE;
//
// Header for VirtioFsFuseOpRename2.
//
typedef struct {
- UINT64 NewDir;
- UINT32 Flags;
- UINT32 Padding;
+ UINT64 NewDir;
+ UINT32 Flags;
+ UINT32 Padding;
} VIRTIO_FS_FUSE_RENAME2_REQUEST;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/VirtioGpu.h b/OvmfPkg/Include/IndustryStandard/VirtioGpu.h
index b0094a5ac6..12559ccef5 100644
--- a/OvmfPkg/Include/IndustryStandard/VirtioGpu.h
+++ b/OvmfPkg/Include/IndustryStandard/VirtioGpu.h
@@ -26,7 +26,7 @@
//
// Queue number for sending control commands.
//
-#define VIRTIO_GPU_CONTROL_QUEUE 0
+#define VIRTIO_GPU_CONTROL_QUEUE 0
//
// Command and response types.
@@ -37,8 +37,8 @@ typedef enum {
//
// - create/release a host-side 2D resource,
//
- VirtioGpuCmdResourceCreate2d = 0x0101,
- VirtioGpuCmdResourceUnref = 0x0102,
+ VirtioGpuCmdResourceCreate2d = 0x0101,
+ VirtioGpuCmdResourceUnref = 0x0102,
//
// - attach/detach guest RAM to/from a host-side 2D resource,
//
@@ -47,7 +47,7 @@ typedef enum {
//
// - assign/unassign a host-side 2D resource to/from a scanout ("head").
//
- VirtioGpuCmdSetScanout = 0x0103,
+ VirtioGpuCmdSetScanout = 0x0103,
//
// Commands related to drawing:
@@ -55,22 +55,22 @@ typedef enum {
// - transfer a guest RAM update to the host-side 2D resource (does not imply
// host display refresh),
//
- VirtioGpuCmdTransferToHost2d = 0x0105,
+ VirtioGpuCmdTransferToHost2d = 0x0105,
//
// - trigger a host display refresh from the 2D resource.
//
- VirtioGpuCmdResourceFlush = 0x0104,
+ VirtioGpuCmdResourceFlush = 0x0104,
//
// Success code for all of the above commands.
//
- VirtioGpuRespOkNodata = 0x1100,
+ VirtioGpuRespOkNodata = 0x1100,
} VIRTIO_GPU_CONTROL_TYPE;
//
// Common request/response header.
//
-#define VIRTIO_GPU_FLAG_FENCE BIT0
+#define VIRTIO_GPU_FLAG_FENCE BIT0
#pragma pack (1)
typedef struct {
@@ -78,20 +78,20 @@ typedef struct {
// The guest sets Type to VirtioGpuCmd* in the requests. The host sets Type
// to VirtioGpuResp* in the responses.
//
- UINT32 Type;
+ UINT32 Type;
//
// Fencing forces the host to complete the command before producing a
// response.
//
- UINT32 Flags;
- UINT64 FenceId;
+ UINT32 Flags;
+ UINT64 FenceId;
//
// Unused.
//
- UINT32 CtxId;
- UINT32 Padding;
+ UINT32 CtxId;
+ UINT32 Padding;
} VIRTIO_GPU_CONTROL_HEADER;
#pragma pack ()
@@ -100,10 +100,10 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- UINT32 X;
- UINT32 Y;
- UINT32 Width;
- UINT32 Height;
+ UINT32 X;
+ UINT32 Y;
+ UINT32 Width;
+ UINT32 Height;
} VIRTIO_GPU_RECTANGLE;
#pragma pack ()
@@ -119,11 +119,11 @@ typedef enum {
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- UINT32 ResourceId; // note: 0 is invalid
- UINT32 Format; // from VIRTIO_GPU_FORMATS
- UINT32 Width;
- UINT32 Height;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ UINT32 ResourceId; // note: 0 is invalid
+ UINT32 Format; // from VIRTIO_GPU_FORMATS
+ UINT32 Width;
+ UINT32 Height;
} VIRTIO_GPU_RESOURCE_CREATE_2D;
#pragma pack ()
@@ -132,9 +132,9 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- UINT32 ResourceId;
- UINT32 Padding;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ UINT32 ResourceId;
+ UINT32 Padding;
} VIRTIO_GPU_RESOURCE_UNREF;
#pragma pack ()
@@ -146,16 +146,16 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- UINT64 Addr;
- UINT32 Length;
- UINT32 Padding;
+ UINT64 Addr;
+ UINT32 Length;
+ UINT32 Padding;
} VIRTIO_GPU_MEM_ENTRY;
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- UINT32 ResourceId;
- UINT32 NrEntries; // number of entries: constant 1
- VIRTIO_GPU_MEM_ENTRY Entry;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ UINT32 ResourceId;
+ UINT32 NrEntries; // number of entries: constant 1
+ VIRTIO_GPU_MEM_ENTRY Entry;
} VIRTIO_GPU_RESOURCE_ATTACH_BACKING;
#pragma pack ()
@@ -164,9 +164,9 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- UINT32 ResourceId;
- UINT32 Padding;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ UINT32 ResourceId;
+ UINT32 Padding;
} VIRTIO_GPU_RESOURCE_DETACH_BACKING;
#pragma pack ()
@@ -175,10 +175,10 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- VIRTIO_GPU_RECTANGLE Rectangle;
- UINT32 ScanoutId;
- UINT32 ResourceId;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ VIRTIO_GPU_RECTANGLE Rectangle;
+ UINT32 ScanoutId;
+ UINT32 ResourceId;
} VIRTIO_GPU_SET_SCANOUT;
#pragma pack ()
@@ -187,11 +187,11 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- VIRTIO_GPU_RECTANGLE Rectangle;
- UINT64 Offset;
- UINT32 ResourceId;
- UINT32 Padding;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ VIRTIO_GPU_RECTANGLE Rectangle;
+ UINT64 Offset;
+ UINT32 ResourceId;
+ UINT32 Padding;
} VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D;
#pragma pack ()
@@ -200,10 +200,10 @@ typedef struct {
//
#pragma pack (1)
typedef struct {
- VIRTIO_GPU_CONTROL_HEADER Header;
- VIRTIO_GPU_RECTANGLE Rectangle;
- UINT32 ResourceId;
- UINT32 Padding;
+ VIRTIO_GPU_CONTROL_HEADER Header;
+ VIRTIO_GPU_RECTANGLE Rectangle;
+ UINT32 ResourceId;
+ UINT32 Padding;
} VIRTIO_GPU_RESOURCE_FLUSH;
#pragma pack ()
diff --git a/OvmfPkg/Include/IndustryStandard/VirtioScsi.h b/OvmfPkg/Include/IndustryStandard/VirtioScsi.h
index 7969d41c1b..2a097bd0ec 100644
--- a/OvmfPkg/Include/IndustryStandard/VirtioScsi.h
+++ b/OvmfPkg/Include/IndustryStandard/VirtioScsi.h
@@ -14,38 +14,37 @@
#include <IndustryStandard/Virtio.h>
-
//
// virtio-0.9.5, Appendix I: SCSI Host Device
//
#pragma pack(1)
typedef struct {
- UINT32 NumQueues;
- UINT32 SegMax;
- UINT32 MaxSectors;
- UINT32 CmdPerLun;
- UINT32 EventInfoSize;
- UINT32 SenseSize;
- UINT32 CdbSize;
- UINT16 MaxChannel;
- UINT16 MaxTarget;
- UINT32 MaxLun;
+ UINT32 NumQueues;
+ UINT32 SegMax;
+ UINT32 MaxSectors;
+ UINT32 CmdPerLun;
+ UINT32 EventInfoSize;
+ UINT32 SenseSize;
+ UINT32 CdbSize;
+ UINT16 MaxChannel;
+ UINT16 MaxTarget;
+ UINT32 MaxLun;
} VIRTIO_SCSI_CONFIG;
#pragma pack()
-#define OFFSET_OF_VSCSI(Field) OFFSET_OF (VIRTIO_SCSI_CONFIG, Field)
-#define SIZE_OF_VSCSI(Field) (sizeof ((VIRTIO_SCSI_CONFIG *) 0)->Field)
+#define OFFSET_OF_VSCSI(Field) OFFSET_OF (VIRTIO_SCSI_CONFIG, Field)
+#define SIZE_OF_VSCSI(Field) (sizeof ((VIRTIO_SCSI_CONFIG *) 0)->Field)
-#define VIRTIO_SCSI_F_INOUT BIT0
-#define VIRTIO_SCSI_F_HOTPLUG BIT1
+#define VIRTIO_SCSI_F_INOUT BIT0
+#define VIRTIO_SCSI_F_HOTPLUG BIT1
//
// We expect these maximum sizes from the host. Also we force the CdbLength and
// SenseDataLength parameters of EFI_EXT_SCSI_PASS_THRU_PROTOCOL.PassThru() not
// to exceed these limits. See UEFI 2.3.1 errata C 14.7.
//
-#define VIRTIO_SCSI_CDB_SIZE 32
-#define VIRTIO_SCSI_SENSE_SIZE 96
+#define VIRTIO_SCSI_CDB_SIZE 32
+#define VIRTIO_SCSI_SENSE_SIZE 96
//
// We pass the dynamically sized buffers ("dataout", "datain") in separate ring
@@ -53,41 +52,41 @@ typedef struct {
//
#pragma pack(1)
typedef struct {
- UINT8 Lun[8];
- UINT64 Id;
- UINT8 TaskAttr;
- UINT8 Prio;
- UINT8 Crn;
- UINT8 Cdb[VIRTIO_SCSI_CDB_SIZE];
+ UINT8 Lun[8];
+ UINT64 Id;
+ UINT8 TaskAttr;
+ UINT8 Prio;
+ UINT8 Crn;
+ UINT8 Cdb[VIRTIO_SCSI_CDB_SIZE];
} VIRTIO_SCSI_REQ;
typedef struct {
- UINT32 SenseLen;
- UINT32 Residual;
- UINT16 StatusQualifier;
- UINT8 Status;
- UINT8 Response;
- UINT8 Sense[VIRTIO_SCSI_SENSE_SIZE];
+ UINT32 SenseLen;
+ UINT32 Residual;
+ UINT16 StatusQualifier;
+ UINT8 Status;
+ UINT8 Response;
+ UINT8 Sense[VIRTIO_SCSI_SENSE_SIZE];
} VIRTIO_SCSI_RESP;
#pragma pack()
//
// selector of first virtio queue usable for request transfer
//
-#define VIRTIO_SCSI_REQUEST_QUEUE 2
+#define VIRTIO_SCSI_REQUEST_QUEUE 2
//
// host response codes
//
-#define VIRTIO_SCSI_S_OK 0
-#define VIRTIO_SCSI_S_OVERRUN 1
-#define VIRTIO_SCSI_S_ABORTED 2
-#define VIRTIO_SCSI_S_BAD_TARGET 3
-#define VIRTIO_SCSI_S_RESET 4
-#define VIRTIO_SCSI_S_BUSY 5
-#define VIRTIO_SCSI_S_TRANSPORT_FAILURE 6
-#define VIRTIO_SCSI_S_TARGET_FAILURE 7
-#define VIRTIO_SCSI_S_NEXUS_FAILURE 8
-#define VIRTIO_SCSI_S_FAILURE 9
+#define VIRTIO_SCSI_S_OK 0
+#define VIRTIO_SCSI_S_OVERRUN 1
+#define VIRTIO_SCSI_S_ABORTED 2
+#define VIRTIO_SCSI_S_BAD_TARGET 3
+#define VIRTIO_SCSI_S_RESET 4
+#define VIRTIO_SCSI_S_BUSY 5
+#define VIRTIO_SCSI_S_TRANSPORT_FAILURE 6
+#define VIRTIO_SCSI_S_TARGET_FAILURE 7
+#define VIRTIO_SCSI_S_NEXUS_FAILURE 8
+#define VIRTIO_SCSI_S_FAILURE 9
#endif // _VIRTIO_SCSI_H_
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/arch-arm/xen.h b/OvmfPkg/Include/IndustryStandard/Xen/arch-arm/xen.h
index 36338d063a..dd3d21118e 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/arch-arm/xen.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/arch-arm/xen.h
@@ -152,9 +152,9 @@
* at Documentation/devicetree/bindings/arm/xen.txt.
*/
-#define XEN_HYPERCALL_TAG 0xEA1
+#define XEN_HYPERCALL_TAG 0xEA1
-#define uint64_aligned_t UINT64 __attribute__((aligned(8)))
+#define uint64_aligned_t UINT64 __attribute__((aligned(8)))
#ifndef __ASSEMBLY__
#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
@@ -173,134 +173,137 @@
#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
___DEFINE_XEN_GUEST_HANDLE(name, type); \
___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
-#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
-#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name
-#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
+#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
+#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name
+#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
/* this is going to be changed on 64 bit */
-#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name
+#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name
#define set_xen_guest_handle_raw(hnd, val) \
do { \
typeof(&(hnd)) _sxghr_tmp = &(hnd); \
_sxghr_tmp->q = 0; \
_sxghr_tmp->p = val; \
} while ( 0 )
-#ifdef __XEN_TOOLS__
+ #ifdef __XEN_TOOLS__
#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0)
-#endif
-#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
+ #endif
+#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+ #if defined (__GNUC__) && !defined (__STRICT_ANSI__)
/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
-# define __DECL_REG(n64, n32) union { \
+#define __DECL_REG(n64, n32) union { \
UINT64 n64; \
UINT32 n32; \
}
-#else
+ #else
/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
-#define __DECL_REG(n64, n32) UINT64 n64
-#endif
-
-struct vcpu_guest_core_regs
-{
- /* Aarch64 Aarch32 */
- __DECL_REG(x0, r0_usr);
- __DECL_REG(x1, r1_usr);
- __DECL_REG(x2, r2_usr);
- __DECL_REG(x3, r3_usr);
- __DECL_REG(x4, r4_usr);
- __DECL_REG(x5, r5_usr);
- __DECL_REG(x6, r6_usr);
- __DECL_REG(x7, r7_usr);
- __DECL_REG(x8, r8_usr);
- __DECL_REG(x9, r9_usr);
- __DECL_REG(x10, r10_usr);
- __DECL_REG(x11, r11_usr);
- __DECL_REG(x12, r12_usr);
-
- __DECL_REG(x13, sp_usr);
- __DECL_REG(x14, lr_usr);
-
- __DECL_REG(x15, __unused_sp_hyp);
-
- __DECL_REG(x16, lr_irq);
- __DECL_REG(x17, sp_irq);
-
- __DECL_REG(x18, lr_svc);
- __DECL_REG(x19, sp_svc);
-
- __DECL_REG(x20, lr_abt);
- __DECL_REG(x21, sp_abt);
-
- __DECL_REG(x22, lr_und);
- __DECL_REG(x23, sp_und);
-
- __DECL_REG(x24, r8_fiq);
- __DECL_REG(x25, r9_fiq);
- __DECL_REG(x26, r10_fiq);
- __DECL_REG(x27, r11_fiq);
- __DECL_REG(x28, r12_fiq);
-
- __DECL_REG(x29, sp_fiq);
- __DECL_REG(x30, lr_fiq);
-
- /* Return address and mode */
- __DECL_REG(pc64, pc32); /* ELR_EL2 */
- UINT32 cpsr; /* SPSR_EL2 */
-
- union {
- UINT32 spsr_el1; /* AArch64 */
- UINT32 spsr_svc; /* AArch32 */
- };
-
- /* AArch32 guests only */
- UINT32 spsr_fiq, spsr_irq, spsr_und, spsr_abt;
-
- /* AArch64 guests only */
- UINT64 sp_el0;
- UINT64 sp_el1, elr_el1;
+#define __DECL_REG(n64, n32) UINT64 n64
+ #endif
+
+struct vcpu_guest_core_regs {
+ /* Aarch64 Aarch32 */
+ __DECL_REG (x0, r0_usr);
+ __DECL_REG (x1, r1_usr);
+ __DECL_REG (x2, r2_usr);
+ __DECL_REG (x3, r3_usr);
+ __DECL_REG (x4, r4_usr);
+ __DECL_REG (x5, r5_usr);
+ __DECL_REG (x6, r6_usr);
+ __DECL_REG (x7, r7_usr);
+ __DECL_REG (x8, r8_usr);
+ __DECL_REG (x9, r9_usr);
+ __DECL_REG (x10, r10_usr);
+ __DECL_REG (x11, r11_usr);
+ __DECL_REG (x12, r12_usr);
+
+ __DECL_REG (x13, sp_usr);
+ __DECL_REG (x14, lr_usr);
+
+ __DECL_REG (x15, __unused_sp_hyp);
+
+ __DECL_REG (x16, lr_irq);
+ __DECL_REG (x17, sp_irq);
+
+ __DECL_REG (x18, lr_svc);
+ __DECL_REG (x19, sp_svc);
+
+ __DECL_REG (x20, lr_abt);
+ __DECL_REG (x21, sp_abt);
+
+ __DECL_REG (x22, lr_und);
+ __DECL_REG (x23, sp_und);
+
+ __DECL_REG (x24, r8_fiq);
+ __DECL_REG (x25, r9_fiq);
+ __DECL_REG (x26, r10_fiq);
+ __DECL_REG (x27, r11_fiq);
+ __DECL_REG (x28, r12_fiq);
+
+ __DECL_REG (x29, sp_fiq);
+ __DECL_REG (x30, lr_fiq);
+
+ /* Return address and mode */
+ __DECL_REG (pc64, pc32); /* ELR_EL2 */
+ UINT32 cpsr; /* SPSR_EL2 */
+
+ union {
+ UINT32 spsr_el1; /* AArch64 */
+ UINT32 spsr_svc; /* AArch32 */
+ };
+
+ /* AArch32 guests only */
+ UINT32 spsr_fiq, spsr_irq, spsr_und, spsr_abt;
+
+ /* AArch64 guests only */
+ UINT64 sp_el0;
+ UINT64 sp_el1, elr_el1;
};
+
typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
-DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
+DEFINE_XEN_GUEST_HANDLE (vcpu_guest_core_regs_t);
-#undef __DECL_REG
+ #undef __DECL_REG
typedef UINT64 xen_pfn_t;
-#define PRI_xen_pfn PRIx64
+#define PRI_xen_pfn PRIx64
/* Maximum number of virtual CPUs in legacy multi-processor guests. */
/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */
-#define XEN_LEGACY_MAX_VCPUS 1
+#define XEN_LEGACY_MAX_VCPUS 1
typedef UINT64 xen_ulong_t;
-#define PRI_xen_ulong PRIx64
+#define PRI_xen_ulong PRIx64
-#if defined(__XEN__) || defined(__XEN_TOOLS__)
+ #if defined (__XEN__) || defined (__XEN_TOOLS__)
struct vcpu_guest_context {
-#define _VGCF_online 0
-#define VGCF_online (1<<_VGCF_online)
- UINT32 flags; /* VGCF_* */
+ #define _VGCF_online 0
+ #define VGCF_online (1<<_VGCF_online)
+ UINT32 flags; /* VGCF_* */
- struct vcpu_guest_core_regs user_regs; /* Core CPU registers */
+ struct vcpu_guest_core_regs user_regs; /* Core CPU registers */
- UINT32 sctlr;
- UINT64 ttbcr, ttbr0, ttbr1;
+ UINT32 sctlr;
+ UINT64 ttbcr, ttbr0, ttbr1;
};
+
typedef struct vcpu_guest_context vcpu_guest_context_t;
-DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
-#endif
+DEFINE_XEN_GUEST_HANDLE (vcpu_guest_context_t);
+ #endif
struct arch_vcpu_info {
};
+
typedef struct arch_vcpu_info arch_vcpu_info_t;
struct arch_shared_info {
};
+
typedef struct arch_shared_info arch_shared_info_t;
-typedef UINT64 xen_callback_t;
+typedef UINT64 xen_callback_t;
#endif
-#if defined(__XEN__) || defined(__XEN_TOOLS__)
+#if defined (__XEN__) || defined (__XEN_TOOLS__)
/* PSR bits (CPSR, SPSR)*/
@@ -314,30 +317,30 @@ typedef UINT64 xen_callback_t;
#define PSR_JAZELLE (1<<24) /* Jazelle Mode */
/* 32 bit modes */
-#define PSR_MODE_USR 0x10
-#define PSR_MODE_FIQ 0x11
-#define PSR_MODE_IRQ 0x12
-#define PSR_MODE_SVC 0x13
-#define PSR_MODE_MON 0x16
-#define PSR_MODE_ABT 0x17
-#define PSR_MODE_HYP 0x1a
-#define PSR_MODE_UND 0x1b
-#define PSR_MODE_SYS 0x1f
+#define PSR_MODE_USR 0x10
+#define PSR_MODE_FIQ 0x11
+#define PSR_MODE_IRQ 0x12
+#define PSR_MODE_SVC 0x13
+#define PSR_MODE_MON 0x16
+#define PSR_MODE_ABT 0x17
+#define PSR_MODE_HYP 0x1a
+#define PSR_MODE_UND 0x1b
+#define PSR_MODE_SYS 0x1f
/* 64 bit modes */
-#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
-#define PSR_MODE_EL3h 0x0d
-#define PSR_MODE_EL3t 0x0c
-#define PSR_MODE_EL2h 0x09
-#define PSR_MODE_EL2t 0x08
-#define PSR_MODE_EL1h 0x05
-#define PSR_MODE_EL1t 0x04
-#define PSR_MODE_EL0t 0x00
+#define PSR_MODE_BIT 0x10/* Set iff AArch32 */
+#define PSR_MODE_EL3h 0x0d
+#define PSR_MODE_EL3t 0x0c
+#define PSR_MODE_EL2h 0x09
+#define PSR_MODE_EL2t 0x08
+#define PSR_MODE_EL1h 0x05
+#define PSR_MODE_EL1t 0x04
+#define PSR_MODE_EL0t 0x00
#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
-#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
+#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
-#define SCTLR_GUEST_INIT 0x00c50078
+#define SCTLR_GUEST_INIT 0x00c50078
/*
* Virtual machine platform (memory layout, interrupts)
@@ -354,56 +357,56 @@ typedef UINT64 xen_callback_t;
*/
/* vGIC v2 mappings */
-#define GUEST_GICD_BASE 0x03001000ULL
-#define GUEST_GICD_SIZE 0x00001000ULL
-#define GUEST_GICC_BASE 0x03002000ULL
-#define GUEST_GICC_SIZE 0x00000100ULL
+#define GUEST_GICD_BASE 0x03001000ULL
+#define GUEST_GICD_SIZE 0x00001000ULL
+#define GUEST_GICC_BASE 0x03002000ULL
+#define GUEST_GICC_SIZE 0x00000100ULL
/* vGIC v3 mappings */
-#define GUEST_GICV3_GICD_BASE 0x03001000ULL
-#define GUEST_GICV3_GICD_SIZE 0x00010000ULL
+#define GUEST_GICV3_GICD_BASE 0x03001000ULL
+#define GUEST_GICV3_GICD_SIZE 0x00010000ULL
#define GUEST_GICV3_RDIST_STRIDE 0x20000ULL
#define GUEST_GICV3_RDIST_REGIONS 1
-#define GUEST_GICV3_GICR0_BASE 0x03020000ULL /* vCPU0 - vCPU7 */
-#define GUEST_GICV3_GICR0_SIZE 0x00100000ULL
+#define GUEST_GICV3_GICR0_BASE 0x03020000ULL /* vCPU0 - vCPU7 */
+#define GUEST_GICV3_GICR0_SIZE 0x00100000ULL
/* 16MB == 4096 pages reserved for guest to use as a region to map its
* grant table in.
*/
-#define GUEST_GNTTAB_BASE 0x38000000ULL
-#define GUEST_GNTTAB_SIZE 0x01000000ULL
+#define GUEST_GNTTAB_BASE 0x38000000ULL
+#define GUEST_GNTTAB_SIZE 0x01000000ULL
#define GUEST_MAGIC_BASE 0x39000000ULL
#define GUEST_MAGIC_SIZE 0x01000000ULL
-#define GUEST_RAM_BANKS 2
+#define GUEST_RAM_BANKS 2
-#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */
-#define GUEST_RAM0_SIZE 0xc0000000ULL
+#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */
+#define GUEST_RAM0_SIZE 0xc0000000ULL
-#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */
-#define GUEST_RAM1_SIZE 0xfe00000000ULL
+#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */
+#define GUEST_RAM1_SIZE 0xfe00000000ULL
-#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */
+#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */
/* Largest amount of actual RAM, not including holes */
-#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
+#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
-#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
-#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
+#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
+#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
/* Interrupts */
-#define GUEST_TIMER_VIRT_PPI 27
-#define GUEST_TIMER_PHYS_S_PPI 29
-#define GUEST_TIMER_PHYS_NS_PPI 30
-#define GUEST_EVTCHN_PPI 31
+#define GUEST_TIMER_VIRT_PPI 27
+#define GUEST_TIMER_PHYS_S_PPI 29
+#define GUEST_TIMER_PHYS_NS_PPI 30
+#define GUEST_EVTCHN_PPI 31
/* PSCI functions */
-#define PSCI_cpu_suspend 0
-#define PSCI_cpu_off 1
-#define PSCI_cpu_on 2
-#define PSCI_migrate 3
+#define PSCI_cpu_suspend 0
+#define PSCI_cpu_off 1
+#define PSCI_cpu_on 2
+#define PSCI_migrate 3
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/hvm/start_info.h b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/hvm/start_info.h
index 15708d6dd5..1922415de8 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/hvm/start_info.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/hvm/start_info.h
@@ -84,7 +84,7 @@
* of the structure must check that memmap_entries is non-zero
* before trying to read the memory map.
*/
-#define XEN_HVM_START_MAGIC_VALUE 0x336ec578
+#define XEN_HVM_START_MAGIC_VALUE 0x336ec578
/*
* The values used in the type field of the memory map table entries are
@@ -107,37 +107,37 @@
* represent the layout described there using C types.
*/
struct hvm_start_info {
- UINT32 magic; /* Contains the magic value 0x336ec578 */
+ UINT32 magic; /* Contains the magic value 0x336ec578 */
/* ("xEn3" with the 0x80 bit of the "E" set).*/
- UINT32 version; /* Version of this structure. */
- UINT32 flags; /* SIF_xxx flags. */
- UINT32 nr_modules; /* Number of modules passed to the kernel. */
- UINT64 modlist_paddr; /* Physical address of an array of */
+ UINT32 version; /* Version of this structure. */
+ UINT32 flags; /* SIF_xxx flags. */
+ UINT32 nr_modules; /* Number of modules passed to the kernel. */
+ UINT64 modlist_paddr; /* Physical address of an array of */
/* hvm_modlist_entry. */
- UINT64 cmdline_paddr; /* Physical address of the command line. */
- UINT64 rsdp_paddr; /* Physical address of the RSDP ACPI data */
+ UINT64 cmdline_paddr; /* Physical address of the command line. */
+ UINT64 rsdp_paddr; /* Physical address of the RSDP ACPI data */
/* structure. */
- /* All following fields only present in version 1 and newer */
- UINT64 memmap_paddr; /* Physical address of an array of */
+ /* All following fields only present in version 1 and newer */
+ UINT64 memmap_paddr; /* Physical address of an array of */
/* hvm_memmap_table_entry. */
- UINT32 memmap_entries; /* Number of entries in the memmap table. */
+ UINT32 memmap_entries; /* Number of entries in the memmap table. */
/* Value will be zero if there is no memory */
/* map being provided. */
- UINT32 reserved; /* Must be zero. */
+ UINT32 reserved; /* Must be zero. */
};
struct hvm_modlist_entry {
- UINT64 paddr; /* Physical address of the module. */
- UINT64 size; /* Size of the module in bytes. */
- UINT64 cmdline_paddr; /* Physical address of the command line. */
- UINT64 reserved;
+ UINT64 paddr; /* Physical address of the module. */
+ UINT64 size; /* Size of the module in bytes. */
+ UINT64 cmdline_paddr; /* Physical address of the command line. */
+ UINT64 reserved;
};
struct hvm_memmap_table_entry {
- UINT64 addr; /* Base address of the memory region */
- UINT64 size; /* Size of the memory region in bytes */
- UINT32 type; /* Mapping type */
- UINT32 reserved; /* Must be zero for Version 1. */
+ UINT64 addr; /* Base address of the memory region */
+ UINT64 size; /* Size of the memory region in bytes */
+ UINT32 type; /* Mapping type */
+ UINT32 reserved; /* Must be zero for Version 1. */
};
#endif /* __XEN_PUBLIC_ARCH_X86_HVM_START_INFO_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_32.h b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_32.h
index 0314877f0b..caa4df5e80 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_32.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_32.h
@@ -23,9 +23,10 @@
#ifndef __ASSEMBLY__
struct arch_vcpu_info {
- UINTN cr2;
- UINTN pad[5]; /* sizeof(vcpu_info_t) == 64 */
+ UINTN cr2;
+ UINTN pad[5]; /* sizeof(vcpu_info_t) == 64 */
};
+
typedef struct arch_vcpu_info arch_vcpu_info_t;
#endif /* !__ASSEMBLY__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_64.h b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_64.h
index c8f54c5746..76027b361c 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_64.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen-x86_64.h
@@ -23,9 +23,10 @@
#ifndef __ASSEMBLY__
struct arch_vcpu_info {
- UINTN cr2;
- UINTN pad; /* sizeof(vcpu_info_t) == 64 */
+ UINTN cr2;
+ UINTN pad; /* sizeof(vcpu_info_t) == 64 */
};
+
typedef struct arch_vcpu_info arch_vcpu_info_t;
#endif /* !__ASSEMBLY__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen.h b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen.h
index 3c07c59f38..ecf2047ee8 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/arch-x86/xen.h
@@ -14,13 +14,13 @@
#define __XEN_PUBLIC_ARCH_X86_XEN_H__
/* Structural guest handles introduced in 0x00030201. */
-#if __XEN_INTERFACE_VERSION__ >= 0x00030201
+ #if __XEN_INTERFACE_VERSION__ >= 0x00030201
#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
typedef struct { type *p; } __guest_handle_ ## name
-#else
+ #else
#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
typedef type * __guest_handle_ ## name
-#endif
+ #endif
/*
* XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
@@ -33,55 +33,56 @@
#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
___DEFINE_XEN_GUEST_HANDLE(name, type); \
___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
-#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
-#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name
-#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
-#define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name)
+#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
+#define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name
+#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
+#define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name)
#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0)
-#ifdef __XEN_TOOLS__
+ #ifdef __XEN_TOOLS__
#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0)
-#endif
-#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
+ #endif
+#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
-#if defined(MDE_CPU_IA32)
-#include "xen-x86_32.h"
-#elif defined(MDE_CPU_X64)
-#include "xen-x86_64.h"
-#endif
+ #if defined (MDE_CPU_IA32)
+ #include "xen-x86_32.h"
+ #elif defined (MDE_CPU_X64)
+ #include "xen-x86_64.h"
+ #endif
-#ifndef __ASSEMBLY__
+ #ifndef __ASSEMBLY__
typedef UINTN xen_pfn_t;
-#define PRI_xen_pfn "lx"
-#endif
+#define PRI_xen_pfn "lx"
+ #endif
-#define XEN_HAVE_PV_UPCALL_MASK 1
+#define XEN_HAVE_PV_UPCALL_MASK 1
/* Maximum number of virtual CPUs in legacy multi-processor guests. */
-#define XEN_LEGACY_MAX_VCPUS 32
+#define XEN_LEGACY_MAX_VCPUS 32
-#ifndef __ASSEMBLY__
+ #ifndef __ASSEMBLY__
typedef UINTN xen_ulong_t;
-#define PRI_xen_ulong "lx"
+#define PRI_xen_ulong "lx"
typedef UINT64 tsc_timestamp_t; /* RDTSC timestamp */
-#ifdef MDE_CPU_IA32
-#pragma pack(4)
-#endif
+ #ifdef MDE_CPU_IA32
+ #pragma pack(4)
+ #endif
struct arch_shared_info {
- UINTN max_pfn; /* max pfn that appears in table */
- /* Frame containing list of mfns containing list of mfns containing p2m. */
- xen_pfn_t pfn_to_mfn_frame_list_list;
- UINTN nmi_reason;
- UINT64 pad[32];
+ UINTN max_pfn; /* max pfn that appears in table */
+ /* Frame containing list of mfns containing list of mfns containing p2m. */
+ xen_pfn_t pfn_to_mfn_frame_list_list;
+ UINTN nmi_reason;
+ UINT64 pad[32];
};
+
typedef struct arch_shared_info arch_shared_info_t;
-#ifdef MDE_CPU_IA32
-#pragma pack()
-#endif
+ #ifdef MDE_CPU_IA32
+ #pragma pack()
+ #endif
-#endif /* !__ASSEMBLY__ */
+ #endif /* !__ASSEMBLY__ */
#endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/event_channel.h b/OvmfPkg/Include/IndustryStandard/Xen/event_channel.h
index 4fff5654af..0e2554ee30 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/event_channel.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/event_channel.h
@@ -44,13 +44,13 @@
*/
/* ` enum event_channel_op { // EVTCHNOP_* => struct evtchn_* */
-#define EVTCHNOP_close 3
-#define EVTCHNOP_send 4
-#define EVTCHNOP_alloc_unbound 6
+#define EVTCHNOP_close 3
+#define EVTCHNOP_send 4
+#define EVTCHNOP_alloc_unbound 6
/* ` } */
typedef UINT32 evtchn_port_t;
-DEFINE_XEN_GUEST_HANDLE(evtchn_port_t);
+DEFINE_XEN_GUEST_HANDLE (evtchn_port_t);
/*
* EVTCHNOP_alloc_unbound: Allocate a port in domain <dom> and mark as
@@ -61,11 +61,12 @@ DEFINE_XEN_GUEST_HANDLE(evtchn_port_t);
* 2. <rdom> may be DOMID_SELF, allowing loopback connections.
*/
struct evtchn_alloc_unbound {
- /* IN parameters */
- domid_t dom, remote_dom;
- /* OUT parameters */
- evtchn_port_t port;
+ /* IN parameters */
+ domid_t dom, remote_dom;
+ /* OUT parameters */
+ evtchn_port_t port;
};
+
typedef struct evtchn_alloc_unbound evtchn_alloc_unbound_t;
/*
@@ -74,9 +75,10 @@ typedef struct evtchn_alloc_unbound evtchn_alloc_unbound_t;
* (EVTCHNSTAT_unbound), awaiting a new connection.
*/
struct evtchn_close {
- /* IN parameters. */
- evtchn_port_t port;
+ /* IN parameters. */
+ evtchn_port_t port;
};
+
typedef struct evtchn_close evtchn_close_t;
/*
@@ -84,9 +86,10 @@ typedef struct evtchn_close evtchn_close_t;
* endpoint is <port>.
*/
struct evtchn_send {
- /* IN parameters. */
- evtchn_port_t port;
+ /* IN parameters. */
+ evtchn_port_t port;
};
+
typedef struct evtchn_send evtchn_send_t;
#endif /* __XEN_PUBLIC_EVENT_CHANNEL_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/grant_table.h b/OvmfPkg/Include/IndustryStandard/Xen/grant_table.h
index 54af1dbc38..b2adaec346 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/grant_table.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/grant_table.h
@@ -109,28 +109,30 @@ typedef UINT32 grant_ref_t;
* for backwards compatibility. New guests should use version 2.
*/
#if __XEN_INTERFACE_VERSION__ < 0x0003020a
-#define grant_entry_v1 grant_entry
-#define grant_entry_v1_t grant_entry_t
+#define grant_entry_v1 grant_entry
+#define grant_entry_v1_t grant_entry_t
#endif
struct grant_entry_v1 {
- /* GTF_xxx: various type and flag information. [XEN,GST] */
- UINT16 flags;
- /* The domain being granted foreign privileges. [GST] */
- domid_t domid;
- /*
- * GTF_permit_access: Frame that @domid is allowed to map and access. [GST]
- * GTF_accept_transfer: Frame whose ownership transferred by @domid. [XEN]
- */
- UINT32 frame;
+ /* GTF_xxx: various type and flag information. [XEN,GST] */
+ UINT16 flags;
+ /* The domain being granted foreign privileges. [GST] */
+ domid_t domid;
+
+ /*
+ * GTF_permit_access: Frame that @domid is allowed to map and access. [GST]
+ * GTF_accept_transfer: Frame whose ownership transferred by @domid. [XEN]
+ */
+ UINT32 frame;
};
+
typedef struct grant_entry_v1 grant_entry_v1_t;
/* The first few grant table entries will be preserved across grant table
* version changes and may be pre-populated at domain creation by tools.
*/
-#define GNTTAB_NR_RESERVED_ENTRIES 8
-#define GNTTAB_RESERVED_CONSOLE 0
-#define GNTTAB_RESERVED_XENSTORE 1
+#define GNTTAB_NR_RESERVED_ENTRIES 8
+#define GNTTAB_RESERVED_CONSOLE 0
+#define GNTTAB_RESERVED_XENSTORE 1
/*
* Type of grant entry.
@@ -141,11 +143,11 @@ typedef struct grant_entry_v1 grant_entry_v1_t;
* GTF_transitive: Allow @domid to transitively access a subrange of
* @trans_grant in @trans_domid. No mappings are allowed.
*/
-#define GTF_invalid (0U<<0)
-#define GTF_permit_access (1U<<0)
-#define GTF_accept_transfer (2U<<0)
-#define GTF_transitive (3U<<0)
-#define GTF_type_mask (3U<<0)
+#define GTF_invalid (0U<<0)
+#define GTF_permit_access (1U<<0)
+#define GTF_accept_transfer (2U<<0)
+#define GTF_transitive (3U<<0)
+#define GTF_type_mask (3U<<0)
/*
* Subflags for GTF_permit_access.
@@ -157,20 +159,20 @@ typedef struct grant_entry_v1 grant_entry_v1_t;
* will only be allowed to copy from the grant, and not
* map it. [GST]
*/
-#define _GTF_readonly (2)
-#define GTF_readonly (1U<<_GTF_readonly)
-#define _GTF_reading (3)
-#define GTF_reading (1U<<_GTF_reading)
-#define _GTF_writing (4)
-#define GTF_writing (1U<<_GTF_writing)
-#define _GTF_PWT (5)
-#define GTF_PWT (1U<<_GTF_PWT)
-#define _GTF_PCD (6)
-#define GTF_PCD (1U<<_GTF_PCD)
-#define _GTF_PAT (7)
-#define GTF_PAT (1U<<_GTF_PAT)
-#define _GTF_sub_page (8)
-#define GTF_sub_page (1U<<_GTF_sub_page)
+#define _GTF_readonly (2)
+#define GTF_readonly (1U<<_GTF_readonly)
+#define _GTF_reading (3)
+#define GTF_reading (1U<<_GTF_reading)
+#define _GTF_writing (4)
+#define GTF_writing (1U<<_GTF_writing)
+#define _GTF_PWT (5)
+#define GTF_PWT (1U<<_GTF_PWT)
+#define _GTF_PCD (6)
+#define GTF_PCD (1U<<_GTF_PCD)
+#define _GTF_PAT (7)
+#define GTF_PAT (1U<<_GTF_PAT)
+#define _GTF_sub_page (8)
+#define GTF_sub_page (1U<<_GTF_sub_page)
/*
* Subflags for GTF_accept_transfer:
@@ -182,10 +184,10 @@ typedef struct grant_entry_v1 grant_entry_v1_t;
* after reading GTF_transfer_committed. Xen will always write the frame
* address, followed by ORing this flag, in a timely manner.
*/
-#define _GTF_transfer_committed (2)
-#define GTF_transfer_committed (1U<<_GTF_transfer_committed)
-#define _GTF_transfer_completed (3)
-#define GTF_transfer_completed (1U<<_GTF_transfer_completed)
+#define _GTF_transfer_committed (2)
+#define GTF_transfer_committed (1U<<_GTF_transfer_committed)
+#define _GTF_transfer_completed (3)
+#define GTF_transfer_completed (1U<<_GTF_transfer_completed)
/*
* Version 2 grant table entries. These fulfil the same role as
@@ -197,68 +199,71 @@ typedef struct grant_entry_v1 grant_entry_v1_t;
* on the grant table version in use by the other domain.
*/
#if __XEN_INTERFACE_VERSION__ >= 0x0003020a
+
/*
* Version 1 and version 2 grant entries share a common prefix. The
* fields of the prefix are documented as part of struct
* grant_entry_v1.
*/
struct grant_entry_header {
- UINT16 flags;
- domid_t domid;
+ UINT16 flags;
+ domid_t domid;
};
+
typedef struct grant_entry_header grant_entry_header_t;
/*
* Version 2 of the grant entry structure.
*/
union grant_entry_v2 {
- grant_entry_header_t hdr;
-
- /*
- * This member is used for V1-style full page grants, where either:
- *
- * -- hdr.type is GTF_accept_transfer, or
- * -- hdr.type is GTF_permit_access and GTF_sub_page is not set.
- *
- * In that case, the frame field has the same semantics as the
- * field of the same name in the V1 entry structure.
- */
- struct {
- grant_entry_header_t hdr;
- UINT32 pad0;
- UINT64 frame;
- } full_page;
-
- /*
- * If the grant type is GTF_grant_access and GTF_sub_page is set,
- * @domid is allowed to access bytes [@page_off,@page_off+@length)
- * in frame @frame.
- */
- struct {
- grant_entry_header_t hdr;
- UINT16 page_off;
- UINT16 length;
- UINT64 frame;
- } sub_page;
-
- /*
- * If the grant is GTF_transitive, @domid is allowed to use the
- * grant @gref in domain @trans_domid, as if it was the local
- * domain. Obviously, the transitive access must be compatible
- * with the original grant.
- *
- * The current version of Xen does not allow transitive grants
- * to be mapped.
- */
- struct {
- grant_entry_header_t hdr;
- domid_t trans_domid;
- UINT16 pad0;
- grant_ref_t gref;
- } transitive;
-
- UINT32 __spacer[4]; /* Pad to a power of two */
+ grant_entry_header_t hdr;
+
+ /*
+ * This member is used for V1-style full page grants, where either:
+ *
+ * -- hdr.type is GTF_accept_transfer, or
+ * -- hdr.type is GTF_permit_access and GTF_sub_page is not set.
+ *
+ * In that case, the frame field has the same semantics as the
+ * field of the same name in the V1 entry structure.
+ */
+ struct {
+ grant_entry_header_t hdr;
+ UINT32 pad0;
+ UINT64 frame;
+ } full_page;
+
+ /*
+ * If the grant type is GTF_grant_access and GTF_sub_page is set,
+ * @domid is allowed to access bytes [@page_off,@page_off+@length)
+ * in frame @frame.
+ */
+ struct {
+ grant_entry_header_t hdr;
+ UINT16 page_off;
+ UINT16 length;
+ UINT64 frame;
+ } sub_page;
+
+ /*
+ * If the grant is GTF_transitive, @domid is allowed to use the
+ * grant @gref in domain @trans_domid, as if it was the local
+ * domain. Obviously, the transitive access must be compatible
+ * with the original grant.
+ *
+ * The current version of Xen does not allow transitive grants
+ * to be mapped.
+ */
+ struct {
+ grant_entry_header_t hdr;
+ domid_t trans_domid;
+ UINT16 pad0;
+ grant_ref_t gref;
+ } transitive;
+
+ UINT32 __spacer[4]; /* Pad to a power of two */
};
+
typedef union grant_entry_v2 grant_entry_v2_t;
typedef UINT16 grant_status_t;
@@ -280,8 +285,8 @@ typedef UINT16 grant_status_t;
*/
/* ` enum grant_table_op { // GNTTABOP_* => struct gnttab_* */
-#define GNTTABOP_map_grant_ref 0
-#define GNTTABOP_unmap_grant_ref 1
+#define GNTTABOP_map_grant_ref 0
+#define GNTTABOP_unmap_grant_ref 1
/* ` } */
/*
@@ -307,18 +312,19 @@ typedef UINT32 grant_handle_t;
* to be accounted to the correct grant reference!
*/
struct gnttab_map_grant_ref {
- /* IN parameters. */
- UINT64 host_addr;
- UINT32 flags; /* GNTMAP_* */
- grant_ref_t ref;
- domid_t dom;
- /* OUT parameters. */
- INT16 status; /* => enum grant_status */
- grant_handle_t handle;
- UINT64 dev_bus_addr;
+ /* IN parameters. */
+ UINT64 host_addr;
+ UINT32 flags; /* GNTMAP_* */
+ grant_ref_t ref;
+ domid_t dom;
+ /* OUT parameters. */
+ INT16 status; /* => enum grant_status */
+ grant_handle_t handle;
+ UINT64 dev_bus_addr;
};
+
typedef struct gnttab_map_grant_ref gnttab_map_grant_ref_t;
-DEFINE_XEN_GUEST_HANDLE(gnttab_map_grant_ref_t);
+DEFINE_XEN_GUEST_HANDLE (gnttab_map_grant_ref_t);
/*
* GNTTABOP_unmap_grant_ref: Destroy one or more grant-reference mappings
@@ -332,74 +338,76 @@ DEFINE_XEN_GUEST_HANDLE(gnttab_map_grant_ref_t);
* mappings will remain in the device or host TLBs.
*/
struct gnttab_unmap_grant_ref {
- /* IN parameters. */
- UINT64 host_addr;
- UINT64 dev_bus_addr;
- grant_handle_t handle;
- /* OUT parameters. */
- INT16 status; /* => enum grant_status */
+ /* IN parameters. */
+ UINT64 host_addr;
+ UINT64 dev_bus_addr;
+ grant_handle_t handle;
+ /* OUT parameters. */
+ INT16 status; /* => enum grant_status */
};
+
typedef struct gnttab_unmap_grant_ref gnttab_unmap_grant_ref_t;
-DEFINE_XEN_GUEST_HANDLE(gnttab_unmap_grant_ref_t);
+DEFINE_XEN_GUEST_HANDLE (gnttab_unmap_grant_ref_t);
/*
* Bitfield values for gnttab_map_grant_ref.flags.
*/
- /* Map the grant entry for access by I/O devices. */
-#define _GNTMAP_device_map (0)
-#define GNTMAP_device_map (1<<_GNTMAP_device_map)
- /* Map the grant entry for access by host CPUs. */
-#define _GNTMAP_host_map (1)
-#define GNTMAP_host_map (1<<_GNTMAP_host_map)
- /* Accesses to the granted frame will be restricted to read-only access. */
-#define _GNTMAP_readonly (2)
-#define GNTMAP_readonly (1<<_GNTMAP_readonly)
- /*
- * GNTMAP_host_map subflag:
- * 0 => The host mapping is usable only by the guest OS.
- * 1 => The host mapping is usable by guest OS + current application.
- */
-#define _GNTMAP_application_map (3)
-#define GNTMAP_application_map (1<<_GNTMAP_application_map)
-
- /*
- * GNTMAP_contains_pte subflag:
- * 0 => This map request contains a host virtual address.
- * 1 => This map request contains the machine address of the PTE to update.
- */
-#define _GNTMAP_contains_pte (4)
-#define GNTMAP_contains_pte (1<<_GNTMAP_contains_pte)
-
-#define _GNTMAP_can_fail (5)
-#define GNTMAP_can_fail (1<<_GNTMAP_can_fail)
+/* Map the grant entry for access by I/O devices. */
+#define _GNTMAP_device_map (0)
+#define GNTMAP_device_map (1<<_GNTMAP_device_map)
+/* Map the grant entry for access by host CPUs. */
+#define _GNTMAP_host_map (1)
+#define GNTMAP_host_map (1<<_GNTMAP_host_map)
+/* Accesses to the granted frame will be restricted to read-only access. */
+#define _GNTMAP_readonly (2)
+#define GNTMAP_readonly (1<<_GNTMAP_readonly)
+
+/*
+ * GNTMAP_host_map subflag:
+ * 0 => The host mapping is usable only by the guest OS.
+ * 1 => The host mapping is usable by guest OS + current application.
+ */
+#define _GNTMAP_application_map (3)
+#define GNTMAP_application_map (1<<_GNTMAP_application_map)
+
+/*
+ * GNTMAP_contains_pte subflag:
+ * 0 => This map request contains a host virtual address.
+ * 1 => This map request contains the machine address of the PTE to update.
+ */
+#define _GNTMAP_contains_pte (4)
+#define GNTMAP_contains_pte (1<<_GNTMAP_contains_pte)
+
+#define _GNTMAP_can_fail (5)
+#define GNTMAP_can_fail (1<<_GNTMAP_can_fail)
/*
* Bits to be placed in guest kernel available PTE bits (architecture
* dependent; only supported when XENFEAT_gnttab_map_avail_bits is set).
*/
-#define _GNTMAP_guest_avail0 (16)
-#define GNTMAP_guest_avail_mask ((UINT32)~0 << _GNTMAP_guest_avail0)
+#define _GNTMAP_guest_avail0 (16)
+#define GNTMAP_guest_avail_mask ((UINT32)~0 << _GNTMAP_guest_avail0)
/*
* Values for error status returns. All errors are -ve.
*/
/* ` enum grant_status { */
-#define GNTST_okay (0) /* Normal return. */
-#define GNTST_general_error (-1) /* General undefined error. */
-#define GNTST_bad_domain (-2) /* Unrecognised domain id. */
-#define GNTST_bad_gntref (-3) /* Unrecognised or inappropriate gntref. */
-#define GNTST_bad_handle (-4) /* Unrecognised or inappropriate handle. */
-#define GNTST_bad_virt_addr (-5) /* Inappropriate virtual address to map. */
-#define GNTST_bad_dev_addr (-6) /* Inappropriate device address to unmap.*/
-#define GNTST_no_device_space (-7) /* Out of space in I/O MMU. */
-#define GNTST_permission_denied (-8) /* Not enough privilege for operation. */
-#define GNTST_bad_page (-9) /* Specified page was invalid for op. */
-#define GNTST_bad_copy_arg (-10) /* copy arguments cross page boundary. */
-#define GNTST_address_too_big (-11) /* transfer page address too large. */
-#define GNTST_eagain (-12) /* Operation not done; try again. */
+#define GNTST_okay (0) /* Normal return. */
+#define GNTST_general_error (-1) /* General undefined error. */
+#define GNTST_bad_domain (-2) /* Unrecognised domain id. */
+#define GNTST_bad_gntref (-3) /* Unrecognised or inappropriate gntref. */
+#define GNTST_bad_handle (-4) /* Unrecognised or inappropriate handle. */
+#define GNTST_bad_virt_addr (-5) /* Inappropriate virtual address to map. */
+#define GNTST_bad_dev_addr (-6) /* Inappropriate device address to unmap.*/
+#define GNTST_no_device_space (-7) /* Out of space in I/O MMU. */
+#define GNTST_permission_denied (-8) /* Not enough privilege for operation. */
+#define GNTST_bad_page (-9) /* Specified page was invalid for op. */
+#define GNTST_bad_copy_arg (-10) /* copy arguments cross page boundary. */
+#define GNTST_address_too_big (-11) /* transfer page address too large. */
+#define GNTST_eagain (-12) /* Operation not done; try again. */
/* ` } */
-#define GNTTABOP_error_msgs { \
+#define GNTTABOP_error_msgs { \
"okay", \
"undefined error", \
"unrecognised domain id", \
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/hvm/hvm_op.h b/OvmfPkg/Include/IndustryStandard/Xen/hvm/hvm_op.h
index 5eca23c205..eb0d9a595f 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/hvm/hvm_op.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/hvm/hvm_op.h
@@ -8,14 +8,15 @@
#include "../xen.h"
/* Get/set subcommands: extra argument == pointer to xen_hvm_param struct. */
-#define HVMOP_set_param 0
-#define HVMOP_get_param 1
+#define HVMOP_set_param 0
+#define HVMOP_get_param 1
struct xen_hvm_param {
- domid_t domid; /* IN */
- UINT32 index; /* IN */
- UINT64 value; /* IN/OUT */
+ domid_t domid; /* IN */
+ UINT32 index; /* IN */
+ UINT64 value; /* IN/OUT */
};
+
typedef struct xen_hvm_param xen_hvm_param_t;
-DEFINE_XEN_GUEST_HANDLE(xen_hvm_param_t);
+DEFINE_XEN_GUEST_HANDLE (xen_hvm_param_t);
#endif /* __XEN_PUBLIC_HVM_HVM_OP_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/hvm/params.h b/OvmfPkg/Include/IndustryStandard/Xen/hvm/params.h
index 15aa93e2f5..19c75468fc 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/hvm/params.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/hvm/params.h
@@ -22,26 +22,26 @@
* method is available.
* If val == 0 then CPU0 event-channel notifications are not delivered.
*/
-#define HVM_PARAM_CALLBACK_IRQ 0
+#define HVM_PARAM_CALLBACK_IRQ 0
/*
* These are not used by Xen. They are here for convenience of HVM-guest
* xenbus implementations.
*/
-#define HVM_PARAM_STORE_PFN 1
-#define HVM_PARAM_STORE_EVTCHN 2
+#define HVM_PARAM_STORE_PFN 1
+#define HVM_PARAM_STORE_EVTCHN 2
#define HVM_PARAM_PAE_ENABLED 4
-#define HVM_PARAM_IOREQ_PFN 5
+#define HVM_PARAM_IOREQ_PFN 5
-#define HVM_PARAM_BUFIOREQ_PFN 6
-#define HVM_PARAM_BUFIOREQ_EVTCHN 26
+#define HVM_PARAM_BUFIOREQ_PFN 6
+#define HVM_PARAM_BUFIOREQ_EVTCHN 26
-#if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64)
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
/* Expose Viridian interfaces to this HVM guest? */
-#define HVM_PARAM_VIRIDIAN 9
+#define HVM_PARAM_VIRIDIAN 9
#endif
@@ -64,33 +64,33 @@
* Missed interrupts are collapsed together and delivered as one 'late tick'.
* Guest time always tracks wallclock (i.e., real) time.
*/
-#define HVM_PARAM_TIMER_MODE 10
-#define HVMPTM_delay_for_missed_ticks 0
-#define HVMPTM_no_delay_for_missed_ticks 1
-#define HVMPTM_no_missed_ticks_pending 2
-#define HVMPTM_one_missed_tick_pending 3
+#define HVM_PARAM_TIMER_MODE 10
+#define HVMPTM_delay_for_missed_ticks 0
+#define HVMPTM_no_delay_for_missed_ticks 1
+#define HVMPTM_no_missed_ticks_pending 2
+#define HVMPTM_one_missed_tick_pending 3
/* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
-#define HVM_PARAM_HPET_ENABLED 11
+#define HVM_PARAM_HPET_ENABLED 11
/* Identity-map page directory used by Intel EPT when CR0.PG=0. */
-#define HVM_PARAM_IDENT_PT 12
+#define HVM_PARAM_IDENT_PT 12
/* Device Model domain, defaults to 0. */
-#define HVM_PARAM_DM_DOMAIN 13
+#define HVM_PARAM_DM_DOMAIN 13
/* ACPI S state: currently support S0 and S3 on x86. */
-#define HVM_PARAM_ACPI_S_STATE 14
+#define HVM_PARAM_ACPI_S_STATE 14
/* TSS used on Intel when CR0.PE=0. */
-#define HVM_PARAM_VM86_TSS 15
+#define HVM_PARAM_VM86_TSS 15
/* Boolean: Enable aligning all periodic vpts to reduce interrupts */
-#define HVM_PARAM_VPT_ALIGN 16
+#define HVM_PARAM_VPT_ALIGN 16
/* Console debug shared memory ring and event channel */
-#define HVM_PARAM_CONSOLE_PFN 17
-#define HVM_PARAM_CONSOLE_EVTCHN 18
+#define HVM_PARAM_CONSOLE_PFN 17
+#define HVM_PARAM_CONSOLE_EVTCHN 18
/*
* Select location of ACPI PM1a and TMR control blocks. Currently two locations
@@ -101,7 +101,7 @@
* PM1A_EVT == 0xb000; PM1A_CNT == 0xb004; PM_TMR == 0xb008
* You can find these address definitions in <hvm/ioreq.h>
*/
-#define HVM_PARAM_ACPI_IOPORTS_LOCATION 19
+#define HVM_PARAM_ACPI_IOPORTS_LOCATION 19
/* Enable blocking memory events, async or sync (pause vcpu until response)
* onchangeonly indicates messages only on a change of value */
@@ -112,14 +112,14 @@
#define HVM_PARAM_MEMORY_EVENT_SINGLE_STEP 25
#define HVM_PARAM_MEMORY_EVENT_MSR 30
-#define HVMPME_MODE_MASK (3 << 0)
-#define HVMPME_mode_disabled 0
-#define HVMPME_mode_async 1
-#define HVMPME_mode_sync 2
-#define HVMPME_onchangeonly (1 << 2)
+#define HVMPME_MODE_MASK (3 << 0)
+#define HVMPME_mode_disabled 0
+#define HVMPME_mode_async 1
+#define HVMPME_mode_sync 2
+#define HVMPME_onchangeonly (1 << 2)
/* Boolean: Enable nestedhvm (hvm only) */
-#define HVM_PARAM_NESTEDHVM 24
+#define HVM_PARAM_NESTEDHVM 24
/* Params for the mem event rings */
#define HVM_PARAM_PAGING_RING_PFN 27
@@ -127,8 +127,8 @@
#define HVM_PARAM_SHARING_RING_PFN 29
/* SHUTDOWN_* action in case of a triple fault */
-#define HVM_PARAM_TRIPLE_FAULT_REASON 31
+#define HVM_PARAM_TRIPLE_FAULT_REASON 31
-#define HVM_NR_PARAMS 32
+#define HVM_NR_PARAMS 32
#endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/blkif.h b/OvmfPkg/Include/IndustryStandard/Xen/io/blkif.h
index 5939610a96..8a34f9eba2 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/blkif.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/blkif.h
@@ -28,9 +28,9 @@
*/
#ifndef blkif_vdev_t
-#define blkif_vdev_t UINT16
+#define blkif_vdev_t UINT16
#endif
-#define blkif_sector_t UINT64
+#define blkif_sector_t UINT64
/*
* Feature and Parameter Negotiation
@@ -415,8 +415,9 @@
/*
* REQUEST CODES.
*/
-#define BLKIF_OP_READ 0
-#define BLKIF_OP_WRITE 1
+#define BLKIF_OP_READ 0
+#define BLKIF_OP_WRITE 1
+
/*
* All writes issued prior to a request with the BLKIF_OP_WRITE_BARRIER
* operation code ("barrier request") must be completed prior to the
@@ -425,19 +426,22 @@
*
* Optional. See "feature-barrier" XenBus node documentation above.
*/
-#define BLKIF_OP_WRITE_BARRIER 2
+#define BLKIF_OP_WRITE_BARRIER 2
+
/*
* Commit any uncommitted contents of the backing device's volatile cache
* to stable storage.
*
* Optional. See "feature-flush-cache" XenBus node documentation above.
*/
-#define BLKIF_OP_FLUSH_DISKCACHE 3
+#define BLKIF_OP_FLUSH_DISKCACHE 3
+
/*
* Used in SLES sources for device specific command packet
* contained within the request. Reserved for that purpose.
*/
-#define BLKIF_OP_RESERVED_1 4
+#define BLKIF_OP_RESERVED_1 4
+
/*
* Indicate to the backend device that a region of storage is no longer in
* use, and may be discarded at any time without impact to the client. If
@@ -458,7 +462,7 @@
* "discard-granularity", and "discard-secure" in the XenBus node
* documentation above.
*/
-#define BLKIF_OP_DISCARD 5
+#define BLKIF_OP_DISCARD 5
/*
* Recognized if "feature-max-indirect-segments" in present in the backend
@@ -482,19 +486,19 @@
* If a backend does not recognize BLKIF_OP_INDIRECT, it should *not*
* create the "feature-max-indirect-segments" node!
*/
-#define BLKIF_OP_INDIRECT 6
+#define BLKIF_OP_INDIRECT 6
/*
* Maximum scatter/gather segments per request.
* This is carefully chosen so that sizeof(blkif_ring_t) <= PAGE_SIZE.
* NB. This could be 12 if the ring indexes weren't stored in the same page.
*/
-#define BLKIF_MAX_SEGMENTS_PER_REQUEST 11
+#define BLKIF_MAX_SEGMENTS_PER_REQUEST 11
/*
* Maximum number of indirect pages to use per request.
*/
-#define BLKIF_MAX_INDIRECT_PAGES_PER_REQUEST 8
+#define BLKIF_MAX_INDIRECT_PAGES_PER_REQUEST 8
/*
* NB. first_sect and last_sect in blkif_request_segment, as well as
@@ -505,31 +509,32 @@
* 512-byte units.
*/
struct blkif_request_segment {
- grant_ref_t gref; /* reference to I/O buffer frame */
- /* @first_sect: first sector in frame to transfer (inclusive). */
- /* @last_sect: last sector in frame to transfer (inclusive). */
- UINT8 first_sect, last_sect;
+ grant_ref_t gref; /* reference to I/O buffer frame */
+ /* @first_sect: first sector in frame to transfer (inclusive). */
+ /* @last_sect: last sector in frame to transfer (inclusive). */
+ UINT8 first_sect, last_sect;
};
/*
* Starting ring element for any I/O request.
*/
-#if defined(MDE_CPU_IA32)
+#if defined (MDE_CPU_IA32)
//
// pack(4) is necessary when these structs are compiled for Ia32.
// Without it, the struct will have a different alignment than the one
// a backend expect for a 32bit guest.
//
-#pragma pack(4)
+ #pragma pack(4)
#endif
struct blkif_request {
- UINT8 operation; /* BLKIF_OP_??? */
- UINT8 nr_segments; /* number of segments */
- blkif_vdev_t handle; /* only for read/write requests */
- UINT64 id; /* private guest value, echoed in resp */
- blkif_sector_t sector_number;/* start sector idx on disk (r/w only) */
- struct blkif_request_segment seg[BLKIF_MAX_SEGMENTS_PER_REQUEST];
+ UINT8 operation; /* BLKIF_OP_??? */
+ UINT8 nr_segments; /* number of segments */
+ blkif_vdev_t handle; /* only for read/write requests */
+ UINT64 id; /* private guest value, echoed in resp */
+ blkif_sector_t sector_number; /* start sector idx on disk (r/w only) */
+ struct blkif_request_segment seg[BLKIF_MAX_SEGMENTS_PER_REQUEST];
};
+
typedef struct blkif_request blkif_request_t;
/*
@@ -537,58 +542,61 @@ typedef struct blkif_request blkif_request_t;
* sizeof(struct blkif_request_discard) <= sizeof(struct blkif_request)
*/
struct blkif_request_discard {
- UINT8 operation; /* BLKIF_OP_DISCARD */
- UINT8 flag; /* BLKIF_DISCARD_SECURE or zero */
-#define BLKIF_DISCARD_SECURE (1<<0) /* ignored if discard-secure=0 */
- blkif_vdev_t handle; /* same as for read/write requests */
- UINT64 id; /* private guest value, echoed in resp */
- blkif_sector_t sector_number;/* start sector idx on disk */
- UINT64 nr_sectors; /* number of contiguous sectors to discard*/
+ UINT8 operation; /* BLKIF_OP_DISCARD */
+ UINT8 flag; /* BLKIF_DISCARD_SECURE or zero */
+ #define BLKIF_DISCARD_SECURE (1<<0) /* ignored if discard-secure=0 */
+ blkif_vdev_t handle; /* same as for read/write requests */
+ UINT64 id; /* private guest value, echoed in resp */
+ blkif_sector_t sector_number; /* start sector idx on disk */
+ UINT64 nr_sectors; /* number of contiguous sectors to discard*/
};
+
typedef struct blkif_request_discard blkif_request_discard_t;
struct blkif_request_indirect {
- UINT8 operation; /* BLKIF_OP_INDIRECT */
- UINT8 indirect_op; /* BLKIF_OP_{READ/WRITE} */
- UINT16 nr_segments; /* number of segments */
- UINT64 id; /* private guest value, echoed in resp */
- blkif_sector_t sector_number;/* start sector idx on disk (r/w only) */
- blkif_vdev_t handle; /* same as for read/write requests */
- grant_ref_t indirect_grefs[BLKIF_MAX_INDIRECT_PAGES_PER_REQUEST];
-#ifdef MDE_CPU_IA32
- UINT64 pad; /* Make it 64 byte aligned on i386 */
-#endif
+ UINT8 operation; /* BLKIF_OP_INDIRECT */
+ UINT8 indirect_op; /* BLKIF_OP_{READ/WRITE} */
+ UINT16 nr_segments; /* number of segments */
+ UINT64 id; /* private guest value, echoed in resp */
+ blkif_sector_t sector_number; /* start sector idx on disk (r/w only) */
+ blkif_vdev_t handle; /* same as for read/write requests */
+ grant_ref_t indirect_grefs[BLKIF_MAX_INDIRECT_PAGES_PER_REQUEST];
+ #ifdef MDE_CPU_IA32
+ UINT64 pad; /* Make it 64 byte aligned on i386 */
+ #endif
};
+
typedef struct blkif_request_indirect blkif_request_indirect_t;
struct blkif_response {
- UINT64 id; /* copied from request */
- UINT8 operation; /* copied from request */
- INT16 status; /* BLKIF_RSP_??? */
+ UINT64 id; /* copied from request */
+ UINT8 operation; /* copied from request */
+ INT16 status; /* BLKIF_RSP_??? */
};
+
typedef struct blkif_response blkif_response_t;
-#if defined(MDE_CPU_IA32)
-#pragma pack()
+#if defined (MDE_CPU_IA32)
+ #pragma pack()
#endif
/*
* STATUS RETURN CODES.
*/
- /* Operation not supported (only happens on barrier writes). */
+/* Operation not supported (only happens on barrier writes). */
#define BLKIF_RSP_EOPNOTSUPP -2
- /* Operation failed for some unspecified reason (-EIO). */
-#define BLKIF_RSP_ERROR -1
- /* Operation completed successfully. */
-#define BLKIF_RSP_OKAY 0
+/* Operation failed for some unspecified reason (-EIO). */
+#define BLKIF_RSP_ERROR -1
+/* Operation completed successfully. */
+#define BLKIF_RSP_OKAY 0
/*
* Generate blkif ring structures and types.
*/
-DEFINE_RING_TYPES(blkif, struct blkif_request, struct blkif_response);
+DEFINE_RING_TYPES (blkif, struct blkif_request, struct blkif_response);
-#define VDISK_CDROM 0x1
-#define VDISK_REMOVABLE 0x2
-#define VDISK_READONLY 0x4
+#define VDISK_CDROM 0x1
+#define VDISK_REMOVABLE 0x2
+#define VDISK_READONLY 0x4
#endif /* __XEN_PUBLIC_IO_BLKIF_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/console.h b/OvmfPkg/Include/IndustryStandard/Xen/io/console.h
index c38d88b07a..bc59fdd869 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/console.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/console.h
@@ -13,13 +13,13 @@
typedef UINT32 XENCONS_RING_IDX;
-#define MASK_XENCONS_IDX(idx, ring) ((idx) & (sizeof(ring)-1))
+#define MASK_XENCONS_IDX(idx, ring) ((idx) & (sizeof(ring)-1))
struct xencons_interface {
- char in[1024];
- char out[2048];
- XENCONS_RING_IDX in_cons, in_prod;
- XENCONS_RING_IDX out_cons, out_prod;
+ char in[1024];
+ char out[2048];
+ XENCONS_RING_IDX in_cons, in_prod;
+ XENCONS_RING_IDX out_cons, out_prod;
};
#endif /* __XEN_PUBLIC_IO_CONSOLE_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/protocols.h b/OvmfPkg/Include/IndustryStandard/Xen/io/protocols.h
index 4303d37c30..4ea3b42b98 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/protocols.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/protocols.h
@@ -7,18 +7,18 @@
#ifndef __XEN_PROTOCOLS_H__
#define __XEN_PROTOCOLS_H__
-#define XEN_IO_PROTO_ABI_X86_32 "x86_32-abi"
-#define XEN_IO_PROTO_ABI_X86_64 "x86_64-abi"
-#define XEN_IO_PROTO_ABI_ARM "arm-abi"
+#define XEN_IO_PROTO_ABI_X86_32 "x86_32-abi"
+#define XEN_IO_PROTO_ABI_X86_64 "x86_64-abi"
+#define XEN_IO_PROTO_ABI_ARM "arm-abi"
-#if defined(MDE_CPU_IA32)
-# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_32
-#elif defined(MDE_CPU_X64)
-# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_64
-#elif defined(__arm__) || defined(__aarch64__)
-# define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_ARM
+#if defined (MDE_CPU_IA32)
+#define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_32
+#elif defined (MDE_CPU_X64)
+#define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_X86_64
+#elif defined (__arm__) || defined (__aarch64__)
+#define XEN_IO_PROTO_ABI_NATIVE XEN_IO_PROTO_ABI_ARM
#else
-# error arch fixup needed here
+ #error arch fixup needed here
#endif
#endif
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/ring.h b/OvmfPkg/Include/IndustryStandard/Xen/io/ring.h
index 2fa5d20ca0..d044cfb0a5 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/ring.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/ring.h
@@ -14,19 +14,19 @@
#include "../xen-compat.h"
#if __XEN_INTERFACE_VERSION__ < 0x00030208
-#define xen_mb() mb()
-#define xen_rmb() rmb()
-#define xen_wmb() wmb()
+#define xen_mb() mb()
+#define xen_rmb() rmb()
+#define xen_wmb() wmb()
#endif
typedef UINT32 RING_IDX;
/* Round a 32-bit unsigned constant down to the nearest power of two. */
-#define __RD2(_x) (((_x) & 0x00000002) ? 0x2 : ((_x) & 0x1))
-#define __RD4(_x) (((_x) & 0x0000000c) ? __RD2((_x)>>2)<<2 : __RD2(_x))
-#define __RD8(_x) (((_x) & 0x000000f0) ? __RD4((_x)>>4)<<4 : __RD4(_x))
-#define __RD16(_x) (((_x) & 0x0000ff00) ? __RD8((_x)>>8)<<8 : __RD8(_x))
-#define __RD32(_x) (((_x) & 0xffff0000) ? __RD16((_x)>>16)<<16 : __RD16(_x))
+#define __RD2(_x) (((_x) & 0x00000002) ? 0x2 : ((_x) & 0x1))
+#define __RD4(_x) (((_x) & 0x0000000c) ? __RD2((_x)>>2)<<2 : __RD2(_x))
+#define __RD8(_x) (((_x) & 0x000000f0) ? __RD4((_x)>>4)<<4 : __RD4(_x))
+#define __RD16(_x) (((_x) & 0x0000ff00) ? __RD8((_x)>>8)<<8 : __RD8(_x))
+#define __RD32(_x) (((_x) & 0xffff0000) ? __RD16((_x)>>16)<<16 : __RD16(_x))
/*
* Calculate size of a shared ring, given the total available space for the
@@ -36,7 +36,8 @@ typedef UINT32 RING_IDX;
*/
#define __CONST_RING_SIZE(_s, _sz) \
(__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \
- sizeof(((struct _s##_sring *)0)->ring[0])))
+ sizeof(((struct _s##_sring *)0)->ring[0])))
+
/*
* The same for passing in an actual pointer instead of a name tag.
*/
@@ -77,13 +78,13 @@ typedef UINT32 RING_IDX;
#define DEFINE_RING_TYPES(__name, __req_t, __rsp_t) \
\
-/* Shared ring entry */ \
+ /* Shared ring entry */ \
union __name##_sring_entry { \
__req_t req; \
__rsp_t rsp; \
}; \
\
-/* Shared ring page */ \
+ /* Shared ring page */ \
struct __name##_sring { \
RING_IDX req_prod, req_event; \
RING_IDX rsp_prod, rsp_event; \
@@ -100,7 +101,7 @@ struct __name##_sring { \
union __name##_sring_entry ring[1]; /* variable-length */ \
}; \
\
-/* "Front" end's private variables */ \
+ /* "Front" end's private variables */ \
struct __name##_front_ring { \
RING_IDX req_prod_pvt; \
RING_IDX rsp_cons; \
@@ -108,7 +109,7 @@ struct __name##_front_ring { \
struct __name##_sring *sring; \
}; \
\
-/* "Back" end's private variables */ \
+ /* "Back" end's private variables */ \
struct __name##_back_ring { \
RING_IDX rsp_prod_pvt; \
RING_IDX req_cons; \
@@ -116,7 +117,7 @@ struct __name##_back_ring { \
struct __name##_sring *sring; \
}; \
\
-/* Syntactic sugar */ \
+ /* Syntactic sugar */ \
typedef struct __name##_sring __name##_sring_t; \
typedef struct __name##_front_ring __name##_front_ring_t; \
typedef struct __name##_back_ring __name##_back_ring_t
@@ -137,21 +138,21 @@ typedef struct __name##_back_ring __name##_back_ring_t
*/
/* Initialising empty rings */
-#define SHARED_RING_INIT(_s) do { \
+#define SHARED_RING_INIT(_s) do { \
(_s)->req_prod = (_s)->rsp_prod = 0; \
(_s)->req_event = (_s)->rsp_event = 1; \
(VOID)ZeroMem((_s)->private.pvt_pad, sizeof((_s)->private.pvt_pad)); \
(VOID)ZeroMem((_s)->__pad, sizeof((_s)->__pad)); \
} while(0)
-#define FRONT_RING_INIT(_r, _s, __size) do { \
+#define FRONT_RING_INIT(_r, _s, __size) do { \
(_r)->req_prod_pvt = 0; \
(_r)->rsp_cons = 0; \
(_r)->nr_ents = __RING_SIZE(_s, __size); \
(_r)->sring = (_s); \
} while (0)
-#define BACK_RING_INIT(_r, _s, __size) do { \
+#define BACK_RING_INIT(_r, _s, __size) do { \
(_r)->rsp_prod_pvt = 0; \
(_r)->req_cons = 0; \
(_r)->nr_ents = __RING_SIZE(_s, __size); \
@@ -177,7 +178,7 @@ typedef struct __name##_back_ring __name##_back_ring_t
((_r)->sring->rsp_prod - (_r)->rsp_cons)
#ifdef __GNUC__
-#define RING_HAS_UNCONSUMED_REQUESTS(_r) ({ \
+#define RING_HAS_UNCONSUMED_REQUESTS(_r) ({ \
UINT32 req = (_r)->sring->req_prod - (_r)->req_cons; \
UINT32 rsp = RING_SIZE(_r) - \
((_r)->req_cons - (_r)->rsp_prod_pvt); \
@@ -207,12 +208,12 @@ typedef struct __name##_back_ring __name##_back_ring_t
#define RING_REQUEST_PROD_OVERFLOW(_r, _prod) \
(((_prod) - (_r)->rsp_prod_pvt) > RING_SIZE(_r))
-#define RING_PUSH_REQUESTS(_r) do { \
+#define RING_PUSH_REQUESTS(_r) do { \
xen_wmb(); /* back sees requests /before/ updated producer index */ \
(_r)->sring->req_prod = (_r)->req_prod_pvt; \
} while (0)
-#define RING_PUSH_RESPONSES(_r) do { \
+#define RING_PUSH_RESPONSES(_r) do { \
xen_wmb(); /* front sees resps /before/ updated producer index */ \
(_r)->sring->rsp_prod = (_r)->rsp_prod_pvt; \
} while (0)
@@ -247,7 +248,7 @@ typedef struct __name##_back_ring __name##_back_ring_t
* field appropriately.
*/
-#define RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(_r, _notify) do { \
+#define RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(_r, _notify) do { \
RING_IDX __old = (_r)->sring->req_prod; \
RING_IDX __new = (_r)->req_prod_pvt; \
xen_wmb(); /* back sees requests /before/ updated producer index */ \
@@ -257,7 +258,7 @@ typedef struct __name##_back_ring __name##_back_ring_t
(RING_IDX)(__new - __old)); \
} while (0)
-#define RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(_r, _notify) do { \
+#define RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(_r, _notify) do { \
RING_IDX __old = (_r)->sring->rsp_prod; \
RING_IDX __new = (_r)->rsp_prod_pvt; \
xen_wmb(); /* front sees resps /before/ updated producer index */ \
@@ -267,7 +268,7 @@ typedef struct __name##_back_ring __name##_back_ring_t
(RING_IDX)(__new - __old)); \
} while (0)
-#define RING_FINAL_CHECK_FOR_REQUESTS(_r, _work_to_do) do { \
+#define RING_FINAL_CHECK_FOR_REQUESTS(_r, _work_to_do) do { \
(_work_to_do) = RING_HAS_UNCONSUMED_REQUESTS(_r); \
if (_work_to_do) break; \
(_r)->sring->req_event = (_r)->req_cons + 1; \
@@ -275,7 +276,7 @@ typedef struct __name##_back_ring __name##_back_ring_t
(_work_to_do) = RING_HAS_UNCONSUMED_REQUESTS(_r); \
} while (0)
-#define RING_FINAL_CHECK_FOR_RESPONSES(_r, _work_to_do) do { \
+#define RING_FINAL_CHECK_FOR_RESPONSES(_r, _work_to_do) do { \
(_work_to_do) = RING_HAS_UNCONSUMED_RESPONSES(_r); \
if (_work_to_do) break; \
(_r)->sring->rsp_event = (_r)->rsp_cons + 1; \
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/xenbus.h b/OvmfPkg/Include/IndustryStandard/Xen/io/xenbus.h
index 80db1909e9..1a50619bbf 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/xenbus.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/xenbus.h
@@ -18,37 +18,38 @@
* layers.
*/
enum xenbus_state {
- XenbusStateUnknown = 0,
+ XenbusStateUnknown = 0,
- XenbusStateInitialising = 1,
+ XenbusStateInitialising = 1,
- /*
- * InitWait: Finished early initialisation but waiting for information
- * from the peer or hotplug scripts.
- */
- XenbusStateInitWait = 2,
+ /*
+ * InitWait: Finished early initialisation but waiting for information
+ * from the peer or hotplug scripts.
+ */
+ XenbusStateInitWait = 2,
- /*
- * Initialised: Waiting for a connection from the peer.
- */
- XenbusStateInitialised = 3,
+ /*
+ * Initialised: Waiting for a connection from the peer.
+ */
+ XenbusStateInitialised = 3,
- XenbusStateConnected = 4,
+ XenbusStateConnected = 4,
- /*
- * Closing: The device is being closed due to an error or an unplug event.
- */
- XenbusStateClosing = 5,
+ /*
+ * Closing: The device is being closed due to an error or an unplug event.
+ */
+ XenbusStateClosing = 5,
- XenbusStateClosed = 6,
+ XenbusStateClosed = 6,
- /*
- * Reconfiguring: The device is being reconfigured.
- */
- XenbusStateReconfiguring = 7,
+ /*
+ * Reconfiguring: The device is being reconfigured.
+ */
+ XenbusStateReconfiguring = 7,
- XenbusStateReconfigured = 8
+ XenbusStateReconfigured = 8
};
+
typedef enum xenbus_state XenbusState;
#endif /* _XEN_PUBLIC_IO_XENBUS_H */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/io/xs_wire.h b/OvmfPkg/Include/IndustryStandard/Xen/io/xs_wire.h
index fb4e48d591..a6b75b8b22 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/io/xs_wire.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/io/xs_wire.h
@@ -10,115 +10,112 @@
#ifndef _XS_WIRE_H
#define _XS_WIRE_H
-enum xsd_sockmsg_type
-{
- XS_DEBUG,
- XS_DIRECTORY,
- XS_READ,
- XS_GET_PERMS,
- XS_WATCH,
- XS_UNWATCH,
- XS_TRANSACTION_START,
- XS_TRANSACTION_END,
- XS_INTRODUCE,
- XS_RELEASE,
- XS_GET_DOMAIN_PATH,
- XS_WRITE,
- XS_MKDIR,
- XS_RM,
- XS_SET_PERMS,
- XS_WATCH_EVENT,
- XS_ERROR,
- XS_IS_DOMAIN_INTRODUCED,
- XS_RESUME,
- XS_SET_TARGET,
- XS_RESTRICT,
- XS_RESET_WATCHES,
-
- XS_INVALID = 0xffff /* Guaranteed to remain an invalid type */
+enum xsd_sockmsg_type {
+ XS_DEBUG,
+ XS_DIRECTORY,
+ XS_READ,
+ XS_GET_PERMS,
+ XS_WATCH,
+ XS_UNWATCH,
+ XS_TRANSACTION_START,
+ XS_TRANSACTION_END,
+ XS_INTRODUCE,
+ XS_RELEASE,
+ XS_GET_DOMAIN_PATH,
+ XS_WRITE,
+ XS_MKDIR,
+ XS_RM,
+ XS_SET_PERMS,
+ XS_WATCH_EVENT,
+ XS_ERROR,
+ XS_IS_DOMAIN_INTRODUCED,
+ XS_RESUME,
+ XS_SET_TARGET,
+ XS_RESTRICT,
+ XS_RESET_WATCHES,
+
+ XS_INVALID = 0xffff /* Guaranteed to remain an invalid type */
};
-#define XS_WRITE_NONE "NONE"
-#define XS_WRITE_CREATE "CREATE"
-#define XS_WRITE_CREATE_EXCL "CREATE|EXCL"
+#define XS_WRITE_NONE "NONE"
+#define XS_WRITE_CREATE "CREATE"
+#define XS_WRITE_CREATE_EXCL "CREATE|EXCL"
/* We hand errors as strings, for portability. */
-struct xsd_errors
-{
- INT32 errnum;
- const CHAR8 *errstring;
+struct xsd_errors {
+ INT32 errnum;
+ const CHAR8 *errstring;
};
+
#ifdef EINVAL
-#define XSD_ERROR(x) { x, #x }
+#define XSD_ERROR(x) { x, #x }
/* LINTED: static unused */
static struct xsd_errors xsd_errors[]
-#if defined(__GNUC__)
-__attribute__((unused))
-#endif
- = {
- XSD_ERROR(EINVAL),
- XSD_ERROR(EACCES),
- XSD_ERROR(EEXIST),
- XSD_ERROR(EISDIR),
- XSD_ERROR(ENOENT),
- XSD_ERROR(ENOMEM),
- XSD_ERROR(ENOSPC),
- XSD_ERROR(EIO),
- XSD_ERROR(ENOTEMPTY),
- XSD_ERROR(ENOSYS),
- XSD_ERROR(EROFS),
- XSD_ERROR(EBUSY),
- XSD_ERROR(EAGAIN),
- XSD_ERROR(EISCONN),
- XSD_ERROR(E2BIG)
-};
+ #if defined (__GNUC__)
+__attribute__ ((unused))
+ #endif
+ = {
+ XSD_ERROR (EINVAL),
+ XSD_ERROR (EACCES),
+ XSD_ERROR (EEXIST),
+ XSD_ERROR (EISDIR),
+ XSD_ERROR (ENOENT),
+ XSD_ERROR (ENOMEM),
+ XSD_ERROR (ENOSPC),
+ XSD_ERROR (EIO),
+ XSD_ERROR (ENOTEMPTY),
+ XSD_ERROR (ENOSYS),
+ XSD_ERROR (EROFS),
+ XSD_ERROR (EBUSY),
+ XSD_ERROR (EAGAIN),
+ XSD_ERROR (EISCONN),
+ XSD_ERROR (E2BIG)
+ };
#endif
-struct xsd_sockmsg
-{
- UINT32 type; /* XS_??? */
- UINT32 req_id;/* Request identifier, echoed in daemon's response. */
- UINT32 tx_id; /* Transaction id (0 if not related to a transaction). */
- UINT32 len; /* Length of data following this. */
+struct xsd_sockmsg {
+ UINT32 type; /* XS_??? */
+ UINT32 req_id; /* Request identifier, echoed in daemon's response. */
+ UINT32 tx_id; /* Transaction id (0 if not related to a transaction). */
+ UINT32 len; /* Length of data following this. */
- /* Generally followed by nul-terminated string(s). */
+ /* Generally followed by nul-terminated string(s). */
};
-enum xs_watch_type
-{
- XS_WATCH_PATH = 0,
- XS_WATCH_TOKEN
+enum xs_watch_type {
+ XS_WATCH_PATH = 0,
+ XS_WATCH_TOKEN
};
/*
* `incontents 150 xenstore_struct XenStore wire protocol.
*
* Inter-domain shared memory communications. */
-#define XENSTORE_RING_SIZE 1024
+#define XENSTORE_RING_SIZE 1024
typedef UINT32 XENSTORE_RING_IDX;
-#define MASK_XENSTORE_IDX(idx) ((idx) & (XENSTORE_RING_SIZE-1))
+#define MASK_XENSTORE_IDX(idx) ((idx) & (XENSTORE_RING_SIZE-1))
struct xenstore_domain_interface {
- CHAR8 req[XENSTORE_RING_SIZE]; /* Requests to xenstore daemon. */
- CHAR8 rsp[XENSTORE_RING_SIZE]; /* Replies and async watch events. */
- XENSTORE_RING_IDX req_cons, req_prod;
- XENSTORE_RING_IDX rsp_cons, rsp_prod;
- UINT32 server_features; /* Bitmap of features supported by the server */
- UINT32 connection;
+ CHAR8 req[XENSTORE_RING_SIZE]; /* Requests to xenstore daemon. */
+ CHAR8 rsp[XENSTORE_RING_SIZE]; /* Replies and async watch events. */
+ XENSTORE_RING_IDX req_cons, req_prod;
+ XENSTORE_RING_IDX rsp_cons, rsp_prod;
+ UINT32 server_features; /* Bitmap of features supported by the server */
+ UINT32 connection;
};
/* Violating this is very bad. See docs/misc/xenstore.txt. */
-#define XENSTORE_PAYLOAD_MAX 4096
+#define XENSTORE_PAYLOAD_MAX 4096
/* Violating these just gets you an error back */
-#define XENSTORE_ABS_PATH_MAX 3072
-#define XENSTORE_REL_PATH_MAX 2048
+#define XENSTORE_ABS_PATH_MAX 3072
+#define XENSTORE_REL_PATH_MAX 2048
/* The ability to reconnect a ring */
-#define XENSTORE_SERVER_FEATURE_RECONNECTION 1
+#define XENSTORE_SERVER_FEATURE_RECONNECTION 1
/* Valid values for the connection field */
-#define XENSTORE_CONNECTED 0 /* the steady-state */
-#define XENSTORE_RECONNECT 1 /* guest has initiated a reconnect */
+#define XENSTORE_CONNECTED 0 /* the steady-state */
+#define XENSTORE_RECONNECT 1 /* guest has initiated a reconnect */
#endif /* _XS_WIRE_H */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/memory.h b/OvmfPkg/Include/IndustryStandard/Xen/memory.h
index 54ee4b4654..e2b209f3d7 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/memory.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/memory.h
@@ -15,11 +15,11 @@
/* Source mapping space. */
/* ` enum phys_map_space { */
-#define XENMAPSPACE_shared_info 0 /* shared info page */
-#define XENMAPSPACE_grant_table 1 /* grant table page */
-#define XENMAPSPACE_gmfn 2 /* GMFN */
-#define XENMAPSPACE_gmfn_range 3 /* GMFN range, XENMEM_add_to_physmap only. */
-#define XENMAPSPACE_gmfn_foreign 4 /* GMFN from another dom,
+#define XENMAPSPACE_shared_info 0 /* shared info page */
+#define XENMAPSPACE_grant_table 1 /* grant table page */
+#define XENMAPSPACE_gmfn 2 /* GMFN */
+#define XENMAPSPACE_gmfn_range 3 /* GMFN range, XENMEM_add_to_physmap only. */
+#define XENMAPSPACE_gmfn_foreign 4 /* GMFN from another dom,
* XENMEM_add_to_physmap_batch only. */
/* ` } */
@@ -28,65 +28,68 @@
* pseudophysical address space.
* arg == addr of xen_add_to_physmap_t.
*/
-#define XENMEM_add_to_physmap 7
+#define XENMEM_add_to_physmap 7
struct xen_add_to_physmap {
- /* Which domain to change the mapping for. */
- domid_t domid;
+ /* Which domain to change the mapping for. */
+ domid_t domid;
- /* Number of pages to go through for gmfn_range */
- UINT16 size;
+ /* Number of pages to go through for gmfn_range */
+ UINT16 size;
- UINT32 space; /* => enum phys_map_space */
+ UINT32 space; /* => enum phys_map_space */
-#define XENMAPIDX_grant_table_status 0x80000000
+ #define XENMAPIDX_grant_table_status 0x80000000
- /* Index into space being mapped. */
- xen_ulong_t idx;
+ /* Index into space being mapped. */
+ xen_ulong_t idx;
- /* GPFN in domid where the source mapping page should appear. */
- xen_pfn_t gpfn;
+ /* GPFN in domid where the source mapping page should appear. */
+ xen_pfn_t gpfn;
};
+
typedef struct xen_add_to_physmap xen_add_to_physmap_t;
-DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_t);
+DEFINE_XEN_GUEST_HANDLE (xen_add_to_physmap_t);
/*
* Unmaps the page appearing at a particular GPFN from the specified guest's
* pseudophysical address space.
* arg == addr of xen_remove_from_physmap_t.
*/
-#define XENMEM_remove_from_physmap 15
+#define XENMEM_remove_from_physmap 15
struct xen_remove_from_physmap {
- /* Which domain to change the mapping for. */
- domid_t domid;
+ /* Which domain to change the mapping for. */
+ domid_t domid;
- /* GPFN of the current mapping of the page. */
- xen_pfn_t gpfn;
+ /* GPFN of the current mapping of the page. */
+ xen_pfn_t gpfn;
};
+
typedef struct xen_remove_from_physmap xen_remove_from_physmap_t;
-DEFINE_XEN_GUEST_HANDLE(xen_remove_from_physmap_t);
+DEFINE_XEN_GUEST_HANDLE (xen_remove_from_physmap_t);
/*
* Returns the pseudo-physical memory map as it was when the domain
* was started (specified by XENMEM_set_memory_map).
* arg == addr of xen_memory_map_t.
*/
-#define XENMEM_memory_map 9
+#define XENMEM_memory_map 9
struct xen_memory_map {
- /*
- * On call the number of entries which can be stored in buffer. On
- * return the number of entries which have been stored in
- * buffer.
- */
- UINT32 nr_entries;
-
- /*
- * Entries in the buffer are in the same format as returned by the
- * BIOS INT 0x15 EAX=0xE820 call.
- */
- XEN_GUEST_HANDLE(void) buffer;
+ /*
+ * On call the number of entries which can be stored in buffer. On
+ * return the number of entries which have been stored in
+ * buffer.
+ */
+ UINT32 nr_entries;
+
+ /*
+ * Entries in the buffer are in the same format as returned by the
+ * BIOS INT 0x15 EAX=0xE820 call.
+ */
+ XEN_GUEST_HANDLE (void) buffer;
};
+
typedef struct xen_memory_map xen_memory_map_t;
-DEFINE_XEN_GUEST_HANDLE(xen_memory_map_t);
+DEFINE_XEN_GUEST_HANDLE (xen_memory_map_t);
#endif /* __XEN_PUBLIC_MEMORY_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/xen-compat.h b/OvmfPkg/Include/IndustryStandard/Xen/xen-compat.h
index c77049f796..1e9e304ced 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/xen-compat.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/xen-compat.h
@@ -11,18 +11,18 @@
#ifndef __XEN_PUBLIC_XEN_COMPAT_H__
#define __XEN_PUBLIC_XEN_COMPAT_H__
-#define __XEN_LATEST_INTERFACE_VERSION__ 0x00040400
+#define __XEN_LATEST_INTERFACE_VERSION__ 0x00040400
-#if defined(__XEN__) || defined(__XEN_TOOLS__)
+#if defined (__XEN__) || defined (__XEN_TOOLS__)
/* Xen is built with matching headers and implements the latest interface. */
-#define __XEN_INTERFACE_VERSION__ __XEN_LATEST_INTERFACE_VERSION__
-#elif !defined(__XEN_INTERFACE_VERSION__)
+#define __XEN_INTERFACE_VERSION__ __XEN_LATEST_INTERFACE_VERSION__
+#elif !defined (__XEN_INTERFACE_VERSION__)
/* Guests which do not specify a version get the legacy interface. */
-#define __XEN_INTERFACE_VERSION__ 0x00000000
+#define __XEN_INTERFACE_VERSION__ 0x00000000
#endif
#if __XEN_INTERFACE_VERSION__ > __XEN_LATEST_INTERFACE_VERSION__
-#error "These header files do not support the requested interface version."
+ #error "These header files do not support the requested interface version."
#endif
#endif /* __XEN_PUBLIC_XEN_COMPAT_H__ */
diff --git a/OvmfPkg/Include/IndustryStandard/Xen/xen.h b/OvmfPkg/Include/IndustryStandard/Xen/xen.h
index 79a4e212e7..f28a1d47fc 100644
--- a/OvmfPkg/Include/IndustryStandard/Xen/xen.h
+++ b/OvmfPkg/Include/IndustryStandard/Xen/xen.h
@@ -14,33 +14,33 @@
//
// Xen interface version used by Tianocore
//
-#define __XEN_INTERFACE_VERSION__ 0x00040400
+#define __XEN_INTERFACE_VERSION__ 0x00040400
#include "xen-compat.h"
-#if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64)
-#include "arch-x86/xen.h"
-#elif defined(__arm__) || defined (__aarch64__)
-#include "arch-arm/xen.h"
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ #include "arch-x86/xen.h"
+#elif defined (__arm__) || defined (__aarch64__)
+ #include "arch-arm/xen.h"
#else
-#error "Unsupported architecture"
+ #error "Unsupported architecture"
#endif
#ifndef __ASSEMBLY__
/* Guest handles for primitive C types. */
-DEFINE_XEN_GUEST_HANDLE(CHAR8);
-__DEFINE_XEN_GUEST_HANDLE(uchar, UINT8);
-DEFINE_XEN_GUEST_HANDLE(INT32);
-__DEFINE_XEN_GUEST_HANDLE(uint, UINT32);
-#if __XEN_INTERFACE_VERSION__ < 0x00040300
-DEFINE_XEN_GUEST_HANDLE(INTN);
-__DEFINE_XEN_GUEST_HANDLE(ulong, UINTN);
-#endif
-DEFINE_XEN_GUEST_HANDLE(VOID);
-
-DEFINE_XEN_GUEST_HANDLE(UINT64);
-DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
-DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
+DEFINE_XEN_GUEST_HANDLE (CHAR8);
+__DEFINE_XEN_GUEST_HANDLE (uchar, UINT8);
+DEFINE_XEN_GUEST_HANDLE (INT32);
+__DEFINE_XEN_GUEST_HANDLE (uint, UINT32);
+ #if __XEN_INTERFACE_VERSION__ < 0x00040300
+DEFINE_XEN_GUEST_HANDLE (INTN);
+__DEFINE_XEN_GUEST_HANDLE (ulong, UINTN);
+ #endif
+DEFINE_XEN_GUEST_HANDLE (VOID);
+
+DEFINE_XEN_GUEST_HANDLE (UINT64);
+DEFINE_XEN_GUEST_HANDLE (xen_pfn_t);
+DEFINE_XEN_GUEST_HANDLE (xen_ulong_t);
#endif
/*
@@ -51,55 +51,55 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
* ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*()
*/
-#define __HYPERVISOR_set_trap_table 0
-#define __HYPERVISOR_mmu_update 1
-#define __HYPERVISOR_set_gdt 2
-#define __HYPERVISOR_stack_switch 3
-#define __HYPERVISOR_set_callbacks 4
-#define __HYPERVISOR_fpu_taskswitch 5
-#define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */
-#define __HYPERVISOR_platform_op 7
-#define __HYPERVISOR_set_debugreg 8
-#define __HYPERVISOR_get_debugreg 9
-#define __HYPERVISOR_update_descriptor 10
-#define __HYPERVISOR_memory_op 12
-#define __HYPERVISOR_multicall 13
-#define __HYPERVISOR_update_va_mapping 14
-#define __HYPERVISOR_set_timer_op 15
-#define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */
-#define __HYPERVISOR_xen_version 17
-#define __HYPERVISOR_console_io 18
-#define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */
-#define __HYPERVISOR_grant_table_op 20
-#define __HYPERVISOR_vm_assist 21
-#define __HYPERVISOR_update_va_mapping_otherdomain 22
-#define __HYPERVISOR_iret 23 /* x86 only */
-#define __HYPERVISOR_vcpu_op 24
-#define __HYPERVISOR_set_segment_base 25 /* x86/64 only */
-#define __HYPERVISOR_mmuext_op 26
-#define __HYPERVISOR_xsm_op 27
-#define __HYPERVISOR_nmi_op 28
-#define __HYPERVISOR_sched_op 29
-#define __HYPERVISOR_callback_op 30
-#define __HYPERVISOR_xenoprof_op 31
-#define __HYPERVISOR_event_channel_op 32
-#define __HYPERVISOR_physdev_op 33
-#define __HYPERVISOR_hvm_op 34
-#define __HYPERVISOR_sysctl 35
-#define __HYPERVISOR_domctl 36
-#define __HYPERVISOR_kexec_op 37
-#define __HYPERVISOR_tmem_op 38
-#define __HYPERVISOR_xc_reserved_op 39 /* reserved for XenClient */
+#define __HYPERVISOR_set_trap_table 0
+#define __HYPERVISOR_mmu_update 1
+#define __HYPERVISOR_set_gdt 2
+#define __HYPERVISOR_stack_switch 3
+#define __HYPERVISOR_set_callbacks 4
+#define __HYPERVISOR_fpu_taskswitch 5
+#define __HYPERVISOR_sched_op_compat 6/* compat since 0x00030101 */
+#define __HYPERVISOR_platform_op 7
+#define __HYPERVISOR_set_debugreg 8
+#define __HYPERVISOR_get_debugreg 9
+#define __HYPERVISOR_update_descriptor 10
+#define __HYPERVISOR_memory_op 12
+#define __HYPERVISOR_multicall 13
+#define __HYPERVISOR_update_va_mapping 14
+#define __HYPERVISOR_set_timer_op 15
+#define __HYPERVISOR_event_channel_op_compat 16/* compat since 0x00030202 */
+#define __HYPERVISOR_xen_version 17
+#define __HYPERVISOR_console_io 18
+#define __HYPERVISOR_physdev_op_compat 19/* compat since 0x00030202 */
+#define __HYPERVISOR_grant_table_op 20
+#define __HYPERVISOR_vm_assist 21
+#define __HYPERVISOR_update_va_mapping_otherdomain 22
+#define __HYPERVISOR_iret 23/* x86 only */
+#define __HYPERVISOR_vcpu_op 24
+#define __HYPERVISOR_set_segment_base 25/* x86/64 only */
+#define __HYPERVISOR_mmuext_op 26
+#define __HYPERVISOR_xsm_op 27
+#define __HYPERVISOR_nmi_op 28
+#define __HYPERVISOR_sched_op 29
+#define __HYPERVISOR_callback_op 30
+#define __HYPERVISOR_xenoprof_op 31
+#define __HYPERVISOR_event_channel_op 32
+#define __HYPERVISOR_physdev_op 33
+#define __HYPERVISOR_hvm_op 34
+#define __HYPERVISOR_sysctl 35
+#define __HYPERVISOR_domctl 36
+#define __HYPERVISOR_kexec_op 37
+#define __HYPERVISOR_tmem_op 38
+#define __HYPERVISOR_xc_reserved_op 39/* reserved for XenClient */
/* Architecture-specific hypercall definitions. */
-#define __HYPERVISOR_arch_0 48
-#define __HYPERVISOR_arch_1 49
-#define __HYPERVISOR_arch_2 50
-#define __HYPERVISOR_arch_3 51
-#define __HYPERVISOR_arch_4 52
-#define __HYPERVISOR_arch_5 53
-#define __HYPERVISOR_arch_6 54
-#define __HYPERVISOR_arch_7 55
+#define __HYPERVISOR_arch_0 48
+#define __HYPERVISOR_arch_1 49
+#define __HYPERVISOR_arch_2 50
+#define __HYPERVISOR_arch_3 51
+#define __HYPERVISOR_arch_4 52
+#define __HYPERVISOR_arch_5 53
+#define __HYPERVISOR_arch_6 54
+#define __HYPERVISOR_arch_7 55
/* ` } */
@@ -109,21 +109,21 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
/* New sched_op hypercall introduced in 0x00030101. */
#if __XEN_INTERFACE_VERSION__ < 0x00030101
-#undef __HYPERVISOR_sched_op
-#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
+ #undef __HYPERVISOR_sched_op
+#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
#endif
/* New event-channel and physdev hypercalls introduced in 0x00030202. */
#if __XEN_INTERFACE_VERSION__ < 0x00030202
-#undef __HYPERVISOR_event_channel_op
-#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
-#undef __HYPERVISOR_physdev_op
-#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
+ #undef __HYPERVISOR_event_channel_op
+#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
+ #undef __HYPERVISOR_physdev_op
+#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
#endif
/* New platform_op hypercall introduced in 0x00030204. */
#if __XEN_INTERFACE_VERSION__ < 0x00030204
-#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
+#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
#endif
#ifndef __ASSEMBLY__
@@ -131,10 +131,10 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
typedef UINT16 domid_t;
/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
-#define DOMID_FIRST_RESERVED (0x7FF0U)
+#define DOMID_FIRST_RESERVED (0x7FF0U)
/* DOMID_SELF is used in certain contexts to refer to oneself. */
-#define DOMID_SELF (0x7FF0U)
+#define DOMID_SELF (0x7FF0U)
/*
* DOMID_IO is used to restrict page-table updates to mapping I/O memory.
@@ -145,7 +145,7 @@ typedef UINT16 domid_t;
* This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
* be specified by any calling domain.
*/
-#define DOMID_IO (0x7FF1U)
+#define DOMID_IO (0x7FF1U)
/*
* DOMID_XEN is used to allow privileged domains to map restricted parts of
@@ -160,85 +160,89 @@ typedef UINT16 domid_t;
#define DOMID_COW (0x7FF3U)
/* DOMID_INVALID is used to identify pages with unknown owner. */
-#define DOMID_INVALID (0x7FF4U)
+#define DOMID_INVALID (0x7FF4U)
/* Idle domain. */
-#define DOMID_IDLE (0x7FFFU)
+#define DOMID_IDLE (0x7FFFU)
+
+ #if __XEN_INTERFACE_VERSION__ < 0x00040400
-#if __XEN_INTERFACE_VERSION__ < 0x00040400
/*
* Event channel endpoints per domain (when using the 2-level ABI):
* 1024 if a INTN is 32 bits; 4096 if a INTN is 64 bits.
*/
-#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS
-#endif
+#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS
+ #endif
struct vcpu_time_info {
- /*
- * Updates to the following values are preceded and followed by an
- * increment of 'version'. The guest can therefore detect updates by
- * looking for changes to 'version'. If the least-significant bit of
- * the version number is set then an update is in progress and the guest
- * must wait to read a consistent set of values.
- * The correct way to interact with the version number is similar to
- * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
- */
- UINT32 Version;
- UINT32 pad0;
- UINT64 TscTimestamp; /* TSC at last update of time vals. */
- UINT64 SystemTime; /* Time, in nanosecs, since boot. */
- /*
- * Current system time:
- * system_time +
- * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
- * CPU frequency (Hz):
- * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
- */
- UINT32 TscToSystemMultiplier;
- INT8 TscShift;
- INT8 pad1[3];
+ /*
+ * Updates to the following values are preceded and followed by an
+ * increment of 'version'. The guest can therefore detect updates by
+ * looking for changes to 'version'. If the least-significant bit of
+ * the version number is set then an update is in progress and the guest
+ * must wait to read a consistent set of values.
+ * The correct way to interact with the version number is similar to
+ * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
+ */
+ UINT32 Version;
+ UINT32 pad0;
+ UINT64 TscTimestamp; /* TSC at last update of time vals. */
+ UINT64 SystemTime; /* Time, in nanosecs, since boot. */
+
+ /*
+ * Current system time:
+ * system_time +
+ * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
+ * CPU frequency (Hz):
+ * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
+ */
+ UINT32 TscToSystemMultiplier;
+ INT8 TscShift;
+ INT8 pad1[3];
}; /* 32 bytes */
+
typedef struct vcpu_time_info XEN_VCPU_TIME_INFO;
struct vcpu_info {
- /*
- * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
- * a pending notification for a particular VCPU. It is then cleared
- * by the guest OS /before/ checking for pending work, thus avoiding
- * a set-and-check race. Note that the mask is only accessed by Xen
- * on the CPU that is currently hosting the VCPU. This means that the
- * pending and mask flags can be updated by the guest without special
- * synchronisation (i.e., no need for the x86 LOCK prefix).
- * This may seem suboptimal because if the pending flag is set by
- * a different CPU then an IPI may be scheduled even when the mask
- * is set. However, note:
- * 1. The task of 'interrupt holdoff' is covered by the per-event-
- * channel mask bits. A 'noisy' event that is continually being
- * triggered can be masked at source at this very precise
- * granularity.
- * 2. The main purpose of the per-VCPU mask is therefore to restrict
- * reentrant execution: whether for concurrency control, or to
- * prevent unbounded stack usage. Whatever the purpose, we expect
- * that the mask will be asserted only for short periods at a time,
- * and so the likelihood of a 'spurious' IPI is suitably small.
- * The mask is read before making an event upcall to the guest: a
- * non-zero mask therefore guarantees that the VCPU will not receive
- * an upcall activation. The mask is cleared when the VCPU requests
- * to block: this avoids wakeup-waiting races.
- */
- UINT8 evtchn_upcall_pending;
-#ifdef XEN_HAVE_PV_UPCALL_MASK
- UINT8 evtchn_upcall_mask;
-#else /* XEN_HAVE_PV_UPCALL_MASK */
- UINT8 pad0;
-#endif /* XEN_HAVE_PV_UPCALL_MASK */
- xen_ulong_t evtchn_pending_sel;
- struct arch_vcpu_info arch;
- struct vcpu_time_info Time;
+ /*
+ * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
+ * a pending notification for a particular VCPU. It is then cleared
+ * by the guest OS /before/ checking for pending work, thus avoiding
+ * a set-and-check race. Note that the mask is only accessed by Xen
+ * on the CPU that is currently hosting the VCPU. This means that the
+ * pending and mask flags can be updated by the guest without special
+ * synchronisation (i.e., no need for the x86 LOCK prefix).
+ * This may seem suboptimal because if the pending flag is set by
+ * a different CPU then an IPI may be scheduled even when the mask
+ * is set. However, note:
+ * 1. The task of 'interrupt holdoff' is covered by the per-event-
+ * channel mask bits. A 'noisy' event that is continually being
+ * triggered can be masked at source at this very precise
+ * granularity.
+ * 2. The main purpose of the per-VCPU mask is therefore to restrict
+ * reentrant execution: whether for concurrency control, or to
+ * prevent unbounded stack usage. Whatever the purpose, we expect
+ * that the mask will be asserted only for short periods at a time,
+ * and so the likelihood of a 'spurious' IPI is suitably small.
+ * The mask is read before making an event upcall to the guest: a
+ * non-zero mask therefore guarantees that the VCPU will not receive
+ * an upcall activation. The mask is cleared when the VCPU requests
+ * to block: this avoids wakeup-waiting races.
+ */
+ UINT8 evtchn_upcall_pending;
+ #ifdef XEN_HAVE_PV_UPCALL_MASK
+ UINT8 evtchn_upcall_mask;
+ #else /* XEN_HAVE_PV_UPCALL_MASK */
+ UINT8 pad0;
+ #endif /* XEN_HAVE_PV_UPCALL_MASK */
+ xen_ulong_t evtchn_pending_sel;
+ struct arch_vcpu_info arch;
+ struct vcpu_time_info Time;
}; /* 64 bytes (x86) */
-#ifndef __XEN__
+
+ #ifndef __XEN__
typedef struct vcpu_info vcpu_info_t;
-#endif
+ #endif
/*
* `incontents 200 startofday_shared Start-of-day shared data structure
@@ -250,71 +254,71 @@ typedef struct vcpu_info vcpu_info_t;
* of this structure remaining constant.
*/
struct shared_info {
- struct vcpu_info VcpuInfo[XEN_LEGACY_MAX_VCPUS];
-
- /*
- * A domain can create "event channels" on which it can send and receive
- * asynchronous event notifications. There are three classes of event that
- * are delivered by this mechanism:
- * 1. Bi-directional inter- and intra-domain connections. Domains must
- * arrange out-of-band to set up a connection (usually by allocating
- * an unbound 'listener' port and avertising that via a storage service
- * such as xenstore).
- * 2. Physical interrupts. A domain with suitable hardware-access
- * privileges can bind an event-channel port to a physical interrupt
- * source.
- * 3. Virtual interrupts ('events'). A domain can bind an event-channel
- * port to a virtual interrupt source, such as the virtual-timer
- * device or the emergency console.
- *
- * Event channels are addressed by a "port index". Each channel is
- * associated with two bits of information:
- * 1. PENDING -- notifies the domain that there is a pending notification
- * to be processed. This bit is cleared by the guest.
- * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
- * will cause an asynchronous upcall to be scheduled. This bit is only
- * updated by the guest. It is read-only within Xen. If a channel
- * becomes pending while the channel is masked then the 'edge' is lost
- * (i.e., when the channel is unmasked, the guest must manually handle
- * pending notifications as no upcall will be scheduled by Xen).
- *
- * To expedite scanning of pending notifications, any 0->1 pending
- * transition on an unmasked channel causes a corresponding bit in a
- * per-vcpu selector word to be set. Each bit in the selector covers a
- * 'C INTN' in the PENDING bitfield array.
- */
- xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8];
- xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8];
-
- /*
- * Wallclock time: updated only by control software. Guests should base
- * their gettimeofday() syscall on this wallclock-base value.
- */
- UINT32 wc_version; /* Version counter: see vcpu_time_info_t. */
- UINT32 wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */
- UINT32 wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */
-
- struct arch_shared_info arch;
-
+ struct vcpu_info VcpuInfo[XEN_LEGACY_MAX_VCPUS];
+
+ /*
+ * A domain can create "event channels" on which it can send and receive
+ * asynchronous event notifications. There are three classes of event that
+ * are delivered by this mechanism:
+ * 1. Bi-directional inter- and intra-domain connections. Domains must
+ * arrange out-of-band to set up a connection (usually by allocating
+ * an unbound 'listener' port and avertising that via a storage service
+ * such as xenstore).
+ * 2. Physical interrupts. A domain with suitable hardware-access
+ * privileges can bind an event-channel port to a physical interrupt
+ * source.
+ * 3. Virtual interrupts ('events'). A domain can bind an event-channel
+ * port to a virtual interrupt source, such as the virtual-timer
+ * device or the emergency console.
+ *
+ * Event channels are addressed by a "port index". Each channel is
+ * associated with two bits of information:
+ * 1. PENDING -- notifies the domain that there is a pending notification
+ * to be processed. This bit is cleared by the guest.
+ * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
+ * will cause an asynchronous upcall to be scheduled. This bit is only
+ * updated by the guest. It is read-only within Xen. If a channel
+ * becomes pending while the channel is masked then the 'edge' is lost
+ * (i.e., when the channel is unmasked, the guest must manually handle
+ * pending notifications as no upcall will be scheduled by Xen).
+ *
+ * To expedite scanning of pending notifications, any 0->1 pending
+ * transition on an unmasked channel causes a corresponding bit in a
+ * per-vcpu selector word to be set. Each bit in the selector covers a
+ * 'C INTN' in the PENDING bitfield array.
+ */
+ xen_ulong_t evtchn_pending[sizeof (xen_ulong_t) * 8];
+ xen_ulong_t evtchn_mask[sizeof (xen_ulong_t) * 8];
+
+ /*
+ * Wallclock time: updated only by control software. Guests should base
+ * their gettimeofday() syscall on this wallclock-base value.
+ */
+ UINT32 wc_version; /* Version counter: see vcpu_time_info_t. */
+ UINT32 wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */
+ UINT32 wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */
+
+ struct arch_shared_info arch;
};
-#ifndef __XEN__
+
+ #ifndef __XEN__
typedef struct shared_info shared_info_t;
typedef struct shared_info XEN_SHARED_INFO;
-#endif
+ #endif
/* Turn a plain number into a C UINTN constant. */
-#define __mk_unsigned_long(x) x ## UL
-#define mk_unsigned_long(x) __mk_unsigned_long(x)
+#define __mk_unsigned_long(x) x ## UL
+#define mk_unsigned_long(x) __mk_unsigned_long(x)
-__DEFINE_XEN_GUEST_HANDLE(uint8, UINT8);
-__DEFINE_XEN_GUEST_HANDLE(uint16, UINT16);
-__DEFINE_XEN_GUEST_HANDLE(uint32, UINT32);
-__DEFINE_XEN_GUEST_HANDLE(uint64, UINT64);
+__DEFINE_XEN_GUEST_HANDLE (uint8, UINT8);
+__DEFINE_XEN_GUEST_HANDLE (uint16, UINT16);
+__DEFINE_XEN_GUEST_HANDLE (uint32, UINT32);
+__DEFINE_XEN_GUEST_HANDLE (uint64, UINT64);
#else /* __ASSEMBLY__ */
/* In assembly code we cannot use C numeric constant suffixes. */
-#define mk_unsigned_long(x) x
+#define mk_unsigned_long(x) x
#endif /* !__ASSEMBLY__ */