summaryrefslogtreecommitdiffstats
path: root/OvmfPkg/Include
diff options
context:
space:
mode:
authorLaszlo Ersek <lersek@redhat.com>2018-11-09 19:43:55 +0100
committerLaszlo Ersek <lersek@redhat.com>2018-11-12 12:23:44 +0100
commit98449a1678f46047098a3d0186af4f6022fdc824 (patch)
tree1b7b971dfa493c7b07019f02f4a33300e4474b17 /OvmfPkg/Include
parentade71c52a49d659b20c0b433fb11ddb4f4f543c4 (diff)
downloadedk2-98449a1678f46047098a3d0186af4f6022fdc824.tar.gz
edk2-98449a1678f46047098a3d0186af4f6022fdc824.tar.bz2
edk2-98449a1678f46047098a3d0186af4f6022fdc824.zip
Reapply "OvmfPkg: VMWare SVGA display device register definitions"
This reverts commit 328409ce8de7f318ee9c929b64302bd361cd1dbd, reapplying 9bcca53fe466cdff397578328d9d87d257aba493. Note that the commit now being reverted is technically correct; the only reason we're reverting it is because it should not have been pushed past the Soft Feature Freeze for the edk2-stable201811 tag. Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien.grall@linaro.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: yuchenlin <yuchenlin@synology.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1319 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: yuchenlin <yuchenlin@synology.com>
Diffstat (limited to 'OvmfPkg/Include')
-rw-r--r--OvmfPkg/Include/IndustryStandard/VmwareSvga.h104
1 files changed, 104 insertions, 0 deletions
diff --git a/OvmfPkg/Include/IndustryStandard/VmwareSvga.h b/OvmfPkg/Include/IndustryStandard/VmwareSvga.h
new file mode 100644
index 0000000000..693d44bab6
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/VmwareSvga.h
@@ -0,0 +1,104 @@
+/** @file
+
+ Macro and enum definitions of a subset of port numbers, register identifiers
+ and values required for driving the VMWare SVGA virtual display adapter,
+ also implemented by Qemu.
+
+ This file's contents was extracted from file lib/vmware/svga_reg.h in commit
+ 329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga repository:
+ git://git.code.sf.net/p/vmware-svga/git
+
+
+ Copyright 1998-2009 VMware, Inc. All rights reserved.
+ Portions Copyright 2017 Phil Dennis-Jordan <phil@philjordan.eu>
+
+ Permission is hereby granted, free of charge, to any person
+ obtaining a copy of this software and associated documentation
+ files (the "Software"), to deal in the Software without
+ restriction, including without limitation the rights to use, copy,
+ modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is
+ furnished to do so, subject to the following conditions:
+
+ The above copyright notice and this permission notice shall be
+ included in all copies or substantial portions of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ SOFTWARE.
+
+**/
+
+#ifndef _VMWARE_SVGA_H_
+#define _VMWARE_SVGA_H_
+
+#include <Base.h>
+
+//
+// IDs for recognising the device
+//
+#define VMWARE_PCI_VENDOR_ID_VMWARE 0x15AD
+#define VMWARE_PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
+
+//
+// I/O port BAR offsets for register selection and read/write.
+//
+// The register index is written to the 32-bit index port, followed by a 32-bit
+// read or write on the value port to read or set that register's contents.
+//
+#define VMWARE_SVGA_INDEX_PORT 0x0
+#define VMWARE_SVGA_VALUE_PORT 0x1
+
+//
+// Some of the device's register indices for basic framebuffer functionality.
+//
+typedef enum {
+ VmwareSvgaRegId = 0,
+ VmwareSvgaRegEnable = 1,
+ VmwareSvgaRegWidth = 2,
+ VmwareSvgaRegHeight = 3,
+ VmwareSvgaRegMaxWidth = 4,
+ VmwareSvgaRegMaxHeight = 5,
+
+ VmwareSvgaRegBitsPerPixel = 7,
+
+ VmwareSvgaRegRedMask = 9,
+ VmwareSvgaRegGreenMask = 10,
+ VmwareSvgaRegBlueMask = 11,
+ VmwareSvgaRegBytesPerLine = 12,
+
+ VmwareSvgaRegFbOffset = 14,
+
+ VmwareSvgaRegFbSize = 16,
+ VmwareSvgaRegCapabilities = 17,
+
+ VmwareSvgaRegHostBitsPerPixel = 28,
+} VMWARE_SVGA_REGISTER;
+
+//
+// Values used with VmwareSvgaRegId for sanity-checking the device and getting
+// its version.
+//
+#define VMWARE_SVGA_MAGIC 0x900000U
+#define VMWARE_SVGA_MAKE_ID(ver) (VMWARE_SVGA_MAGIC << 8 | (ver))
+
+#define VMWARE_SVGA_VERSION_2 2
+#define VMWARE_SVGA_ID_2 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_2)
+
+#define VMWARE_SVGA_VERSION_1 1
+#define VMWARE_SVGA_ID_1 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_1)
+
+#define VMWARE_SVGA_VERSION_0 0
+#define VMWARE_SVGA_ID_0 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_0)
+
+//
+// One of the capability bits advertised by VmwareSvgaRegCapabilities.
+//
+#define VMWARE_SVGA_CAP_8BIT_EMULATION BIT8
+
+#endif