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authorSebastien Boeuf <sebastien.boeuf@intel.com>2022-05-10 20:50:46 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2022-06-03 10:51:26 +0000
commitbf25f27e0021ae1f37184fa8fc76382599e23012 (patch)
tree0472c1ac2e0c4ea325f990c68cc21cde72ada8bc /OvmfPkg/Library/PlatformInitLib
parent3129ed374c72cb1dc84ab5467d03ab0180a4d108 (diff)
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OvmfPkg: Don't access A20 gate register on Cloud Hypervisor
Since Cloud Hypervisor doesn't emulate an A20 gate register on I/O port 0x92, it's better to avoid accessing it when the platform is identified as Cloud Hypervisor. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'OvmfPkg/Library/PlatformInitLib')
-rw-r--r--OvmfPkg/Library/PlatformInitLib/Platform.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index ee802fd684..c3d34e43af 100644
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -314,7 +314,9 @@ PlatformMiscInitialization (
//
// Disable A20 Mask
//
- IoOr8 (0x92, BIT1);
+ if (PlatformInfoHob->HostBridgeDevId != CLOUDHV_DEVICE_ID) {
+ IoOr8 (0x92, BIT1);
+ }
//
// Build the CPU HOB with guest RAM size dependent address width and 16-bits