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author | Brijesh Singh <brijesh.singh@amd.com> | 2021-08-17 21:46:49 +0800 |
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committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-08-27 12:10:40 +0000 |
commit | 80e67af9afcac3b860384cdb1f4613f7240e1630 (patch) | |
tree | 42cf2521c0d90da5c1bc59f2a66d50118b66afb9 /OvmfPkg/PlatformPei/MemDetect.c | |
parent | 8b15024dc74f2f1352d48c4345e31d7e4777b6f9 (diff) | |
download | edk2-80e67af9afcac3b860384cdb1f4613f7240e1630.tar.gz edk2-80e67af9afcac3b860384cdb1f4613f7240e1630.tar.bz2 edk2-80e67af9afcac3b860384cdb1f4613f7240e1630.zip |
OvmfPkg: introduce a common work area
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3429
Both the TDX and SEV support needs to reserve a page in MEMFD as a work
area. The page will contain meta data specific to the guest type.
Currently, the SEV-ES support reserves a page in MEMFD
(PcdSevEsWorkArea) for the work area. This page can be reused as a TDX
work area when Intel TDX is enabled.
Based on the discussion [1], it was agreed to rename the SevEsWorkArea
to the OvmfWorkArea, and add a header that can be used to indicate the
work area type.
[1] https://edk2.groups.io/g/devel/message/78262?p=,,,20,0,0,0::\
created,0,SNP,20,2,0,84476064
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Diffstat (limited to 'OvmfPkg/PlatformPei/MemDetect.c')
-rw-r--r-- | OvmfPkg/PlatformPei/MemDetect.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 2deec128f4..2c2c4641ec 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -939,9 +939,9 @@ InitializeRamRegions ( }
#ifdef MDE_CPU_X64
- if (MemEncryptSevEsIsEnabled ()) {
+ if (FixedPcdGet32 (PcdOvmfWorkAreaSize) != 0) {
//
- // If SEV-ES is enabled, reserve the SEV-ES work area.
+ // Reserve the work area.
//
// Since this memory range will be used by the Reset Vector on S3
// resume, it must be reserved as ACPI NVS.
@@ -951,8 +951,8 @@ InitializeRamRegions ( // such that they would overlap the work area.
//
BuildMemoryAllocationHob (
- (EFI_PHYSICAL_ADDRESS)(UINTN) FixedPcdGet32 (PcdSevEsWorkAreaBase),
- (UINT64)(UINTN) FixedPcdGet32 (PcdSevEsWorkAreaSize),
+ (EFI_PHYSICAL_ADDRESS)(UINTN) FixedPcdGet32 (PcdOvmfWorkAreaBase),
+ (UINT64)(UINTN) FixedPcdGet32 (PcdOvmfWorkAreaSize),
mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
);
}
|