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author | Min Xu <min.m.xu@intel.com> | 2022-01-20 11:04:17 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-04-02 08:15:12 +0000 |
commit | cf17156d7d3dc89c8798d600b24110052d6c12fe (patch) | |
tree | 862f8213118c8825ac2184bc7b47993f8b54f611 /OvmfPkg/PlatformPei/MemDetect.c | |
parent | e23f8f52fd1ed86fb092959b9afa4ad1bd13802e (diff) | |
download | edk2-cf17156d7d3dc89c8798d600b24110052d6c12fe.tar.gz edk2-cf17156d7d3dc89c8798d600b24110052d6c12fe.tar.bz2 edk2-cf17156d7d3dc89c8798d600b24110052d6c12fe.zip |
OvmfPkg: Update PlatformPei to support Tdx guest
RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429
OvmfPkg/PlatformPei is updated to support Tdx guest. There are below
major changes.
- Set Tdx related PCDs
- Publish Tdx RamRegions
In this patch there is another new function BuildPlatformInfoHob ().
This function builds EFI_HOB_PLATFORM_INFO which contains the
HostBridgeDevId. The hob is built in both Td guest and Non-Td guest.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'OvmfPkg/PlatformPei/MemDetect.c')
-rw-r--r-- | OvmfPkg/PlatformPei/MemDetect.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 61d7d3059f..2e47b13229 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -37,7 +37,6 @@ Module Name: #include <Library/QemuFwCfgLib.h>
#include <Library/QemuFwCfgSimpleParserLib.h>
-
#include "Platform.h"
VOID
@@ -231,7 +230,12 @@ GetPeiMemoryCap ( PdpEntries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 30);
ASSERT (PdpEntries <= 0x200);
} else {
- Pml4Entries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 39);
+ if (mPlatformInfoHob.PhysMemAddressWidth > 48) {
+ Pml4Entries = 0x200;
+ } else {
+ Pml4Entries = 1 << (mPlatformInfoHob.PhysMemAddressWidth - 39);
+ }
+
ASSERT (Pml4Entries <= 0x200);
PdpEntries = 512;
}
@@ -354,6 +358,11 @@ InitializeRamRegions ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
+ if (TdIsEnabled ()) {
+ PlatformTdxPublishRamRegions ();
+ return;
+ }
+
PlatformQemuInitializeRam (PlatformInfoHob);
SevInitializeRam ();
|