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| author | Min Xu <min.m.xu@intel.com> | 2022-03-06 22:09:10 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-04-02 08:15:12 +0000 |
| commit | 12e860a1e881b2fa997ebed17cc4918494a5f5fe (patch) | |
| tree | 34870baf0a652f9834d07fee3c8fe4888e76a355 /OvmfPkg/PlatformPei | |
| parent | e51032624574bb5c79ce27005415ee2369533f53 (diff) | |
| download | edk2-12e860a1e881b2fa997ebed17cc4918494a5f5fe.tar.gz edk2-12e860a1e881b2fa997ebed17cc4918494a5f5fe.tar.bz2 edk2-12e860a1e881b2fa997ebed17cc4918494a5f5fe.zip | |
OvmfPkg/PlatformPei: Refactor MemMapInitialization
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863
MemMapInitialization is split into 2 functions:
- PlatformMemMapInitialization is for PlatformInfoLib
- MemMapInitialization calls PlatformMemMapInitialization and then
sets PCDs. It is for PlatformPei.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sebastien Boeuf <sebastien.boeuf@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'OvmfPkg/PlatformPei')
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 35 |
1 files changed, 26 insertions, 9 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index f89d14493e..b83bd75158 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -52,7 +52,8 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = { };
VOID
-MemMapInitialization (
+EFIAPI
+PlatformMemMapInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
@@ -110,10 +111,6 @@ MemMapInitialization ( //
PciSize = 0xFC000000 - PciBase;
PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize);
- PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
- ASSERT_RETURN_ERROR (PcdStatus);
- PcdStatus = PcdSet64S (PcdPciMmio32Size, PciSize);
- ASSERT_RETURN_ERROR (PcdStatus);
PlatformInfoHob->PcdPciMmio32Base = PciBase;
PlatformInfoHob->PcdPciMmio32Size = PciSize;
@@ -173,15 +170,35 @@ MemMapInitialization ( PciIoBase,
PciIoSize
);
- PcdStatus = PcdSet64S (PcdPciIoBase, PciIoBase);
- ASSERT_RETURN_ERROR (PcdStatus);
- PcdStatus = PcdSet64S (PcdPciIoSize, PciIoSize);
- ASSERT_RETURN_ERROR (PcdStatus);
PlatformInfoHob->PcdPciIoBase = PciIoBase;
PlatformInfoHob->PcdPciIoSize = PciIoSize;
}
+VOID
+MemMapInitialization (
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ RETURN_STATUS PcdStatus;
+
+ PlatformMemMapInitialization (PlatformInfoHob);
+
+ if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
+ return;
+ }
+
+ PcdStatus = PcdSet64S (PcdPciMmio32Base, PlatformInfoHob->PcdPciMmio32Base);
+ ASSERT_RETURN_ERROR (PcdStatus);
+ PcdStatus = PcdSet64S (PcdPciMmio32Size, PlatformInfoHob->PcdPciMmio32Size);
+ ASSERT_RETURN_ERROR (PcdStatus);
+
+ PcdStatus = PcdSet64S (PcdPciIoBase, PlatformInfoHob->PcdPciIoBase);
+ ASSERT_RETURN_ERROR (PcdStatus);
+ PcdStatus = PcdSet64S (PcdPciIoSize, PlatformInfoHob->PcdPciIoSize);
+ ASSERT_RETURN_ERROR (PcdStatus);
+}
+
#define UPDATE_BOOLEAN_PCD_FROM_FW_CFG(TokenName) \
do { \
BOOLEAN Setting; \
|