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| author | Min Xu <min.m.xu@intel.com> | 2022-03-07 21:54:30 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-04-02 08:15:12 +0000 |
| commit | e51032624574bb5c79ce27005415ee2369533f53 (patch) | |
| tree | 5422d3f7dde8fa0a10e2326385ec01d4813658f5 /OvmfPkg/PlatformPei | |
| parent | f3801cf26c255828ee405177652ed6e9cc588d88 (diff) | |
| download | edk2-e51032624574bb5c79ce27005415ee2369533f53.tar.gz edk2-e51032624574bb5c79ce27005415ee2369533f53.tar.bz2 edk2-e51032624574bb5c79ce27005415ee2369533f53.zip | |
OvmfPkg/PlatformPei: Refactor InitializeRamRegions
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863
InitializeRamRegions is refactored into 3 calls:
- PlatformQemuInitializeRam
- SevInitializeRam
- PlatformQemuInitializeRamForS3
SevInitializeRam is not in PlatformInitLib. Because in the first stage
PlatformInitLib only support the basic platform featues.
PlatformQemuInitializeRamForS3 wraps the code which was previously in
InitializeRamRegions (many code in 2 if-checks).
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sebastien Boeuf <sebastien.boeuf@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'OvmfPkg/PlatformPei')
| -rw-r--r-- | OvmfPkg/PlatformPei/MemDetect.c | 40 | ||||
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 2 | ||||
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.h | 3 |
3 files changed, 28 insertions, 17 deletions
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 45f7eba65d..23a583ed33 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -161,7 +161,7 @@ PlatformQemuUc32BaseInitialization ( // variable MTRR suffices by truncating the size to a whole power of two,
// while keeping the end affixed to 4GB. This will round the base up.
//
- LowerMemorySize = GetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);
//
@@ -372,7 +372,8 @@ GetHighestSystemMemoryAddressFromPvhMemmap ( }
UINT32
-GetSystemMemorySizeBelow4gb (
+EFIAPI
+PlatformGetSystemMemorySizeBelow4gb (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
@@ -761,7 +762,7 @@ PublishPeiMemory ( UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
- LowerMemorySize = GetSystemMemorySizeBelow4gb (&mPlatformInfoHob);
+ LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (&mPlatformInfoHob);
if (mPlatformInfoHob.SmmSmramRequire) {
//
// TSEG is chipped from the end of low RAM
@@ -871,7 +872,7 @@ QemuInitializeRamBelow1gb ( **/
STATIC
VOID
-QemuInitializeRam (
+PlatformQemuInitializeRam (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
@@ -885,7 +886,7 @@ QemuInitializeRam ( //
// Determine total memory size available
//
- LowerMemorySize = GetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {
//
@@ -995,19 +996,12 @@ QemuInitializeRam ( }
}
-/**
- Publish system RAM and reserve memory regions
-
-**/
+STATIC
VOID
-InitializeRamRegions (
+PlatformQemuInitializeRamForS3 (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- QemuInitializeRam (PlatformInfoHob);
-
- SevInitializeRam ();
-
if (PlatformInfoHob->S3Supported && (PlatformInfoHob->BootMode != BOOT_ON_S3_RESUME)) {
//
// This is the memory range that will be used for PEI on S3 resume
@@ -1113,7 +1107,7 @@ InitializeRamRegions ( //
TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
BuildMemoryAllocationHob (
- GetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,
TsegSize,
EfiReservedMemoryType
);
@@ -1152,3 +1146,19 @@ InitializeRamRegions ( #endif
}
}
+
+/**
+ Publish system RAM and reserve memory regions
+
+**/
+VOID
+InitializeRamRegions (
+ IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ PlatformQemuInitializeRam (PlatformInfoHob);
+
+ SevInitializeRam ();
+
+ PlatformQemuInitializeRamForS3 (PlatformInfoHob);
+}
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 1275c9187e..f89d14493e 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -79,7 +79,7 @@ MemMapInitialization ( return;
}
- TopOfLowRam = GetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ TopOfLowRam = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PciExBarBase = 0;
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h index 038a806a1e..635d58379a 100644 --- a/OvmfPkg/PlatformPei/Platform.h +++ b/OvmfPkg/PlatformPei/Platform.h @@ -35,7 +35,8 @@ PublishPeiMemory ( );
UINT32
-GetSystemMemorySizeBelow4gb (
+EFIAPI
+PlatformGetSystemMemorySizeBelow4gb (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
);
|