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| author | Laszlo Ersek <lersek@redhat.com> | 2017-07-04 12:27:24 +0200 |
|---|---|---|
| committer | Laszlo Ersek <lersek@redhat.com> | 2017-07-05 22:21:12 +0200 |
| commit | 5b31f660c92c7c8b9cfc727cb6802602e64eee0d (patch) | |
| tree | 5586b5f4853ccb8759c7384b181ab76d806a21e4 /OvmfPkg/SmmAccess | |
| parent | 253d81c71f67e1ab218450b87370abd3bf01d571 (diff) | |
| download | edk2-5b31f660c92c7c8b9cfc727cb6802602e64eee0d.tar.gz edk2-5b31f660c92c7c8b9cfc727cb6802602e64eee0d.tar.bz2 edk2-5b31f660c92c7c8b9cfc727cb6802602e64eee0d.zip | |
OvmfPkg: widen PcdQ35TsegMbytes to UINT16
Widen PcdQ35TsegMbytes to UINT16, in preparation for setting it
dynamically to the QEMU-advertized extended TSEG size (which is 16-bits
wide).
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'OvmfPkg/SmmAccess')
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccessPei.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c index a4ce610a46..76790e330f 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -319,7 +319,7 @@ SmmAccessPeiEntryPoint ( // Set TSEG Memory Base.
//
PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
- (TopOfLowRamMb - FixedPcdGet8 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+ (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
//
// Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
@@ -327,8 +327,8 @@ SmmAccessPeiEntryPoint ( // *restricted* to SMM.
//
EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
- EsmramcVal |= FixedPcdGet8 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
- FixedPcdGet8 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+ EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
+ FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
MCH_ESMRAMC_TSEG_1MB;
EsmramcVal |= MCH_ESMRAMC_T_EN;
PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
|