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| author | Gerd Hoffmann <kraxel@redhat.com> | 2023-03-28 09:34:01 +0200 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-03-28 09:30:28 +0000 |
| commit | 82c1aa87f991d3fd7ec48b14eaec902376628301 (patch) | |
| tree | 937c4b063d3b513509c659a28def85262e2d2d50 /OvmfPkg | |
| parent | 5eab38ad03bcdc2e26134ce7caaf4f30ae2127d1 (diff) | |
| download | edk2-82c1aa87f991d3fd7ec48b14eaec902376628301.tar.gz edk2-82c1aa87f991d3fd7ec48b14eaec902376628301.tar.bz2 edk2-82c1aa87f991d3fd7ec48b14eaec902376628301.zip | |
OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000
Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the
room between end of low memory and the start of the mmconfig bar.
With a typical configuration on modern qemu with gigabyte-aligned memory
the MMIO window start at 0x8000000, sized 1532 MB. In case there is
memory present above 0x80000000 the window will start at 0xc0000000
instead, with 512 MB size.
This depends on qemu commit 4a4418369d6d ("q35: fix mmconfig and
PCI0._CRS"), so it raises the bar for the lowest supported version
to qemu 4.1 (released Aug 2019).
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Diffstat (limited to 'OvmfPkg')
| -rw-r--r-- | OvmfPkg/AmdSev/AmdSevX64.dsc | 2 | ||||
| -rw-r--r-- | OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 | ||||
| -rw-r--r-- | OvmfPkg/Library/PlatformInitLib/Platform.c | 10 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgIa32.dsc | 2 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgIa32X64.dsc | 2 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgX64.dsc | 2 |
6 files changed, 10 insertions, 10 deletions
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 654c3af092..c005e474dd 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -443,7 +443,7 @@ #
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc index e6d85286e0..5c56858d06 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -448,7 +448,7 @@ #
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
#
# The NumberOfPages values below are ad-hoc. They are updated sporadically at
diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c index 678e8e3290..5cf8af825a 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -156,8 +156,8 @@ PlatformMemMapInitialization ( // address purpose size
// ------------ -------- -------------------------
// max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc)
- // 0xB0000000 MMCONFIG 256 MB (q35)
- // 0xC0000000 PCI MMIO 960 MB (q35)
+ // max(top, 2g) PCI MMIO 0xE0000000 - max(top, 2g) (q35)
+ // 0xE0000000 MMCONFIG 256 MB (q35)
// 0xFC000000 gap 44 MB
// 0xFEC00000 IO-APIC 4 KB
// 0xFEC01000 gap 1020 KB
@@ -168,6 +168,7 @@ PlatformMemMapInitialization ( // 0xFEE00000 LAPIC 1 MB
//
PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PciBase = PlatformInfoHob->Uc32Base;
PciExBarBase = 0;
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
@@ -177,13 +178,12 @@ PlatformMemMapInitialization ( PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
- PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
+ PciSize = (UINT32)(PciExBarBase - PciBase);
} else {
ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);
- PciBase = PlatformInfoHob->Uc32Base;
+ PciSize = 0xFC000000 - PciBase;
}
- PciSize = 0xFC000000 - PciBase;
PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize);
PlatformInfoHob->PcdPciMmio32Base = PciBase;
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 9e4705f29b..a6db902f54 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -559,7 +559,7 @@ #
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 86940e9af5..076fc0353d 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -565,7 +565,7 @@ #
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 00f7005fca..4a276e1ec0 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -586,7 +586,7 @@ #
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
|