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authorLaszlo Ersek <lersek@redhat.com>2015-07-14 12:01:11 +0000
committerlersek <lersek@Edk2>2015-07-14 12:01:11 +0000
commit947b1f3cadbd045e0055ffae8a7df77be66285e2 (patch)
tree10ac04606286da571561ef090f52da7b9cbaab4f /PcAtChipsetPkg
parent90ac6ac2a4f4da3333896980cf1593f11df9de77 (diff)
downloadedk2-947b1f3cadbd045e0055ffae8a7df77be66285e2.tar.gz
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PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h: strip trailing ws from code
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17946 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'PcAtChipsetPkg')
-rw-r--r--PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h34
1 files changed, 17 insertions, 17 deletions
diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
index 59f47e7b94..f475eb7e23 100644
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
@@ -59,14 +59,14 @@ typedef struct {
EFI_HANDLE HostBridgeHandle;
UINTN RootBridgeNumber;
LIST_ENTRY Head;
- BOOLEAN ResourceSubmited;
- BOOLEAN CanRestarted;
+ BOOLEAN ResourceSubmited;
+ BOOLEAN CanRestarted;
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
} PCI_HOST_BRIDGE_INSTANCE;
#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
-
+
//
// HostBridge Resource Allocation interface
//
@@ -551,13 +551,13 @@ typedef struct {
typedef struct {
UINT64 BusBase;
- UINT64 BusLimit;
-
- UINT64 MemBase;
- UINT64 MemLimit;
-
- UINT64 IoBase;
- UINT64 IoLimit;
+ UINT64 BusLimit;
+
+ UINT64 MemBase;
+ UINT64 MemLimit;
+
+ UINT64 IoBase;
+ UINT64 IoLimit;
} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
typedef enum {
@@ -595,21 +595,21 @@ typedef struct {
UINT64 RootBridgeAttrib;
UINT64 Attributes;
UINT64 Supports;
-
+
//
// Specific for this memory controller: Bus, I/O, Mem
//
PCI_RES_NODE ResAllocNode[6];
-
+
//
// Addressing for Memory and I/O and Bus arrange
//
UINT64 BusBase;
- UINT64 MemBase;
- UINT64 IoBase;
- UINT64 BusLimit;
- UINT64 MemLimit;
- UINT64 IoLimit;
+ UINT64 MemBase;
+ UINT64 IoBase;
+ UINT64 BusLimit;
+ UINT64 MemLimit;
+ UINT64 IoLimit;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;