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| author | Yarlagadda, Satya P <satya.p.yarlagadda@intel.com> | 2016-10-21 13:49:24 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2016-10-27 14:19:44 +0800 |
| commit | 19d29d358f80a1f2b462d8a52943aae724b8702c (patch) | |
| tree | 72a2c317267eac8236cb4cd31fadc0ffa35488d8 /PerformancePkg/Library/TscTimerLib | |
| parent | 0a18956d54cfe70b736b029c62ce53f29b903745 (diff) | |
| download | edk2-19d29d358f80a1f2b462d8a52943aae724b8702c.tar.gz edk2-19d29d358f80a1f2b462d8a52943aae724b8702c.tar.bz2 edk2-19d29d358f80a1f2b462d8a52943aae724b8702c.zip | |
IntelFsp2Pkg: Added changes to enable FPDT performance measurements
IntelFsp2Pkg:
1.Defined performance measure mask to mask the Perf id (Bits 63:56) of the
Perf Data from FSP Global data.
2.Replaced the hard coded perf ids to use the standard defines
from FspStatuscode.h
3.Add the PerfData form Fsp Global data ( for TempRaminit entry,
TempramInit exit, memoryinit entry) to FPDT entries
IntelFsp2WrapperPkg:
Moved the code to add the FSP FPDT records and wrapper FPDT records
from ReadytoBoot event to EndofFirmware event
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'PerformancePkg/Library/TscTimerLib')
0 files changed, 0 insertions, 0 deletions