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| author | Michael D Kinney <michael.d.kinney@intel.com> | 2020-11-10 17:29:33 -0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-11-17 01:57:22 +0000 |
| commit | 29d59baa3907277782e9f26ecaa99704ff57e3f1 (patch) | |
| tree | adbb9c317f9e04480d7fc1afe64a6ba5f4465f3b /SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.c | |
| parent | 124b3f9289f11479d9f042ea6e39bea2b1d5cee3 (diff) | |
| download | edk2-29d59baa3907277782e9f26ecaa99704ff57e3f1.tar.gz edk2-29d59baa3907277782e9f26ecaa99704ff57e3f1.tar.bz2 edk2-29d59baa3907277782e9f26ecaa99704ff57e3f1.zip | |
MdePkg/IndustryStandard: Fix CXL 1.1 structure layout issues
https://bugzilla.tianocore.org/show_bug.cgi?id=3074
* Fix offset of LinkLayerControlAndStatus in the
CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerAckTimerControl in the
CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerDefeature in
the CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Add CXL_11_SIZE_ASSERT() macro to verify the size of
a register layout structure at compile time and use
it to verify the sizes of the CXL 1.1 register structures.
* Add CXL_11_OFFSET_ASSERT() macro to verify the offset of
fields in a register layout structure at compiler time and
use it to verify the offset of fields in CXL 1.1
register structures.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ashraf Javeed <ashraf.javeed@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ashraf Javeed <ashraf.javeed@intel.com>
Diffstat (limited to 'SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.c')
0 files changed, 0 insertions, 0 deletions