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| author | Kun Qin <kun.q@outlook.com> | 2021-03-04 20:14:13 -0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-03-05 15:25:07 +0000 |
| commit | 3c2dc30d1bc45eeef68d7d0e056a4b3928015ec0 (patch) | |
| tree | 722124b196af109bd7e1fc6a0c309eb1ca2370a1 /SecurityPkg/Include | |
| parent | e2d6833c114766c8e69647f753d8eb73212cb434 (diff) | |
| download | edk2-3c2dc30d1bc45eeef68d7d0e056a4b3928015ec0.tar.gz edk2-3c2dc30d1bc45eeef68d7d0e056a4b3928015ec0.tar.bz2 edk2-3c2dc30d1bc45eeef68d7d0e056a4b3928015ec0.zip | |
SecurityPkg: Tcg2Smm: Separate Tcg2Smm into 2 modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3169
This change separated the original Tcg2Smm module into 2 drivers: the
SMM driver that registers callback for physical presence and memory
clear; the Tcg2Acpi driver that patches and publishes ACPI table for
runtime use.
Tcg2Smm introduced an SMI root handler to allow Tcg2Acpi to communicate
the NVS region used by Tpm.asl and exchange the registered SwSmiValue.
Lastly, Tcg2Smm driver will publish gTcg2MmSwSmiRegisteredGuid at the end
of entrypoint to ensure Tcg2Acpi to load after Tcg2Smm is ready to
communicate.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <MWHPR06MB310295CC623EF7C062844DFFF3969@MWHPR06MB3102.namprd06.prod.outlook.com>
Diffstat (limited to 'SecurityPkg/Include')
| -rw-r--r-- | SecurityPkg/Include/Guid/TpmNvsMm.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/SecurityPkg/Include/Guid/TpmNvsMm.h b/SecurityPkg/Include/Guid/TpmNvsMm.h new file mode 100644 index 0000000000..64c0f5c346 --- /dev/null +++ b/SecurityPkg/Include/Guid/TpmNvsMm.h @@ -0,0 +1,68 @@ +/** @file
+ TPM NVS MM guid, used for exchanging information, including SWI value and NVS region
+ information, for patching TPM ACPI table.
+
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef TCG2_NVS_MM_H_
+#define TCG2_NVS_MM_H_
+
+#define MM_TPM_NVS_HOB_GUID \
+ { 0xc96c76eb, 0xbc78, 0x429c, { 0x9f, 0x4b, 0xda, 0x51, 0x78, 0xc2, 0x84, 0x57 }}
+
+extern EFI_GUID gTpmNvsMmGuid;
+
+#pragma pack(1)
+typedef struct {
+ UINT8 SoftwareSmi;
+ UINT32 Parameter;
+ UINT32 Response;
+ UINT32 Request;
+ UINT32 RequestParameter;
+ UINT32 LastRequest;
+ UINT32 ReturnCode;
+} PHYSICAL_PRESENCE_NVS;
+
+typedef struct {
+ UINT8 SoftwareSmi;
+ UINT32 Parameter;
+ UINT32 Request;
+ UINT32 ReturnCode;
+} MEMORY_CLEAR_NVS;
+
+typedef struct {
+ PHYSICAL_PRESENCE_NVS PhysicalPresence;
+ MEMORY_CLEAR_NVS MemoryClear;
+ UINT32 PPRequestUserConfirm;
+ UINT32 TpmIrqNum;
+ BOOLEAN IsShortFormPkgLength;
+} TCG_NVS;
+
+typedef struct {
+ UINT8 OpRegionOp;
+ UINT32 NameString;
+ UINT8 RegionSpace;
+ UINT8 DWordPrefix;
+ UINT32 RegionOffset;
+ UINT8 BytePrefix;
+ UINT8 RegionLen;
+} AML_OP_REGION_32_8;
+
+typedef struct {
+ UINT64 Function;
+ UINT64 ReturnStatus;
+ EFI_PHYSICAL_ADDRESS TargetAddress;
+ UINT64 RegisteredPpSwiValue;
+ UINT64 RegisteredMcSwiValue;
+} TPM_NVS_MM_COMM_BUFFER;
+#pragma pack()
+
+typedef enum {
+ TpmNvsMmExchangeInfo,
+} TPM_NVS_MM_FUNCTION;
+
+#endif // TCG2_NVS_MM_H_
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