This revision can only work with Intel(c) UDK Debugger Tool version 1.2 or greater. Detailed change log is as below:

1. Define the transfer protocol revision mechanism. Increase the revision number to 0.2 and inform user to use the latest one when the HOST software is too old.
   New HOST software will implement logic to handle all other revision mismatch cases.
2. Define new debug message packet to print the debug agent trace information by debug port channel.
3. Add check sum mechanism in the communication protocol between TARGET/HOST.
4. Introduced one "try" mechanism to avoid Debug Agent crashed by some invalid HOST command.
5. Enable the late-attach feature: Change the break in from "!" to "\xFC". Add a new short symbol "\xFA" for attach and a new debug command for detach.
6. Support Terminal work on debug port by install EFI Serial IO protocol upon Debug Communication Library.
7. Enable CPUID feature.
8. Enable the hardware data breakpoint.
9. add handshake to improve usb debug cable identify stability issue.
10.Refine all the communication protocol packet to improve extensibility and debugging performance.
  a. Use 64bit for IO port address.
  b. Add additional Width field to READ_MEMORY/WRITE_MEMORY.
  c. Add SEARCH_SIGNATURE support to speed the symbol finding for late attach.
  d. Remove READ_GROUP register.
  e. Add READ_ALL_REGISTERS support (WinDbg always requests to read all registers).
11.Move AcquireDebugPortControl () in advance to fix resource collision on IpiSentByApFlag.
12.Fix IO break point does not work issue in PEI phase.
13.Avoid BSP/APs collision when they met break point at the same time.
14.Solve a bug of calculating debug handle in sec phase.
15.Use mailbox content at Dxe phase but not clear it and reinitialize again.
16.Fix FP/MMX/XMM/IO/MSR access issue in both Gdb and WinDbg.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13437 6f19259b-4bc3-4df7-8a09-765794883524

6 files changed, 26 insertions, 565 deletions

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.c
index ab724ff3d6..52ed647a27 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.c
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.c
@@ -1,7 +1,7 @@
 /** @file

-  Public include file for Debug Port Library.

+  Supporting functions for IA32 architecture.

 

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -15,188 +15,6 @@
 #include "DebugAgent.h"

 

 /**

-  Read the offset of FP / MMX / XMM registers by register index.

-

-  @param[in]  Index    Register index.

-  @param[out] Width    Register width returned.

-

-  @return Offset in register address range.

-

-**/

-UINT16

-ArchReadFxStatOffset (

-  IN  UINT8                     Index,

-  OUT UINT8                     *Width

-  )

-{

-  if (Index < SOFT_DEBUGGER_REGISTER_ST0) {

-    switch (Index) {

-    case SOFT_DEBUGGER_REGISTER_FP_FCW:

-      *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Fcw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_FSW:

-  	  *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Fsw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_FTW:

-      *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Ftw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_OPCODE:

-      *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Opcode);

-

-    case SOFT_DEBUGGER_REGISTER_FP_EIP:

-      *Width = (UINT8) sizeof (UINTN);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Eip);

-

-    case SOFT_DEBUGGER_REGISTER_FP_CS:

-      *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Cs);

-

-    case SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET:

-      *Width = (UINT8) sizeof (UINTN);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, DataOffset);

-

-    case SOFT_DEBUGGER_REGISTER_FP_DS:

-      *Width = (UINT8) sizeof (UINT16);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Ds);

-

-    case SOFT_DEBUGGER_REGISTER_FP_MXCSR:

-      *Width = (UINT8) sizeof (UINTN);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Mxcsr);

-

-    case SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK:

-      *Width = (UINT8) sizeof (UINTN);

-      return (UINT16)OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, Mxcsr_Mask);

-    }

-  }

-

-  if (Index < SOFT_DEBUGGER_REGISTER_XMM0) {

-    *Width = 10;

-  } else if (Index < SOFT_DEBUGGER_REGISTER_MM0 ) {

-    *Width = 16;

-  } else {

-    *Width = 8;

-    Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;

-  }

-

-  return (UINT16)(OFFSET_OF(DEBUG_DATA_IA32_FX_SAVE_STATE, St0Mm0) + (Index - SOFT_DEBUGGER_REGISTER_ST0) * 16);

-}

-

-/**

-  Write specified register into save CPU context.

-

-  @param[in] CpuContext         Pointer to saved CPU context.

-  @param[in] Index              Register index value.

-  @param[in] Offset             Offset in register address range.

-  @param[in] Width              Data width to read.

-  @param[in] RegisterBuffer     Pointer to input buffer with data.

-

-**/

-VOID

-ArchWriteRegisterBuffer (

-  IN DEBUG_CPU_CONTEXT               *CpuContext,

-  IN UINT8                           Index,

-  IN UINT8                           Offset,

-  IN UINT8                           Width,

-  IN UINT8                           *RegisterBuffer

-  )

-{

-  UINT8           *Buffer;

-  if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {

-    Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_IA32_FX_SAVE_STATE) + Index * 4;

-  } else {

-    //

-    // If it is MMX register, adjust its index position

-    //

-    if (Index >= SOFT_DEBUGGER_REGISTER_MM0) {

-      Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;

-    }

-    //

-    // FPU/MMX/XMM registers

-    //

-    Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, &Width);

-  }

-

-  CopyMem (Buffer + Offset, RegisterBuffer, Width);

-}

-

-/**

-  Read register value from saved CPU context.

-

-  @param[in] CpuContext         Pointer to saved CPU context.

-  @param[in] Index              Register index value.

-  @param[in] Offset             Offset in register address range

-  @param[in] Width              Data width to read.

-

-  @return The address of register value.

-

-**/

-UINT8 *

-ArchReadRegisterBuffer (

-  IN DEBUG_CPU_CONTEXT               *CpuContext,

-  IN UINT8                           Index,

-  IN UINT8                           Offset,

-  IN UINT8                           *Width

-  )

-{

-  UINT8           *Buffer;

-

-  if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {

-    Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_IA32_FX_SAVE_STATE) + Index * 4;

-    if (*Width == 0) {

-      *Width = (UINT8) sizeof (UINTN);

-    }

-  } else {

-    //

-    // FPU/MMX/XMM registers

-    //

-    Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, Width);

-  }

-

-  return Buffer;

-}

-

-/**

-  Read group register of common registers.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroup        Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroup (

-  IN DEBUG_CPU_CONTEXT                       *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP  *RegisterGroup

-  )

-{

-  RegisterGroup->Cs     = (UINT16) CpuContext->Cs;

-  RegisterGroup->Ds     = (UINT16) CpuContext->Ds;

-  RegisterGroup->Es     = (UINT16) CpuContext->Es;

-  RegisterGroup->Fs     = (UINT16) CpuContext->Fs;

-  RegisterGroup->Gs     = (UINT16) CpuContext->Gs;

-  RegisterGroup->Ss     = (UINT16) CpuContext->Ss;

-  RegisterGroup->Eflags = CpuContext->Eflags;

-  RegisterGroup->Ebp    = CpuContext->Ebp;

-  RegisterGroup->Eip    = CpuContext->Eip;

-  RegisterGroup->Esp    = CpuContext->Esp;

-  RegisterGroup->Eax    = CpuContext->Eax;

-  RegisterGroup->Ebx    = CpuContext->Ebx;

-  RegisterGroup->Ecx    = CpuContext->Ecx;

-  RegisterGroup->Edx    = CpuContext->Edx;

-  RegisterGroup->Esi    = CpuContext->Esi;

-  RegisterGroup->Edi    = CpuContext->Edi;

-  RegisterGroup->Dr0    = CpuContext->Dr0;

-  RegisterGroup->Dr1    = CpuContext->Dr1;

-  RegisterGroup->Dr2    = CpuContext->Dr2;

-  RegisterGroup->Dr3    = CpuContext->Dr3;

-  RegisterGroup->Dr6    = CpuContext->Dr6;

-  RegisterGroup->Dr7    = CpuContext->Dr7;

-}

-

-/**

   Initialize IDT entries to support source level debug.

 

 **/

@@ -237,6 +55,11 @@ InitializeDebugIdt (
   InterruptHandler = (UINTN) &TimerInterruptHandle;

   IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetLow  = (UINT16)(UINTN)InterruptHandler;

   IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);

-  IdtEntry[Index].Bits.Selector        = CodeSegment;

-  IdtEntry[Index].Bits.GateType        = IA32_IDT_GATE_TYPE_INTERRUPT_32;

+  IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector   = CodeSegment;

+  IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType   = IA32_IDT_GATE_TYPE_INTERRUPT_32;

+  

+  //

+  // Set DE flag in CR4 to enable IO breakpoint

+  //

+  AsmWriteCr4 (AsmReadCr4 () | BIT3);

 }

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.h
index 7df3cb9415..fa1c2f194c 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.h
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchDebugSupport.h
@@ -1,7 +1,7 @@
 /** @file

   IA32 specific defintions for debug agent library instance.

 

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -15,17 +15,13 @@
 #ifndef _ARCH_DEBUG_SUPPORT_H_

 #define _ARCH_DEBUG_SUPPORT_H_

 

-#include "ArchRegisters.h"

+#include "ProcessorContext.h"

 #include "TransferProtocol.h"

 

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_IA32          DEBUG_DATA_REPONSE_READ_REGISTER_GROUP;

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM_IA32   DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM;

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_IA32  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE;

-

 #define DEBUG_SW_BREAKPOINT_SYMBOL       0xcc

-

 #define DEBUG_ARCH_SYMBOL                DEBUG_DATA_BREAK_CPU_ARCH_IA32

 

+typedef DEBUG_DATA_IA32_FX_SAVE_STATE    DEBUG_DATA_FX_SAVE_STATE;

 typedef DEBUG_DATA_IA32_SYSTEM_CONTEXT   DEBUG_CPU_CONTEXT;

 

 #endif

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchReadGroupRegister.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchReadGroupRegister.c
deleted file mode 100644
index 59ebd00255..0000000000
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchReadGroupRegister.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/** @file

-  IA32 Group registers read support functions.

-

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php.

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#include "DebugAgent.h"

-

-/**

-  Read group register of Segment Base.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroupSegBase Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroupSegBase (

-  IN DEBUG_CPU_CONTEXT                              *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE *RegisterGroupSegBase

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINTN                         Index;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Index = CpuContext->Cs / 8;

-  RegisterGroupSegBase->CsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Ss / 8;

-  RegisterGroupSegBase->SsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Gs / 8;

-  RegisterGroupSegBase->GsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Fs / 8;

-  RegisterGroupSegBase->FsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Es / 8;

-  RegisterGroupSegBase->EsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Ds / 8;

-  RegisterGroupSegBase->DsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-

-  RegisterGroupSegBase->LdtBas = 0;

-  RegisterGroupSegBase->TssBas = 0;

-}

-

-/**

-  Read gourp register of Segment Limit.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroupSegLim  Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroupSegLim (

-  IN DEBUG_CPU_CONTEXT                             *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM *RegisterGroupSegLim

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINTN                         Index;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Index = CpuContext->Cs / 8;

-  RegisterGroupSegLim->CsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->CsLim = (RegisterGroupSegLim->CsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Ss / 8;

-  RegisterGroupSegLim->SsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->SsLim = (RegisterGroupSegLim->SsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Gs / 8;

-  RegisterGroupSegLim->GsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->GsLim = (RegisterGroupSegLim->GsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Fs / 8;

-  RegisterGroupSegLim->FsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->FsLim = (RegisterGroupSegLim->FsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Es / 8;

-  RegisterGroupSegLim->EsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->EsLim = (RegisterGroupSegLim->EsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Ds / 8;

-  RegisterGroupSegLim->DsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->DsLim = (RegisterGroupSegLim->DsLim << 12) | 0xfff;

-  }

-

-  RegisterGroupSegLim->LdtLim = 0xffff;

-  RegisterGroupSegLim->TssLim = 0xffff;

-}

-

-/**

-  Read group register by group index.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] GroupIndex           Group Index.

-

-  @retval RETURN_SUCCESS         Read successfully.

-  @retval RETURN_NOT_SUPPORTED   Group index cannot be supported.

-

-**/

-RETURN_STATUS

-ArchReadRegisterGroup (

-  IN DEBUG_CPU_CONTEXT                             *CpuContext,

-  IN UINT8                                         GroupIndex

-  )

-{

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP  RegisterGroup;

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM   RegisterGroupSegLim;

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE  RegisterGroupSegBase;

-

-  switch (GroupIndex) {

-  case SOFT_DEBUGGER_REGISTER_GROUP_GPDRS32:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_LIMITS32:

-    ReadRegisterGroupSegLim (CpuContext, &RegisterGroupSegLim);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupSegLim, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_BASES32:

-    ReadRegisterGroupSegBase (CpuContext, &RegisterGroupSegBase);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupSegBase, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE));

-    break;

-

-  default:

-    return RETURN_UNSUPPORTED;

-  }

-

-  return RETURN_SUCCESS;

-}

-

-/**

-  Read segment selector by register index.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterIndex        Register Index.

-

-  @return Value of segment selector.

-

-**/

-UINT64

-ReadRegisterSelectorByIndex (

-  IN DEBUG_CPU_CONTEXT                       *CpuContext,

-  IN UINT8                                   RegisterIndex

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINT16                        Selector;

-  UINT32                        Data32;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Selector = 0;

-

-  switch (RegisterIndex) {

-  case SOFT_DEBUGGER_REGISTER_CSAS:

-    Selector = (UINT16) CpuContext->Cs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_SSAS:

-    Selector = (UINT16) CpuContext->Ss;

-    break;

-  case SOFT_DEBUGGER_REGISTER_GSAS:

-    Selector = (UINT16) CpuContext->Gs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_FSAS:

-    Selector = (UINT16) CpuContext->Fs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_ESAS:

-    Selector = (UINT16) CpuContext->Es;

-    break;

-  case SOFT_DEBUGGER_REGISTER_DSAS:

-    Selector = (UINT16) CpuContext->Ds;

-  case SOFT_DEBUGGER_REGISTER_LDTAS:

-  case SOFT_DEBUGGER_REGISTER_TSSAS:

-    return 0x00820000;

-    break;

-  }

-

-  Data32 = (UINT32) RShiftU64 (Ia32Gdt[Selector / 8].Uint64, 24);

-  return (Data32 & (UINT32)(~0xff)) | Selector;

-

-}

-

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
deleted file mode 100644
index 909ddbe535..0000000000
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/** @file

-  IA32 register defintions needed by debug transfer protocol.

-

-  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php.

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#ifndef _ARCH_REGISTERS_H_

-#define _ARCH_REGISTERS_H_

-

-#pragma pack(1)

-

-///

-/// FXSAVE_STATE

-/// FP / MMX / XMM registers (see fxrstor instruction definition)

-///

-typedef struct {

-  UINT16  Fcw;

-  UINT16  Fsw;

-  UINT16  Ftw;

-  UINT16  Opcode;

-  UINT32  Eip;

-  UINT16  Cs;

-  UINT16  Reserved1;

-  UINT32  DataOffset;

-  UINT16  Ds;

-  UINT8   Reserved2[2];

-  UINT32  Mxcsr;

-  UINT32  Mxcsr_Mask;

-  UINT8   St0Mm0[10];

-  UINT8   Reserved3[6];

-  UINT8   St1Mm1[10];

-  UINT8   Reserved4[6];

-  UINT8   St2Mm2[10];

-  UINT8   Reserved5[6];

-  UINT8   St3Mm3[10];

-  UINT8   Reserved6[6];

-  UINT8   St4Mm4[10];

-  UINT8   Reserved7[6];

-  UINT8   St5Mm5[10];

-  UINT8   Reserved8[6];

-  UINT8   St6Mm6[10];

-  UINT8   Reserved9[6];

-  UINT8   St7Mm7[10];

-  UINT8   Reserved10[6];

-  UINT8   Xmm0[16];

-  UINT8   Xmm1[16];

-  UINT8   Xmm2[16];

-  UINT8   Xmm3[16];

-  UINT8   Xmm4[16];

-  UINT8   Xmm5[16];

-  UINT8   Xmm6[16];

-  UINT8   Xmm7[16];

-  UINT8   Reserved11[14 * 16];

-} DEBUG_DATA_IA32_FX_SAVE_STATE;

-

-///

-///  IA-32 processor context definition

-///

-typedef struct {

-  DEBUG_DATA_IA32_FX_SAVE_STATE  FxSaveState;

-  UINT32                         Dr0;

-  UINT32                         Dr1;

-  UINT32                         Dr2;

-  UINT32                         Dr3;

-  UINT32                         Dr6;

-  UINT32                         Dr7;

-  UINT32                         Eflags;

-  UINT32                         Ldtr;

-  UINT32                         Tr;

-  UINT32                         Gdtr[2];

-  UINT32                         Idtr[2];

-  UINT32                         Eip;

-  UINT32                         Gs;

-  UINT32                         Fs;

-  UINT32                         Es;

-  UINT32                         Ds;

-  UINT32                         Cs;

-  UINT32                         Ss;

-  UINT32                         Cr0;

-  UINT32                         Cr1;  ///< Reserved

-  UINT32                         Cr2;

-  UINT32                         Cr3;

-  UINT32                         Cr4;

-  UINT32                         Edi;

-  UINT32                         Esi;

-  UINT32                         Ebp;

-  UINT32                         Esp;

-  UINT32                         Edx;

-  UINT32                         Ecx;

-  UINT32                         Ebx;

-  UINT32                         Eax;

-} DEBUG_DATA_IA32_SYSTEM_CONTEXT;

-

-///

-///  IA32 GROUP register

-///

-typedef struct {

-  UINT16         Cs;

-  UINT16         Ds;

-  UINT16         Es;

-  UINT16         Fs;

-  UINT16         Gs;

-  UINT16         Ss;

-  UINT32         Eflags;

-  UINT32         Ebp;

-  UINT32         Eip;

-  UINT32         Esp;

-  UINT32         Eax;

-  UINT32         Ebx;

-  UINT32         Ecx;

-  UINT32         Edx;

-  UINT32         Esi;

-  UINT32         Edi;

-  UINT32         Dr0;

-  UINT32         Dr1;

-  UINT32         Dr2;

-  UINT32         Dr3;

-  UINT32         Dr6;

-  UINT32         Dr7;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_IA32;

-

-///

-///  IA32 Segment Limit GROUP register

-///

-typedef struct {

-  UINT32         CsLim;

-  UINT32         SsLim;

-  UINT32         GsLim;

-  UINT32         FsLim;

-  UINT32         EsLim;

-  UINT32         DsLim;

-  UINT32         LdtLim;

-  UINT32         TssLim;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM_IA32;

-

-///

-///  IA32 Segment Base GROUP register

-///

-typedef struct {

-  UINT32         CsBas;

-  UINT32         SsBas;

-  UINT32         GsBas;

-  UINT32         FsBas;

-  UINT32         EsBas;

-  UINT32         DsBas;

-  UINT32         LdtBas;

-  UINT32         TssBas;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_IA32;

-

-#pragma pack()

-

-#endif

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.S b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.S
index 365947f4d5..cfeeea0472 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.S
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.S
@@ -1,6 +1,6 @@
 #------------------------------------------------------------------------------

 #

-# Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

 # This program and the accompanying materials

 # are licensed and made available under the terms and conditions of the BSD License

 # which accompanies this distribution.  The full text of the license may be found at

@@ -281,6 +281,9 @@ NoExtrPush:
   movl    %esp,%edi

   .byte 0x0f, 0xae, 0x07   # fxsave [edi]

 

+## save the exception data

+  pushl   8(%esp)

+

 ## Clear Direction Flag

   cld

 	

@@ -290,6 +293,9 @@ NoExtrPush:
   call    ASM_PFX(InterruptProcess)

   addl    $8,%esp

 

+## skip the exception data

+  addl    $4,%esp

+

 ## FX_SAVE_STATE_IA32 FxSaveState;

   movl    %esp,%esi

   .byte 0x0f, 0xae, 0x0e   # fxrstor [esi]

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.asm b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.asm
index 2d2fa5fc7a..6f3b3bc3d4 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.asm
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/AsmFuncs.asm
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------

 ;

-; Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

 ; This program and the accompanying materials

 ; are licensed and made available under the terms and conditions of the BSD License

 ; which accompanies this distribution.  The full text of the license may be found at

@@ -283,6 +283,9 @@ NoExtrPush:
     mov edi, esp

     db 0fh, 0aeh, 00000111y ;fxsave [edi]

 

+    ;; save the exception data    

+    push    dword ptr [ebp + 8]

+

     ;; Clear Direction Flag

     cld

     	

@@ -292,6 +295,9 @@ NoExtrPush:
     call    InterruptProcess

     add     esp, 8

 

+    ; skip the exception data

+    add     esp, 4

+

     ;; FX_SAVE_STATE_IA32 FxSaveState;

     mov esi, esp

     db 0fh, 0aeh, 00001110y ; fxrstor [esi]