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author | Laszlo Ersek <lersek@redhat.com> | 2016-04-07 22:28:38 +0200 |
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committer | Laszlo Ersek <lersek@redhat.com> | 2016-04-11 14:11:07 +0200 |
commit | fb8b54694c53e73e1b6a098686e908f54f9bb7a9 (patch) | |
tree | a335754e3ad9464c022e2fdc052be182321f5269 /SourceLevelDebugPkg/Readme.txt | |
parent | 7a9395cd7bb432cd61625bae9a8f55759ca1c1a0 (diff) | |
download | edk2-fb8b54694c53e73e1b6a098686e908f54f9bb7a9.tar.gz edk2-fb8b54694c53e73e1b6a098686e908f54f9bb7a9.tar.bz2 edk2-fb8b54694c53e73e1b6a098686e908f54f9bb7a9.zip |
UefiCpuPkg: CpuIo2Dxe: optimize FIFO reads and writes of IO ports
* Short description:
The CpuIoServiceRead() and CpuIoServiceWrite() functions transfer data
between memory and IO ports with individual Io(Read|Write)(8|16|32)
function calls, each in an appropriately set up loop.
On the Ia32 and X64 platforms however, FIFO reads and writes can be
optimized, by coding them in assembly, and delegating the loop to the
CPU, with the REP prefix.
On KVM virtualization hosts, this difference has a huge performance
impact: if the loop is open-coded, then the virtual machine traps to the
hypervisor on every single UINT8 / UINT16 / UINT32 transfer, whereas
with the REP prefix, KVM can transfer up to a page of data per VM trap.
This is especially noticeable with IDE PIO transfers, where all the data
are squeezed through IO ports.
* Long description:
The RootBridgeIoIoRW() function in
PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
used to have the exact same IO port acces optimization, dating back
verbatim to commit 1fd376d9792:
PcAtChipsetPkg/PciHostBridgeDxe: Improve KVM FIFO I/O read/write
performance
OvmfPkg cloned the "PcAtChipsetPkg/PciHostBridgeDxe" driver (for
unrelated reasons), and inherited the optimization from PcAtChipsetPkg.
The "PcAtChipsetPkg/PciHostBridgeDxe" driver was ultimately removed in
commit 111d79db47:
PcAtChipsetPkg/PciHostBridge: Remove PciHostBridge driver
and OvmfPkg too was rebased to the new core Pci Host Bridge Driver, in
commit 4014885ffd:
OvmfPkg: switch to MdeModulePkg/Bus/Pci/PciHostBridgeDxe
This caused the optimization to go lost. Namely, the
RootBridgeIoIoRead() and RootBridgeIoIoWrite() functions in the new core
Pci Host Bridge Driver delegate IO port accesses to
EFI_CPU_IO2_PROTOCOL. And, in OvmfPkg (and likely most other Ia32 / X64
edk2 platforms), this protocol is provided by "UefiCpuPkg/CpuIo2Dxe",
which lacks the optimization.
Therefore, this patch ports the C source code logic from commit
1fd376d9792 (see above) to "UefiCpuPkg/CpuIo2Dxe", plus it ports the
NASM-converted assembly helper functions from OvmfPkg commits
6026bf460037 and ace1d0517b65:
OvmfPkg PciHostBridgeDxe: Convert Ia32/IoFifo.asm to NASM
OvmfPkg PciHostBridgeDxe: Convert X64/IoFifo.asm to NASM
In order to support the MSFT and INTEL toolchains as well, the *.asm
files are ported from OvmfPkg as well, immediately from before the above
conversion (that is, at 6026bf460037^).
* Notes about the port:
- The write and read branches from commit 1fd376d9792 are split to the
separate functions CpuIoServiceWrite() and CpuIoServiceRead().
- The EfiPciWidthUintXX constants are replaced with EfiCpuIoWidthUintXX.
- The cast expression "(UINTN) Address" is replaced with
"(UINTN)Address" (i.e., no space), because that's how the receiving
functions spell it as well.
- The labels in the switch statements are unindented by one level, to
match the edk2 coding style (and the rest of UefiCpuPkg) better.
* The first signoff belongs to Jordan, because he authored all of
1fd376d9792, 6026bf460037 and ace1d0517b65.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://www.redhat.com/archives/vfio-users/2016-April/msg00029.html
Reported-by: Mark <kram321@gmail.com>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/10424/focus=10432
Reported-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Mark <kram321@gmail.com>
Tested-by: Mark <kram321@gmail.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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