StdLib/LibC: Add software floating point library from NetBSD

Floating point processing is not supported on ARM for UEFI. In order to
support UEFI applications in AppPkg we use this library to provide the
required functionality.

Changes as compared to the NetBSD version:
- Formatting changes (tabs to spaces, DOS line endings etc).
- Disable exceptions as described in the float_raise() function.
- Disable definition of 'Symbolic Boolean literals' in milieu.h.

Source originally from: NetBSD project
- Source: http://cvsweb.netbsd.org/bsdweb.cgi/?only_with_tag=MAIN
- Licensing and Copyright: http://www.netbsd.org/about/redistribution.html

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Daryl McDaniel <edk2-lists@mc2research.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18116 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 802 insertions, 0 deletions

diff --git a/StdLib/LibC/Softfloat/templates/milieu.h b/StdLib/LibC/Softfloat/templates/milieu.h
new file mode 100644
index 0000000000..2fcfa1fa12
--- /dev/null
+++ b/StdLib/LibC/Softfloat/templates/milieu.h
@@ -0,0 +1,48 @@
+

+/*

+===============================================================================

+

+This C header file is part of the SoftFloat IEC/IEEE Floating-point

+Arithmetic Package, Release 2a.

+

+Written by John R. Hauser.  This work was made possible in part by the

+International Computer Science Institute, located at Suite 600, 1947 Center

+Street, Berkeley, California 94704.  Funding was partially provided by the

+National Science Foundation under grant MIP-9311980.  The original version

+of this code was written as part of a project to build a fixed-point vector

+processor in collaboration with the University of California at Berkeley,

+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information

+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/

+arithmetic/SoftFloat.html'.

+

+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort

+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT

+TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO

+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY

+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.

+

+Derivative works are acceptable, even for commercial purposes, so long as

+(1) they include prominent notice that the work is derivative, and (2) they

+include prominent notice akin to these four paragraphs for those parts of

+this code that are retained.

+

+===============================================================================

+*/

+

+/*

+-------------------------------------------------------------------------------

+Include common integer types and flags.

+-------------------------------------------------------------------------------

+*/

+#include "../../../processors/!!!processor.h"

+

+/*

+-------------------------------------------------------------------------------

+Symbolic Boolean literals.

+-------------------------------------------------------------------------------

+*/

+enum {

+    FALSE = 0,

+    TRUE  = 1

+};

+

diff --git a/StdLib/LibC/Softfloat/templates/softfloat-specialize b/StdLib/LibC/Softfloat/templates/softfloat-specialize
new file mode 100644
index 0000000000..d8b2500f4a
--- /dev/null
+++ b/StdLib/LibC/Softfloat/templates/softfloat-specialize
@@ -0,0 +1,464 @@
+

+/*

+===============================================================================

+

+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point

+Arithmetic Package, Release 2a.

+

+Written by John R. Hauser.  This work was made possible in part by the

+International Computer Science Institute, located at Suite 600, 1947 Center

+Street, Berkeley, California 94704.  Funding was partially provided by the

+National Science Foundation under grant MIP-9311980.  The original version

+of this code was written as part of a project to build a fixed-point vector

+processor in collaboration with the University of California at Berkeley,

+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information

+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/

+arithmetic/SoftFloat.html'.

+

+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort

+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT

+TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO

+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY

+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.

+

+Derivative works are acceptable, even for commercial purposes, so long as

+(1) they include prominent notice that the work is derivative, and (2) they

+include prominent notice akin to these four paragraphs for those parts of

+this code that are retained.

+

+===============================================================================

+*/

+

+/*

+-------------------------------------------------------------------------------

+Underflow tininess-detection mode, statically initialized to default value.

+(The declaration in `softfloat.h' must match the `int8' type here.)

+-------------------------------------------------------------------------------

+*/

+int8 float_detect_tininess = float_tininess_after_rounding;

+

+/*

+-------------------------------------------------------------------------------

+Raises the exceptions specified by `flags'.  Floating-point traps can be

+defined here if desired.  It is currently not possible for such a trap to

+substitute a result value.  If traps are not implemented, this routine

+should be simply `float_exception_flags |= flags;'.

+-------------------------------------------------------------------------------

+*/

+void float_raise( int8 flags )

+{

+

+    float_exception_flags |= flags;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Internal canonical NaN format.

+-------------------------------------------------------------------------------

+*/

+typedef struct {

+    flag sign;

+    bits64 high, low;

+} commonNaNT;

+

+/*

+-------------------------------------------------------------------------------

+The pattern for a default generated single-precision NaN.

+-------------------------------------------------------------------------------

+*/

+#define float32_default_nan 0xFFFFFFFF

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the single-precision floating-point value `a' is a NaN;

+otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float32_is_nan( float32 a )

+{

+

+    return ( 0xFF000000 < (bits32) ( a<<1 ) );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the single-precision floating-point value `a' is a signaling

+NaN; otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float32_is_signaling_nan( float32 a )

+{

+

+    return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the single-precision floating-point NaN

+`a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid

+exception is raised.

+-------------------------------------------------------------------------------

+*/

+static commonNaNT float32ToCommonNaN( float32 a )

+{

+    commonNaNT z;

+

+    if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );

+    z.sign = a>>31;

+    z.low = 0;

+    z.high = ( (bits64) a )<<41;

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the canonical NaN `a' to the single-

+precision floating-point format.

+-------------------------------------------------------------------------------

+*/

+static float32 commonNaNToFloat32( commonNaNT a )

+{

+

+    return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Takes two single-precision floating-point values `a' and `b', one of which

+is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a

+signaling NaN, the invalid exception is raised.

+-------------------------------------------------------------------------------

+*/

+static float32 propagateFloat32NaN( float32 a, float32 b )

+{

+    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;

+

+    aIsNaN = float32_is_nan( a );

+    aIsSignalingNaN = float32_is_signaling_nan( a );

+    bIsNaN = float32_is_nan( b );

+    bIsSignalingNaN = float32_is_signaling_nan( b );

+    a |= 0x00400000;

+    b |= 0x00400000;

+    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );

+    if ( aIsNaN ) {

+        return ( aIsSignalingNaN & bIsNaN ) ? b : a;

+    }

+    else {

+        return b;

+    }

+

+}

+

+/*

+-------------------------------------------------------------------------------

+The pattern for a default generated double-precision NaN.

+-------------------------------------------------------------------------------

+*/

+#define float64_default_nan LIT64( 0xFFFFFFFFFFFFFFFF )

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the double-precision floating-point value `a' is a NaN;

+otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float64_is_nan( float64 a )

+{

+

+    return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the double-precision floating-point value `a' is a signaling

+NaN; otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float64_is_signaling_nan( float64 a )

+{

+

+    return

+           ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )

+        && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the double-precision floating-point NaN

+`a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid

+exception is raised.

+-------------------------------------------------------------------------------

+*/

+static commonNaNT float64ToCommonNaN( float64 a )

+{

+    commonNaNT z;

+

+    if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );

+    z.sign = a>>63;

+    z.low = 0;

+    z.high = a<<12;

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the canonical NaN `a' to the double-

+precision floating-point format.

+-------------------------------------------------------------------------------

+*/

+static float64 commonNaNToFloat64( commonNaNT a )

+{

+

+    return

+          ( ( (bits64) a.sign )<<63 )

+        | LIT64( 0x7FF8000000000000 )

+        | ( a.high>>12 );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Takes two double-precision floating-point values `a' and `b', one of which

+is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a

+signaling NaN, the invalid exception is raised.

+-------------------------------------------------------------------------------

+*/

+static float64 propagateFloat64NaN( float64 a, float64 b )

+{

+    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;

+

+    aIsNaN = float64_is_nan( a );

+    aIsSignalingNaN = float64_is_signaling_nan( a );

+    bIsNaN = float64_is_nan( b );

+    bIsSignalingNaN = float64_is_signaling_nan( b );

+    a |= LIT64( 0x0008000000000000 );

+    b |= LIT64( 0x0008000000000000 );

+    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );

+    if ( aIsNaN ) {

+        return ( aIsSignalingNaN & bIsNaN ) ? b : a;

+    }

+    else {

+        return b;

+    }

+

+}

+

+#ifdef FLOATX80

+

+/*

+-------------------------------------------------------------------------------

+The pattern for a default generated extended double-precision NaN.  The

+`high' and `low' values hold the most- and least-significant bits,

+respectively.

+-------------------------------------------------------------------------------

+*/

+#define floatx80_default_nan_high 0xFFFF

+#define floatx80_default_nan_low  LIT64( 0xFFFFFFFFFFFFFFFF )

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the extended double-precision floating-point value `a' is a

+NaN; otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag floatx80_is_nan( floatx80 a )

+{

+

+    return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the extended double-precision floating-point value `a' is a

+signaling NaN; otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag floatx80_is_signaling_nan( floatx80 a )

+{

+    bits64 aLow;

+

+    aLow = a.low & ~ LIT64( 0x4000000000000000 );

+    return

+           ( ( a.high & 0x7FFF ) == 0x7FFF )

+        && (bits64) ( aLow<<1 )

+        && ( a.low == aLow );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the extended double-precision floating-

+point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the

+invalid exception is raised.

+-------------------------------------------------------------------------------

+*/

+static commonNaNT floatx80ToCommonNaN( floatx80 a )

+{

+    commonNaNT z;

+

+    if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );

+    z.sign = a.high>>15;

+    z.low = 0;

+    z.high = a.low<<1;

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the canonical NaN `a' to the extended

+double-precision floating-point format.

+-------------------------------------------------------------------------------

+*/

+static floatx80 commonNaNToFloatx80( commonNaNT a )

+{

+    floatx80 z;

+

+    z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );

+    z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Takes two extended double-precision floating-point values `a' and `b', one

+of which is a NaN, and returns the appropriate NaN result.  If either `a' or

+`b' is a signaling NaN, the invalid exception is raised.

+-------------------------------------------------------------------------------

+*/

+static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )

+{

+    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;

+

+    aIsNaN = floatx80_is_nan( a );

+    aIsSignalingNaN = floatx80_is_signaling_nan( a );

+    bIsNaN = floatx80_is_nan( b );

+    bIsSignalingNaN = floatx80_is_signaling_nan( b );

+    a.low |= LIT64( 0xC000000000000000 );

+    b.low |= LIT64( 0xC000000000000000 );

+    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );

+    if ( aIsNaN ) {

+        return ( aIsSignalingNaN & bIsNaN ) ? b : a;

+    }

+    else {

+        return b;

+    }

+

+}

+

+#endif

+

+#ifdef FLOAT128

+

+/*

+-------------------------------------------------------------------------------

+The pattern for a default generated quadruple-precision NaN.  The `high' and

+`low' values hold the most- and least-significant bits, respectively.

+-------------------------------------------------------------------------------

+*/

+#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )

+#define float128_default_nan_low  LIT64( 0xFFFFFFFFFFFFFFFF )

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the quadruple-precision floating-point value `a' is a NaN;

+otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float128_is_nan( float128 a )

+{

+

+    return

+           ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )

+        && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns 1 if the quadruple-precision floating-point value `a' is a

+signaling NaN; otherwise returns 0.

+-------------------------------------------------------------------------------

+*/

+flag float128_is_signaling_nan( float128 a )

+{

+

+    return

+           ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )

+        && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the quadruple-precision floating-point NaN

+`a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid

+exception is raised.

+-------------------------------------------------------------------------------

+*/

+static commonNaNT float128ToCommonNaN( float128 a )

+{

+    commonNaNT z;

+

+    if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );

+    z.sign = a.high>>63;

+    shortShift128Left( a.high, a.low, 16, &z.high, &z.low );

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Returns the result of converting the canonical NaN `a' to the quadruple-

+precision floating-point format.

+-------------------------------------------------------------------------------

+*/

+static float128 commonNaNToFloat128( commonNaNT a )

+{

+    float128 z;

+

+    shift128Right( a.high, a.low, 16, &z.high, &z.low );

+    z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );

+    return z;

+

+}

+

+/*

+-------------------------------------------------------------------------------

+Takes two quadruple-precision floating-point values `a' and `b', one of

+which is a NaN, and returns the appropriate NaN result.  If either `a' or

+`b' is a signaling NaN, the invalid exception is raised.

+-------------------------------------------------------------------------------

+*/

+static float128 propagateFloat128NaN( float128 a, float128 b )

+{

+    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;

+

+    aIsNaN = float128_is_nan( a );

+    aIsSignalingNaN = float128_is_signaling_nan( a );

+    bIsNaN = float128_is_nan( b );

+    bIsSignalingNaN = float128_is_signaling_nan( b );

+    a.high |= LIT64( 0x0000800000000000 );

+    b.high |= LIT64( 0x0000800000000000 );

+    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );

+    if ( aIsNaN ) {

+        return ( aIsSignalingNaN & bIsNaN ) ? b : a;

+    }

+    else {

+        return b;

+    }

+

+}

+

+#endif

+

diff --git a/StdLib/LibC/Softfloat/templates/softfloat.h b/StdLib/LibC/Softfloat/templates/softfloat.h
new file mode 100644
index 0000000000..8c0fe10134
--- /dev/null
+++ b/StdLib/LibC/Softfloat/templates/softfloat.h
@@ -0,0 +1,290 @@
+

+/*

+===============================================================================

+

+This C header file is part of the SoftFloat IEC/IEEE Floating-point

+Arithmetic Package, Release 2a.

+

+Written by John R. Hauser.  This work was made possible in part by the

+International Computer Science Institute, located at Suite 600, 1947 Center

+Street, Berkeley, California 94704.  Funding was partially provided by the

+National Science Foundation under grant MIP-9311980.  The original version

+of this code was written as part of a project to build a fixed-point vector

+processor in collaboration with the University of California at Berkeley,

+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information

+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/

+arithmetic/SoftFloat.html'.

+

+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort

+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT

+TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO

+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY

+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.

+

+Derivative works are acceptable, even for commercial purposes, so long as

+(1) they include prominent notice that the work is derivative, and (2) they

+include prominent notice akin to these four paragraphs for those parts of

+this code that are retained.

+

+===============================================================================

+*/

+

+/*

+-------------------------------------------------------------------------------

+The macro `FLOATX80' must be defined to enable the extended double-precision

+floating-point format `floatx80'.  If this macro is not defined, the

+`floatx80' type will not be defined, and none of the functions that either

+input or output the `floatx80' type will be defined.  The same applies to

+the `FLOAT128' macro and the quadruple-precision format `float128'.

+-------------------------------------------------------------------------------

+*/

+#define FLOATX80

+#define FLOAT128

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE floating-point types.

+-------------------------------------------------------------------------------

+*/

+typedef !!!bits32 float32;

+typedef !!!bits64 float64;

+#ifdef FLOATX80

+typedef struct {

+    !!!bits16 high;

+    !!!bits64 low;

+} floatx80;

+#endif

+#ifdef FLOAT128

+typedef struct {

+    !!!bits64 high, low;

+} float128;

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE floating-point underflow tininess-detection mode.

+-------------------------------------------------------------------------------

+*/

+extern !!!int8 float_detect_tininess;

+enum {

+    float_tininess_after_rounding  = 0,

+    float_tininess_before_rounding = 1

+};

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE floating-point rounding mode.

+-------------------------------------------------------------------------------

+*/

+extern !!!int8 float_rounding_mode;

+enum {

+    float_round_nearest_even = 0,

+    float_round_to_zero      = 1,

+    float_round_down         = 2,

+    float_round_up           = 3

+};

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE floating-point exception flags.

+-------------------------------------------------------------------------------

+*/

+extern !!!int8 float_exception_flags;

+enum {

+    float_flag_inexact   =  1,

+    float_flag_underflow =  2,

+    float_flag_overflow  =  4,

+    float_flag_divbyzero =  8,

+    float_flag_invalid   = 16

+};

+

+/*

+-------------------------------------------------------------------------------

+Routine to raise any or all of the software IEC/IEEE floating-point

+exception flags.

+-------------------------------------------------------------------------------

+*/

+void float_raise( !!!int8 );

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE integer-to-floating-point conversion routines.

+-------------------------------------------------------------------------------

+*/

+float32 int32_to_float32( !!!int32 );

+float64 int32_to_float64( !!!int32 );

+#ifdef FLOATX80

+floatx80 int32_to_floatx80( !!!int32 );

+#endif

+#ifdef FLOAT128

+float128 int32_to_float128( !!!int32 );

+#endif

+float32 int64_to_float32( !!!int64 );

+float64 int64_to_float64( !!!int64 );

+#ifdef FLOATX80

+floatx80 int64_to_floatx80( !!!int64 );

+#endif

+#ifdef FLOAT128

+float128 int64_to_float128( !!!int64 );

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE single-precision conversion routines.

+-------------------------------------------------------------------------------

+*/

+!!!int32 float32_to_int32( float32 );

+!!!int32 float32_to_int32_round_to_zero( float32 );

+!!!int64 float32_to_int64( float32 );

+!!!int64 float32_to_int64_round_to_zero( float32 );

+float64 float32_to_float64( float32 );

+#ifdef FLOATX80

+floatx80 float32_to_floatx80( float32 );

+#endif

+#ifdef FLOAT128

+float128 float32_to_float128( float32 );

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE single-precision operations.

+-------------------------------------------------------------------------------

+*/

+float32 float32_round_to_int( float32 );

+float32 float32_add( float32, float32 );

+float32 float32_sub( float32, float32 );

+float32 float32_mul( float32, float32 );

+float32 float32_div( float32, float32 );

+float32 float32_rem( float32, float32 );

+float32 float32_sqrt( float32 );

+!!!flag float32_eq( float32, float32 );

+!!!flag float32_le( float32, float32 );

+!!!flag float32_lt( float32, float32 );

+!!!flag float32_eq_signaling( float32, float32 );

+!!!flag float32_le_quiet( float32, float32 );

+!!!flag float32_lt_quiet( float32, float32 );

+!!!flag float32_is_signaling_nan( float32 );

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE double-precision conversion routines.

+-------------------------------------------------------------------------------

+*/

+!!!int32 float64_to_int32( float64 );

+!!!int32 float64_to_int32_round_to_zero( float64 );

+!!!int64 float64_to_int64( float64 );

+!!!int64 float64_to_int64_round_to_zero( float64 );

+float32 float64_to_float32( float64 );

+#ifdef FLOATX80

+floatx80 float64_to_floatx80( float64 );

+#endif

+#ifdef FLOAT128

+float128 float64_to_float128( float64 );

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE double-precision operations.

+-------------------------------------------------------------------------------

+*/

+float64 float64_round_to_int( float64 );

+float64 float64_add( float64, float64 );

+float64 float64_sub( float64, float64 );

+float64 float64_mul( float64, float64 );

+float64 float64_div( float64, float64 );

+float64 float64_rem( float64, float64 );

+float64 float64_sqrt( float64 );

+!!!flag float64_eq( float64, float64 );

+!!!flag float64_le( float64, float64 );

+!!!flag float64_lt( float64, float64 );

+!!!flag float64_eq_signaling( float64, float64 );

+!!!flag float64_le_quiet( float64, float64 );

+!!!flag float64_lt_quiet( float64, float64 );

+!!!flag float64_is_signaling_nan( float64 );

+

+#ifdef FLOATX80

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE extended double-precision conversion routines.

+-------------------------------------------------------------------------------

+*/

+!!!int32 floatx80_to_int32( floatx80 );

+!!!int32 floatx80_to_int32_round_to_zero( floatx80 );

+!!!int64 floatx80_to_int64( floatx80 );

+!!!int64 floatx80_to_int64_round_to_zero( floatx80 );

+float32 floatx80_to_float32( floatx80 );

+float64 floatx80_to_float64( floatx80 );

+#ifdef FLOAT128

+float128 floatx80_to_float128( floatx80 );

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE extended double-precision rounding precision.  Valid

+values are 32, 64, and 80.

+-------------------------------------------------------------------------------

+*/

+extern !!!int8 floatx80_rounding_precision;

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE extended double-precision operations.

+-------------------------------------------------------------------------------

+*/

+floatx80 floatx80_round_to_int( floatx80 );

+floatx80 floatx80_add( floatx80, floatx80 );

+floatx80 floatx80_sub( floatx80, floatx80 );

+floatx80 floatx80_mul( floatx80, floatx80 );

+floatx80 floatx80_div( floatx80, floatx80 );

+floatx80 floatx80_rem( floatx80, floatx80 );

+floatx80 floatx80_sqrt( floatx80 );

+!!!flag floatx80_eq( floatx80, floatx80 );

+!!!flag floatx80_le( floatx80, floatx80 );

+!!!flag floatx80_lt( floatx80, floatx80 );

+!!!flag floatx80_eq_signaling( floatx80, floatx80 );

+!!!flag floatx80_le_quiet( floatx80, floatx80 );

+!!!flag floatx80_lt_quiet( floatx80, floatx80 );

+!!!flag floatx80_is_signaling_nan( floatx80 );

+

+#endif

+

+#ifdef FLOAT128

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE quadruple-precision conversion routines.

+-------------------------------------------------------------------------------

+*/

+!!!int32 float128_to_int32( float128 );

+!!!int32 float128_to_int32_round_to_zero( float128 );

+!!!int64 float128_to_int64( float128 );

+!!!int64 float128_to_int64_round_to_zero( float128 );

+float32 float128_to_float32( float128 );

+float64 float128_to_float64( float128 );

+#ifdef FLOATX80

+floatx80 float128_to_floatx80( float128 );

+#endif

+

+/*

+-------------------------------------------------------------------------------

+Software IEC/IEEE quadruple-precision operations.

+-------------------------------------------------------------------------------

+*/

+float128 float128_round_to_int( float128 );

+float128 float128_add( float128, float128 );

+float128 float128_sub( float128, float128 );

+float128 float128_mul( float128, float128 );

+float128 float128_div( float128, float128 );

+float128 float128_rem( float128, float128 );

+float128 float128_sqrt( float128 );

+!!!flag float128_eq( float128, float128 );

+!!!flag float128_le( float128, float128 );

+!!!flag float128_lt( float128, float128 );

+!!!flag float128_eq_signaling( float128, float128 );

+!!!flag float128_le_quiet( float128, float128 );

+!!!flag float128_lt_quiet( float128, float128 );

+!!!flag float128_is_signaling_nan( float128 );

+

+#endif

+