diff options
| author | Eric Dong <eric.dong@intel.com> | 2017-08-03 16:41:19 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2017-08-07 15:28:13 +0800 |
| commit | b1bd0d7474f6d3e4162da0dcc8a934eb743e7572 (patch) | |
| tree | ca5336b5df98e6460f760872296008941d901ccb /UefiCpuPkg/CpuDxe/CpuDxe.c | |
| parent | ff481bc5c60f05149f1679ab657bf610afc55f37 (diff) | |
| download | edk2-b1bd0d7474f6d3e4162da0dcc8a934eb743e7572.tar.gz edk2-b1bd0d7474f6d3e4162da0dcc8a934eb743e7572.tar.bz2 edk2-b1bd0d7474f6d3e4162da0dcc8a934eb743e7572.zip | |
UefiCpuPkg CpuDxe: Remove reference deprecated macro.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg/CpuDxe/CpuDxe.c')
| -rw-r--r-- | UefiCpuPkg/CpuDxe/CpuDxe.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 621867090f..b386f3b677 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -31,57 +31,57 @@ UINT64 mTimerPeriod = 0; FIXED_MTRR mFixedMtrrTable[] = {
{
- MTRR_LIB_IA32_MTRR_FIX64K_00000,
+ MSR_IA32_MTRR_FIX64K_00000,
0,
0x10000
},
{
- MTRR_LIB_IA32_MTRR_FIX16K_80000,
+ MSR_IA32_MTRR_FIX16K_80000,
0x80000,
0x4000
},
{
- MTRR_LIB_IA32_MTRR_FIX16K_A0000,
+ MSR_IA32_MTRR_FIX16K_A0000,
0xA0000,
0x4000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_C0000,
+ MSR_IA32_MTRR_FIX4K_C0000,
0xC0000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_C8000,
+ MSR_IA32_MTRR_FIX4K_C8000,
0xC8000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_D0000,
+ MSR_IA32_MTRR_FIX4K_D0000,
0xD0000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_D8000,
+ MSR_IA32_MTRR_FIX4K_D8000,
0xD8000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_E0000,
+ MSR_IA32_MTRR_FIX4K_E0000,
0xE0000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_E8000,
+ MSR_IA32_MTRR_FIX4K_E8000,
0xE8000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_F0000,
+ MSR_IA32_MTRR_FIX4K_F0000,
0xF0000,
0x1000
},
{
- MTRR_LIB_IA32_MTRR_FIX4K_F8000,
+ MSR_IA32_MTRR_FIX4K_F8000,
0xF8000,
0x1000
},
|