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| author | Jian J Wang <jian.j.wang@intel.com> | 2017-12-07 20:16:29 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2017-12-08 14:38:50 +0800 |
| commit | e9415e4846dd8e93c5cabff66e3d599a7844a740 (patch) | |
| tree | bfb4ad7d4eb40609959f82c912e002e1ac7559a9 /UefiCpuPkg/CpuDxe | |
| parent | 4cb21e1e728cebce5b9ec4a6509ec67598719ba0 (diff) | |
| download | edk2-e9415e4846dd8e93c5cabff66e3d599a7844a740.tar.gz edk2-e9415e4846dd8e93c5cabff66e3d599a7844a740.tar.bz2 edk2-e9415e4846dd8e93c5cabff66e3d599a7844a740.zip | |
UefiCpuPkg/MpLib: Add GDTR, IDTR and TR in saved AP data
In current implementation of CPU MP service, AP is initialized with data
copied from BSP. Stack switch required by Stack Guard feature needs different
GDT, IDT table and task gates for each logic processor. This patch adds GDTR,
IDTR and TR into structure CPU_VOLATILE_REGISTERS and related code in save
and restore methods. This can make sure that any changes to GDT, IDT and task
gate for an AP will be kept from overwritten by BSP settings.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
Diffstat (limited to 'UefiCpuPkg/CpuDxe')
0 files changed, 0 insertions, 0 deletions