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| author | Jian J Wang <jian.j.wang@intel.com> | 2017-09-29 11:08:27 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2017-09-30 10:25:25 +0800 |
| commit | c46bced224b42d5a03bc8b207167829aa4e7bc5b (patch) | |
| tree | f89cf9ee165cf70d5d92888b41d0db1c23a5cab1 /UefiCpuPkg/CpuDxe | |
| parent | aa57c0f096e2e0d555038fc63caea34398f219e6 (diff) | |
| download | edk2-c46bced224b42d5a03bc8b207167829aa4e7bc5b.tar.gz edk2-c46bced224b42d5a03bc8b207167829aa4e7bc5b.tar.bz2 edk2-c46bced224b42d5a03bc8b207167829aa4e7bc5b.zip | |
UefiCpuPkg/CpuDxe: Fix assert issue on IA32 platform
This patch is to fix an assert issue during booting IA32 platforms
such as OvmfIa32 or Quark. This issue is caused by trying to access
page table on a platform without page table. A check is added to
avoid the assert.
Bug tracker: https://bugzilla.tianocore.org/show_bug.cgi?id=724
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Diffstat (limited to 'UefiCpuPkg/CpuDxe')
| -rw-r--r-- | UefiCpuPkg/CpuDxe/CpuDxe.c | 50 |
1 files changed, 40 insertions, 10 deletions
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 4e8fa100e0..8ddebabd02 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -683,7 +683,7 @@ SetGcdMemorySpaceAttributes ( **/
VOID
-RefreshGcdMemoryAttributes (
+RefreshMemoryAttributesFromMtrr (
VOID
)
{
@@ -704,14 +704,9 @@ RefreshGcdMemoryAttributes ( UINT32 FirmwareVariableMtrrCount;
UINT8 DefaultMemoryType;
- if (!IsMtrrSupported ()) {
- return;
- }
-
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
ASSERT (FirmwareVariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
- mIsFlushingGCD = TRUE;
MemorySpaceMap = NULL;
//
@@ -862,11 +857,46 @@ RefreshGcdMemoryAttributes ( if (MemorySpaceMap != NULL) {
FreePool (MemorySpaceMap);
}
+}
- //
- // Update page attributes
- //
- RefreshGcdMemoryAttributesFromPaging();
+/**
+ Check if paging is enabled or not.
+**/
+BOOLEAN
+IsPagingAndPageAddressExtensionsEnabled (
+ VOID
+ )
+{
+ IA32_CR0 Cr0;
+ IA32_CR4 Cr4;
+
+ Cr0.UintN = AsmReadCr0 ();
+ Cr4.UintN = AsmReadCr4 ();
+
+ return ((Cr0.Bits.PG != 0) && (Cr4.Bits.PAE != 0));
+}
+
+/**
+ Refreshes the GCD Memory Space attributes according to MTRRs and Paging.
+
+ This function refreshes the GCD Memory Space attributes according to MTRRs
+ and page tables.
+
+**/
+VOID
+RefreshGcdMemoryAttributes (
+ VOID
+ )
+{
+ mIsFlushingGCD = TRUE;
+
+ if (IsMtrrSupported ()) {
+ RefreshMemoryAttributesFromMtrr ();
+ }
+
+ if (IsPagingAndPageAddressExtensionsEnabled ()) {
+ RefreshGcdMemoryAttributesFromPaging ();
+ }
mIsFlushingGCD = FALSE;
}
|