summaryrefslogtreecommitdiffstats
path: root/UefiCpuPkg/Library/BaseUefiCpuLib
diff options
context:
space:
mode:
authorLiming Gao <liming.gao@intel.com>2018-06-04 13:36:40 +0800
committerLiming Gao <liming.gao@intel.com>2018-06-07 15:27:36 +0800
commit236601136fea5dcfad4b57ce4a81cf980a22e1f4 (patch)
treee772116f4b80f141b3a85b56aca20ff2bc1bf6c6 /UefiCpuPkg/Library/BaseUefiCpuLib
parentec51c05936ee46f5a8cc11e3b127e153af3e3943 (diff)
downloadedk2-236601136fea5dcfad4b57ce4a81cf980a22e1f4.tar.gz
edk2-236601136fea5dcfad4b57ce4a81cf980a22e1f4.tar.bz2
edk2-236601136fea5dcfad4b57ce4a81cf980a22e1f4.zip
UefiCpuPkg: Remove X86 ASM and S files
NASM has replaced ASM and S files. 1. Remove ASM from all modules expect for the ones in ResetVector directory. The ones in ResetVector directory are included by Vtf0.nasmb. They are also nasm style. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Library/BaseUefiCpuLib')
-rw-r--r--UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf4
-rw-r--r--UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm79
-rw-r--r--UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm62
3 files changed, 1 insertions, 144 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
index ce5d3aab01..0de86d1a85 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
@@ -3,7 +3,7 @@
#
# The library routines are UEFI specification compliant.
#
-# Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,12 +30,10 @@
#
[Sources.IA32]
- Ia32/InitializeFpu.asm
Ia32/InitializeFpu.nasm
Ia32/InitializeFpu.S
[Sources.X64]
- X64/InitializeFpu.asm
X64/InitializeFpu.nasm
X64/InitializeFpu.S
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm
deleted file mode 100644
index 3c31da98f6..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm
+++ /dev/null
@@ -1,79 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-
- .686
- .model flat,C
- .const
-;
-; Float control word initial value:
-; all exceptions masked, double-precision, round-to-nearest
-;
-mFpuControlWord DW 027Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord DD 01F80h
-
- .xmm
- .code
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
- push ebx
-
- ;
- ; Initialize floating point units
- ;
- finit
- fldcw mFpuControlWord
-
- ;
- ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
- ; whether the processor supports SSE instruction.
- ;
- mov eax, 1
- cpuid
- bt edx, 25
- jnc Done
-
- ;
- ; Set OSFXSR bit 9 in CR4
- ;
- mov eax, cr4
- or eax, BIT9
- mov cr4, eax
-
- ;
- ; The processor should support SSE instruction and we can use
- ; ldmxcsr instruction
- ;
- ldmxcsr mMmxControlWord
-Done:
- pop ebx
-
- ret
-
-InitializeFloatingPointUnits ENDP
-
-END
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
deleted file mode 100644
index 331af15cc6..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
+++ /dev/null
@@ -1,62 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-
-.const
-;
-; Float control word initial value:
-; all exceptions masked, double-extended-precision, round-to-nearest
-;
-mFpuControlWord DW 037Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord DD 01F80h
-
-.code
-
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
- ;
- ; Initialize floating point units
- ;
- ; The following opcodes stand for instruction 'finit'
- ; to be supported by some 64-bit assemblers
- ;
- DB 9Bh, 0DBh, 0E3h
- fldcw mFpuControlWord
-
- ;
- ; Set OSFXSR bit 9 in CR4
- ;
- mov rax, cr4
- or rax, BIT9
- mov cr4, rax
-
- ldmxcsr mMmxControlWord
-
- ret
-InitializeFloatingPointUnits ENDP
-
-END