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| author | Jian J Wang <jian.j.wang@intel.com> | 2017-12-07 20:15:12 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2017-12-08 14:38:48 +0800 |
| commit | 0ff5aa9cae1ea276668fa4398d047aa9fda3c2c7 (patch) | |
| tree | 22a3efd156336841db09159ddbcd18bfdc0f55a8 /UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf | |
| parent | 364a54742f569b7221f0022594ef3d8384a8517c (diff) | |
| download | edk2-0ff5aa9cae1ea276668fa4398d047aa9fda3c2c7.tar.gz edk2-0ff5aa9cae1ea276668fa4398d047aa9fda3c2c7.tar.bz2 edk2-0ff5aa9cae1ea276668fa4398d047aa9fda3c2c7.zip | |
UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
Diffstat (limited to 'UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf')
| -rw-r--r-- | UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf index 75443288a9..4c0d435136 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf @@ -30,6 +30,7 @@ [Sources.Ia32]
Ia32/ExceptionHandlerAsm.asm
Ia32/ExceptionHandlerAsm.nasm
+ Ia32/ExceptionTssEntryAsm.nasm
Ia32/ExceptionHandlerAsm.S
Ia32/ArchExceptionHandler.c
Ia32/ArchInterruptDefs.h
|