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author | Xie, Yuanhao <yuanhao.xie@intel.com> | 2023-06-28 16:47:22 +0800 |
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committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-07-11 02:47:27 +0000 |
commit | 8bb018afaf2a4af16e410bba01b42d245250c82c (patch) | |
tree | ef8e5183abb8e618a1a0f8bb9b9796e6894ecc71 /UefiCpuPkg/Library/MpInitLib/MpHandOff.h | |
parent | 243212b0d0bb33d0a64db8cd974d243e5aefdf3d (diff) | |
download | edk2-8bb018afaf2a4af16e410bba01b42d245250c82c.tar.gz edk2-8bb018afaf2a4af16e410bba01b42d245250c82c.tar.bz2 edk2-8bb018afaf2a4af16e410bba01b42d245250c82c.zip |
UefiCpuPkg: Create MpHandOff.
Initially, the purpose of the Hob was twofold: it served as a way to
transfer information from PEI to DXE. However, during the DXE phase,
only a few fields from the CPU_MP_DATA which collected in PEI phase were
needed. A new Hob was specifically created to transfer information
to the DXE phase. This new Hob contained only the essential fields
required for reuse in DXE. For instance, instead of directly including
the BspNumber in MpHandOff, the DXE phase introduced the use of
GetBspNumber() to collect the BspNumber from ApicID and CpuCount.
The SaveCpuMpData() function was updated to construct the MP_HAND_OFF
Hob. Additionally, the function introduced the MP_HAND_OFF_SIGNAL,
which solely served the purpose of awakening the APs
and transitioning their context from PEI to DXE. The
WaitLoopExecutionMode field indicated whether the bit mode of PEI
matched that of DXE. Both of them were filled only if the ApLoopMode
was not ApInHltLoop. In the case of ApInHltLoop, it remained necessary
to wake up the APs using the init-sipi-sipi sequence. This improvement
still allow INIT-SIPI-SIPI even APs are wait in Run/Mwait loop mode.
The function GetMpHandOffHob() was added to facilitate access to the
collected MpHandOff in the DXE phase. The CpuMpData in the DXE phase
was updated by gathering information from MpHandOff. Since MpHandOff
replaced the usage of OldCpuMpData and contained essential information
from the PEI phase to the DXE phase. AmdSevUpdateCpuMpData was included
to maintain the original implementation of AmdSev, ensuring that
OldCpuMpData->NewCpuMpData pointed to CpuMpData.
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Diffstat (limited to 'UefiCpuPkg/Library/MpInitLib/MpHandOff.h')
-rw-r--r-- | UefiCpuPkg/Library/MpInitLib/MpHandOff.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/MpInitLib/MpHandOff.h b/UefiCpuPkg/Library/MpInitLib/MpHandOff.h new file mode 100644 index 0000000000..83e4055ec9 --- /dev/null +++ b/UefiCpuPkg/Library/MpInitLib/MpHandOff.h @@ -0,0 +1,47 @@ +/** @file
+ Defines the HOB GUID used to describe the MSEG memory region allocated in PEI.
+ Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef MP_HANDOFF_H_
+#define MP_HANDOFF_H_
+
+#define MP_HANDOFF_GUID \
+ { \
+ 0x11e2bd88, 0xed38, 0x4abd, {0xa3, 0x99, 0x21, 0xf2, 0x5f, 0xd0, 0x7a, 0x60 } \
+ }
+
+extern EFI_GUID mMpHandOffGuid;
+
+//
+// The information required to transfer from the PEI phase to the
+// DXE phase is contained within the MP_HAND_OFF and PROCESSOR_HAND_OFF.
+// If the SizeOfPointer (WaitLoopExecutionMode) of both phases are equal,
+// and the APs is not in halt mode,
+// then the APs can be awakened by triggering the start-up
+// signal, rather than using INIT-SIPI-SIPI.
+// To trigger the start-up signal, BSP writes the specified
+// StartupSignalValue to the StartupSignalAddress of each processor.
+// This address is monitored by the APs.
+//
+typedef struct {
+ UINT32 ApicId;
+ UINT32 Health;
+ UINT64 StartupSignalAddress;
+ UINT64 StartupProcedureAddress;
+} PROCESSOR_HAND_OFF;
+
+typedef struct {
+ //
+ // The ProcessorIndex indicates the range of processors. If it is set to 0, it signifies
+ // processors from 0 to CpuCount - 1. Multiple instances in the HOB list describe
+ // processors from ProcessorIndex to ProcessorIndex + CpuCount - 1.
+ //
+ UINT32 ProcessorIndex;
+ UINT32 CpuCount;
+ UINT32 WaitLoopExecutionMode;
+ UINT32 StartupSignalValue;
+ PROCESSOR_HAND_OFF Info[];
+} MP_HAND_OFF;
+#endif
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