diff options
| author | Eric Dong <eric.dong@intel.com> | 2019-07-31 15:59:26 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2019-08-02 16:41:19 +0800 |
| commit | 89164babecceb03047c4aec8e76c4d838d703095 (patch) | |
| tree | 59fd7ff5fd4ac7e872f0a8508e4ab4dd81d1709c /UefiCpuPkg/Library/MpInitLib/MpLib.c | |
| parent | 5e4ebd9ea5d72c1a2824d23a5dc92c7b50694719 (diff) | |
| download | edk2-89164babecceb03047c4aec8e76c4d838d703095.tar.gz edk2-89164babecceb03047c4aec8e76c4d838d703095.tar.bz2 edk2-89164babecceb03047c4aec8e76c4d838d703095.zip | |
UefiCpuPkg/MpInitLib: don't shadow the microcode patch twice.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1982
MpInitLibInitialize in MpLib.c will be invoked on both PEI and DXE
CPU code, MicrocodeDetect would be performed twice and copy
Microcode from flash to memory twice as well, which consider as
duplicate work to lead longer boot time.
This patch just use microcode memory copied in PEI phase if exist.
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Library/MpInitLib/MpLib.c')
| -rw-r--r-- | UefiCpuPkg/Library/MpInitLib/MpLib.c | 62 |
1 files changed, 33 insertions, 29 deletions
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 572495ec36..a1ad665564 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1607,38 +1607,42 @@ MpInitLibInitialize ( CpuMpData->SwitchBspFlag = FALSE;
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
- CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
- //
- // If platform has more than one CPU, relocate microcode to memory to reduce
- // loading microcode time.
- //
- MicrocodePatchInRam = NULL;
- if (MaxLogicalProcessorNumber > 1) {
- MicrocodePatchInRam = AllocatePages (
- EFI_SIZE_TO_PAGES (
- (UINTN)CpuMpData->MicrocodePatchRegionSize
- )
- );
- }
- if (MicrocodePatchInRam == NULL) {
- //
- // there is only one processor, or no microcode patch is available, or
- // memory allocation failed
- //
- CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
- } else {
+ if (OldCpuMpData == NULL) {
+ CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
//
- // there are multiple processors, and a microcode patch is available, and
- // memory allocation succeeded
+ // If platform has more than one CPU, relocate microcode to memory to reduce
+ // loading microcode time.
//
- CopyMem (
- MicrocodePatchInRam,
- (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),
- (UINTN)CpuMpData->MicrocodePatchRegionSize
- );
- CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;
+ MicrocodePatchInRam = NULL;
+ if (MaxLogicalProcessorNumber > 1) {
+ MicrocodePatchInRam = AllocatePages (
+ EFI_SIZE_TO_PAGES (
+ (UINTN)CpuMpData->MicrocodePatchRegionSize
+ )
+ );
+ }
+ if (MicrocodePatchInRam == NULL) {
+ //
+ // there is only one processor, or no microcode patch is available, or
+ // memory allocation failed
+ //
+ CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
+ } else {
+ //
+ // there are multiple processors, and a microcode patch is available, and
+ // memory allocation succeeded
+ //
+ CopyMem (
+ MicrocodePatchInRam,
+ (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),
+ (UINTN)CpuMpData->MicrocodePatchRegionSize
+ );
+ CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;
+ }
+ }else {
+ CpuMpData->MicrocodePatchRegionSize = OldCpuMpData->MicrocodePatchRegionSize;
+ CpuMpData->MicrocodePatchAddress = OldCpuMpData->MicrocodePatchAddress;
}
-
InitializeSpinLock(&CpuMpData->MpLock);
//
|