UefiCpuPkg/MpInitLib: Reduce the size when loading microcode patches

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2429

This commit will attempt to reduce the copy size when loading the
microcode patches data from flash into memory.

Such optimization is done by a pre-process of the microcode patch headers
(on flash). A microcode patch will be loaded into memory only when the
below 3 criteria are met:

A. With a microcode patch header (which means the data is not padding data
   between microcode patches);
B. The 'ProcessorSignature' & 'ProcessorFlags' fields in the header match
   at least one processor within system;
C. If the Extended Signature Table exists in a microcode patch, the
   'ProcessorSignature' & 'ProcessorFlag' fields in the table entries
   match at least one processor within system.

Criterion B and C will require all the processors to be woken up once to
collect their CPUID and Platform ID information. Hence, this commit will
move the copy, detect and apply of microcode patch on BSP and APs after
all the processors have been woken up.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>

1 files changed, 28 insertions, 62 deletions

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index d5077e080e..c72bf3c9ee 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -628,10 +628,6 @@ ApWakeupFunction (
       ApTopOfStack  = CpuMpData->Buffer + (ProcessorNumber + 1) * CpuMpData->CpuApStackSize;

       BistData = *(UINT32 *) ((UINTN) ApTopOfStack - sizeof (UINTN));

       //

-      // Do some AP initialize sync

-      //

-      ApInitializeSync (CpuMpData);

-      //

       // CpuMpData->CpuData[0].VolatileRegisters is initialized based on BSP environment,

       //   to initialize AP in InitConfig path.

       // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a different IDT shared by all APs.

@@ -1615,7 +1611,6 @@ MpInitLibInitialize (
   UINTN                    ApResetVectorSize;

   UINTN                    BackupBufferAddr;

   UINTN                    ApIdtBase;

-  VOID                     *MicrocodePatchInRam;

 

   OldCpuMpData = GetCpuMpDataFromGuidedHob ();

   if (OldCpuMpData == NULL) {

@@ -1683,39 +1678,7 @@ MpInitLibInitialize (
   CpuMpData->SwitchBspFlag    = FALSE;

   CpuMpData->CpuData          = (CPU_AP_DATA *) (CpuMpData + 1);

   CpuMpData->CpuInfoInHob     = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);

-  if (OldCpuMpData == NULL) {

-    CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);

-    //

-    // If platform has more than one CPU, relocate microcode to memory to reduce

-    // loading microcode time.

-    //

-    MicrocodePatchInRam = NULL;

-    if (MaxLogicalProcessorNumber > 1) {

-      MicrocodePatchInRam = AllocatePages (

-                              EFI_SIZE_TO_PAGES (

-                                (UINTN)CpuMpData->MicrocodePatchRegionSize

-                                )

-                              );

-    }

-    if (MicrocodePatchInRam == NULL) {

-      //

-      // there is only one processor, or no microcode patch is available, or

-      // memory allocation failed

-      //

-      CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);

-    } else {

-      //

-      // there are multiple processors, and a microcode patch is available, and

-      // memory allocation succeeded

-      //

-      CopyMem (

-        MicrocodePatchInRam,

-        (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),

-        (UINTN)CpuMpData->MicrocodePatchRegionSize

-        );

-      CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;

-    }

-  }else {

+  if (OldCpuMpData != NULL) {

     CpuMpData->MicrocodePatchRegionSize = OldCpuMpData->MicrocodePatchRegionSize;

     CpuMpData->MicrocodePatchAddress    = OldCpuMpData->MicrocodePatchAddress;

   }

@@ -1762,14 +1725,6 @@ MpInitLibInitialize (
       (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);

   }

   //

-  // Load Microcode on BSP

-  //

-  MicrocodeDetect (CpuMpData, TRUE);

-  //

-  // Store BSP's MTRR setting

-  //

-  MtrrGetAllMtrrs (&CpuMpData->MtrrTable);

-  //

   // Enable the local APIC for Virtual Wire Mode.

   //

   ProgramVirtualWireMode ();

@@ -1781,6 +1736,11 @@ MpInitLibInitialize (
       //

       CollectProcessorCount (CpuMpData);

     }

+

+    //

+    // Load required microcode patches data into memory

+    //

+    LoadMicrocodePatch (CpuMpData);

   } else {

     //

     // APs have been wakeup before, just get the CPU Information

@@ -1788,7 +1748,6 @@ MpInitLibInitialize (
     //

     CpuMpData->CpuCount  = OldCpuMpData->CpuCount;

     CpuMpData->BspNumber = OldCpuMpData->BspNumber;

-    CpuMpData->InitFlag  = ApInitReconfig;

     CpuMpData->CpuInfoInHob = OldCpuMpData->CpuInfoInHob;

     CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;

     for (Index = 0; Index < CpuMpData->CpuCount; Index++) {

@@ -1797,21 +1756,28 @@ MpInitLibInitialize (
       CpuMpData->CpuData[Index].ApFunction = 0;

       CopyMem (&CpuMpData->CpuData[Index].VolatileRegisters, &VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));

     }

-    if (MaxLogicalProcessorNumber > 1) {

-      //

-      // Wakeup APs to do some AP initialize sync

-      //

-      WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);

-      //

-      // Wait for all APs finished initialization

-      //

-      while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {

-        CpuPause ();

-      }

-      CpuMpData->InitFlag = ApInitDone;

-      for (Index = 0; Index < CpuMpData->CpuCount; Index++) {

-        SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);

-      }

+  }

+

+  //

+  // Detect and apply Microcode on BSP

+  //

+  MicrocodeDetect (CpuMpData, TRUE);

+  //

+  // Store BSP's MTRR setting

+  //

+  MtrrGetAllMtrrs (&CpuMpData->MtrrTable);

+

+  //

+  // Wakeup APs to do some AP initialize sync (Microcode & MTRR)

+  //

+  if (CpuMpData->CpuCount > 1) {

+    WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);

+    while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {

+      CpuPause ();

+    }

+

+    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {

+      SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);

     }

   }