UefiCpuPkg/PiSmmCpuDxeSmm: Add MemoryMapped in SetProcessorRegister()

REGISTER_TYPE in UefiCpuPkg/Include/AcpiCpuData.h defines a MemoryMapped
enum value.  However support for the MemoryMapped enum is missing from
the implementation of SetProcessorRegister().  This patch adds support
for MemoryMapped type SetProcessorRegister().

One spin lock is added to avoid potential conflict when multiple processor
update the same memory space.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 5e63f8aab2..4c995ec270 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -34,6 +34,11 @@ typedef struct {
   UINTN LongJumpOffset;

 } MP_ASSEMBLY_ADDRESS_MAP;

 

+//

+// Spin lock used to serialize MemoryMapped operation

+//

+SPIN_LOCK                *mMemoryMappedLock = NULL;

+

 /**

   Get starting address and size of the rendezvous entry for APs.

   Information for fixing a jump instruction in the code is also returned.

@@ -284,6 +289,19 @@ SetProcessorRegister (
       }

       break;

     //

+    // MemoryMapped operations

+    //

+    case MemoryMapped:

+      AcquireSpinLock (mMemoryMappedLock);

+      MmioBitFieldWrite32 (

+        RegisterTableEntry->Index,

+        RegisterTableEntry->ValidBitStart,

+        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,

+        (UINT32)RegisterTableEntry->Value

+        );

+      ReleaseSpinLock (mMemoryMappedLock);

+      break;

+    //

     // Enable or disable cache

     //

     case CacheControl: