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author | Jeff Fan <jeff.fan@intel.com> | 2016-04-08 13:55:14 +0800 |
---|---|---|
committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-05-16 10:40:19 -0700 |
commit | f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb (patch) | |
tree | cf3df079cbe6a3b8084a9d1cbb343cac4d2d50e5 /UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | |
parent | 846704334c4083b8e86e921d3ffcbf7d886fe5b9 (diff) | |
download | edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.tar.gz edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.tar.bz2 edk2-f85d3ce2efc21da5d874b3e4d880e5682c6fe7cb.zip |
UefiCpuPkg/PiSmmCpuDxeSmm: Use public MSR_IA32_MISC_ENABLE definition
Use the MSR MSR_IA32_MISC_ENABLE definition defined in UefiCpuPkg/Include and
remove the local definition.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c')
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 185cb3d593..952cc87a20 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -1013,13 +1013,14 @@ SmiRendezvous ( IN UINTN CpuIndex
)
{
- EFI_STATUS Status;
- BOOLEAN ValidSmi;
- BOOLEAN IsBsp;
- BOOLEAN BspInProgress;
- UINTN Index;
- UINTN Cr2;
- BOOLEAN XdDisableFlag;
+ EFI_STATUS Status;
+ BOOLEAN ValidSmi;
+ BOOLEAN IsBsp;
+ BOOLEAN BspInProgress;
+ UINTN Index;
+ UINTN Cr2;
+ BOOLEAN XdDisableFlag;
+ MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;
//
// Save Cr2 because Page Fault exception in SMM may override its value
@@ -1083,9 +1084,11 @@ SmiRendezvous ( //
XdDisableFlag = FALSE;
if (mXdSupported) {
- if ((AsmReadMsr64 (MSR_IA32_MISC_ENABLE) & B_XD_DISABLE_BIT) != 0) {
+ MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
+ if (MiscEnableMsr.Bits.XD == 1) {
XdDisableFlag = TRUE;
- AsmMsrAnd64 (MSR_IA32_MISC_ENABLE, ~B_XD_DISABLE_BIT);
+ MiscEnableMsr.Bits.XD = 0;
+ AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
}
ActivateXd ();
}
@@ -1176,7 +1179,9 @@ SmiRendezvous ( // Restore XD
//
if (XdDisableFlag) {
- AsmMsrOr64 (MSR_IA32_MISC_ENABLE, B_XD_DISABLE_BIT);
+ MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
+ MiscEnableMsr.Bits.XD = 1;
+ AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
}
}
|