UefiCpuPkg: Not touch SmmFeatureControl if Code_Access_Chk not Set

Bit SMM_Code_Access_Chk (SMM-RO) in MSR_SMM_MCA_CAP is defined in SDM.
If set to 1 indicates that the SMM code access restriction is supported and the
MSR_SMM_FEATURE_CONTROL is supported.

If this bit is not set, we needn't to access register SmmFetureControl.
Otherwise, #GP exception may happen.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> 
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18905 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 3 insertions, 10 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index de681c0a30..532ac0974b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -1309,9 +1309,9 @@ ConfigSmmCodeAccessCheckOnCurrentProcessor (
   NewSmmFeatureControlMsr = SmmFeatureControlMsr;

   if (mSmmCodeAccessCheckEnable) {

     NewSmmFeatureControlMsr |= SMM_CODE_CHK_EN_BIT;

-  }

-  if (FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {

-    NewSmmFeatureControlMsr |= SMM_FEATURE_CONTROL_LOCK_BIT;

+    if (FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {

+      NewSmmFeatureControlMsr |= SMM_FEATURE_CONTROL_LOCK_BIT;

+    }

   }

 

   //

@@ -1354,13 +1354,6 @@ ConfigSmmCodeAccessCheck (
   //

   if ((AsmReadMsr64 (EFI_MSR_SMM_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) == 0) {

     mSmmCodeAccessCheckEnable = FALSE;

-  }

-

-  //

-  // If the SMM Code Access Check feature is disabled and the Feature Control MSR

-  // is not being locked, then no additional work is required

-  //

-  if (!mSmmCodeAccessCheckEnable && !FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {

     return;

   }