diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2016-03-22 10:15:53 +0800 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-05-24 15:20:01 -0700 |
| commit | fe3a75bc41545125f76c28238016658f48833ba2 (patch) | |
| tree | 36d6c549bf2bb30b9fa9cb3cba443fcb531b62a1 /UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | |
| parent | d67b73cc381219f16f5d120e733efb7ffaa814f0 (diff) | |
| download | edk2-fe3a75bc41545125f76c28238016658f48833ba2.tar.gz edk2-fe3a75bc41545125f76c28238016658f48833ba2.tar.bz2 edk2-fe3a75bc41545125f76c28238016658f48833ba2.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Using global semaphores in aligned buffer
Update all global semaphores to the ones in allocated aligned
semaphores buffer.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index f846e190ba..eca42aa8d6 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -314,10 +314,10 @@ typedef struct { // so that UC cache-ability can be set together.
//
SMM_CPU_DATA_BLOCK *CpuData;
- volatile UINT32 Counter;
+ volatile UINT32 *Counter;
volatile UINT32 BspIndex;
- volatile BOOLEAN InsideSmm;
- volatile BOOLEAN AllCpusInSync;
+ volatile BOOLEAN *InsideSmm;
+ volatile BOOLEAN *AllCpusInSync;
volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
volatile BOOLEAN SwitchBsp;
volatile BOOLEAN *CandidateBsp;
@@ -388,6 +388,8 @@ extern UINTN mSmmStackArrayEnd; extern UINTN mSmmStackSize;
extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
extern IA32_DESCRIPTOR gcSmiInitGdtr;
+extern SPIN_LOCK *mPFLock;
+extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
/**
Create 4G PageTable in SMRAM.
|